Commit | Line | Data |
---|---|---|
a0c7056f | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * budget-core.c: driver for the SAA7146 based Budget DVB cards | |
4 | * | |
5 | * Compiled from various sources by Michael Hunold <michael@mihu.de> | |
6 | * | |
7 | * Copyright (C) 2002 Ralph Metzler <rjkm@metzlerbros.de> | |
8 | * | |
9 | * Copyright (C) 1999-2002 Ralph Metzler | |
10 | * & Marcus Metzler for convergence integrated media GmbH | |
11 | * | |
12 | * 26feb2004 Support for FS Activy Card (Grundig tuner) by | |
13 | * Michael Dreher <michael@5dot1.de>, | |
14 | * Oliver Endriss <o.endriss@gmx.de>, | |
15 | * Andreas 'randy' Weinberger | |
16 | * | |
991ce92f | 17 | * the project's page is at https://linuxtv.org |
1da177e4 LT |
18 | */ |
19 | ||
1da177e4 LT |
20 | |
21 | #include "budget.h" | |
22 | #include "ttpci-eeprom.h" | |
23 | ||
afa47abf IS |
24 | #define TS_WIDTH (2 * TS_SIZE) |
25 | #define TS_WIDTH_ACTIVY TS_SIZE | |
fd9c66e2 | 26 | #define TS_WIDTH_DVBC TS_SIZE |
afa47abf IS |
27 | #define TS_HEIGHT_MASK 0xf00 |
28 | #define TS_HEIGHT_MASK_ACTIVY 0xc00 | |
fd9c66e2 | 29 | #define TS_HEIGHT_MASK_DVBC 0xe00 |
afa47abf IS |
30 | #define TS_MIN_BUFSIZE_K 188 |
31 | #define TS_MAX_BUFSIZE_K 1410 | |
32 | #define TS_MAX_BUFSIZE_K_ACTIVY 564 | |
fd9c66e2 | 33 | #define TS_MAX_BUFSIZE_K_DVBC 1316 |
afa47abf IS |
34 | #define BUFFER_WARNING_WAIT (30*HZ) |
35 | ||
1da177e4 | 36 | int budget_debug; |
afa47abf | 37 | static int dma_buffer_size = TS_MIN_BUFSIZE_K; |
1da177e4 | 38 | module_param_named(debug, budget_debug, int, 0644); |
afa47abf | 39 | module_param_named(bufsize, dma_buffer_size, int, 0444); |
1da177e4 | 40 | MODULE_PARM_DESC(debug, "Turn on/off budget debugging (default:off)."); |
afa47abf | 41 | MODULE_PARM_DESC(bufsize, "DMA buffer size in KB, default: 188, min: 188, max: 1410 (Activy: 564)"); |
1da177e4 LT |
42 | |
43 | /**************************************************************************** | |
44 | * TT budget / WinTV Nova | |
45 | ****************************************************************************/ | |
46 | ||
47 | static int stop_ts_capture(struct budget *budget) | |
48 | { | |
49 | dprintk(2, "budget: %p\n", budget); | |
50 | ||
1da177e4 LT |
51 | saa7146_write(budget->dev, MC1, MASK_20); // DMA3 off |
52 | SAA7146_IER_DISABLE(budget->dev, MASK_10); | |
53 | return 0; | |
54 | } | |
55 | ||
56 | static int start_ts_capture(struct budget *budget) | |
57 | { | |
58 | struct saa7146_dev *dev = budget->dev; | |
59 | ||
60 | dprintk(2, "budget: %p\n", budget); | |
61 | ||
32e4c3a5 OE |
62 | if (!budget->feeding || !budget->fe_synced) |
63 | return 0; | |
1da177e4 LT |
64 | |
65 | saa7146_write(dev, MC1, MASK_20); // DMA3 off | |
66 | ||
afa47abf | 67 | memset(budget->grabbing, 0x00, budget->buffer_size); |
1da177e4 LT |
68 | |
69 | saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000)); | |
70 | ||
1da177e4 LT |
71 | budget->ttbp = 0; |
72 | ||
73 | /* | |
74 | * Signal path on the Activy: | |
75 | * | |
76 | * tuner -> SAA7146 port A -> SAA7146 BRS -> SAA7146 DMA3 -> memory | |
77 | * | |
78 | * Since the tuner feeds 204 bytes packets into the SAA7146, | |
79 | * DMA3 is configured to strip the trailing 16 FEC bytes: | |
80 | * Pitch: 188, NumBytes3: 188, NumLines3: 1024 | |
81 | */ | |
82 | ||
9101e622 | 83 | switch(budget->card->type) { |
1da177e4 LT |
84 | case BUDGET_FS_ACTIVY: |
85 | saa7146_write(dev, DD1_INIT, 0x04000000); | |
86 | saa7146_write(dev, MC2, (MASK_09 | MASK_25)); | |
87 | saa7146_write(dev, BRS_CTRL, 0x00000000); | |
88 | break; | |
89 | case BUDGET_PATCH: | |
90 | saa7146_write(dev, DD1_INIT, 0x00000200); | |
91 | saa7146_write(dev, MC2, (MASK_10 | MASK_26)); | |
92 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
93 | break; | |
aa323ac8 HB |
94 | case BUDGET_CIN1200C_MK3: |
95 | case BUDGET_KNC1C_MK3: | |
93165b77 | 96 | case BUDGET_KNC1C_TDA10024: |
aa323ac8 HB |
97 | case BUDGET_KNC1CP_MK3: |
98 | if (budget->video_port == BUDGET_VIDEO_PORTA) { | |
99 | saa7146_write(dev, DD1_INIT, 0x06000200); | |
100 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
101 | saa7146_write(dev, BRS_CTRL, 0x00000000); | |
102 | } else { | |
103 | saa7146_write(dev, DD1_INIT, 0x00000600); | |
104 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
105 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
106 | } | |
107 | break; | |
1da177e4 LT |
108 | default: |
109 | if (budget->video_port == BUDGET_VIDEO_PORTA) { | |
110 | saa7146_write(dev, DD1_INIT, 0x06000200); | |
111 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
112 | saa7146_write(dev, BRS_CTRL, 0x00000000); | |
113 | } else { | |
114 | saa7146_write(dev, DD1_INIT, 0x02000600); | |
115 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
116 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
117 | } | |
118 | } | |
119 | ||
120 | saa7146_write(dev, MC2, (MASK_08 | MASK_24)); | |
121 | mdelay(10); | |
122 | ||
123 | saa7146_write(dev, BASE_ODD3, 0); | |
fd9c66e2 HB |
124 | if (budget->buffer_size > budget->buffer_height * budget->buffer_width) { |
125 | // using odd/even buffers | |
126 | saa7146_write(dev, BASE_EVEN3, budget->buffer_height * budget->buffer_width); | |
127 | } else { | |
128 | // using a single buffer | |
129 | saa7146_write(dev, BASE_EVEN3, 0); | |
130 | } | |
afa47abf | 131 | saa7146_write(dev, PROT_ADDR3, budget->buffer_size); |
1da177e4 LT |
132 | saa7146_write(dev, BASE_PAGE3, budget->pt.dma | ME1 | 0x90); |
133 | ||
afa47abf IS |
134 | saa7146_write(dev, PITCH3, budget->buffer_width); |
135 | saa7146_write(dev, NUM_LINE_BYTE3, | |
136 | (budget->buffer_height << 16) | budget->buffer_width); | |
1da177e4 LT |
137 | |
138 | saa7146_write(dev, MC2, (MASK_04 | MASK_20)); | |
139 | ||
140 | SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */ | |
141 | SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */ | |
142 | saa7146_write(dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ | |
143 | ||
32e4c3a5 OE |
144 | return 0; |
145 | } | |
146 | ||
0df289a2 MCC |
147 | static int budget_read_fe_status(struct dvb_frontend *fe, |
148 | enum fe_status *status) | |
32e4c3a5 OE |
149 | { |
150 | struct budget *budget = (struct budget *) fe->dvb->priv; | |
151 | int synced; | |
152 | int ret; | |
153 | ||
154 | if (budget->read_fe_status) | |
155 | ret = budget->read_fe_status(fe, status); | |
156 | else | |
157 | ret = -EINVAL; | |
158 | ||
159 | if (!ret) { | |
160 | synced = (*status & FE_HAS_LOCK); | |
161 | if (synced != budget->fe_synced) { | |
162 | budget->fe_synced = synced; | |
163 | spin_lock(&budget->feedlock); | |
164 | if (synced) | |
165 | start_ts_capture(budget); | |
166 | else | |
167 | stop_ts_capture(budget); | |
168 | spin_unlock(&budget->feedlock); | |
169 | } | |
170 | } | |
171 | return ret; | |
1da177e4 LT |
172 | } |
173 | ||
32e36ef6 | 174 | static void vpeirq(struct tasklet_struct *t) |
1da177e4 | 175 | { |
32e36ef6 | 176 | struct budget *budget = from_tasklet(budget, t, vpe_tasklet); |
1da177e4 LT |
177 | u8 *mem = (u8 *) (budget->grabbing); |
178 | u32 olddma = budget->ttbp; | |
179 | u32 newdma = saa7146_read(budget->dev, PCI_VDP3); | |
afa47abf | 180 | u32 count; |
1da177e4 | 181 | |
87c3019d JB |
182 | /* Ensure streamed PCI data is synced to CPU */ |
183 | pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE); | |
184 | ||
1da177e4 LT |
185 | /* nearest lower position divisible by 188 */ |
186 | newdma -= newdma % 188; | |
187 | ||
afa47abf | 188 | if (newdma >= budget->buffer_size) |
1da177e4 LT |
189 | return; |
190 | ||
191 | budget->ttbp = newdma; | |
192 | ||
193 | if (budget->feeding == 0 || newdma == olddma) | |
194 | return; | |
195 | ||
196 | if (newdma > olddma) { /* no wraparound, dump olddma..newdma */ | |
afa47abf IS |
197 | count = newdma - olddma; |
198 | dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188); | |
1da177e4 | 199 | } else { /* wraparound, dump olddma..buflen and 0..newdma */ |
afa47abf IS |
200 | count = budget->buffer_size - olddma; |
201 | dvb_dmx_swfilter_packets(&budget->demux, mem + olddma, count / 188); | |
202 | count += newdma; | |
1da177e4 LT |
203 | dvb_dmx_swfilter_packets(&budget->demux, mem, newdma / 188); |
204 | } | |
afa47abf IS |
205 | |
206 | if (count > budget->buffer_warning_threshold) | |
207 | budget->buffer_warnings++; | |
208 | ||
209 | if (budget->buffer_warnings && time_after(jiffies, budget->buffer_warning_time)) { | |
210 | printk("%s %s: used %d times >80%% of buffer (%u bytes now)\n", | |
3ca7fc84 | 211 | budget->dev->name, __func__, budget->buffer_warnings, count); |
afa47abf IS |
212 | budget->buffer_warning_time = jiffies + BUFFER_WARNING_WAIT; |
213 | budget->buffer_warnings = 0; | |
214 | } | |
1da177e4 LT |
215 | } |
216 | ||
217 | ||
65adb86d HV |
218 | static int ttpci_budget_debiread_nolock(struct budget *budget, u32 config, |
219 | int addr, int count, int nobusyloop) | |
1da177e4 LT |
220 | { |
221 | struct saa7146_dev *saa = budget->dev; | |
65adb86d | 222 | int result; |
1da177e4 | 223 | |
65adb86d HV |
224 | result = saa7146_wait_for_debi_done(saa, nobusyloop); |
225 | if (result < 0) | |
1da177e4 | 226 | return result; |
1da177e4 LT |
227 | |
228 | saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff)); | |
229 | saa7146_write(saa, DEBI_CONFIG, config); | |
230 | saa7146_write(saa, DEBI_PAGE, 0); | |
231 | saa7146_write(saa, MC2, (2 << 16) | 2); | |
232 | ||
65adb86d HV |
233 | result = saa7146_wait_for_debi_done(saa, nobusyloop); |
234 | if (result < 0) | |
1da177e4 | 235 | return result; |
1da177e4 LT |
236 | |
237 | result = saa7146_read(saa, DEBI_AD); | |
238 | result &= (0xffffffffUL >> ((4 - count) * 8)); | |
1da177e4 LT |
239 | return result; |
240 | } | |
241 | ||
65adb86d HV |
242 | int ttpci_budget_debiread(struct budget *budget, u32 config, int addr, int count, |
243 | int uselocks, int nobusyloop) | |
1da177e4 | 244 | { |
1da177e4 LT |
245 | if (count > 4 || count <= 0) |
246 | return 0; | |
247 | ||
65adb86d HV |
248 | if (uselocks) { |
249 | unsigned long flags; | |
250 | int result; | |
1da177e4 | 251 | |
65adb86d HV |
252 | spin_lock_irqsave(&budget->debilock, flags); |
253 | result = ttpci_budget_debiread_nolock(budget, config, addr, | |
254 | count, nobusyloop); | |
255 | spin_unlock_irqrestore(&budget->debilock, flags); | |
1da177e4 LT |
256 | return result; |
257 | } | |
65adb86d HV |
258 | return ttpci_budget_debiread_nolock(budget, config, addr, |
259 | count, nobusyloop); | |
260 | } | |
261 | ||
262 | static int ttpci_budget_debiwrite_nolock(struct budget *budget, u32 config, | |
263 | int addr, int count, u32 value, int nobusyloop) | |
264 | { | |
265 | struct saa7146_dev *saa = budget->dev; | |
266 | int result; | |
267 | ||
268 | result = saa7146_wait_for_debi_done(saa, nobusyloop); | |
269 | if (result < 0) | |
270 | return result; | |
1da177e4 LT |
271 | |
272 | saa7146_write(saa, DEBI_COMMAND, (count << 17) | 0x00000 | (addr & 0xffff)); | |
273 | saa7146_write(saa, DEBI_CONFIG, config); | |
274 | saa7146_write(saa, DEBI_PAGE, 0); | |
275 | saa7146_write(saa, DEBI_AD, value); | |
276 | saa7146_write(saa, MC2, (2 << 16) | 2); | |
277 | ||
65adb86d HV |
278 | result = saa7146_wait_for_debi_done(saa, nobusyloop); |
279 | return result < 0 ? result : 0; | |
280 | } | |
1da177e4 | 281 | |
65adb86d HV |
282 | int ttpci_budget_debiwrite(struct budget *budget, u32 config, int addr, |
283 | int count, u32 value, int uselocks, int nobusyloop) | |
284 | { | |
285 | if (count > 4 || count <= 0) | |
286 | return 0; | |
287 | ||
288 | if (uselocks) { | |
289 | unsigned long flags; | |
290 | int result; | |
291 | ||
292 | spin_lock_irqsave(&budget->debilock, flags); | |
293 | result = ttpci_budget_debiwrite_nolock(budget, config, addr, | |
294 | count, value, nobusyloop); | |
1da177e4 | 295 | spin_unlock_irqrestore(&budget->debilock, flags); |
65adb86d HV |
296 | return result; |
297 | } | |
298 | return ttpci_budget_debiwrite_nolock(budget, config, addr, | |
299 | count, value, nobusyloop); | |
1da177e4 LT |
300 | } |
301 | ||
302 | ||
303 | /**************************************************************************** | |
304 | * DVB API SECTION | |
305 | ****************************************************************************/ | |
306 | ||
307 | static int budget_start_feed(struct dvb_demux_feed *feed) | |
308 | { | |
309 | struct dvb_demux *demux = feed->demux; | |
310 | struct budget *budget = (struct budget *) demux->priv; | |
32e4c3a5 | 311 | int status = 0; |
1da177e4 LT |
312 | |
313 | dprintk(2, "budget: %p\n", budget); | |
314 | ||
315 | if (!demux->dmx.frontend) | |
316 | return -EINVAL; | |
317 | ||
318 | spin_lock(&budget->feedlock); | |
2c53275c | 319 | feed->pusi_seen = false; /* have a clean section start */ |
32e4c3a5 OE |
320 | if (budget->feeding++ == 0) |
321 | status = start_ts_capture(budget); | |
1da177e4 LT |
322 | spin_unlock(&budget->feedlock); |
323 | return status; | |
324 | } | |
325 | ||
326 | static int budget_stop_feed(struct dvb_demux_feed *feed) | |
327 | { | |
328 | struct dvb_demux *demux = feed->demux; | |
329 | struct budget *budget = (struct budget *) demux->priv; | |
32e4c3a5 | 330 | int status = 0; |
1da177e4 LT |
331 | |
332 | dprintk(2, "budget: %p\n", budget); | |
333 | ||
334 | spin_lock(&budget->feedlock); | |
32e4c3a5 OE |
335 | if (--budget->feeding == 0) |
336 | status = stop_ts_capture(budget); | |
1da177e4 LT |
337 | spin_unlock(&budget->feedlock); |
338 | return status; | |
339 | } | |
340 | ||
341 | static int budget_register(struct budget *budget) | |
342 | { | |
343 | struct dvb_demux *dvbdemux = &budget->demux; | |
344 | int ret; | |
345 | ||
346 | dprintk(2, "budget: %p\n", budget); | |
347 | ||
348 | dvbdemux->priv = (void *) budget; | |
349 | ||
350 | dvbdemux->filternum = 256; | |
351 | dvbdemux->feednum = 256; | |
352 | dvbdemux->start_feed = budget_start_feed; | |
353 | dvbdemux->stop_feed = budget_stop_feed; | |
354 | dvbdemux->write_to_decoder = NULL; | |
355 | ||
356 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
357 | DMX_MEMORY_BASED_FILTERING); | |
358 | ||
359 | dvb_dmx_init(&budget->demux); | |
360 | ||
361 | budget->dmxdev.filternum = 256; | |
362 | budget->dmxdev.demux = &dvbdemux->dmx; | |
363 | budget->dmxdev.capabilities = 0; | |
364 | ||
fdc53a6d | 365 | dvb_dmxdev_init(&budget->dmxdev, &budget->dvb_adapter); |
1da177e4 LT |
366 | |
367 | budget->hw_frontend.source = DMX_FRONTEND_0; | |
368 | ||
369 | ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &budget->hw_frontend); | |
370 | ||
371 | if (ret < 0) | |
fc045645 | 372 | goto err_release_dmx; |
1da177e4 LT |
373 | |
374 | budget->mem_frontend.source = DMX_MEMORY_FE; | |
375 | ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &budget->mem_frontend); | |
376 | if (ret < 0) | |
fc045645 | 377 | goto err_release_dmx; |
1da177e4 LT |
378 | |
379 | ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &budget->hw_frontend); | |
380 | if (ret < 0) | |
fc045645 | 381 | goto err_release_dmx; |
1da177e4 | 382 | |
fdc53a6d | 383 | dvb_net_init(&budget->dvb_adapter, &budget->dvb_net, &dvbdemux->dmx); |
1da177e4 LT |
384 | |
385 | return 0; | |
fc045645 CY |
386 | |
387 | err_release_dmx: | |
388 | dvb_dmxdev_release(&budget->dmxdev); | |
389 | dvb_dmx_release(&budget->demux); | |
390 | return ret; | |
1da177e4 LT |
391 | } |
392 | ||
393 | static void budget_unregister(struct budget *budget) | |
394 | { | |
395 | struct dvb_demux *dvbdemux = &budget->demux; | |
396 | ||
397 | dprintk(2, "budget: %p\n", budget); | |
398 | ||
399 | dvb_net_release(&budget->dvb_net); | |
400 | ||
401 | dvbdemux->dmx.close(&dvbdemux->dmx); | |
402 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &budget->hw_frontend); | |
403 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &budget->mem_frontend); | |
404 | ||
405 | dvb_dmxdev_release(&budget->dmxdev); | |
406 | dvb_dmx_release(&budget->demux); | |
407 | } | |
408 | ||
409 | int ttpci_budget_init(struct budget *budget, struct saa7146_dev *dev, | |
410 | struct saa7146_pci_extension_data *info, | |
26dc4d04 | 411 | struct module *owner, short *adapter_nums) |
1da177e4 | 412 | { |
1da177e4 LT |
413 | int ret = 0; |
414 | struct budget_info *bi = info->ext_priv; | |
afa47abf IS |
415 | int max_bufsize; |
416 | int height_mask; | |
1da177e4 LT |
417 | |
418 | memset(budget, 0, sizeof(struct budget)); | |
419 | ||
420 | dprintk(2, "dev: %p, budget: %p\n", dev, budget); | |
421 | ||
422 | budget->card = bi; | |
423 | budget->dev = (struct saa7146_dev *) dev; | |
424 | ||
fd9c66e2 HB |
425 | switch(budget->card->type) { |
426 | case BUDGET_FS_ACTIVY: | |
afa47abf IS |
427 | budget->buffer_width = TS_WIDTH_ACTIVY; |
428 | max_bufsize = TS_MAX_BUFSIZE_K_ACTIVY; | |
429 | height_mask = TS_HEIGHT_MASK_ACTIVY; | |
fd9c66e2 HB |
430 | break; |
431 | ||
432 | case BUDGET_KNC1C: | |
433 | case BUDGET_KNC1CP: | |
434 | case BUDGET_CIN1200C: | |
aa323ac8 | 435 | case BUDGET_KNC1C_MK3: |
93165b77 | 436 | case BUDGET_KNC1C_TDA10024: |
aa323ac8 HB |
437 | case BUDGET_KNC1CP_MK3: |
438 | case BUDGET_CIN1200C_MK3: | |
fd9c66e2 HB |
439 | budget->buffer_width = TS_WIDTH_DVBC; |
440 | max_bufsize = TS_MAX_BUFSIZE_K_DVBC; | |
441 | height_mask = TS_HEIGHT_MASK_DVBC; | |
442 | break; | |
443 | ||
444 | default: | |
afa47abf IS |
445 | budget->buffer_width = TS_WIDTH; |
446 | max_bufsize = TS_MAX_BUFSIZE_K; | |
447 | height_mask = TS_HEIGHT_MASK; | |
448 | } | |
449 | ||
450 | if (dma_buffer_size < TS_MIN_BUFSIZE_K) | |
451 | dma_buffer_size = TS_MIN_BUFSIZE_K; | |
452 | else if (dma_buffer_size > max_bufsize) | |
453 | dma_buffer_size = max_bufsize; | |
454 | ||
455 | budget->buffer_height = dma_buffer_size * 1024 / budget->buffer_width; | |
fd9c66e2 HB |
456 | if (budget->buffer_height > 0xfff) { |
457 | budget->buffer_height /= 2; | |
458 | budget->buffer_height &= height_mask; | |
459 | budget->buffer_size = 2 * budget->buffer_height * budget->buffer_width; | |
460 | } else { | |
461 | budget->buffer_height &= height_mask; | |
462 | budget->buffer_size = budget->buffer_height * budget->buffer_width; | |
463 | } | |
afa47abf IS |
464 | budget->buffer_warning_threshold = budget->buffer_size * 80/100; |
465 | budget->buffer_warnings = 0; | |
466 | budget->buffer_warning_time = jiffies; | |
467 | ||
fd9c66e2 HB |
468 | dprintk(2, "%s: buffer type = %s, width = %d, height = %d\n", |
469 | budget->dev->name, | |
470 | budget->buffer_size > budget->buffer_width * budget->buffer_height ? "odd/even" : "single", | |
471 | budget->buffer_width, budget->buffer_height); | |
afa47abf IS |
472 | printk("%s: dma buffer size %u\n", budget->dev->name, budget->buffer_size); |
473 | ||
78e92006 | 474 | ret = dvb_register_adapter(&budget->dvb_adapter, budget->card->name, |
26dc4d04 | 475 | owner, &budget->dev->pci->dev, adapter_nums); |
78e92006 | 476 | if (ret < 0) |
dcdda65f | 477 | return ret; |
1da177e4 LT |
478 | |
479 | /* set dd1 stream a & b */ | |
480 | saa7146_write(dev, DD1_STREAM_B, 0x00000000); | |
481 | saa7146_write(dev, MC2, (MASK_09 | MASK_25)); | |
482 | saa7146_write(dev, MC2, (MASK_10 | MASK_26)); | |
483 | saa7146_write(dev, DD1_INIT, 0x02000000); | |
484 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
485 | ||
486 | if (bi->type != BUDGET_FS_ACTIVY) | |
487 | budget->video_port = BUDGET_VIDEO_PORTB; | |
488 | else | |
489 | budget->video_port = BUDGET_VIDEO_PORTA; | |
490 | spin_lock_init(&budget->feedlock); | |
491 | spin_lock_init(&budget->debilock); | |
492 | ||
493 | /* the Siemens DVB needs this if you want to have the i2c chips | |
494 | get recognized before the main driver is loaded */ | |
495 | if (bi->type != BUDGET_FS_ACTIVY) | |
496 | saa7146_write(dev, GPIO_CTRL, 0x500000); /* GPIO 3 = 1 */ | |
497 | ||
c0decac1 MCC |
498 | strscpy(budget->i2c_adap.name, budget->card->name, |
499 | sizeof(budget->i2c_adap.name)); | |
1da177e4 LT |
500 | |
501 | saa7146_i2c_adapter_prepare(dev, &budget->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); | |
cc1e6315 MCC |
502 | strscpy(budget->i2c_adap.name, budget->card->name, |
503 | sizeof(budget->i2c_adap.name)); | |
1da177e4 LT |
504 | |
505 | if (i2c_add_adapter(&budget->i2c_adap) < 0) { | |
87c3019d JB |
506 | ret = -ENOMEM; |
507 | goto err_dvb_unregister; | |
1da177e4 LT |
508 | } |
509 | ||
fdc53a6d | 510 | ttpci_eeprom_parse_mac(&budget->i2c_adap, budget->dvb_adapter.proposed_mac); |
1da177e4 | 511 | |
87c3019d JB |
512 | budget->grabbing = saa7146_vmalloc_build_pgtable(dev->pci, budget->buffer_size, &budget->pt); |
513 | if (NULL == budget->grabbing) { | |
1da177e4 | 514 | ret = -ENOMEM; |
87c3019d | 515 | goto err_del_i2c; |
1da177e4 LT |
516 | } |
517 | ||
518 | saa7146_write(dev, PCI_BT_V1, 0x001c0000); | |
519 | /* upload all */ | |
520 | saa7146_write(dev, GPIO_CTRL, 0x000000); | |
521 | ||
32e36ef6 | 522 | tasklet_setup(&budget->vpe_tasklet, vpeirq); |
1da177e4 LT |
523 | |
524 | /* frontend power on */ | |
f49cc15b | 525 | if (bi->type != BUDGET_FS_ACTIVY) |
1da177e4 LT |
526 | saa7146_setgpio(dev, 2, SAA7146_GPIO_OUTHI); |
527 | ||
1fb4a17f | 528 | if ((ret = budget_register(budget)) == 0) |
87c3019d JB |
529 | return 0; /* Everything OK */ |
530 | ||
531 | /* An error occurred, cleanup resources */ | |
532 | saa7146_vfree_destroy_pgtable(dev->pci, budget->grabbing, &budget->pt); | |
1da177e4 | 533 | |
87c3019d JB |
534 | err_del_i2c: |
535 | i2c_del_adapter(&budget->i2c_adap); | |
1da177e4 | 536 | |
87c3019d | 537 | err_dvb_unregister: |
fdc53a6d | 538 | dvb_unregister_adapter(&budget->dvb_adapter); |
1da177e4 LT |
539 | |
540 | return ret; | |
541 | } | |
542 | ||
32e4c3a5 OE |
543 | void ttpci_budget_init_hooks(struct budget *budget) |
544 | { | |
545 | if (budget->dvb_frontend && !budget->read_fe_status) { | |
546 | budget->read_fe_status = budget->dvb_frontend->ops.read_status; | |
547 | budget->dvb_frontend->ops.read_status = budget_read_fe_status; | |
548 | } | |
549 | } | |
550 | ||
1da177e4 LT |
551 | int ttpci_budget_deinit(struct budget *budget) |
552 | { | |
553 | struct saa7146_dev *dev = budget->dev; | |
554 | ||
555 | dprintk(2, "budget: %p\n", budget); | |
556 | ||
557 | budget_unregister(budget); | |
558 | ||
1da177e4 LT |
559 | tasklet_kill(&budget->vpe_tasklet); |
560 | ||
87c3019d | 561 | saa7146_vfree_destroy_pgtable(dev->pci, budget->grabbing, &budget->pt); |
1da177e4 | 562 | |
87c3019d JB |
563 | i2c_del_adapter(&budget->i2c_adap); |
564 | ||
565 | dvb_unregister_adapter(&budget->dvb_adapter); | |
1da177e4 LT |
566 | |
567 | return 0; | |
568 | } | |
569 | ||
570 | void ttpci_budget_irq10_handler(struct saa7146_dev *dev, u32 * isr) | |
571 | { | |
572 | struct budget *budget = (struct budget *) dev->ext_priv; | |
573 | ||
574 | dprintk(8, "dev: %p, budget: %p\n", dev, budget); | |
575 | ||
576 | if (*isr & MASK_10) | |
577 | tasklet_schedule(&budget->vpe_tasklet); | |
578 | } | |
579 | ||
580 | void ttpci_budget_set_video_port(struct saa7146_dev *dev, int video_port) | |
581 | { | |
582 | struct budget *budget = (struct budget *) dev->ext_priv; | |
583 | ||
584 | spin_lock(&budget->feedlock); | |
585 | budget->video_port = video_port; | |
586 | if (budget->feeding) { | |
1da177e4 LT |
587 | stop_ts_capture(budget); |
588 | start_ts_capture(budget); | |
1da177e4 LT |
589 | } |
590 | spin_unlock(&budget->feedlock); | |
591 | } | |
592 | ||
593 | EXPORT_SYMBOL_GPL(ttpci_budget_debiread); | |
594 | EXPORT_SYMBOL_GPL(ttpci_budget_debiwrite); | |
595 | EXPORT_SYMBOL_GPL(ttpci_budget_init); | |
32e4c3a5 | 596 | EXPORT_SYMBOL_GPL(ttpci_budget_init_hooks); |
1da177e4 LT |
597 | EXPORT_SYMBOL_GPL(ttpci_budget_deinit); |
598 | EXPORT_SYMBOL_GPL(ttpci_budget_irq10_handler); | |
599 | EXPORT_SYMBOL_GPL(ttpci_budget_set_video_port); | |
600 | EXPORT_SYMBOL_GPL(budget_debug); | |
601 | ||
602 | MODULE_LICENSE("GPL"); |