Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for philips saa7134 based TV cards | |
4 | * video4linux video interface | |
5 | * | |
6 | * (c) 2001,02 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
1da177e4 | 26 | #include <linux/kernel.h> |
1da177e4 LT |
27 | #include <linux/delay.h> |
28 | ||
29 | #include "saa7134-reg.h" | |
30 | #include "saa7134.h" | |
31 | ||
32 | /* ------------------------------------------------------------------ */ | |
33 | ||
ff699e6b | 34 | static unsigned int ts_debug; |
1da177e4 LT |
35 | module_param(ts_debug, int, 0644); |
36 | MODULE_PARM_DESC(ts_debug,"enable debug messages [ts]"); | |
37 | ||
38 | #define dprintk(fmt, arg...) if (ts_debug) \ | |
39 | printk(KERN_DEBUG "%s/ts: " fmt, dev->name , ## arg) | |
40 | ||
41 | /* ------------------------------------------------------------------ */ | |
1da177e4 LT |
42 | static int buffer_activate(struct saa7134_dev *dev, |
43 | struct saa7134_buf *buf, | |
44 | struct saa7134_buf *next) | |
45 | { | |
1da177e4 LT |
46 | |
47 | dprintk("buffer_activate [%p]",buf); | |
1da177e4 LT |
48 | buf->top_seen = 0; |
49 | ||
2ada815f HV |
50 | if (!dev->ts_started) |
51 | dev->ts_field = V4L2_FIELD_TOP; | |
52 | ||
1da177e4 LT |
53 | if (NULL == next) |
54 | next = buf; | |
2ada815f | 55 | if (V4L2_FIELD_TOP == dev->ts_field) { |
1da177e4 LT |
56 | dprintk("- [top] buf=%p next=%p\n",buf,next); |
57 | saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(buf)); | |
58 | saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(next)); | |
2ada815f | 59 | dev->ts_field = V4L2_FIELD_BOTTOM; |
1da177e4 LT |
60 | } else { |
61 | dprintk("- [bottom] buf=%p next=%p\n",buf,next); | |
62 | saa_writel(SAA7134_RS_BA1(5),saa7134_buffer_base(next)); | |
63 | saa_writel(SAA7134_RS_BA2(5),saa7134_buffer_base(buf)); | |
2ada815f | 64 | dev->ts_field = V4L2_FIELD_TOP; |
1da177e4 | 65 | } |
1da177e4 LT |
66 | |
67 | /* start DMA */ | |
68 | saa7134_set_dmabits(dev); | |
69 | ||
82aa98fd | 70 | mod_timer(&dev->ts_q.timeout, jiffies+TS_BUFFER_TIMEOUT); |
92c36147 | 71 | |
6b6b7543 DB |
72 | if (!dev->ts_started) |
73 | saa7134_ts_start(dev); | |
92c36147 | 74 | |
1da177e4 LT |
75 | return 0; |
76 | } | |
77 | ||
2ada815f HV |
78 | int saa7134_ts_buffer_init(struct vb2_buffer *vb2) |
79 | { | |
80 | struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; | |
81 | struct saa7134_buf *buf = container_of(vb2, struct saa7134_buf, vb2); | |
82 | ||
83 | dmaq->curr = NULL; | |
84 | buf->activate = buffer_activate; | |
85 | ||
86 | return 0; | |
87 | } | |
88 | EXPORT_SYMBOL_GPL(saa7134_ts_buffer_init); | |
89 | ||
90 | int saa7134_ts_buffer_prepare(struct vb2_buffer *vb2) | |
1da177e4 | 91 | { |
2ada815f | 92 | struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; |
a00e6888 | 93 | struct saa7134_dev *dev = dmaq->dev; |
2ada815f HV |
94 | struct saa7134_buf *buf = container_of(vb2, struct saa7134_buf, vb2); |
95 | struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0); | |
1da177e4 | 96 | unsigned int lines, llength, size; |
2ada815f | 97 | int ret; |
1da177e4 | 98 | |
2ada815f | 99 | dprintk("buffer_prepare [%p]\n", buf); |
1da177e4 LT |
100 | |
101 | llength = TS_PACKET_SIZE; | |
102 | lines = dev->ts.nr_packets; | |
103 | ||
104 | size = lines * llength; | |
2ada815f | 105 | if (vb2_plane_size(vb2, 0) < size) |
1da177e4 LT |
106 | return -EINVAL; |
107 | ||
2ada815f HV |
108 | vb2_set_plane_payload(vb2, 0, size); |
109 | vb2->v4l2_buf.field = dev->field; | |
6b6b7543 | 110 | |
2ada815f HV |
111 | ret = dma_map_sg(&dev->pci->dev, dma->sgl, dma->nents, DMA_FROM_DEVICE); |
112 | if (!ret) | |
113 | return -EIO; | |
114 | return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents, | |
115 | saa7134_buffer_startpage(buf)); | |
1da177e4 | 116 | } |
2ada815f | 117 | EXPORT_SYMBOL_GPL(saa7134_ts_buffer_prepare); |
1da177e4 | 118 | |
2ada815f | 119 | void saa7134_ts_buffer_finish(struct vb2_buffer *vb2) |
1da177e4 | 120 | { |
2ada815f | 121 | struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; |
a00e6888 | 122 | struct saa7134_dev *dev = dmaq->dev; |
2ada815f HV |
123 | struct saa7134_buf *buf = container_of(vb2, struct saa7134_buf, vb2); |
124 | struct sg_table *dma = vb2_dma_sg_plane_desc(&buf->vb2, 0); | |
1da177e4 | 125 | |
2ada815f HV |
126 | dma_unmap_sg(&dev->pci->dev, dma->sgl, dma->nents, DMA_FROM_DEVICE); |
127 | } | |
128 | EXPORT_SYMBOL_GPL(saa7134_ts_buffer_finish); | |
6b6b7543 | 129 | |
2ada815f HV |
130 | int saa7134_ts_queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt, |
131 | unsigned int *nbuffers, unsigned int *nplanes, | |
132 | unsigned int sizes[], void *alloc_ctxs[]) | |
133 | { | |
134 | struct saa7134_dmaqueue *dmaq = q->drv_priv; | |
135 | struct saa7134_dev *dev = dmaq->dev; | |
136 | int size = TS_PACKET_SIZE * dev->ts.nr_packets; | |
137 | ||
138 | if (0 == *nbuffers) | |
139 | *nbuffers = dev->ts.nr_bufs; | |
140 | *nbuffers = saa7134_buffer_count(size, *nbuffers); | |
141 | if (*nbuffers < 3) | |
142 | *nbuffers = 3; | |
143 | *nplanes = 1; | |
144 | sizes[0] = size; | |
1da177e4 LT |
145 | return 0; |
146 | } | |
2ada815f | 147 | EXPORT_SYMBOL_GPL(saa7134_ts_queue_setup); |
1da177e4 | 148 | |
2ada815f | 149 | int saa7134_ts_start_streaming(struct vb2_queue *vq, unsigned int count) |
1da177e4 | 150 | { |
2ada815f | 151 | struct saa7134_dmaqueue *dmaq = vq->drv_priv; |
a00e6888 | 152 | struct saa7134_dev *dev = dmaq->dev; |
1da177e4 | 153 | |
2ada815f HV |
154 | /* |
155 | * Planar video capture and TS share the same DMA channel, | |
156 | * so only one can be active at a time. | |
157 | */ | |
158 | if (vb2_is_busy(&dev->video_vbq) && dev->fmt->planar) { | |
159 | struct saa7134_buf *buf, *tmp; | |
160 | ||
161 | list_for_each_entry_safe(buf, tmp, &dmaq->queue, entry) { | |
162 | list_del(&buf->entry); | |
163 | vb2_buffer_done(&buf->vb2, VB2_BUF_STATE_QUEUED); | |
164 | } | |
165 | if (dmaq->curr) { | |
166 | vb2_buffer_done(&dmaq->curr->vb2, VB2_BUF_STATE_QUEUED); | |
167 | dmaq->curr = NULL; | |
168 | } | |
169 | return -EBUSY; | |
170 | } | |
171 | dmaq->seq_nr = 0; | |
172 | return 0; | |
1da177e4 | 173 | } |
2ada815f | 174 | EXPORT_SYMBOL_GPL(saa7134_ts_start_streaming); |
1da177e4 | 175 | |
2ada815f | 176 | void saa7134_ts_stop_streaming(struct vb2_queue *vq) |
1da177e4 | 177 | { |
2ada815f | 178 | struct saa7134_dmaqueue *dmaq = vq->drv_priv; |
a00e6888 | 179 | struct saa7134_dev *dev = dmaq->dev; |
1da177e4 | 180 | |
2ada815f HV |
181 | saa7134_ts_stop(dev); |
182 | saa7134_stop_streaming(dev, dmaq); | |
1da177e4 | 183 | } |
2ada815f HV |
184 | EXPORT_SYMBOL_GPL(saa7134_ts_stop_streaming); |
185 | ||
186 | struct vb2_ops saa7134_ts_qops = { | |
187 | .queue_setup = saa7134_ts_queue_setup, | |
188 | .buf_init = saa7134_ts_buffer_init, | |
189 | .buf_prepare = saa7134_ts_buffer_prepare, | |
190 | .buf_finish = saa7134_ts_buffer_finish, | |
191 | .buf_queue = saa7134_vb2_buffer_queue, | |
192 | .wait_prepare = vb2_ops_wait_prepare, | |
193 | .wait_finish = vb2_ops_wait_finish, | |
194 | .stop_streaming = saa7134_ts_stop_streaming, | |
1da177e4 LT |
195 | }; |
196 | EXPORT_SYMBOL_GPL(saa7134_ts_qops); | |
197 | ||
198 | /* ----------------------------------------------------------- */ | |
199 | /* exported stuff */ | |
200 | ||
3aa4f48a | 201 | static unsigned int tsbufs = 8; |
1da177e4 | 202 | module_param(tsbufs, int, 0444); |
6b6b7543 | 203 | MODULE_PARM_DESC(tsbufs, "number of ts buffers for read/write IO, range 2-32"); |
1da177e4 | 204 | |
3aa4f48a | 205 | static unsigned int ts_nr_packets = 64; |
1da177e4 LT |
206 | module_param(ts_nr_packets, int, 0444); |
207 | MODULE_PARM_DESC(ts_nr_packets,"size of a ts buffers (in ts packets)"); | |
208 | ||
cb71201f ML |
209 | int saa7134_ts_init_hw(struct saa7134_dev *dev) |
210 | { | |
211 | /* deactivate TS softreset */ | |
212 | saa_writeb(SAA7134_TS_SERIAL1, 0x00); | |
213 | /* TSSOP high active, TSVAL high active, TSLOCK ignored */ | |
92c36147 | 214 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c); |
cb71201f ML |
215 | saa_writeb(SAA7134_TS_PARALLEL_SERIAL, (TS_PACKET_SIZE-1)); |
216 | saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff)); | |
217 | saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff)); | |
218 | /* TSNOPIT=0, TSCOLAP=0 */ | |
219 | saa_writeb(SAA7134_TS_DMA2, | |
220 | ((((dev->ts.nr_packets-1)>>16)&0x3f) | 0x00)); | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
1da177e4 LT |
225 | int saa7134_ts_init1(struct saa7134_dev *dev) |
226 | { | |
227 | /* sanitycheck insmod options */ | |
228 | if (tsbufs < 2) | |
229 | tsbufs = 2; | |
230 | if (tsbufs > VIDEO_MAX_FRAME) | |
231 | tsbufs = VIDEO_MAX_FRAME; | |
232 | if (ts_nr_packets < 4) | |
233 | ts_nr_packets = 4; | |
234 | if (ts_nr_packets > 312) | |
235 | ts_nr_packets = 312; | |
236 | dev->ts.nr_bufs = tsbufs; | |
237 | dev->ts.nr_packets = ts_nr_packets; | |
238 | ||
239 | INIT_LIST_HEAD(&dev->ts_q.queue); | |
240 | init_timer(&dev->ts_q.timeout); | |
241 | dev->ts_q.timeout.function = saa7134_buffer_timeout; | |
242 | dev->ts_q.timeout.data = (unsigned long)(&dev->ts_q); | |
243 | dev->ts_q.dev = dev; | |
244 | dev->ts_q.need_two = 1; | |
6b6b7543 | 245 | dev->ts_started = 0; |
a00e6888 | 246 | saa7134_pgtable_alloc(dev->pci, &dev->ts_q.pt); |
1da177e4 LT |
247 | |
248 | /* init TS hw */ | |
cb71201f | 249 | saa7134_ts_init_hw(dev); |
1da177e4 LT |
250 | |
251 | return 0; | |
252 | } | |
253 | ||
6b6b7543 DB |
254 | /* Function for stop TS */ |
255 | int saa7134_ts_stop(struct saa7134_dev *dev) | |
256 | { | |
257 | dprintk("TS stop\n"); | |
258 | ||
2ada815f HV |
259 | if (!dev->ts_started) |
260 | return 0; | |
6b6b7543 DB |
261 | |
262 | /* Stop TS stream */ | |
263 | switch (saa7134_boards[dev->board].ts_type) { | |
264 | case SAA7134_MPEG_TS_PARALLEL: | |
265 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c); | |
266 | dev->ts_started = 0; | |
267 | break; | |
268 | case SAA7134_MPEG_TS_SERIAL: | |
269 | saa_writeb(SAA7134_TS_SERIAL0, 0x40); | |
270 | dev->ts_started = 0; | |
271 | break; | |
272 | } | |
273 | return 0; | |
274 | } | |
275 | ||
276 | /* Function for start TS */ | |
277 | int saa7134_ts_start(struct saa7134_dev *dev) | |
278 | { | |
279 | dprintk("TS start\n"); | |
280 | ||
2ada815f HV |
281 | if (WARN_ON(dev->ts_started)) |
282 | return 0; | |
6b6b7543 | 283 | |
08be64be DB |
284 | /* dma: setup channel 5 (= TS) */ |
285 | saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff); | |
286 | saa_writeb(SAA7134_TS_DMA1, | |
287 | ((dev->ts.nr_packets - 1) >> 8) & 0xff); | |
288 | /* TSNOPIT=0, TSCOLAP=0 */ | |
289 | saa_writeb(SAA7134_TS_DMA2, | |
290 | (((dev->ts.nr_packets - 1) >> 16) & 0x3f) | 0x00); | |
291 | saa_writel(SAA7134_RS_PITCH(5), TS_PACKET_SIZE); | |
292 | saa_writel(SAA7134_RS_CONTROL(5), SAA7134_RS_CONTROL_BURST_16 | | |
293 | SAA7134_RS_CONTROL_ME | | |
a00e6888 | 294 | (dev->ts_q.pt.dma >> 12)); |
08be64be DB |
295 | |
296 | /* reset hardware TS buffers */ | |
6b6b7543 DB |
297 | saa_writeb(SAA7134_TS_SERIAL1, 0x00); |
298 | saa_writeb(SAA7134_TS_SERIAL1, 0x03); | |
299 | saa_writeb(SAA7134_TS_SERIAL1, 0x00); | |
300 | saa_writeb(SAA7134_TS_SERIAL1, 0x01); | |
301 | ||
302 | /* TS clock non-inverted */ | |
303 | saa_writeb(SAA7134_TS_SERIAL1, 0x00); | |
304 | ||
305 | /* Start TS stream */ | |
306 | switch (saa7134_boards[dev->board].ts_type) { | |
307 | case SAA7134_MPEG_TS_PARALLEL: | |
308 | saa_writeb(SAA7134_TS_SERIAL0, 0x40); | |
4007a672 MK |
309 | saa_writeb(SAA7134_TS_PARALLEL, 0xec | |
310 | (saa7134_boards[dev->board].ts_force_val << 4)); | |
6b6b7543 DB |
311 | break; |
312 | case SAA7134_MPEG_TS_SERIAL: | |
313 | saa_writeb(SAA7134_TS_SERIAL0, 0xd8); | |
4007a672 MK |
314 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c | |
315 | (saa7134_boards[dev->board].ts_force_val << 4)); | |
6b6b7543 DB |
316 | saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); |
317 | saa_writeb(SAA7134_TS_SERIAL1, 0x02); | |
318 | break; | |
319 | } | |
320 | ||
321 | dev->ts_started = 1; | |
322 | ||
323 | return 0; | |
324 | } | |
325 | ||
1da177e4 LT |
326 | int saa7134_ts_fini(struct saa7134_dev *dev) |
327 | { | |
a00e6888 | 328 | saa7134_pgtable_free(dev->pci, &dev->ts_q.pt); |
1da177e4 LT |
329 | return 0; |
330 | } | |
331 | ||
1da177e4 LT |
332 | void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status) |
333 | { | |
334 | enum v4l2_field field; | |
335 | ||
336 | spin_lock(&dev->slock); | |
337 | if (dev->ts_q.curr) { | |
2ada815f HV |
338 | field = dev->ts_field; |
339 | if (field != V4L2_FIELD_TOP) { | |
3aa4f48a | 340 | if ((status & 0x100000) != 0x000000) |
1da177e4 LT |
341 | goto done; |
342 | } else { | |
3aa4f48a | 343 | if ((status & 0x100000) != 0x100000) |
1da177e4 LT |
344 | goto done; |
345 | } | |
2ada815f | 346 | saa7134_buffer_finish(dev, &dev->ts_q, VB2_BUF_STATE_DONE); |
1da177e4 LT |
347 | } |
348 | saa7134_buffer_next(dev,&dev->ts_q); | |
349 | ||
350 | done: | |
351 | spin_unlock(&dev->slock); | |
352 | } |