Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
4 | * | |
86ddd96f MCC |
5 | * Extended 3 / 2005 by Hartmut Hackmann to support various |
6 | * cards with the tda10046 DVB-T channel decoder | |
7 | * | |
1da177e4 LT |
8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/list.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/kernel.h> | |
1da177e4 LT |
27 | #include <linux/delay.h> |
28 | #include <linux/kthread.h> | |
29 | #include <linux/suspend.h> | |
30 | ||
31 | #include "saa7134-reg.h" | |
32 | #include "saa7134.h" | |
5e453dc7 | 33 | #include <media/v4l2-common.h> |
a78d0bfa | 34 | #include "dvb-pll.h" |
5823b3a6 | 35 | #include <dvb_frontend.h> |
1da177e4 | 36 | |
1f10c7af AQ |
37 | #include "mt352.h" |
38 | #include "mt352_priv.h" /* FIXME */ | |
39 | #include "tda1004x.h" | |
40 | #include "nxt200x.h" | |
bc36a686 | 41 | #include "tuner-xc2028.h" |
2930992c | 42 | #include "xc5000.h" |
1da177e4 | 43 | |
e2ac28fa IL |
44 | #include "tda10086.h" |
45 | #include "tda826x.h" | |
8ce47dad | 46 | #include "tda827x.h" |
e2ac28fa | 47 | #include "isl6421.h" |
4b1431ca | 48 | #include "isl6405.h" |
6ab465a8 | 49 | #include "lnbp21.h" |
cb89cd33 | 50 | #include "tuner-simple.h" |
1bc7f51c | 51 | #include "tda10048.h" |
3abdedd8 MK |
52 | #include "tda18271.h" |
53 | #include "lgdt3305.h" | |
54 | #include "tda8290.h" | |
f0551efc | 55 | #include "mb86a20s.h" |
ce02704d | 56 | #include "lgs8gxx.h" |
8ce47dad | 57 | |
47aeba5a | 58 | #include "zl10353.h" |
dbe8740d | 59 | #include "qt1010.h" |
47aeba5a | 60 | |
04574185 | 61 | #include "zl10036.h" |
ecfcfec8 | 62 | #include "zl10039.h" |
04574185 | 63 | #include "mt312.h" |
25fa2071 | 64 | #include "s5h1411.h" |
04574185 | 65 | |
1da177e4 LT |
66 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); |
67 | MODULE_LICENSE("GPL"); | |
68 | ||
ff699e6b | 69 | static unsigned int antenna_pwr; |
86ddd96f | 70 | |
1da177e4 LT |
71 | module_param(antenna_pwr, int, 0444); |
72 | MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)"); | |
73 | ||
ff699e6b | 74 | static int use_frontend; |
b331daa0 SB |
75 | module_param(use_frontend, int, 0644); |
76 | MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)"); | |
1f683cd8 | 77 | |
ff699e6b | 78 | static int debug; |
58ef4f92 HH |
79 | module_param(debug, int, 0644); |
80 | MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off)."); | |
81 | ||
78e92006 JG |
82 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
83 | ||
cf3c34c8 TP |
84 | #define dprintk(fmt, arg...) do { if (debug) \ |
85 | printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0) | |
86 | ||
87 | /* Print a warning */ | |
88 | #define wprintk(fmt, arg...) \ | |
89 | printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg) | |
58ef4f92 HH |
90 | |
91 | /* ------------------------------------------------------------------ | |
92 | * mt352 based DVB-T cards | |
93 | */ | |
94 | ||
1da177e4 LT |
95 | static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on) |
96 | { | |
97 | u32 ok; | |
98 | ||
99 | if (!on) { | |
100 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
101 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
102 | return 0; | |
103 | } | |
104 | ||
105 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26)); | |
106 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
107 | udelay(10); | |
108 | ||
109 | saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28)); | |
110 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
111 | udelay(10); | |
112 | saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28)); | |
113 | udelay(10); | |
114 | ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27); | |
5823b3a6 | 115 | dprintk("%s %s\n", __func__, ok ? "on" : "off"); |
1da177e4 LT |
116 | |
117 | if (!ok) | |
118 | saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26)); | |
119 | return ok; | |
120 | } | |
121 | ||
122 | static int mt352_pinnacle_init(struct dvb_frontend* fe) | |
123 | { | |
124 | static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 }; | |
125 | static u8 reset [] = { RESET, 0x80 }; | |
126 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
127 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
128 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 }; | |
129 | static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 }; | |
130 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f }; | |
131 | static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d }; | |
132 | static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 }; | |
133 | struct saa7134_dev *dev= fe->dvb->priv; | |
134 | ||
5823b3a6 | 135 | dprintk("%s called\n", __func__); |
1da177e4 LT |
136 | |
137 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
138 | udelay(200); | |
139 | mt352_write(fe, reset, sizeof(reset)); | |
140 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
141 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
142 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
143 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
144 | ||
145 | mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg)); | |
146 | mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg)); | |
147 | mt352_write(fe, irq_cfg, sizeof(irq_cfg)); | |
df8cf706 | 148 | |
1da177e4 LT |
149 | return 0; |
150 | } | |
151 | ||
a78d0bfa JAR |
152 | static int mt352_aver777_init(struct dvb_frontend* fe) |
153 | { | |
154 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | |
155 | static u8 reset [] = { RESET, 0x80 }; | |
156 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
157 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | |
158 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | |
159 | ||
160 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
161 | udelay(200); | |
162 | mt352_write(fe, reset, sizeof(reset)); | |
163 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
164 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
165 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
6e501a3f | 170 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
95a2fdb6 | 171 | { |
6e501a3f TF |
172 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
173 | static u8 reset [] = { RESET, 0x80 }; | |
174 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
175 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; | |
95a2fdb6 MCC |
176 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
177 | ||
178 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
179 | udelay(200); | |
180 | mt352_write(fe, reset, sizeof(reset)); | |
181 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
182 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
183 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
95a2fdb6 MCC |
184 | return 0; |
185 | } | |
186 | ||
14d24d14 | 187 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 188 | { |
b09cf61d | 189 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
df8cf706 HH |
190 | u8 off[] = { 0x00, 0xf1}; |
191 | u8 on[] = { 0x00, 0x71}; | |
192 | struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)}; | |
193 | ||
1da177e4 LT |
194 | struct saa7134_dev *dev = fe->dvb->priv; |
195 | struct v4l2_frequency f; | |
196 | ||
197 | /* set frequency (mt2050) */ | |
198 | f.tuner = 0; | |
199 | f.type = V4L2_TUNER_DIGITAL_TV; | |
b09cf61d | 200 | f.frequency = c->frequency / 1000 * 16 / 1000; |
dea74869 PB |
201 | if (fe->ops.i2c_gate_ctrl) |
202 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 203 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
fac6986c | 204 | saa_call_all(dev, tuner, s_frequency, &f); |
df8cf706 | 205 | msg.buf = on; |
dea74869 PB |
206 | if (fe->ops.i2c_gate_ctrl) |
207 | fe->ops.i2c_gate_ctrl(fe, 1); | |
df8cf706 | 208 | i2c_transfer(&dev->i2c_adap, &msg, 1); |
1da177e4 LT |
209 | |
210 | pinnacle_antenna_pwr(dev, antenna_pwr); | |
211 | ||
212 | /* mt352 setup */ | |
0463f12c | 213 | return mt352_pinnacle_init(fe); |
1da177e4 LT |
214 | } |
215 | ||
216 | static struct mt352_config pinnacle_300i = { | |
217 | .demod_address = 0x3c >> 1, | |
218 | .adc_clock = 20333, | |
219 | .if2 = 36150, | |
220 | .no_tuner = 1, | |
221 | .demod_init = mt352_pinnacle_init, | |
1da177e4 | 222 | }; |
a78d0bfa JAR |
223 | |
224 | static struct mt352_config avermedia_777 = { | |
225 | .demod_address = 0xf, | |
226 | .demod_init = mt352_aver777_init, | |
a78d0bfa | 227 | }; |
1da177e4 | 228 | |
6e501a3f | 229 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
bc36a686 MCC |
230 | .demod_address = (0x1e >> 1), |
231 | .no_tuner = 1, | |
6e501a3f | 232 | .demod_init = mt352_avermedia_xc3028_init, |
bc36a686 MCC |
233 | }; |
234 | ||
f0551efc MCC |
235 | static struct tda18271_std_map mb86a20s_tda18271_std_map = { |
236 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
237 | .if_lvl = 7, .rfagc_top = 0x37, }, | |
238 | }; | |
239 | ||
240 | static struct tda18271_config kworld_tda18271_config = { | |
241 | .std_map = &mb86a20s_tda18271_std_map, | |
6a58bc0f | 242 | .gate = TDA18271_GATE_DIGITAL, |
ecb71d26 MCC |
243 | .config = 3, /* Use tuner callback for AGC */ |
244 | ||
f0551efc MCC |
245 | }; |
246 | ||
247 | static const struct mb86a20s_config kworld_mb86a20s_config = { | |
248 | .demod_address = 0x10, | |
249 | }; | |
250 | ||
6a58bc0f MCC |
251 | static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable) |
252 | { | |
253 | struct saa7134_dev *dev = fe->dvb->priv; | |
254 | ||
255 | unsigned char initmsg[] = {0x45, 0x97}; | |
256 | unsigned char msg_enable[] = {0x45, 0xc1}; | |
257 | unsigned char msg_disable[] = {0x45, 0x81}; | |
258 | struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2}; | |
259 | ||
260 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) { | |
261 | wprintk("could not access the I2C gate\n"); | |
262 | return -EIO; | |
263 | } | |
264 | if (enable) | |
265 | msg.buf = msg_enable; | |
266 | else | |
267 | msg.buf = msg_disable; | |
268 | if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) { | |
269 | wprintk("could not access the I2C gate\n"); | |
270 | return -EIO; | |
271 | } | |
272 | msleep(20); | |
273 | return 0; | |
274 | } | |
275 | ||
58ef4f92 HH |
276 | /* ================================================================== |
277 | * tda1004x based DVB-T cards, helper functions | |
278 | */ | |
279 | ||
280 | static int philips_tda1004x_request_firmware(struct dvb_frontend *fe, | |
281 | const struct firmware **fw, char *name) | |
1da177e4 LT |
282 | { |
283 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
284 | return request_firmware(fw, name, &dev->pci->dev); |
285 | } | |
286 | ||
58ef4f92 HH |
287 | /* ------------------------------------------------------------------ |
288 | * these tuners are tu1216, td1316(a) | |
289 | */ | |
290 | ||
14d24d14 | 291 | static int philips_tda6651_pll_set(struct dvb_frontend *fe) |
58ef4f92 | 292 | { |
b09cf61d | 293 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
58ef4f92 HH |
294 | struct saa7134_dev *dev = fe->dvb->priv; |
295 | struct tda1004x_state *state = fe->demodulator_priv; | |
296 | u8 addr = state->config->tuner_address; | |
86ddd96f | 297 | u8 tuner_buf[4]; |
2cf36ac4 | 298 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len = |
86ddd96f MCC |
299 | sizeof(tuner_buf) }; |
300 | int tuner_frequency = 0; | |
301 | u8 band, cp, filter; | |
302 | ||
303 | /* determine charge pump */ | |
b09cf61d | 304 | tuner_frequency = c->frequency + 36166000; |
86ddd96f MCC |
305 | if (tuner_frequency < 87000000) |
306 | return -EINVAL; | |
307 | else if (tuner_frequency < 130000000) | |
308 | cp = 3; | |
309 | else if (tuner_frequency < 160000000) | |
310 | cp = 5; | |
311 | else if (tuner_frequency < 200000000) | |
312 | cp = 6; | |
313 | else if (tuner_frequency < 290000000) | |
314 | cp = 3; | |
315 | else if (tuner_frequency < 420000000) | |
316 | cp = 5; | |
317 | else if (tuner_frequency < 480000000) | |
318 | cp = 6; | |
319 | else if (tuner_frequency < 620000000) | |
320 | cp = 3; | |
321 | else if (tuner_frequency < 830000000) | |
322 | cp = 5; | |
323 | else if (tuner_frequency < 895000000) | |
324 | cp = 7; | |
325 | else | |
326 | return -EINVAL; | |
327 | ||
328 | /* determine band */ | |
b09cf61d | 329 | if (c->frequency < 49000000) |
86ddd96f | 330 | return -EINVAL; |
b09cf61d | 331 | else if (c->frequency < 161000000) |
86ddd96f | 332 | band = 1; |
b09cf61d | 333 | else if (c->frequency < 444000000) |
86ddd96f | 334 | band = 2; |
b09cf61d | 335 | else if (c->frequency < 861000000) |
86ddd96f MCC |
336 | band = 4; |
337 | else | |
338 | return -EINVAL; | |
339 | ||
340 | /* setup PLL filter */ | |
b09cf61d MCC |
341 | switch (c->bandwidth_hz) { |
342 | case 6000000: | |
86ddd96f MCC |
343 | filter = 0; |
344 | break; | |
345 | ||
b09cf61d | 346 | case 7000000: |
86ddd96f MCC |
347 | filter = 0; |
348 | break; | |
349 | ||
b09cf61d | 350 | case 8000000: |
86ddd96f MCC |
351 | filter = 1; |
352 | break; | |
1da177e4 | 353 | |
86ddd96f MCC |
354 | default: |
355 | return -EINVAL; | |
356 | } | |
357 | ||
358 | /* calculate divisor | |
359 | * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6) | |
1da177e4 | 360 | */ |
b09cf61d | 361 | tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000; |
86ddd96f MCC |
362 | |
363 | /* setup tuner buffer */ | |
364 | tuner_buf[0] = (tuner_frequency >> 8) & 0x7f; | |
365 | tuner_buf[1] = tuner_frequency & 0xff; | |
366 | tuner_buf[2] = 0xca; | |
367 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
368 | ||
dea74869 PB |
369 | if (fe->ops.i2c_gate_ctrl) |
370 | fe->ops.i2c_gate_ctrl(fe, 1); | |
58ef4f92 | 371 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) { |
cf3c34c8 TP |
372 | wprintk("could not write to tuner at addr: 0x%02x\n", |
373 | addr << 1); | |
86ddd96f | 374 | return -EIO; |
58ef4f92 | 375 | } |
2cf36ac4 HH |
376 | msleep(1); |
377 | return 0; | |
378 | } | |
379 | ||
58ef4f92 | 380 | static int philips_tu1216_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
381 | { |
382 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
383 | struct tda1004x_state *state = fe->demodulator_priv; |
384 | u8 addr = state->config->tuner_address; | |
2cf36ac4 HH |
385 | static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab }; |
386 | struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) }; | |
86ddd96f | 387 | |
2cf36ac4 | 388 | /* setup PLL configuration */ |
dea74869 PB |
389 | if (fe->ops.i2c_gate_ctrl) |
390 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
391 | if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) |
392 | return -EIO; | |
86ddd96f | 393 | msleep(1); |
2cf36ac4 | 394 | |
1da177e4 LT |
395 | return 0; |
396 | } | |
397 | ||
2cf36ac4 HH |
398 | /* ------------------------------------------------------------------ */ |
399 | ||
2cf36ac4 | 400 | static struct tda1004x_config philips_tu1216_60_config = { |
86ddd96f MCC |
401 | .demod_address = 0x8, |
402 | .invert = 1, | |
2cf36ac4 | 403 | .invert_oclk = 0, |
86ddd96f MCC |
404 | .xtal_freq = TDA10046_XTAL_4M, |
405 | .agc_config = TDA10046_AGC_DEFAULT, | |
406 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
407 | .tuner_address = 0x60, |
408 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
409 | }; |
410 | ||
2cf36ac4 HH |
411 | static struct tda1004x_config philips_tu1216_61_config = { |
412 | ||
413 | .demod_address = 0x8, | |
414 | .invert = 1, | |
415 | .invert_oclk = 0, | |
416 | .xtal_freq = TDA10046_XTAL_4M, | |
417 | .agc_config = TDA10046_AGC_DEFAULT, | |
418 | .if_freq = TDA10046_FREQ_3617, | |
58ef4f92 HH |
419 | .tuner_address = 0x61, |
420 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
421 | }; |
422 | ||
423 | /* ------------------------------------------------------------------ */ | |
424 | ||
cbb94521 | 425 | static int philips_td1316_tuner_init(struct dvb_frontend *fe) |
2cf36ac4 HH |
426 | { |
427 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
428 | struct tda1004x_state *state = fe->demodulator_priv; |
429 | u8 addr = state->config->tuner_address; | |
2cf36ac4 | 430 | static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab }; |
58ef4f92 | 431 | struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; |
2cf36ac4 HH |
432 | |
433 | /* setup PLL configuration */ | |
dea74869 PB |
434 | if (fe->ops.i2c_gate_ctrl) |
435 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 HH |
436 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) |
437 | return -EIO; | |
2cf36ac4 HH |
438 | return 0; |
439 | } | |
440 | ||
14d24d14 | 441 | static int philips_td1316_tuner_set_params(struct dvb_frontend *fe) |
2cf36ac4 | 442 | { |
14d24d14 | 443 | return philips_tda6651_pll_set(fe); |
58ef4f92 HH |
444 | } |
445 | ||
446 | static int philips_td1316_tuner_sleep(struct dvb_frontend *fe) | |
447 | { | |
448 | struct saa7134_dev *dev = fe->dvb->priv; | |
449 | struct tda1004x_state *state = fe->demodulator_priv; | |
450 | u8 addr = state->config->tuner_address; | |
451 | static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 }; | |
452 | struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
453 | ||
454 | /* switch the tuner to analog mode */ | |
455 | if (fe->ops.i2c_gate_ctrl) | |
456 | fe->ops.i2c_gate_ctrl(fe, 1); | |
457 | if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) | |
458 | return -EIO; | |
459 | return 0; | |
2cf36ac4 HH |
460 | } |
461 | ||
58ef4f92 HH |
462 | /* ------------------------------------------------------------------ */ |
463 | ||
cbb94521 HH |
464 | static int philips_europa_tuner_init(struct dvb_frontend *fe) |
465 | { | |
466 | struct saa7134_dev *dev = fe->dvb->priv; | |
467 | static u8 msg[] = { 0x00, 0x40}; | |
468 | struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
469 | ||
470 | ||
471 | if (philips_td1316_tuner_init(fe)) | |
472 | return -EIO; | |
473 | msleep(1); | |
474 | if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1) | |
475 | return -EIO; | |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
a79ddae9 | 480 | static int philips_europa_tuner_sleep(struct dvb_frontend *fe) |
2cf36ac4 HH |
481 | { |
482 | struct saa7134_dev *dev = fe->dvb->priv; | |
2cf36ac4 | 483 | |
58ef4f92 HH |
484 | static u8 msg[] = { 0x00, 0x14 }; |
485 | struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) }; | |
486 | ||
487 | if (philips_td1316_tuner_sleep(fe)) | |
488 | return -EIO; | |
2cf36ac4 HH |
489 | |
490 | /* switch the board to analog mode */ | |
dea74869 PB |
491 | if (fe->ops.i2c_gate_ctrl) |
492 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2cf36ac4 | 493 | i2c_transfer(&dev->i2c_adap, &analog_msg, 1); |
a79ddae9 AQ |
494 | return 0; |
495 | } | |
496 | ||
497 | static int philips_europa_demod_sleep(struct dvb_frontend *fe) | |
498 | { | |
499 | struct saa7134_dev *dev = fe->dvb->priv; | |
500 | ||
501 | if (dev->original_demod_sleep) | |
502 | dev->original_demod_sleep(fe); | |
dea74869 | 503 | fe->ops.i2c_gate_ctrl(fe, 1); |
a79ddae9 | 504 | return 0; |
2cf36ac4 HH |
505 | } |
506 | ||
507 | static struct tda1004x_config philips_europa_config = { | |
508 | ||
509 | .demod_address = 0x8, | |
510 | .invert = 0, | |
511 | .invert_oclk = 0, | |
512 | .xtal_freq = TDA10046_XTAL_4M, | |
513 | .agc_config = TDA10046_AGC_IFO_AUTO_POS, | |
514 | .if_freq = TDA10046_FREQ_052, | |
58ef4f92 HH |
515 | .tuner_address = 0x61, |
516 | .request_firmware = philips_tda1004x_request_firmware | |
2cf36ac4 HH |
517 | }; |
518 | ||
408b664a | 519 | static struct tda1004x_config medion_cardbus = { |
86ddd96f MCC |
520 | .demod_address = 0x08, |
521 | .invert = 1, | |
522 | .invert_oclk = 0, | |
523 | .xtal_freq = TDA10046_XTAL_16M, | |
524 | .agc_config = TDA10046_AGC_IFO_AUTO_NEG, | |
525 | .if_freq = TDA10046_FREQ_3613, | |
58ef4f92 HH |
526 | .tuner_address = 0x61, |
527 | .request_firmware = philips_tda1004x_request_firmware | |
86ddd96f MCC |
528 | }; |
529 | ||
128fe95d VC |
530 | static struct tda1004x_config technotrend_budget_t3000_config = { |
531 | .demod_address = 0x8, | |
532 | .invert = 1, | |
533 | .invert_oclk = 0, | |
534 | .xtal_freq = TDA10046_XTAL_4M, | |
535 | .agc_config = TDA10046_AGC_DEFAULT, | |
536 | .if_freq = TDA10046_FREQ_3617, | |
537 | .tuner_address = 0x63, | |
538 | .request_firmware = philips_tda1004x_request_firmware | |
539 | }; | |
540 | ||
58ef4f92 HH |
541 | /* ------------------------------------------------------------------ |
542 | * tda 1004x based cards with philips silicon tuner | |
543 | */ | |
544 | ||
58ef4f92 HH |
545 | static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable) |
546 | { | |
58ef4f92 HH |
547 | struct tda1004x_state *state = fe->demodulator_priv; |
548 | ||
549 | u8 addr = state->config->i2c_gate; | |
550 | static u8 tda8290_close[] = { 0x21, 0xc0}; | |
551 | static u8 tda8290_open[] = { 0x21, 0x80}; | |
552 | struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2}; | |
553 | if (enable) { | |
554 | tda8290_msg.buf = tda8290_close; | |
555 | } else { | |
556 | tda8290_msg.buf = tda8290_open; | |
557 | } | |
06be3035 | 558 | if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) { |
cf3c34c8 TP |
559 | struct saa7134_dev *dev = fe->dvb->priv; |
560 | wprintk("could not access tda8290 I2C gate\n"); | |
58ef4f92 HH |
561 | return -EIO; |
562 | } | |
563 | msleep(20); | |
564 | return 0; | |
565 | } | |
566 | ||
58ef4f92 | 567 | static int philips_tda827x_tuner_init(struct dvb_frontend *fe) |
90e9df7f | 568 | { |
90e9df7f | 569 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 570 | struct tda1004x_state *state = fe->demodulator_priv; |
8ce47dad | 571 | |
58ef4f92 HH |
572 | switch (state->config->antenna_switch) { |
573 | case 0: break; | |
574 | case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
575 | saa7134_set_gpio(dev, 21, 0); | |
576 | break; | |
577 | case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
578 | saa7134_set_gpio(dev, 21, 1); | |
579 | break; | |
587d2fd7 | 580 | } |
587d2fd7 HH |
581 | return 0; |
582 | } | |
583 | ||
58ef4f92 | 584 | static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe) |
587d2fd7 | 585 | { |
58ef4f92 HH |
586 | struct saa7134_dev *dev = fe->dvb->priv; |
587 | struct tda1004x_state *state = fe->demodulator_priv; | |
8ce47dad | 588 | |
58ef4f92 HH |
589 | switch (state->config->antenna_switch) { |
590 | case 0: break; | |
591 | case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n"); | |
592 | saa7134_set_gpio(dev, 21, 1); | |
593 | break; | |
594 | case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n"); | |
595 | saa7134_set_gpio(dev, 21, 0); | |
596 | break; | |
597 | } | |
587d2fd7 | 598 | return 0; |
2d6b5f62 | 599 | } |
90e9df7f | 600 | |
d557dab5 MCC |
601 | static int configure_tda827x_fe(struct saa7134_dev *dev, |
602 | struct tda1004x_config *cdec_conf, | |
603 | struct tda827x_config *tuner_conf) | |
90e9df7f | 604 | { |
2ada815f | 605 | struct vb2_dvb_frontend *fe0; |
363c35fc | 606 | |
92abe9ee | 607 | /* Get the first frontend */ |
2ada815f | 608 | fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); |
363c35fc | 609 | |
37e310ed PST |
610 | if (!fe0) |
611 | return -EINVAL; | |
612 | ||
363c35fc ST |
613 | fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap); |
614 | if (fe0->dvb.frontend) { | |
7bff4b4d | 615 | if (cdec_conf->i2c_gate) |
363c35fc ST |
616 | fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl; |
617 | if (dvb_attach(tda827x_attach, fe0->dvb.frontend, | |
d557dab5 MCC |
618 | cdec_conf->tuner_address, |
619 | &dev->i2c_adap, tuner_conf)) | |
620 | return 0; | |
621 | ||
622 | wprintk("no tda827x tuner found at addr: %02x\n", | |
7bff4b4d | 623 | cdec_conf->tuner_address); |
58ef4f92 | 624 | } |
d557dab5 | 625 | return -EINVAL; |
90e9df7f HH |
626 | } |
627 | ||
58ef4f92 | 628 | /* ------------------------------------------------------------------ */ |
261f5081 | 629 | |
7bff4b4d | 630 | static struct tda827x_config tda827x_cfg_0 = { |
7bff4b4d HH |
631 | .init = philips_tda827x_tuner_init, |
632 | .sleep = philips_tda827x_tuner_sleep, | |
633 | .config = 0, | |
634 | .switch_addr = 0 | |
635 | }; | |
636 | ||
637 | static struct tda827x_config tda827x_cfg_1 = { | |
7bff4b4d HH |
638 | .init = philips_tda827x_tuner_init, |
639 | .sleep = philips_tda827x_tuner_sleep, | |
640 | .config = 1, | |
641 | .switch_addr = 0x4b | |
642 | }; | |
643 | ||
644 | static struct tda827x_config tda827x_cfg_2 = { | |
7bff4b4d HH |
645 | .init = philips_tda827x_tuner_init, |
646 | .sleep = philips_tda827x_tuner_sleep, | |
647 | .config = 2, | |
648 | .switch_addr = 0x4b | |
649 | }; | |
650 | ||
651 | static struct tda827x_config tda827x_cfg_2_sw42 = { | |
7bff4b4d HH |
652 | .init = philips_tda827x_tuner_init, |
653 | .sleep = philips_tda827x_tuner_sleep, | |
654 | .config = 2, | |
655 | .switch_addr = 0x42 | |
656 | }; | |
657 | ||
658 | /* ------------------------------------------------------------------ */ | |
659 | ||
58ef4f92 | 660 | static struct tda1004x_config tda827x_lifeview_config = { |
90e9df7f HH |
661 | .demod_address = 0x08, |
662 | .invert = 1, | |
663 | .invert_oclk = 0, | |
664 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
665 | .agc_config = TDA10046_AGC_TDA827X, |
666 | .gpio_config = TDA10046_GP11_I, | |
550a9a5e | 667 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
668 | .tuner_address = 0x60, |
669 | .request_firmware = philips_tda1004x_request_firmware | |
550a9a5e | 670 | }; |
550a9a5e | 671 | |
58ef4f92 HH |
672 | static struct tda1004x_config philips_tiger_config = { |
673 | .demod_address = 0x08, | |
674 | .invert = 1, | |
675 | .invert_oclk = 0, | |
676 | .xtal_freq = TDA10046_XTAL_16M, | |
677 | .agc_config = TDA10046_AGC_TDA827X, | |
678 | .gpio_config = TDA10046_GP11_I, | |
679 | .if_freq = TDA10046_FREQ_045, | |
680 | .i2c_gate = 0x4b, | |
681 | .tuner_address = 0x61, | |
58ef4f92 HH |
682 | .antenna_switch= 1, |
683 | .request_firmware = philips_tda1004x_request_firmware | |
684 | }; | |
550a9a5e HH |
685 | |
686 | static struct tda1004x_config cinergy_ht_config = { | |
687 | .demod_address = 0x08, | |
688 | .invert = 1, | |
689 | .invert_oclk = 0, | |
690 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
691 | .agc_config = TDA10046_AGC_TDA827X, |
692 | .gpio_config = TDA10046_GP01_I, | |
90e9df7f | 693 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
694 | .i2c_gate = 0x4b, |
695 | .tuner_address = 0x61, | |
58ef4f92 | 696 | .request_firmware = philips_tda1004x_request_firmware |
90e9df7f HH |
697 | }; |
698 | ||
58ef4f92 HH |
699 | static struct tda1004x_config cinergy_ht_pci_config = { |
700 | .demod_address = 0x08, | |
701 | .invert = 1, | |
702 | .invert_oclk = 0, | |
703 | .xtal_freq = TDA10046_XTAL_16M, | |
704 | .agc_config = TDA10046_AGC_TDA827X, | |
705 | .gpio_config = TDA10046_GP01_I, | |
706 | .if_freq = TDA10046_FREQ_045, | |
707 | .i2c_gate = 0x4b, | |
708 | .tuner_address = 0x60, | |
58ef4f92 HH |
709 | .request_firmware = philips_tda1004x_request_firmware |
710 | }; | |
711 | ||
712 | static struct tda1004x_config philips_tiger_s_config = { | |
713 | .demod_address = 0x08, | |
714 | .invert = 1, | |
715 | .invert_oclk = 0, | |
716 | .xtal_freq = TDA10046_XTAL_16M, | |
717 | .agc_config = TDA10046_AGC_TDA827X, | |
718 | .gpio_config = TDA10046_GP01_I, | |
719 | .if_freq = TDA10046_FREQ_045, | |
720 | .i2c_gate = 0x4b, | |
721 | .tuner_address = 0x61, | |
58ef4f92 HH |
722 | .antenna_switch= 1, |
723 | .request_firmware = philips_tda1004x_request_firmware | |
724 | }; | |
df42eaf2 | 725 | |
587d2fd7 HH |
726 | static struct tda1004x_config pinnacle_pctv_310i_config = { |
727 | .demod_address = 0x08, | |
728 | .invert = 1, | |
729 | .invert_oclk = 0, | |
730 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
731 | .agc_config = TDA10046_AGC_TDA827X, |
732 | .gpio_config = TDA10046_GP11_I, | |
587d2fd7 | 733 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
734 | .i2c_gate = 0x4b, |
735 | .tuner_address = 0x61, | |
58ef4f92 | 736 | .request_firmware = philips_tda1004x_request_firmware |
587d2fd7 HH |
737 | }; |
738 | ||
c6e53daf TG |
739 | static struct tda1004x_config hauppauge_hvr_1110_config = { |
740 | .demod_address = 0x08, | |
741 | .invert = 1, | |
742 | .invert_oclk = 0, | |
743 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
744 | .agc_config = TDA10046_AGC_TDA827X, |
745 | .gpio_config = TDA10046_GP11_I, | |
c6e53daf | 746 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
747 | .i2c_gate = 0x4b, |
748 | .tuner_address = 0x61, | |
749 | .request_firmware = philips_tda1004x_request_firmware | |
c6e53daf TG |
750 | }; |
751 | ||
83646817 HH |
752 | static struct tda1004x_config asus_p7131_dual_config = { |
753 | .demod_address = 0x08, | |
754 | .invert = 1, | |
755 | .invert_oclk = 0, | |
756 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
757 | .agc_config = TDA10046_AGC_TDA827X, |
758 | .gpio_config = TDA10046_GP11_I, | |
83646817 | 759 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
760 | .i2c_gate = 0x4b, |
761 | .tuner_address = 0x61, | |
58ef4f92 HH |
762 | .antenna_switch= 2, |
763 | .request_firmware = philips_tda1004x_request_firmware | |
83646817 HH |
764 | }; |
765 | ||
420f32fe NS |
766 | static struct tda1004x_config lifeview_trio_config = { |
767 | .demod_address = 0x09, | |
768 | .invert = 1, | |
769 | .invert_oclk = 0, | |
770 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 HH |
771 | .agc_config = TDA10046_AGC_TDA827X, |
772 | .gpio_config = TDA10046_GP00_I, | |
420f32fe | 773 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
774 | .tuner_address = 0x60, |
775 | .request_firmware = philips_tda1004x_request_firmware | |
420f32fe NS |
776 | }; |
777 | ||
58ef4f92 | 778 | static struct tda1004x_config tevion_dvbt220rf_config = { |
df42eaf2 HH |
779 | .demod_address = 0x08, |
780 | .invert = 1, | |
781 | .invert_oclk = 0, | |
782 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 783 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 784 | .gpio_config = TDA10046_GP11_I, |
df42eaf2 | 785 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
786 | .tuner_address = 0x60, |
787 | .request_firmware = philips_tda1004x_request_firmware | |
df42eaf2 HH |
788 | }; |
789 | ||
58ef4f92 | 790 | static struct tda1004x_config md8800_dvbt_config = { |
3dfb729f PH |
791 | .demod_address = 0x08, |
792 | .invert = 1, | |
793 | .invert_oclk = 0, | |
794 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 795 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 796 | .gpio_config = TDA10046_GP01_I, |
3dfb729f | 797 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
798 | .i2c_gate = 0x4b, |
799 | .tuner_address = 0x60, | |
58ef4f92 | 800 | .request_firmware = philips_tda1004x_request_firmware |
3dfb729f PH |
801 | }; |
802 | ||
e06cea4c HH |
803 | static struct tda1004x_config asus_p7131_4871_config = { |
804 | .demod_address = 0x08, | |
805 | .invert = 1, | |
806 | .invert_oclk = 0, | |
807 | .xtal_freq = TDA10046_XTAL_16M, | |
808 | .agc_config = TDA10046_AGC_TDA827X, | |
809 | .gpio_config = TDA10046_GP01_I, | |
810 | .if_freq = TDA10046_FREQ_045, | |
811 | .i2c_gate = 0x4b, | |
812 | .tuner_address = 0x61, | |
e06cea4c HH |
813 | .antenna_switch= 2, |
814 | .request_firmware = philips_tda1004x_request_firmware | |
815 | }; | |
816 | ||
f3eec0c0 | 817 | static struct tda1004x_config asus_p7131_hybrid_lna_config = { |
e06cea4c HH |
818 | .demod_address = 0x08, |
819 | .invert = 1, | |
820 | .invert_oclk = 0, | |
821 | .xtal_freq = TDA10046_XTAL_16M, | |
822 | .agc_config = TDA10046_AGC_TDA827X, | |
823 | .gpio_config = TDA10046_GP11_I, | |
824 | .if_freq = TDA10046_FREQ_045, | |
825 | .i2c_gate = 0x4b, | |
826 | .tuner_address = 0x61, | |
e06cea4c HH |
827 | .antenna_switch= 2, |
828 | .request_firmware = philips_tda1004x_request_firmware | |
829 | }; | |
261f5081 | 830 | |
b39423a9 SF |
831 | static struct tda1004x_config kworld_dvb_t_210_config = { |
832 | .demod_address = 0x08, | |
833 | .invert = 1, | |
834 | .invert_oclk = 0, | |
835 | .xtal_freq = TDA10046_XTAL_16M, | |
836 | .agc_config = TDA10046_AGC_TDA827X, | |
837 | .gpio_config = TDA10046_GP11_I, | |
838 | .if_freq = TDA10046_FREQ_045, | |
839 | .i2c_gate = 0x4b, | |
840 | .tuner_address = 0x61, | |
b39423a9 SF |
841 | .antenna_switch= 1, |
842 | .request_firmware = philips_tda1004x_request_firmware | |
843 | }; | |
261f5081 | 844 | |
d90d9f5a ES |
845 | static struct tda1004x_config avermedia_super_007_config = { |
846 | .demod_address = 0x08, | |
847 | .invert = 1, | |
848 | .invert_oclk = 0, | |
849 | .xtal_freq = TDA10046_XTAL_16M, | |
850 | .agc_config = TDA10046_AGC_TDA827X, | |
851 | .gpio_config = TDA10046_GP01_I, | |
852 | .if_freq = TDA10046_FREQ_045, | |
853 | .i2c_gate = 0x4b, | |
854 | .tuner_address = 0x60, | |
d90d9f5a ES |
855 | .antenna_switch= 1, |
856 | .request_firmware = philips_tda1004x_request_firmware | |
857 | }; | |
858 | ||
4ba24373 HP |
859 | static struct tda1004x_config twinhan_dtv_dvb_3056_config = { |
860 | .demod_address = 0x08, | |
861 | .invert = 1, | |
862 | .invert_oclk = 0, | |
863 | .xtal_freq = TDA10046_XTAL_16M, | |
864 | .agc_config = TDA10046_AGC_TDA827X, | |
865 | .gpio_config = TDA10046_GP01_I, | |
866 | .if_freq = TDA10046_FREQ_045, | |
867 | .i2c_gate = 0x42, | |
868 | .tuner_address = 0x61, | |
4ba24373 HP |
869 | .antenna_switch = 1, |
870 | .request_firmware = philips_tda1004x_request_firmware | |
871 | }; | |
872 | ||
301e9d64 | 873 | static struct tda1004x_config asus_tiger_3in1_config = { |
874 | .demod_address = 0x0b, | |
875 | .invert = 1, | |
876 | .invert_oclk = 0, | |
877 | .xtal_freq = TDA10046_XTAL_16M, | |
878 | .agc_config = TDA10046_AGC_TDA827X, | |
879 | .gpio_config = TDA10046_GP11_I, | |
880 | .if_freq = TDA10046_FREQ_045, | |
881 | .i2c_gate = 0x4b, | |
882 | .tuner_address = 0x61, | |
883 | .antenna_switch = 1, | |
884 | .request_firmware = philips_tda1004x_request_firmware | |
885 | }; | |
886 | ||
75c7dbca | 887 | static struct tda1004x_config asus_ps3_100_config = { |
888 | .demod_address = 0x0b, | |
889 | .invert = 1, | |
890 | .invert_oclk = 0, | |
891 | .xtal_freq = TDA10046_XTAL_16M, | |
892 | .agc_config = TDA10046_AGC_TDA827X, | |
893 | .gpio_config = TDA10046_GP11_I, | |
894 | .if_freq = TDA10046_FREQ_045, | |
895 | .i2c_gate = 0x4b, | |
896 | .tuner_address = 0x61, | |
897 | .antenna_switch = 1, | |
898 | .request_firmware = philips_tda1004x_request_firmware | |
899 | }; | |
900 | ||
58ef4f92 HH |
901 | /* ------------------------------------------------------------------ |
902 | * special case: this card uses saa713x GPIO22 for the mode switch | |
903 | */ | |
5eda227f | 904 | |
58ef4f92 | 905 | static int ads_duo_tuner_init(struct dvb_frontend *fe) |
5eda227f HH |
906 | { |
907 | struct saa7134_dev *dev = fe->dvb->priv; | |
58ef4f92 HH |
908 | philips_tda827x_tuner_init(fe); |
909 | /* route TDA8275a AGC input to the channel decoder */ | |
06be3035 | 910 | saa7134_set_gpio(dev, 22, 1); |
5eda227f HH |
911 | return 0; |
912 | } | |
913 | ||
58ef4f92 | 914 | static int ads_duo_tuner_sleep(struct dvb_frontend *fe) |
5eda227f | 915 | { |
5eda227f | 916 | struct saa7134_dev *dev = fe->dvb->priv; |
58ef4f92 | 917 | /* route TDA8275a AGC input to the analog IF chip*/ |
06be3035 | 918 | saa7134_set_gpio(dev, 22, 0); |
58ef4f92 HH |
919 | philips_tda827x_tuner_sleep(fe); |
920 | return 0; | |
5eda227f HH |
921 | } |
922 | ||
8ce47dad | 923 | static struct tda827x_config ads_duo_cfg = { |
8ce47dad | 924 | .init = ads_duo_tuner_init, |
7bff4b4d HH |
925 | .sleep = ads_duo_tuner_sleep, |
926 | .config = 0 | |
8ce47dad MK |
927 | }; |
928 | ||
58ef4f92 | 929 | static struct tda1004x_config ads_tech_duo_config = { |
5eda227f HH |
930 | .demod_address = 0x08, |
931 | .invert = 1, | |
932 | .invert_oclk = 0, | |
933 | .xtal_freq = TDA10046_XTAL_16M, | |
1bb0e866 | 934 | .agc_config = TDA10046_AGC_TDA827X, |
58ef4f92 | 935 | .gpio_config = TDA10046_GP00_I, |
5eda227f | 936 | .if_freq = TDA10046_FREQ_045, |
58ef4f92 HH |
937 | .tuner_address = 0x61, |
938 | .request_firmware = philips_tda1004x_request_firmware | |
5eda227f HH |
939 | }; |
940 | ||
47aeba5a DB |
941 | static struct zl10353_config behold_h6_config = { |
942 | .demod_address = 0x1e>>1, | |
943 | .no_tuner = 1, | |
944 | .parallel_ts = 1, | |
5f77af93 | 945 | .disable_i2c_gate_ctrl = 1, |
47aeba5a DB |
946 | }; |
947 | ||
2930992c BILDB |
948 | static struct xc5000_config behold_x7_tunerconfig = { |
949 | .i2c_address = 0xc2>>1, | |
950 | .if_khz = 4560, | |
2a0d0560 | 951 | .radio_input = XC5000_RADIO_FM1, |
2930992c BILDB |
952 | }; |
953 | ||
954 | static struct zl10353_config behold_x7_config = { | |
955 | .demod_address = 0x1e>>1, | |
956 | .if2 = 45600, | |
957 | .no_tuner = 1, | |
958 | .parallel_ts = 1, | |
959 | .disable_i2c_gate_ctrl = 1, | |
960 | }; | |
961 | ||
dbe8740d CC |
962 | static struct zl10353_config videomate_t750_zl10353_config = { |
963 | .demod_address = 0x0f, | |
964 | .no_tuner = 1, | |
965 | .parallel_ts = 1, | |
966 | .disable_i2c_gate_ctrl = 1, | |
967 | }; | |
968 | ||
969 | static struct qt1010_config videomate_t750_qt1010_config = { | |
970 | .i2c_address = 0x62 | |
971 | }; | |
972 | ||
973 | ||
58ef4f92 HH |
974 | /* ================================================================== |
975 | * tda10086 based DVB-S cards, helper functions | |
976 | */ | |
977 | ||
e2ac28fa IL |
978 | static struct tda10086_config flydvbs = { |
979 | .demod_address = 0x0e, | |
980 | .invert = 0, | |
ea75baf4 | 981 | .diseqc_tone = 0, |
9a1b04e4 HH |
982 | .xtal_freq = TDA10086_XTAL_16M, |
983 | }; | |
984 | ||
985 | static struct tda10086_config sd1878_4m = { | |
986 | .demod_address = 0x0e, | |
987 | .invert = 0, | |
988 | .diseqc_tone = 0, | |
989 | .xtal_freq = TDA10086_XTAL_4M, | |
e2ac28fa IL |
990 | }; |
991 | ||
1b1cee35 HH |
992 | /* ------------------------------------------------------------------ |
993 | * special case: lnb supply is connected to the gated i2c | |
994 | */ | |
995 | ||
996 | static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
997 | { | |
998 | int res = -EIO; | |
999 | struct saa7134_dev *dev = fe->dvb->priv; | |
1000 | if (fe->ops.i2c_gate_ctrl) { | |
1001 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1002 | if (dev->original_set_voltage) | |
1003 | res = dev->original_set_voltage(fe, voltage); | |
1004 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1005 | } | |
1006 | return res; | |
1007 | }; | |
1008 | ||
1009 | static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg) | |
1010 | { | |
1011 | int res = -EIO; | |
1012 | struct saa7134_dev *dev = fe->dvb->priv; | |
1013 | if (fe->ops.i2c_gate_ctrl) { | |
1014 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1015 | if (dev->original_set_high_voltage) | |
1016 | res = dev->original_set_high_voltage(fe, arg); | |
1017 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1018 | } | |
1019 | return res; | |
1020 | }; | |
1021 | ||
5823b3a6 HH |
1022 | static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage) |
1023 | { | |
1024 | struct saa7134_dev *dev = fe->dvb->priv; | |
1025 | u8 wbuf[2] = { 0x1f, 00 }; | |
1026 | u8 rbuf; | |
1027 | struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 }, | |
1028 | { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } }; | |
1029 | ||
1030 | if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2) | |
1031 | return -EIO; | |
1032 | /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */ | |
1033 | if (voltage == SEC_VOLTAGE_18) | |
1034 | wbuf[1] = rbuf | 0x10; | |
1035 | else | |
1036 | wbuf[1] = rbuf & 0xef; | |
1037 | msg[0].len = 2; | |
1038 | i2c_transfer(&dev->i2c_adap, msg, 1); | |
1039 | return 0; | |
1040 | } | |
1041 | ||
1042 | static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg) | |
1043 | { | |
1044 | struct saa7134_dev *dev = fe->dvb->priv; | |
1045 | wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__); | |
1046 | return -EIO; | |
1047 | } | |
1048 | ||
58ef4f92 HH |
1049 | /* ================================================================== |
1050 | * nxt200x based ATSC cards, helper functions | |
1051 | */ | |
90e9df7f | 1052 | |
3b64e8e2 MK |
1053 | static struct nxt200x_config avertvhda180 = { |
1054 | .demod_address = 0x0a, | |
3b64e8e2 | 1055 | }; |
3e1410ad AB |
1056 | |
1057 | static struct nxt200x_config kworldatsc110 = { | |
1058 | .demod_address = 0x0a, | |
3e1410ad | 1059 | }; |
3b64e8e2 | 1060 | |
04574185 MS |
1061 | /* ------------------------------------------------------------------ */ |
1062 | ||
1063 | static struct mt312_config avertv_a700_mt312 = { | |
1064 | .demod_address = 0x0e, | |
1065 | .voltage_inverted = 1, | |
1066 | }; | |
1067 | ||
1068 | static struct zl10036_config avertv_a700_tuner = { | |
1069 | .tuner_address = 0x60, | |
1070 | }; | |
1071 | ||
ecfcfec8 IL |
1072 | static struct mt312_config zl10313_compro_s350_config = { |
1073 | .demod_address = 0x0e, | |
1074 | }; | |
1075 | ||
34fe2784 OZ |
1076 | static struct mt312_config zl10313_avermedia_a706_config = { |
1077 | .demod_address = 0x0e, | |
1078 | }; | |
1079 | ||
3abdedd8 MK |
1080 | static struct lgdt3305_config hcw_lgdt3305_config = { |
1081 | .i2c_addr = 0x0e, | |
1082 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
1083 | .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE, | |
1084 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
1085 | .deny_i2c_rptr = 1, | |
1086 | .spectral_inversion = 1, | |
1087 | .qam_if_khz = 4000, | |
1088 | .vsb_if_khz = 3250, | |
1089 | }; | |
1090 | ||
1bc7f51c MK |
1091 | static struct tda10048_config hcw_tda10048_config = { |
1092 | .demod_address = 0x10 >> 1, | |
1093 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
1094 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1095 | .inversion = TDA10048_INVERSION_ON, | |
1096 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1097 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
1098 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
1099 | .clk_freq_khz = TDA10048_CLK_16000, | |
1100 | .disable_gate_access = 1, | |
1101 | }; | |
1102 | ||
3abdedd8 MK |
1103 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
1104 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, | |
1105 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
1106 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
1107 | .if_lvl = 1, .rfagc_top = 0x58, }, | |
1108 | }; | |
1109 | ||
1110 | static struct tda18271_config hcw_tda18271_config = { | |
1111 | .std_map = &hauppauge_tda18271_std_map, | |
1112 | .gate = TDA18271_GATE_ANALOG, | |
1113 | .config = 3, | |
542cb057 | 1114 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
3abdedd8 MK |
1115 | }; |
1116 | ||
1117 | static struct tda829x_config tda829x_no_probe = { | |
1118 | .probe_tuner = TDA829X_DONT_PROBE, | |
1119 | }; | |
1120 | ||
6c119ff4 HV |
1121 | static struct tda10048_config zolid_tda10048_config = { |
1122 | .demod_address = 0x10 >> 1, | |
1123 | .output_mode = TDA10048_PARALLEL_OUTPUT, | |
1124 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1125 | .inversion = TDA10048_INVERSION_ON, | |
1126 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1127 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
1128 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
1129 | .clk_freq_khz = TDA10048_CLK_16000, | |
1130 | .disable_gate_access = 1, | |
1131 | }; | |
1132 | ||
1133 | static struct tda18271_config zolid_tda18271_config = { | |
1134 | .gate = TDA18271_GATE_ANALOG, | |
1135 | }; | |
1136 | ||
184e769f MK |
1137 | static struct tda10048_config dtv1000s_tda10048_config = { |
1138 | .demod_address = 0x10 >> 1, | |
1139 | .output_mode = TDA10048_PARALLEL_OUTPUT, | |
1140 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
1141 | .inversion = TDA10048_INVERSION_ON, | |
1142 | .dtv6_if_freq_khz = TDA10048_IF_3300, | |
1143 | .dtv7_if_freq_khz = TDA10048_IF_3800, | |
1144 | .dtv8_if_freq_khz = TDA10048_IF_4300, | |
1145 | .clk_freq_khz = TDA10048_CLK_16000, | |
1146 | .disable_gate_access = 1, | |
1147 | }; | |
1148 | ||
1149 | static struct tda18271_std_map dtv1000s_tda18271_std_map = { | |
1150 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
1151 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1152 | .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, | |
1153 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1154 | .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, | |
1155 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
1156 | }; | |
1157 | ||
1158 | static struct tda18271_config dtv1000s_tda18271_config = { | |
1159 | .std_map = &dtv1000s_tda18271_std_map, | |
1160 | .gate = TDA18271_GATE_ANALOG, | |
1161 | }; | |
1162 | ||
ce02704d TL |
1163 | static struct lgs8gxx_config prohdtv_pro2_lgs8g75_config = { |
1164 | .prod = LGS8GXX_PROD_LGS8G75, | |
1165 | .demod_address = 0x1d, | |
1166 | .serial_ts = 0, | |
1167 | .ts_clk_pol = 1, | |
1168 | .ts_clk_gated = 0, | |
1169 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
1170 | .if_freq = 4000, /* 4.00 MHz */ | |
1171 | .if_neg_center = 0, | |
1172 | .ext_adc = 0, | |
1173 | .adc_signed = 1, | |
1174 | .adc_vpp = 3, /* 2.0 Vpp */ | |
1175 | .if_neg_edge = 1, | |
1176 | }; | |
1177 | ||
1178 | static struct tda18271_config prohdtv_pro2_tda18271_config = { | |
1179 | .gate = TDA18271_GATE_ANALOG, | |
1180 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
1181 | }; | |
1182 | ||
25fa2071 KS |
1183 | static struct tda18271_std_map kworld_tda18271_std_map = { |
1184 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 3, | |
1185 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
1186 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
1187 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
1188 | }; | |
1189 | ||
1190 | static struct tda18271_config kworld_pc150u_tda18271_config = { | |
1191 | .std_map = &kworld_tda18271_std_map, | |
1192 | .gate = TDA18271_GATE_ANALOG, | |
1193 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
1194 | .config = 3, /* Use tuner callback for AGC */ | |
1195 | .rf_cal_on_startup = 1 | |
1196 | }; | |
1197 | ||
1198 | static struct s5h1411_config kworld_s5h1411_config = { | |
1199 | .output_mode = S5H1411_PARALLEL_OUTPUT, | |
1200 | .gpio = S5H1411_GPIO_OFF, | |
1201 | .qam_if = S5H1411_IF_4000, | |
1202 | .vsb_if = S5H1411_IF_3250, | |
1203 | .inversion = S5H1411_INVERSION_ON, | |
1204 | .status_mode = S5H1411_DEMODLOCKING, | |
1205 | .mpeg_timing = | |
1206 | S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
1207 | }; | |
1208 | ||
1209 | ||
58ef4f92 HH |
1210 | /* ================================================================== |
1211 | * Core code | |
1212 | */ | |
1da177e4 LT |
1213 | |
1214 | static int dvb_init(struct saa7134_dev *dev) | |
1215 | { | |
1c4f76ab | 1216 | int ret; |
bc36a686 | 1217 | int attach_xc3028 = 0; |
2ada815f HV |
1218 | struct vb2_dvb_frontend *fe0; |
1219 | struct vb2_queue *q; | |
363c35fc | 1220 | |
f972e0bd DB |
1221 | /* FIXME: add support for multi-frontend */ |
1222 | mutex_init(&dev->frontends.lock); | |
7bdf84fc | 1223 | INIT_LIST_HEAD(&dev->frontends.felist); |
f972e0bd DB |
1224 | |
1225 | printk(KERN_INFO "%s() allocating 1 frontend\n", __func__); | |
2ada815f | 1226 | fe0 = vb2_dvb_alloc_frontend(&dev->frontends, 1); |
f3f741e7 | 1227 | if (!fe0) { |
f972e0bd DB |
1228 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1229 | return -ENOMEM; | |
1230 | } | |
1231 | ||
2ada815f | 1232 | /* init struct vb2_dvb */ |
1da177e4 LT |
1233 | dev->ts.nr_bufs = 32; |
1234 | dev->ts.nr_packets = 32*4; | |
363c35fc | 1235 | fe0->dvb.name = dev->name; |
2ada815f HV |
1236 | q = &fe0->dvb.dvbq; |
1237 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1238 | q->io_modes = VB2_MMAP | VB2_READ; | |
1239 | q->drv_priv = &dev->ts_q; | |
1240 | q->ops = &saa7134_ts_qops; | |
1241 | q->mem_ops = &vb2_dma_sg_memops; | |
1242 | q->buf_struct_size = sizeof(struct saa7134_buf); | |
1243 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
1244 | q->lock = &dev->lock; | |
1245 | ret = vb2_queue_init(q); | |
1246 | if (ret) { | |
1247 | vb2_dvb_dealloc_frontends(&dev->frontends); | |
1248 | return ret; | |
1249 | } | |
1da177e4 LT |
1250 | |
1251 | switch (dev->board) { | |
1252 | case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL: | |
cf3c34c8 | 1253 | dprintk("pinnacle 300i dvb setup\n"); |
363c35fc | 1254 | fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i, |
f7b54b10 | 1255 | &dev->i2c_adap); |
363c35fc ST |
1256 | if (fe0->dvb.frontend) { |
1257 | fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params; | |
6b3ccab7 | 1258 | } |
1da177e4 | 1259 | break; |
a78d0bfa | 1260 | case SAA7134_BOARD_AVERMEDIA_777: |
515c208d | 1261 | case SAA7134_BOARD_AVERMEDIA_A16AR: |
cf3c34c8 | 1262 | dprintk("avertv 777 dvb setup\n"); |
363c35fc | 1263 | fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777, |
f7b54b10 | 1264 | &dev->i2c_adap); |
363c35fc ST |
1265 | if (fe0->dvb.frontend) { |
1266 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
fb147e97 MK |
1267 | &dev->i2c_adap, 0x61, |
1268 | TUNER_PHILIPS_TD1316); | |
6b3ccab7 | 1269 | } |
a78d0bfa | 1270 | break; |
95a2fdb6 | 1271 | case SAA7134_BOARD_AVERMEDIA_A16D: |
6e501a3f | 1272 | dprintk("AverMedia A16D dvb setup\n"); |
363c35fc | 1273 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1274 | &avermedia_xc3028_mt352_dev, |
1275 | &dev->i2c_adap); | |
95a2fdb6 MCC |
1276 | attach_xc3028 = 1; |
1277 | break; | |
1da177e4 | 1278 | case SAA7134_BOARD_MD7134: |
363c35fc | 1279 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1280 | &medion_cardbus, |
1281 | &dev->i2c_adap); | |
363c35fc ST |
1282 | if (fe0->dvb.frontend) { |
1283 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
cb89cd33 MK |
1284 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1285 | TUNER_PHILIPS_FMD1216ME_MK3); | |
6b3ccab7 | 1286 | } |
1da177e4 | 1287 | break; |
86ddd96f | 1288 | case SAA7134_BOARD_PHILIPS_TOUGH: |
363c35fc | 1289 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1290 | &philips_tu1216_60_config, |
1291 | &dev->i2c_adap); | |
363c35fc ST |
1292 | if (fe0->dvb.frontend) { |
1293 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1294 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1295 | } |
86ddd96f MCC |
1296 | break; |
1297 | case SAA7134_BOARD_FLYDVBTDUO: | |
10b7a903 | 1298 | case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: |
d557dab5 MCC |
1299 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1300 | &tda827x_cfg_0) < 0) | |
91268a5e | 1301 | goto detach_frontend; |
86ddd96f | 1302 | break; |
2cf36ac4 | 1303 | case SAA7134_BOARD_PHILIPS_EUROPA: |
2cf36ac4 | 1304 | case SAA7134_BOARD_VIDEOMATE_DVBT_300: |
e3c6e1aa | 1305 | case SAA7134_BOARD_ASUS_EUROPA_HYBRID: |
363c35fc | 1306 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1307 | &philips_europa_config, |
1308 | &dev->i2c_adap); | |
363c35fc ST |
1309 | if (fe0->dvb.frontend) { |
1310 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1311 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1312 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1313 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1314 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
6b3ccab7 | 1315 | } |
2cf36ac4 | 1316 | break; |
128fe95d VC |
1317 | case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000: |
1318 | fe0->dvb.frontend = dvb_attach(tda10046_attach, | |
1319 | &technotrend_budget_t3000_config, | |
1320 | &dev->i2c_adap); | |
1321 | if (fe0->dvb.frontend) { | |
1322 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1323 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
1324 | fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init; | |
1325 | fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep; | |
1326 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
1327 | } | |
1328 | break; | |
2cf36ac4 | 1329 | case SAA7134_BOARD_VIDEOMATE_DVBT_200: |
363c35fc | 1330 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1331 | &philips_tu1216_61_config, |
1332 | &dev->i2c_adap); | |
363c35fc ST |
1333 | if (fe0->dvb.frontend) { |
1334 | fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init; | |
1335 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set; | |
6b3ccab7 | 1336 | } |
2cf36ac4 | 1337 | break; |
b39423a9 | 1338 | case SAA7134_BOARD_KWORLD_DVBT_210: |
d557dab5 MCC |
1339 | if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config, |
1340 | &tda827x_cfg_2) < 0) | |
91268a5e | 1341 | goto detach_frontend; |
b39423a9 | 1342 | break; |
0e316ecf | 1343 | case SAA7134_BOARD_HAUPPAUGE_HVR1120: |
1bc7f51c MK |
1344 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
1345 | &hcw_tda10048_config, | |
1346 | &dev->i2c_adap); | |
1347 | if (fe0->dvb.frontend != NULL) { | |
1348 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1349 | &dev->i2c_adap, 0x4b, | |
1350 | &tda829x_no_probe); | |
1351 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1352 | 0x60, &dev->i2c_adap, | |
1353 | &hcw_tda18271_config); | |
1354 | } | |
1355 | break; | |
90e9df7f | 1356 | case SAA7134_BOARD_PHILIPS_TIGER: |
d557dab5 MCC |
1357 | if (configure_tda827x_fe(dev, &philips_tiger_config, |
1358 | &tda827x_cfg_0) < 0) | |
91268a5e | 1359 | goto detach_frontend; |
587d2fd7 HH |
1360 | break; |
1361 | case SAA7134_BOARD_PINNACLE_PCTV_310i: | |
d557dab5 MCC |
1362 | if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config, |
1363 | &tda827x_cfg_1) < 0) | |
91268a5e | 1364 | goto detach_frontend; |
90e9df7f | 1365 | break; |
c6e53daf | 1366 | case SAA7134_BOARD_HAUPPAUGE_HVR1110: |
d557dab5 MCC |
1367 | if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config, |
1368 | &tda827x_cfg_1) < 0) | |
91268a5e | 1369 | goto detach_frontend; |
c6e53daf | 1370 | break; |
b5f05064 | 1371 | case SAA7134_BOARD_HAUPPAUGE_HVR1150: |
3abdedd8 MK |
1372 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, |
1373 | &hcw_lgdt3305_config, | |
1374 | &dev->i2c_adap); | |
1375 | if (fe0->dvb.frontend) { | |
1376 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1377 | &dev->i2c_adap, 0x4b, | |
1378 | &tda829x_no_probe); | |
1379 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1380 | 0x60, &dev->i2c_adap, | |
1381 | &hcw_tda18271_config); | |
1382 | } | |
1383 | break; | |
d4b0aba4 | 1384 | case SAA7134_BOARD_ASUSTeK_P7131_DUAL: |
d557dab5 MCC |
1385 | if (configure_tda827x_fe(dev, &asus_p7131_dual_config, |
1386 | &tda827x_cfg_0) < 0) | |
91268a5e | 1387 | goto detach_frontend; |
d4b0aba4 | 1388 | break; |
3d8466ec | 1389 | case SAA7134_BOARD_FLYDVBT_LR301: |
d557dab5 MCC |
1390 | if (configure_tda827x_fe(dev, &tda827x_lifeview_config, |
1391 | &tda827x_cfg_0) < 0) | |
91268a5e | 1392 | goto detach_frontend; |
3d8466ec | 1393 | break; |
92abe9ee | 1394 | case SAA7134_BOARD_FLYDVB_TRIO: |
d557dab5 MCC |
1395 | if (!use_frontend) { /* terrestrial */ |
1396 | if (configure_tda827x_fe(dev, &lifeview_trio_config, | |
1397 | &tda827x_cfg_0) < 0) | |
91268a5e | 1398 | goto detach_frontend; |
7bff4b4d | 1399 | } else { /* satellite */ |
363c35fc ST |
1400 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap); |
1401 | if (fe0->dvb.frontend) { | |
1402 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63, | |
1f683cd8 | 1403 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1404 | wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__); |
91268a5e | 1405 | goto detach_frontend; |
1f683cd8 | 1406 | } |
48a8a03b MCC |
1407 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
1408 | &dev->i2c_adap, | |
1409 | 0x08, 0, 0, false) == NULL) { | |
5823b3a6 | 1410 | wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__); |
91268a5e | 1411 | goto detach_frontend; |
1f683cd8 NS |
1412 | } |
1413 | } | |
6b3ccab7 | 1414 | } |
420f32fe | 1415 | break; |
df42eaf2 | 1416 | case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331: |
58ef4f92 | 1417 | case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS: |
363c35fc | 1418 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
f7b54b10 MK |
1419 | &ads_tech_duo_config, |
1420 | &dev->i2c_adap); | |
363c35fc ST |
1421 | if (fe0->dvb.frontend) { |
1422 | if (dvb_attach(tda827x_attach,fe0->dvb.frontend, | |
7bff4b4d HH |
1423 | ads_tech_duo_config.tuner_address, &dev->i2c_adap, |
1424 | &ads_duo_cfg) == NULL) { | |
cf3c34c8 | 1425 | wprintk("no tda827x tuner found at addr: %02x\n", |
ede2200d | 1426 | ads_tech_duo_config.tuner_address); |
91268a5e | 1427 | goto detach_frontend; |
ede2200d | 1428 | } |
bc36ec74 MCC |
1429 | } else |
1430 | wprintk("failed to attach tda10046\n"); | |
df42eaf2 | 1431 | break; |
3dfb729f | 1432 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
d557dab5 MCC |
1433 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
1434 | &tda827x_cfg_0) < 0) | |
91268a5e | 1435 | goto detach_frontend; |
d95b8942 | 1436 | break; |
5eda227f | 1437 | case SAA7134_BOARD_MEDION_MD8800_QUADRO: |
4b1431ca | 1438 | if (!use_frontend) { /* terrestrial */ |
d557dab5 MCC |
1439 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1440 | &tda827x_cfg_0) < 0) | |
91268a5e | 1441 | goto detach_frontend; |
4b1431ca | 1442 | } else { /* satellite */ |
363c35fc | 1443 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
4b1431ca | 1444 | &flydvbs, &dev->i2c_adap); |
363c35fc ST |
1445 | if (fe0->dvb.frontend) { |
1446 | struct dvb_frontend *fe = fe0->dvb.frontend; | |
5823b3a6 HH |
1447 | u8 dev_id = dev->eedata[2]; |
1448 | u8 data = 0xc4; | |
1449 | struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1}; | |
1450 | ||
363c35fc | 1451 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, |
d557dab5 | 1452 | 0x60, &dev->i2c_adap, 0) == NULL) { |
4b1431ca | 1453 | wprintk("%s: Medion Quadro, no tda826x " |
5823b3a6 | 1454 | "found !\n", __func__); |
91268a5e | 1455 | goto detach_frontend; |
d557dab5 | 1456 | } |
5823b3a6 HH |
1457 | if (dev_id != 0x08) { |
1458 | /* we need to open the i2c gate (we know it exists) */ | |
1459 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1460 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1461 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
5823b3a6 HH |
1462 | wprintk("%s: Medion Quadro, no ISL6405 " |
1463 | "found !\n", __func__); | |
91268a5e | 1464 | goto detach_frontend; |
d557dab5 | 1465 | } |
e9c1ac9d HH |
1466 | if (dev_id == 0x07) { |
1467 | /* fire up the 2nd section of the LNB supply since | |
1468 | we can't do this from the other section */ | |
1469 | msg.buf = &data; | |
1470 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1471 | } | |
5823b3a6 HH |
1472 | fe->ops.i2c_gate_ctrl(fe, 0); |
1473 | dev->original_set_voltage = fe->ops.set_voltage; | |
1474 | fe->ops.set_voltage = md8800_set_voltage; | |
1475 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1476 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1477 | } else { | |
1478 | fe->ops.set_voltage = md8800_set_voltage2; | |
1479 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2; | |
1480 | } | |
4b1431ca HH |
1481 | } |
1482 | } | |
5eda227f | 1483 | break; |
3b64e8e2 | 1484 | case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180: |
363c35fc | 1485 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180, |
f7b54b10 | 1486 | &dev->i2c_adap); |
363c35fc ST |
1487 | if (fe0->dvb.frontend) |
1488 | dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61, | |
47a9991e | 1489 | NULL, DVB_PLL_TDHU2); |
3b64e8e2 | 1490 | break; |
f689d908 | 1491 | case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI: |
3e1410ad | 1492 | case SAA7134_BOARD_KWORLD_ATSC110: |
363c35fc | 1493 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110, |
f7b54b10 | 1494 | &dev->i2c_adap); |
363c35fc ST |
1495 | if (fe0->dvb.frontend) |
1496 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
62ff817a MK |
1497 | &dev->i2c_adap, 0x61, |
1498 | TUNER_PHILIPS_TUV1236D); | |
3e1410ad | 1499 | break; |
25fa2071 KS |
1500 | case SAA7134_BOARD_KWORLD_PC150U: |
1501 | saa7134_set_gpio(dev, 18, 1); /* Switch to digital mode */ | |
1502 | saa7134_tuner_callback(dev, 0, | |
1503 | TDA18271_CALLBACK_CMD_AGC_ENABLE, 1); | |
1504 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1505 | &kworld_s5h1411_config, | |
1506 | &dev->i2c_adap); | |
1507 | if (fe0->dvb.frontend != NULL) { | |
1508 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1509 | &dev->i2c_adap, 0x4b, | |
1510 | &tda829x_no_probe); | |
1511 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1512 | 0x60, &dev->i2c_adap, | |
1513 | &kworld_pc150u_tda18271_config); | |
1514 | } | |
1515 | break; | |
e2ac28fa | 1516 | case SAA7134_BOARD_FLYDVBS_LR300: |
363c35fc | 1517 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
f7b54b10 | 1518 | &dev->i2c_adap); |
363c35fc ST |
1519 | if (fe0->dvb.frontend) { |
1520 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
f7b54b10 | 1521 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1522 | wprintk("%s: No tda826x found!\n", __func__); |
91268a5e | 1523 | goto detach_frontend; |
e2ac28fa | 1524 | } |
363c35fc | 1525 | if (dvb_attach(isl6421_attach, fe0->dvb.frontend, |
48a8a03b MCC |
1526 | &dev->i2c_adap, |
1527 | 0x08, 0, 0, false) == NULL) { | |
5823b3a6 | 1528 | wprintk("%s: No ISL6421 found!\n", __func__); |
91268a5e | 1529 | goto detach_frontend; |
e2ac28fa IL |
1530 | } |
1531 | } | |
1532 | break; | |
cf146ca4 | 1533 | case SAA7134_BOARD_ASUS_EUROPA2_HYBRID: |
363c35fc | 1534 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
0e8f4cc5 MS |
1535 | &medion_cardbus, |
1536 | &dev->i2c_adap); | |
363c35fc ST |
1537 | if (fe0->dvb.frontend) { |
1538 | dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep; | |
1539 | fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep; | |
b7754d74 | 1540 | |
363c35fc | 1541 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, |
cb89cd33 MK |
1542 | &dev->i2c_adap, medion_cardbus.tuner_address, |
1543 | TUNER_PHILIPS_FMD1216ME_MK3); | |
cf146ca4 HH |
1544 | } |
1545 | break; | |
cbb94521 | 1546 | case SAA7134_BOARD_VIDEOMATE_DVBT_200A: |
363c35fc | 1547 | fe0->dvb.frontend = dvb_attach(tda10046_attach, |
cbb94521 HH |
1548 | &philips_europa_config, |
1549 | &dev->i2c_adap); | |
363c35fc ST |
1550 | if (fe0->dvb.frontend) { |
1551 | fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init; | |
1552 | fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params; | |
cbb94521 HH |
1553 | } |
1554 | break; | |
550a9a5e | 1555 | case SAA7134_BOARD_CINERGY_HT_PCMCIA: |
d557dab5 MCC |
1556 | if (configure_tda827x_fe(dev, &cinergy_ht_config, |
1557 | &tda827x_cfg_0) < 0) | |
91268a5e | 1558 | goto detach_frontend; |
9de271e6 MK |
1559 | break; |
1560 | case SAA7134_BOARD_CINERGY_HT_PCI: | |
d557dab5 MCC |
1561 | if (configure_tda827x_fe(dev, &cinergy_ht_pci_config, |
1562 | &tda827x_cfg_0) < 0) | |
91268a5e | 1563 | goto detach_frontend; |
58ef4f92 HH |
1564 | break; |
1565 | case SAA7134_BOARD_PHILIPS_TIGER_S: | |
d557dab5 MCC |
1566 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1567 | &tda827x_cfg_2) < 0) | |
91268a5e | 1568 | goto detach_frontend; |
550a9a5e | 1569 | break; |
e06cea4c | 1570 | case SAA7134_BOARD_ASUS_P7131_4871: |
d557dab5 MCC |
1571 | if (configure_tda827x_fe(dev, &asus_p7131_4871_config, |
1572 | &tda827x_cfg_2) < 0) | |
91268a5e | 1573 | goto detach_frontend; |
e06cea4c | 1574 | break; |
f3eec0c0 | 1575 | case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA: |
d557dab5 MCC |
1576 | if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config, |
1577 | &tda827x_cfg_2) < 0) | |
91268a5e | 1578 | goto detach_frontend; |
e06cea4c | 1579 | break; |
d90d9f5a | 1580 | case SAA7134_BOARD_AVERMEDIA_SUPER_007: |
d557dab5 MCC |
1581 | if (configure_tda827x_fe(dev, &avermedia_super_007_config, |
1582 | &tda827x_cfg_0) < 0) | |
91268a5e | 1583 | goto detach_frontend; |
d90d9f5a | 1584 | break; |
4ba24373 | 1585 | case SAA7134_BOARD_TWINHAN_DTV_DVB_3056: |
d557dab5 MCC |
1586 | if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config, |
1587 | &tda827x_cfg_2_sw42) < 0) | |
91268a5e | 1588 | goto detach_frontend; |
4ba24373 | 1589 | break; |
6ab465a8 | 1590 | case SAA7134_BOARD_PHILIPS_SNAKE: |
363c35fc | 1591 | fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, |
6ab465a8 | 1592 | &dev->i2c_adap); |
363c35fc ST |
1593 | if (fe0->dvb.frontend) { |
1594 | if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60, | |
d557dab5 | 1595 | &dev->i2c_adap, 0) == NULL) { |
5823b3a6 | 1596 | wprintk("%s: No tda826x found!\n", __func__); |
91268a5e | 1597 | goto detach_frontend; |
d557dab5 | 1598 | } |
363c35fc | 1599 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
d557dab5 | 1600 | &dev->i2c_adap, 0, 0) == NULL) { |
5823b3a6 | 1601 | wprintk("%s: No lnbp21 found!\n", __func__); |
91268a5e | 1602 | goto detach_frontend; |
d557dab5 | 1603 | } |
6ab465a8 HH |
1604 | } |
1605 | break; | |
7b5b3f17 | 1606 | case SAA7134_BOARD_CREATIX_CTX953: |
d557dab5 MCC |
1607 | if (configure_tda827x_fe(dev, &md8800_dvbt_config, |
1608 | &tda827x_cfg_0) < 0) | |
91268a5e | 1609 | goto detach_frontend; |
7b5b3f17 | 1610 | break; |
6a6179b6 | 1611 | case SAA7134_BOARD_MSI_TVANYWHERE_AD11: |
d557dab5 MCC |
1612 | if (configure_tda827x_fe(dev, &philips_tiger_s_config, |
1613 | &tda827x_cfg_2) < 0) | |
91268a5e | 1614 | goto detach_frontend; |
6a6179b6 | 1615 | break; |
bc36a686 | 1616 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
6e501a3f TF |
1617 | dprintk("AverMedia E506R dvb setup\n"); |
1618 | saa7134_set_gpio(dev, 25, 0); | |
1619 | msleep(10); | |
1620 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1621 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
6e501a3f TF |
1622 | &avermedia_xc3028_mt352_dev, |
1623 | &dev->i2c_adap); | |
bc36a686 | 1624 | attach_xc3028 = 1; |
e2fc00c2 | 1625 | break; |
637afdb5 | 1626 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
363c35fc | 1627 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
9a1b04e4 | 1628 | &sd1878_4m, &dev->i2c_adap); |
363c35fc | 1629 | if (fe0->dvb.frontend) { |
637afdb5 | 1630 | struct dvb_frontend *fe; |
363c35fc | 1631 | if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, |
d557dab5 | 1632 | &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) { |
637afdb5 | 1633 | wprintk("%s: MD7134 DVB-S, no SD1878 " |
5823b3a6 | 1634 | "found !\n", __func__); |
91268a5e | 1635 | goto detach_frontend; |
d557dab5 | 1636 | } |
637afdb5 | 1637 | /* we need to open the i2c gate (we know it exists) */ |
363c35fc | 1638 | fe = fe0->dvb.frontend; |
637afdb5 HH |
1639 | fe->ops.i2c_gate_ctrl(fe, 1); |
1640 | if (dvb_attach(isl6405_attach, fe, | |
d557dab5 | 1641 | &dev->i2c_adap, 0x08, 0, 0) == NULL) { |
637afdb5 | 1642 | wprintk("%s: MD7134 DVB-S, no ISL6405 " |
5823b3a6 | 1643 | "found !\n", __func__); |
91268a5e | 1644 | goto detach_frontend; |
d557dab5 | 1645 | } |
637afdb5 HH |
1646 | fe->ops.i2c_gate_ctrl(fe, 0); |
1647 | dev->original_set_voltage = fe->ops.set_voltage; | |
1648 | fe->ops.set_voltage = md8800_set_voltage; | |
1649 | dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage; | |
1650 | fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage; | |
1651 | } | |
1652 | break; | |
e2fc00c2 MP |
1653 | case SAA7134_BOARD_AVERMEDIA_M103: |
1654 | saa7134_set_gpio(dev, 25, 0); | |
1655 | msleep(10); | |
1656 | saa7134_set_gpio(dev, 25, 1); | |
363c35fc | 1657 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
e2fc00c2 MP |
1658 | &avermedia_xc3028_mt352_dev, |
1659 | &dev->i2c_adap); | |
1660 | attach_xc3028 = 1; | |
1661 | break; | |
301e9d64 | 1662 | case SAA7134_BOARD_ASUSTeK_TIGER_3IN1: |
1663 | if (!use_frontend) { /* terrestrial */ | |
1664 | if (configure_tda827x_fe(dev, &asus_tiger_3in1_config, | |
1665 | &tda827x_cfg_2) < 0) | |
91268a5e | 1666 | goto detach_frontend; |
301e9d64 | 1667 | } else { /* satellite */ |
363c35fc | 1668 | fe0->dvb.frontend = dvb_attach(tda10086_attach, |
301e9d64 | 1669 | &flydvbs, &dev->i2c_adap); |
363c35fc | 1670 | if (fe0->dvb.frontend) { |
301e9d64 | 1671 | if (dvb_attach(tda826x_attach, |
363c35fc | 1672 | fe0->dvb.frontend, 0x60, |
301e9d64 | 1673 | &dev->i2c_adap, 0) == NULL) { |
1674 | wprintk("%s: Asus Tiger 3in1, no " | |
1675 | "tda826x found!\n", __func__); | |
91268a5e | 1676 | goto detach_frontend; |
301e9d64 | 1677 | } |
363c35fc | 1678 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, |
301e9d64 | 1679 | &dev->i2c_adap, 0, 0) == NULL) { |
1680 | wprintk("%s: Asus Tiger 3in1, no lnbp21" | |
1681 | " found!\n", __func__); | |
91268a5e | 1682 | goto detach_frontend; |
75c7dbca | 1683 | } |
1684 | } | |
1685 | } | |
1686 | break; | |
1687 | case SAA7134_BOARD_ASUSTeK_PS3_100: | |
1688 | if (!use_frontend) { /* terrestrial */ | |
1689 | if (configure_tda827x_fe(dev, &asus_ps3_100_config, | |
1690 | &tda827x_cfg_2) < 0) | |
91268a5e | 1691 | goto detach_frontend; |
75c7dbca | 1692 | } else { /* satellite */ |
1693 | fe0->dvb.frontend = dvb_attach(tda10086_attach, | |
1694 | &flydvbs, &dev->i2c_adap); | |
1695 | if (fe0->dvb.frontend) { | |
1696 | if (dvb_attach(tda826x_attach, | |
1697 | fe0->dvb.frontend, 0x60, | |
1698 | &dev->i2c_adap, 0) == NULL) { | |
1699 | wprintk("%s: Asus My Cinema PS3-100, no " | |
1700 | "tda826x found!\n", __func__); | |
91268a5e | 1701 | goto detach_frontend; |
75c7dbca | 1702 | } |
1703 | if (dvb_attach(lnbp21_attach, fe0->dvb.frontend, | |
1704 | &dev->i2c_adap, 0, 0) == NULL) { | |
1705 | wprintk("%s: Asus My Cinema PS3-100, no lnbp21" | |
1706 | " found!\n", __func__); | |
91268a5e | 1707 | goto detach_frontend; |
301e9d64 | 1708 | } |
1709 | } | |
1710 | } | |
1711 | break; | |
028165a3 HP |
1712 | case SAA7134_BOARD_ASUSTeK_TIGER: |
1713 | if (configure_tda827x_fe(dev, &philips_tiger_config, | |
1714 | &tda827x_cfg_0) < 0) | |
91268a5e | 1715 | goto detach_frontend; |
028165a3 | 1716 | break; |
47aeba5a | 1717 | case SAA7134_BOARD_BEHOLD_H6: |
b0c4be8c | 1718 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
47aeba5a DB |
1719 | &behold_h6_config, |
1720 | &dev->i2c_adap); | |
b0c4be8c MCC |
1721 | if (fe0->dvb.frontend) { |
1722 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
47aeba5a | 1723 | &dev->i2c_adap, 0x61, |
4786dd65 | 1724 | TUNER_PHILIPS_FMD1216MEX_MK3); |
47aeba5a | 1725 | } |
04574185 | 1726 | break; |
2930992c BILDB |
1727 | case SAA7134_BOARD_BEHOLD_X7: |
1728 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1729 | &behold_x7_config, | |
1730 | &dev->i2c_adap); | |
1731 | if (fe0->dvb.frontend) { | |
1732 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
1733 | &dev->i2c_adap, &behold_x7_tunerconfig); | |
1734 | } | |
1735 | break; | |
0faa2ed5 DB |
1736 | case SAA7134_BOARD_BEHOLD_H7: |
1737 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1738 | &behold_x7_config, | |
1739 | &dev->i2c_adap); | |
1740 | if (fe0->dvb.frontend) { | |
1741 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
1742 | &dev->i2c_adap, &behold_x7_tunerconfig); | |
1743 | } | |
1744 | break; | |
04574185 MS |
1745 | case SAA7134_BOARD_AVERMEDIA_A700_PRO: |
1746 | case SAA7134_BOARD_AVERMEDIA_A700_HYBRID: | |
1747 | /* Zarlink ZL10313 */ | |
1748 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1749 | &avertv_a700_mt312, &dev->i2c_adap); | |
1750 | if (fe0->dvb.frontend) { | |
1751 | if (dvb_attach(zl10036_attach, fe0->dvb.frontend, | |
1752 | &avertv_a700_tuner, &dev->i2c_adap) == NULL) { | |
1753 | wprintk("%s: No zl10036 found!\n", | |
1754 | __func__); | |
1755 | } | |
1756 | } | |
ecfcfec8 IL |
1757 | break; |
1758 | case SAA7134_BOARD_VIDEOMATE_S350: | |
1759 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1760 | &zl10313_compro_s350_config, &dev->i2c_adap); | |
1761 | if (fe0->dvb.frontend) | |
1762 | if (dvb_attach(zl10039_attach, fe0->dvb.frontend, | |
1763 | 0x60, &dev->i2c_adap) == NULL) | |
1764 | wprintk("%s: No zl10039 found!\n", | |
1765 | __func__); | |
1766 | ||
dbe8740d CC |
1767 | break; |
1768 | case SAA7134_BOARD_VIDEOMATE_T750: | |
1769 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1770 | &videomate_t750_zl10353_config, | |
1771 | &dev->i2c_adap); | |
1772 | if (fe0->dvb.frontend != NULL) { | |
1773 | if (dvb_attach(qt1010_attach, | |
1774 | fe0->dvb.frontend, | |
1775 | &dev->i2c_adap, | |
1776 | &videomate_t750_qt1010_config) == NULL) | |
1777 | wprintk("error attaching QT1010\n"); | |
1778 | } | |
6c119ff4 HV |
1779 | break; |
1780 | case SAA7134_BOARD_ZOLID_HYBRID_PCI: | |
1781 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1782 | &zolid_tda10048_config, | |
1783 | &dev->i2c_adap); | |
1784 | if (fe0->dvb.frontend != NULL) { | |
1785 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1786 | &dev->i2c_adap, 0x4b, | |
1787 | &tda829x_no_probe); | |
1788 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1789 | 0x60, &dev->i2c_adap, | |
1790 | &zolid_tda18271_config); | |
1791 | } | |
47aeba5a | 1792 | break; |
184e769f MK |
1793 | case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S: |
1794 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1795 | &dtv1000s_tda10048_config, | |
1796 | &dev->i2c_adap); | |
1797 | if (fe0->dvb.frontend != NULL) { | |
1798 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1799 | &dev->i2c_adap, 0x4b, | |
1800 | &tda829x_no_probe); | |
1801 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1802 | 0x60, &dev->i2c_adap, | |
1803 | &dtv1000s_tda18271_config); | |
1804 | } | |
1805 | break; | |
f0551efc | 1806 | case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG: |
ecb71d26 MCC |
1807 | /* Switch to digital mode */ |
1808 | saa7134_tuner_callback(dev, 0, | |
1809 | TDA18271_CALLBACK_CMD_AGC_ENABLE, 1); | |
f0551efc MCC |
1810 | fe0->dvb.frontend = dvb_attach(mb86a20s_attach, |
1811 | &kworld_mb86a20s_config, | |
1812 | &dev->i2c_adap); | |
f0551efc | 1813 | if (fe0->dvb.frontend != NULL) { |
6a58bc0f MCC |
1814 | dvb_attach(tda829x_attach, fe0->dvb.frontend, |
1815 | &dev->i2c_adap, 0x4b, | |
1816 | &tda829x_no_probe); | |
b08deebe | 1817 | fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl; |
f0551efc MCC |
1818 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
1819 | 0x60, &dev->i2c_adap, | |
1820 | &kworld_tda18271_config); | |
f0551efc | 1821 | } |
6a58bc0f MCC |
1822 | |
1823 | /* mb86a20s need to use the I2C gateway */ | |
f0551efc | 1824 | break; |
ce02704d TL |
1825 | case SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2: |
1826 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
1827 | &prohdtv_pro2_lgs8g75_config, | |
1828 | &dev->i2c_adap); | |
1829 | if (fe0->dvb.frontend != NULL) { | |
1830 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
1831 | &dev->i2c_adap, 0x4b, | |
1832 | &tda829x_no_probe); | |
1833 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1834 | 0x60, &dev->i2c_adap, | |
1835 | &prohdtv_pro2_tda18271_config); | |
1836 | } | |
34fe2784 OZ |
1837 | break; |
1838 | case SAA7134_BOARD_AVERMEDIA_A706: | |
1839 | /* Enable all DVB-S devices now */ | |
1840 | /* CE5039 DVB-S tuner SLEEP pin low */ | |
1841 | saa7134_set_gpio(dev, 23, 0); | |
1842 | /* CE6313 DVB-S demod SLEEP pin low */ | |
1843 | saa7134_set_gpio(dev, 9, 0); | |
1844 | /* CE6313 DVB-S demod RESET# pin high */ | |
1845 | saa7134_set_gpio(dev, 25, 1); | |
1846 | msleep(1); | |
1847 | fe0->dvb.frontend = dvb_attach(mt312_attach, | |
1848 | &zl10313_avermedia_a706_config, &dev->i2c_adap); | |
1849 | if (fe0->dvb.frontend) { | |
1850 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; | |
1851 | if (dvb_attach(zl10039_attach, fe0->dvb.frontend, | |
1852 | 0x60, &dev->i2c_adap) == NULL) | |
1853 | wprintk("%s: No zl10039 found!\n", | |
1854 | __func__); | |
1855 | } | |
ce02704d | 1856 | break; |
1da177e4 | 1857 | default: |
cf3c34c8 | 1858 | wprintk("Huh? unknown DVB card?\n"); |
1da177e4 LT |
1859 | break; |
1860 | } | |
1861 | ||
bc36a686 MCC |
1862 | if (attach_xc3028) { |
1863 | struct dvb_frontend *fe; | |
1864 | struct xc2028_config cfg = { | |
1865 | .i2c_adap = &dev->i2c_adap, | |
1866 | .i2c_addr = 0x61, | |
bc36a686 | 1867 | }; |
95a2fdb6 | 1868 | |
363c35fc | 1869 | if (!fe0->dvb.frontend) |
91268a5e | 1870 | goto detach_frontend; |
95a2fdb6 | 1871 | |
363c35fc | 1872 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
bc36a686 MCC |
1873 | if (!fe) { |
1874 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
1875 | dev->name); | |
91268a5e | 1876 | goto detach_frontend; |
bc36a686 MCC |
1877 | } |
1878 | } | |
1879 | ||
363c35fc | 1880 | if (NULL == fe0->dvb.frontend) { |
cf3c34c8 | 1881 | printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name); |
91268a5e | 1882 | goto detach_frontend; |
1da177e4 | 1883 | } |
d7cba043 | 1884 | /* define general-purpose callback pointer */ |
363c35fc | 1885 | fe0->dvb.frontend->callback = saa7134_tuner_callback; |
1da177e4 LT |
1886 | |
1887 | /* register everything else */ | |
2ada815f | 1888 | ret = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
9adf6132 | 1889 | &dev->pci->dev, adapter_nr, 0); |
1c4f76ab HH |
1890 | |
1891 | /* this sequence is necessary to make the tda1004x load its firmware | |
1892 | * and to enter analog mode of hybrid boards | |
1893 | */ | |
1894 | if (!ret) { | |
363c35fc ST |
1895 | if (fe0->dvb.frontend->ops.init) |
1896 | fe0->dvb.frontend->ops.init(fe0->dvb.frontend); | |
1897 | if (fe0->dvb.frontend->ops.sleep) | |
1898 | fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend); | |
1899 | if (fe0->dvb.frontend->ops.tuner_ops.sleep) | |
1900 | fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend); | |
1c4f76ab HH |
1901 | } |
1902 | return ret; | |
d557dab5 | 1903 | |
91268a5e | 1904 | detach_frontend: |
2ada815f HV |
1905 | vb2_dvb_dealloc_frontends(&dev->frontends); |
1906 | vb2_queue_release(&fe0->dvb.dvbq); | |
f3f741e7 | 1907 | return -EINVAL; |
1da177e4 LT |
1908 | } |
1909 | ||
1910 | static int dvb_fini(struct saa7134_dev *dev) | |
1911 | { | |
2ada815f | 1912 | struct vb2_dvb_frontend *fe0; |
363c35fc ST |
1913 | |
1914 | /* Get the first frontend */ | |
2ada815f | 1915 | fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); |
363c35fc ST |
1916 | if (!fe0) |
1917 | return -EINVAL; | |
1918 | ||
7f171123 MCC |
1919 | /* FIXME: I suspect that this code is bogus, since the entry for |
1920 | Pinnacle 300I DVB-T PAL already defines the proper init to allow | |
1921 | the detection of mt2032 (TDA9887_PORT2_INACTIVE) | |
1922 | */ | |
1923 | if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) { | |
1924 | struct v4l2_priv_tun_config tda9887_cfg; | |
1925 | static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE; | |
1926 | ||
1927 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1928 | tda9887_cfg.priv = &on; | |
1da177e4 | 1929 | |
1da177e4 | 1930 | /* otherwise we don't detect the tuner on next insmod */ |
fac6986c | 1931 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
5823b3a6 | 1932 | } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) { |
e9c1ac9d | 1933 | if ((dev->eedata[2] == 0x07) && use_frontend) { |
5823b3a6 HH |
1934 | /* turn off the 2nd lnb supply */ |
1935 | u8 data = 0x80; | |
1936 | struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1}; | |
1937 | struct dvb_frontend *fe; | |
363c35fc | 1938 | fe = fe0->dvb.frontend; |
5823b3a6 HH |
1939 | if (fe->ops.i2c_gate_ctrl) { |
1940 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1941 | i2c_transfer(&dev->i2c_adap, &msg, 1); | |
1942 | fe->ops.i2c_gate_ctrl(fe, 0); | |
1943 | } | |
1944 | } | |
7f171123 | 1945 | } |
2ada815f HV |
1946 | vb2_dvb_unregister_bus(&dev->frontends); |
1947 | vb2_queue_release(&fe0->dvb.dvbq); | |
1da177e4 LT |
1948 | return 0; |
1949 | } | |
1950 | ||
1951 | static struct saa7134_mpeg_ops dvb_ops = { | |
1952 | .type = SAA7134_MPEG_DVB, | |
1953 | .init = dvb_init, | |
1954 | .fini = dvb_fini, | |
1955 | }; | |
1956 | ||
1957 | static int __init dvb_register(void) | |
1958 | { | |
1959 | return saa7134_ts_register(&dvb_ops); | |
1960 | } | |
1961 | ||
1962 | static void __exit dvb_unregister(void) | |
1963 | { | |
1964 | saa7134_ts_unregister(&dvb_ops); | |
1965 | } | |
1966 | ||
1967 | module_init(dvb_register); | |
1968 | module_exit(dvb_unregister); |