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Merge tag 'module-implicit-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST		 16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/fs.h>
22#include <linux/kthread.h>
23#include <linux/file.h>
24#include <linux/suspend.h>
25
26#include "cx23885.h"
d19770e5
ST		 27#include <media/v4l2-common.h>
28
5a23b076 29#include "dvb_ca_en50221.h"
d19770e5 30#include "s5h1409.h"
52b50450 31#include "s5h1411.h"
d19770e5 32#include "mt2131.h"
3ba71d21 33#include "tda8290.h"
4041f1a5 34#include "tda18271.h"
9bc37caa 35#include "lgdt330x.h"
0cf8af57 36#include "xc4000.h"
d1987d55 37#include "xc5000.h"
ea5697fe 38#include "max2165.h"
b3ea0166 39#include "tda10048.h"
07b4a835 40#include "tuner-xc2028.h"
827855d3 41#include "tuner-simple.h"
66762373 42#include "dib7000p.h"
46b21bba 43#include "dib0070.h"
66762373 44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
5a23b076 46#include "stv0900.h"
f867c3f4 47#include "stv0900_reg.h"
5a23b076
IL		 48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
e6001482 51#include "cx24117.h"
5a23b076 52#include "cimax2.h"
493b7127 53#include "lgs8gxx.h"
5a23b076
IL		 54#include "netup-eeprom.h"
55#include "netup-init.h"
a5dbf457 56#include "lgdt3305.h"
ea5697fe 57#include "atbm8830.h"
73f0af44 58#include "ts2020.h"
09ea33e5
IL		 59#include "ds3000.h"
60#include "cx23885-f300.h"
78db8547
IL		 61#include "altera-ci.h"
62#include "stv0367.h"
722c90eb
SR		 63#include "drxk.h"
64#include "mt2063.h"
f667190b
MB		 65#include "stv090x.h"
66#include "stb6100.h"
67#include "stb6100_cfg.h"
7c62f5a1
MK		 68#include "tda10071.h"
69#include "a8293.h"
0d1b5265 70#include "mb86a20s.h"
36efec48 71#include "si2165.h"
29442266
OS		 72#include "si2168.h"
73#include "si2157.h"
24e77409 74#include "sp2.h"
29442266 75#include "m88ds3103.h"
1fc77d01 76#include "m88rs6000t.h"
d19770e5 77
4513fc69 78static unsigned int debug;
d19770e5 79
4513fc69
ST		 80#define dprintk(level, fmt, arg...)\
81 do { if (debug >= level)\
82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
83 } while (0)
d19770e5
ST		 84
85/* ------------------------------------------------------------------ */
86
3ba71d21
MK		 87static unsigned int alt_tuner;
88module_param(alt_tuner, int, 0644);
89MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90
78e92006
JG		 91DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92
3ba71d21
MK		 93/* ------------------------------------------------------------------ */
94
453afdd9
HV		 95static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
96 unsigned int *num_buffers, unsigned int *num_planes,
97 unsigned int sizes[], void *alloc_ctxs[])
d19770e5 98{
453afdd9 99 struct cx23885_tsport *port = q->drv_priv;
d19770e5
ST		 100
101 port->ts_packet_size = 188 * 4;
102 port->ts_packet_count = 32;
453afdd9
HV		 103 *num_planes = 1;
104 sizes[0] = port->ts_packet_size * port->ts_packet_count;
0c3a14c1 105 alloc_ctxs[0] = port->dev->alloc_ctx;
453afdd9 106 *num_buffers = 32;
d19770e5
ST		 107 return 0;
108}
109
453afdd9
HV		 110
111static int buffer_prepare(struct vb2_buffer *vb)
d19770e5 112{
453afdd9
HV		 113 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
114 struct cx23885_buffer *buf =
115 container_of(vb, struct cx23885_buffer, vb);
116
117 return cx23885_buf_prepare(buf, port);
d19770e5
ST		 118}
119
453afdd9 120static void buffer_finish(struct vb2_buffer *vb)
d19770e5 121{
453afdd9
HV		 122 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
123 struct cx23885_dev *dev = port->dev;
124 struct cx23885_buffer *buf = container_of(vb,
125 struct cx23885_buffer, vb);
453afdd9
HV		 126
127 cx23885_free_buffer(dev, buf);
d19770e5
ST		 128}
129
453afdd9 130static void buffer_queue(struct vb2_buffer *vb)
d19770e5 131{
453afdd9
HV		 132 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
133 struct cx23885_buffer *buf = container_of(vb,
134 struct cx23885_buffer, vb);
135
136 cx23885_buf_queue(port, buf);
d19770e5
ST		 137}
138
78db8547
IL		 139static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
140{
453afdd9
HV		 141 struct vb2_dvb_frontends *f;
142 struct vb2_dvb_frontend *fe;
78db8547
IL		 143
144 f = &port->frontends;
145
146 if (f->gate <= 1) /* undefined or fe0 */
453afdd9 147 fe = vb2_dvb_get_frontend(f, 1);
78db8547 148 else
453afdd9 149 fe = vb2_dvb_get_frontend(f, f->gate);
78db8547
IL		 150
151 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
152 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
153}
154
453afdd9
HV		 155static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
156{
157 struct cx23885_tsport *port = q->drv_priv;
158 struct cx23885_dmaqueue *dmaq = &port->mpegq;
159 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
160 struct cx23885_buffer, queue);
161
162 cx23885_start_dma(port, dmaq, buf);
163 return 0;
164}
165
166static void cx23885_stop_streaming(struct vb2_queue *q)
167{
168 struct cx23885_tsport *port = q->drv_priv;
169
170 cx23885_cancel_buffers(port);
171}
172
173static struct vb2_ops dvb_qops = {
174 .queue_setup = queue_setup,
175 .buf_prepare = buffer_prepare,
176 .buf_finish = buffer_finish,
177 .buf_queue = buffer_queue,
178 .wait_prepare = vb2_ops_wait_prepare,
179 .wait_finish = vb2_ops_wait_finish,
180 .start_streaming = cx23885_start_streaming,
181 .stop_streaming = cx23885_stop_streaming,
d19770e5
ST		 182};
183
86184e06 184static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST		 185 .demod_address = 0x32 >> 1,
186 .output_mode = S5H1409_SERIAL_OUTPUT,
187 .gpio = S5H1409_GPIO_ON,
2b03238a 188 .qam_if = 44000,
fc959bef 189 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 190 .status_mode = S5H1409_DEMODLOCKING,
191 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST		 192};
193
b3ea0166
ST		 194static struct tda10048_config hauppauge_hvr1200_config = {
195 .demod_address = 0x10 >> 1,
196 .output_mode = TDA10048_SERIAL_OUTPUT,
197 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05 198 .inversion = TDA10048_INVERSION_ON,
8816bef5
ST		 199 .dtv6_if_freq_khz = TDA10048_IF_3300,
200 .dtv7_if_freq_khz = TDA10048_IF_3800,
201 .dtv8_if_freq_khz = TDA10048_IF_4300,
484d9e05 202 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST		 203};
204
6b926eca
MK		 205static struct tda10048_config hauppauge_hvr1210_config = {
206 .demod_address = 0x10 >> 1,
207 .output_mode = TDA10048_SERIAL_OUTPUT,
208 .fwbulkwritelen = TDA10048_BULKWRITE_200,
209 .inversion = TDA10048_INVERSION_ON,
c27586e4
MK		 210 .dtv6_if_freq_khz = TDA10048_IF_3300,
211 .dtv7_if_freq_khz = TDA10048_IF_3500,
212 .dtv8_if_freq_khz = TDA10048_IF_4000,
6b926eca
MK		 213 .clk_freq_khz = TDA10048_CLK_16000,
214};
215
3ba71d21
MK		 216static struct s5h1409_config hauppauge_ezqam_config = {
217 .demod_address = 0x32 >> 1,
218 .output_mode = S5H1409_SERIAL_OUTPUT,
219 .gpio = S5H1409_GPIO_OFF,
220 .qam_if = 4000,
221 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST		 222 .status_mode = S5H1409_DEMODLOCKING,
223 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK		 224};
225
fc959bef 226static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST		 227 .demod_address = 0x32 >> 1,
228 .output_mode = S5H1409_SERIAL_OUTPUT,
229 .gpio = S5H1409_GPIO_OFF,
2b03238a 230 .qam_if = 44000,
fe475163 231 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 232 .status_mode = S5H1409_DEMODLOCKING,
233 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST		 234};
235
07b4a835
MK		 236static struct s5h1409_config hauppauge_hvr1500_config = {
237 .demod_address = 0x32 >> 1,
238 .output_mode = S5H1409_SERIAL_OUTPUT,
239 .gpio = S5H1409_GPIO_OFF,
240 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 241 .status_mode = S5H1409_DEMODLOCKING,
242 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK		 243};
244
86184e06 245static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST		 246 0x61
247};
248
9bc37caa
MK		 249static struct lgdt330x_config fusionhdtv_5_express = {
250 .demod_address = 0x0e,
251 .demod_chip = LGDT3303,
252 .serial_mpeg = 0x40,
253};
254
d1987d55
ST		 255static struct s5h1409_config hauppauge_hvr1500q_config = {
256 .demod_address = 0x32 >> 1,
257 .output_mode = S5H1409_SERIAL_OUTPUT,
258 .gpio = S5H1409_GPIO_ON,
259 .qam_if = 44000,
260 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 261 .status_mode = S5H1409_DEMODLOCKING,
262 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST		 263};
264
335377b7
MK		 265static struct s5h1409_config dvico_s5h1409_config = {
266 .demod_address = 0x32 >> 1,
267 .output_mode = S5H1409_SERIAL_OUTPUT,
268 .gpio = S5H1409_GPIO_ON,
269 .qam_if = 44000,
270 .inversion = S5H1409_INVERSION_OFF,
271 .status_mode = S5H1409_DEMODLOCKING,
272 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
273};
274
52b50450
MK		 275static struct s5h1411_config dvico_s5h1411_config = {
276 .output_mode = S5H1411_SERIAL_OUTPUT,
277 .gpio = S5H1411_GPIO_ON,
278 .qam_if = S5H1411_IF_44000,
279 .vsb_if = S5H1411_IF_44000,
280 .inversion = S5H1411_INVERSION_OFF,
281 .status_mode = S5H1411_DEMODLOCKING,
282 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
283};
284
19bc5796
MK		 285static struct s5h1411_config hcw_s5h1411_config = {
286 .output_mode = S5H1411_SERIAL_OUTPUT,
287 .gpio = S5H1411_GPIO_OFF,
288 .vsb_if = S5H1411_IF_44000,
289 .qam_if = S5H1411_IF_4000,
290 .inversion = S5H1411_INVERSION_ON,
291 .status_mode = S5H1411_DEMODLOCKING,
292 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
293};
294
d1987d55 295static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST		 296 .i2c_address = 0x61,
297 .if_khz = 5380,
d1987d55
ST		 298};
299
335377b7
MK		 300static struct xc5000_config dvico_xc5000_tunerconfig = {
301 .i2c_address = 0x64,
302 .if_khz = 5380,
335377b7
MK		 303};
304
4041f1a5
MK		 305static struct tda829x_config tda829x_no_probe = {
306 .probe_tuner = TDA829X_DONT_PROBE,
307};
308
f21e0d7f 309static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK		 310 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
311 .if_lvl = 6, .rfagc_top = 0x37 },
312 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
313 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK		 314};
315
b34cdc36
MK		 316static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
317 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
318 .if_lvl = 1, .rfagc_top = 0x37, },
319 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
320 .if_lvl = 1, .rfagc_top = 0x37, },
321 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
322 .if_lvl = 1, .rfagc_top = 0x37, },
323};
324
f21e0d7f
MK		 325static struct tda18271_config hauppauge_tda18271_config = {
326 .std_map = &hauppauge_tda18271_std_map,
327 .gate = TDA18271_GATE_ANALOG,
04a68baa 328 .output_opt = TDA18271_OUTPUT_LT_OFF,
f21e0d7f
MK		 329};
330
b3ea0166 331static struct tda18271_config hauppauge_hvr1200_tuner_config = {
b34cdc36 332 .std_map = &hauppauge_hvr1200_tda18271_std_map,
b3ea0166 333 .gate = TDA18271_GATE_ANALOG,
04a68baa 334 .output_opt = TDA18271_OUTPUT_LT_OFF,
b3ea0166
ST		 335};
336
6b926eca
MK		 337static struct tda18271_config hauppauge_hvr1210_tuner_config = {
338 .gate = TDA18271_GATE_DIGITAL,
04a68baa 339 .output_opt = TDA18271_OUTPUT_LT_OFF,
6b926eca
MK		 340};
341
36efec48
MS		 342static struct tda18271_config hauppauge_hvr4400_tuner_config = {
343 .gate = TDA18271_GATE_DIGITAL,
344 .output_opt = TDA18271_OUTPUT_LT_OFF,
345};
346
247bc540 347static struct tda18271_std_map hauppauge_hvr127x_std_map = {
a5dbf457
MK		 348 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
349 .if_lvl = 1, .rfagc_top = 0x58 },
350 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
351 .if_lvl = 1, .rfagc_top = 0x58 },
352};
353
247bc540
MK		 354static struct tda18271_config hauppauge_hvr127x_config = {
355 .std_map = &hauppauge_hvr127x_std_map,
04a68baa 356 .output_opt = TDA18271_OUTPUT_LT_OFF,
a5dbf457
MK		 357};
358
247bc540 359static struct lgdt3305_config hauppauge_lgdt3305_config = {
a5dbf457
MK		 360 .i2c_addr = 0x0e,
361 .mpeg_mode = LGDT3305_MPEG_SERIAL,
362 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
363 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
364 .deny_i2c_rptr = 1,
365 .spectral_inversion = 1,
366 .qam_if_khz = 4000,
367 .vsb_if_khz = 3250,
368};
369
b1721d0d 370static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST		 371 BAND_VHF | BAND_UHF, /* band_caps */
372
373 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
374 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
375 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
376 * P_agc_nb_est=2, P_agc_write=0
377 */
378 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
379 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
380
381 712, /* inv_gain */
382 21, /* time_stabiliz */
383
384 0, /* alpha_level */
385 118, /* thlock */
386
387 0, /* wbd_inv */
388 2867, /* wbd_ref */
389 0, /* wbd_sel */
390 2, /* wbd_alpha */
391
392 0, /* agc1_max */
393 0, /* agc1_min */
394 39718, /* agc2_max */
395 9930, /* agc2_min */
396 0, /* agc1_pt1 */
397 0, /* agc1_pt2 */
398 0, /* agc1_pt3 */
399 0, /* agc1_slope1 */
400 0, /* agc1_slope2 */
401 0, /* agc2_pt1 */
402 128, /* agc2_pt2 */
403 29, /* agc2_slope1 */
404 29, /* agc2_slope2 */
405
406 17, /* alpha_mant */
407 27, /* alpha_exp */
408 23, /* beta_mant */
409 51, /* beta_exp */
410
411 1, /* perform_agc_softsplit */
412};
413
414/* PLL Configuration for COFDM BW_MHz = 8.000000
415 * With external clock = 30.000000 */
b1721d0d 416static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST		 417 60000, /* internal */
418 30000, /* sampling */
419 1, /* pll_cfg: prediv */
420 8, /* pll_cfg: ratio */
421 3, /* pll_cfg: range */
422 1, /* pll_cfg: reset */
423 0, /* pll_cfg: bypass */
424 0, /* misc: refdiv */
425 0, /* misc: bypclk_div */
426 1, /* misc: IO_CLK_en_core */
427 1, /* misc: ADClkSrc */
428 0, /* misc: modulo */
429 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
430 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
431 20452225, /* timf */
432 30000000 /* xtal_hz */
433};
434
435static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
436 .output_mpeg2_in_188_bytes = 1,
437 .hostbus_diversity = 1,
438 .tuner_is_baseband = 0,
439 .update_lna = NULL,
440
441 .agc_config_count = 1,
442 .agc = &xc3028_agc_config,
443 .bw = &xc3028_bw_config,
444
445 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
446 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
447 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
448
449 .pwm_freq_div = 0,
450 .agc_control = NULL,
451 .spur_protect = 0,
452
453 .output_mode = OUTMODE_MPEG2_SERIAL,
454};
455
aef2d186
ST		 456static struct zl10353_config dvico_fusionhdtv_xc3028 = {
457 .demod_address = 0x0f,
458 .if2 = 45600,
459 .no_tuner = 1,
d4dc673d 460 .disable_i2c_gate_ctrl = 1,
aef2d186
ST		 461};
462
f867c3f4
IL		 463static struct stv0900_reg stv0900_ts_regs[] = {
464 { R0900_TSGENERAL, 0x00 },
465 { R0900_P1_TSSPEED, 0x40 },
466 { R0900_P2_TSSPEED, 0x40 },
467 { R0900_P1_TSCFGM, 0xc0 },
468 { R0900_P2_TSCFGM, 0xc0 },
469 { R0900_P1_TSCFGH, 0xe0 },
470 { R0900_P2_TSCFGH, 0xe0 },
471 { R0900_P1_TSCFGL, 0x20 },
472 { R0900_P2_TSCFGL, 0x20 },
473 { 0xffff, 0xff }, /* terminate */
474};
475
5a23b076
IL		 476static struct stv0900_config netup_stv0900_config = {
477 .demod_address = 0x68,
29372a8d 478 .demod_mode = 1, /* dual */
644c7ef0 479 .xtal = 8000000,
5a23b076
IL		 480 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
481 .diseqc_mode = 2,/* 2/3 PWM */
f867c3f4 482 .ts_config_regs = stv0900_ts_regs,
5a23b076
IL		 483 .tun1_maddress = 0,/* 0x60 */
484 .tun2_maddress = 3,/* 0x63 */
485 .tun1_adc = 1,/* 1 Vpp */
486 .tun2_adc = 1,/* 1 Vpp */
487};
488
489static struct stv6110_config netup_stv6110_tunerconfig_a = {
490 .i2c_address = 0x60,
644c7ef0
AO		 491 .mclk = 16000000,
492 .clk_div = 1,
873688cd 493 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 494};
495
496static struct stv6110_config netup_stv6110_tunerconfig_b = {
497 .i2c_address = 0x63,
644c7ef0
AO		 498 .mclk = 16000000,
499 .clk_div = 1,
873688cd 500 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 501};
502
96318d0c 503static struct cx24116_config tbs_cx24116_config = {
09ea33e5 504 .demod_address = 0x55,
96318d0c
IL		 505};
506
e6001482
LA		 507static struct cx24117_config tbs_cx24117_config = {
508 .demod_address = 0x55,
509};
510
09ea33e5
IL		 511static struct ds3000_config tevii_ds3000_config = {
512 .demod_address = 0x68,
579943f5
IL		 513};
514
73f0af44
KD		 515static struct ts2020_config tevii_ts2020_config = {
516 .tuner_address = 0x60,
b858c331 517 .clk_out_div = 1,
8d2b0229 518 .frequency_div = 1146000,
73f0af44
KD		 519};
520
c9b8b04b
IL		 521static struct cx24116_config dvbworld_cx24116_config = {
522 .demod_address = 0x05,
523};
524
493b7127
DW		 525static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
526 .prod = LGS8GXX_PROD_LGS8GL5,
527 .demod_address = 0x19,
528 .serial_ts = 0,
529 .ts_clk_pol = 1,
530 .ts_clk_gated = 1,
531 .if_clk_freq = 30400, /* 30.4 MHz */
532 .if_freq = 5380, /* 5.38 MHz */
533 .if_neg_center = 1,
534 .ext_adc = 0,
535 .adc_signed = 0,
536 .if_neg_edge = 0,
537};
538
539static struct xc5000_config mygica_x8506_xc5000_config = {
540 .i2c_address = 0x61,
541 .if_khz = 5380,
542};
543
0d1b5265
MCC		 544static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
545 .demod_address = 0x10,
546};
547
548static struct xc5000_config mygica_x8507_xc5000_config = {
549 .i2c_address = 0x61,
550 .if_khz = 4000,
551};
552
f667190b 553static struct stv090x_config prof_8000_stv090x_config = {
b858c331
IL		 554 .device = STV0903,
555 .demod_mode = STV090x_SINGLE,
556 .clk_mode = STV090x_CLK_EXT,
557 .xtal = 27000000,
558 .address = 0x6A,
559 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
560 .repeater_level = STV090x_RPTLEVEL_64,
561 .adc1_range = STV090x_ADC_2Vpp,
562 .diseqc_envelope_mode = false,
563
564 .tuner_get_frequency = stb6100_get_frequency,
565 .tuner_set_frequency = stb6100_set_frequency,
566 .tuner_set_bandwidth = stb6100_set_bandwidth,
567 .tuner_get_bandwidth = stb6100_get_bandwidth,
f667190b
MB		 568};
569
570static struct stb6100_config prof_8000_stb6100_config = {
571 .tuner_address = 0x60,
572 .refclock = 27000000,
573};
574
0df289a2
MCC		 575static int p8000_set_voltage(struct dvb_frontend *fe,
576 enum fe_sec_voltage voltage)
f667190b
MB		 577{
578 struct cx23885_tsport *port = fe->dvb->priv;
579 struct cx23885_dev *dev = port->dev;
580
581 if (voltage == SEC_VOLTAGE_18)
582 cx_write(MC417_RWD, 0x00001e00);
583 else if (voltage == SEC_VOLTAGE_13)
584 cx_write(MC417_RWD, 0x00001a00);
585 else
586 cx_write(MC417_RWD, 0x00001800);
587 return 0;
588}
589
29442266 590static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
0df289a2 591 enum fe_sec_voltage voltage)
29442266
OS		 592{
593 struct cx23885_tsport *port = fe->dvb->priv;
594 struct cx23885_dev *dev = port->dev;
595
596 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
597
598 switch (voltage) {
599 case SEC_VOLTAGE_13:
600 cx23885_gpio_set(dev, GPIO_1);
601 cx23885_gpio_clear(dev, GPIO_0);
602 break;
603 case SEC_VOLTAGE_18:
604 cx23885_gpio_set(dev, GPIO_1);
605 cx23885_gpio_set(dev, GPIO_0);
606 break;
607 case SEC_VOLTAGE_OFF:
608 cx23885_gpio_clear(dev, GPIO_1);
609 cx23885_gpio_clear(dev, GPIO_0);
610 break;
611 }
612
613 /* call the frontend set_voltage function */
614 port->fe_set_voltage(fe, voltage);
615
616 return 0;
617}
618
c29d6a83 619static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe,
0df289a2 620 enum fe_sec_voltage voltage)
c29d6a83 621{
622 struct cx23885_tsport *port = fe->dvb->priv;
623 struct cx23885_dev *dev = port->dev;
624
625 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1);
626
627 switch (voltage) {
628 case SEC_VOLTAGE_13:
629 cx23885_gpio_set(dev, GPIO_13);
630 cx23885_gpio_clear(dev, GPIO_12);
631 break;
632 case SEC_VOLTAGE_18:
633 cx23885_gpio_set(dev, GPIO_13);
634 cx23885_gpio_set(dev, GPIO_12);
635 break;
636 case SEC_VOLTAGE_OFF:
637 cx23885_gpio_clear(dev, GPIO_13);
638 cx23885_gpio_clear(dev, GPIO_12);
639 break;
640 }
641 /* call the frontend set_voltage function */
642 return port->fe_set_voltage(fe, voltage);
643}
644
24e77409
OS		 645static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
646 u8 data, int *mem)
647{
648 /* MC417 */
649 #define SP2_DATA 0x000000ff
650 #define SP2_WR 0x00008000
651 #define SP2_RD 0x00004000
652 #define SP2_ACK 0x00001000
653 #define SP2_ADHI 0x00000800
654 #define SP2_ADLO 0x00000400
655 #define SP2_CS1 0x00000200
656 #define SP2_CS0 0x00000100
657 #define SP2_EN_ALL 0x00001000
658 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
659
660 struct cx23885_tsport *port = priv;
661 struct cx23885_dev *dev = port->dev;
662 int ret;
0e6c7b01 663 int tmp = 0;
24e77409
OS		 664 unsigned long timeout;
665
666 mutex_lock(&dev->gpio_lock);
667
668 /* write addr */
669 cx_write(MC417_OEN, SP2_EN_ALL);
670 cx_write(MC417_RWD, SP2_CTRL_OFF |
671 SP2_ADLO | (0xff & addr));
672 cx_clear(MC417_RWD, SP2_ADLO);
673 cx_write(MC417_RWD, SP2_CTRL_OFF |
674 SP2_ADHI | (0xff & (addr >> 8)));
675 cx_clear(MC417_RWD, SP2_ADHI);
676
677 if (read)
678 /* data in */
679 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
680 else
681 /* data out */
682 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
683
684 /* chip select 0 */
685 cx_clear(MC417_RWD, SP2_CS0);
686
687 /* read/write */
688 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
689
690 /* wait for a maximum of 1 msec */
691 timeout = jiffies + msecs_to_jiffies(1);
692 while (!time_after(jiffies, timeout)) {
693 tmp = cx_read(MC417_RWD);
694 if ((tmp & SP2_ACK) == 0)
695 break;
696 usleep_range(50, 100);
697 }
698
699 cx_set(MC417_RWD, SP2_CTRL_OFF);
700 *mem = tmp & 0xff;
701
702 mutex_unlock(&dev->gpio_lock);
703
704 if (!read) {
705 if (*mem < 0) {
706 ret = -EREMOTEIO;
707 goto err;
708 }
709 }
710
711 return 0;
712err:
713 return ret;
714}
715
a7d44baa 716static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
f35b9e80 717{
a7d44baa 718 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
f35b9e80
MK		 719 struct cx23885_tsport *port = fe->dvb->priv;
720 struct cx23885_dev *dev = port->dev;
721
722 switch (dev->board) {
723 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a7d44baa 724 switch (p->modulation) {
f35b9e80
MK		 725 case VSB_8:
726 cx23885_gpio_clear(dev, GPIO_5);
727 break;
728 case QAM_64:
729 case QAM_256:
730 default:
731 cx23885_gpio_set(dev, GPIO_5);
732 break;
733 }
734 break;
6f0d8c02 735 case CX23885_BOARD_MYGICA_X8506:
0d1b5265 736 case CX23885_BOARD_MYGICA_X8507:
6f0d8c02
DW		 737 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
738 /* Select Digital TV */
739 cx23885_gpio_set(dev, GPIO_0);
740 break;
f35b9e80 741 }
15472faf
MCC		 742
743 /* Call the real set_frontend */
744 if (port->set_frontend)
745 return port->set_frontend(fe);
746
5bdd3962 747 return 0;
f35b9e80
MK		 748}
749
15472faf
MCC		 750static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
751 struct dvb_frontend *fe)
752{
753 port->set_frontend = fe->ops.set_frontend;
754 fe->ops.set_frontend = cx23885_dvb_set_frontend;
755}
756
2365b2d3
DW		 757static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
758 .prod = LGS8GXX_PROD_LGS8G75,
759 .demod_address = 0x19,
760 .serial_ts = 0,
761 .ts_clk_pol = 1,
762 .ts_clk_gated = 1,
763 .if_clk_freq = 30400, /* 30.4 MHz */
764 .if_freq = 6500, /* 6.50 MHz */
765 .if_neg_center = 1,
766 .ext_adc = 0,
767 .adc_signed = 1,
768 .adc_vpp = 2, /* 1.6 Vpp */
769 .if_neg_edge = 1,
770};
771
772static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
773 .i2c_address = 0x61,
774 .if_khz = 6500,
775};
776
ea5697fe
DW		 777static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
778 .prod = ATBM8830_PROD_8830,
779 .demod_address = 0x44,
780 .serial_ts = 0,
781 .ts_sampling_edge = 1,
782 .ts_clk_gated = 0,
783 .osc_clk_freq = 30400, /* in kHz */
784 .if_freq = 0, /* zero IF */
785 .zif_swap_iq = 1,
c245c75c
DW		 786 .agc_min = 0x2E,
787 .agc_max = 0xFF,
788 .agc_hold_loop = 0,
ea5697fe
DW		 789};
790
791static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
792 .i2c_address = 0x60,
793 .osc_clk = 20
794};
795
796static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
797 .prod = ATBM8830_PROD_8830,
798 .demod_address = 0x44,
799 .serial_ts = 1,
800 .ts_sampling_edge = 1,
801 .ts_clk_gated = 0,
802 .osc_clk_freq = 30400, /* in kHz */
803 .if_freq = 0, /* zero IF */
804 .zif_swap_iq = 1,
c245c75c
DW		 805 .agc_min = 0x2E,
806 .agc_max = 0xFF,
807 .agc_hold_loop = 0,
ea5697fe
DW		 808};
809
810static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
811 .i2c_address = 0x60,
812 .osc_clk = 20
813};
78db8547
IL		 814static struct stv0367_config netup_stv0367_config[] = {
815 {
816 .demod_address = 0x1c,
817 .xtal = 27000000,
818 .if_khz = 4500,
819 .if_iq_mode = 0,
820 .ts_mode = 1,
821 .clk_pol = 0,
822 }, {
823 .demod_address = 0x1d,
824 .xtal = 27000000,
825 .if_khz = 4500,
826 .if_iq_mode = 0,
827 .ts_mode = 1,
828 .clk_pol = 0,
829 },
830};
831
832static struct xc5000_config netup_xc5000_config[] = {
833 {
834 .i2c_address = 0x61,
835 .if_khz = 4500,
836 }, {
837 .i2c_address = 0x64,
838 .if_khz = 4500,
839 },
840};
841
722c90eb
SR		 842static struct drxk_config terratec_drxk_config[] = {
843 {
844 .adr = 0x29,
845 .no_i2c_bridge = 1,
846 }, {
847 .adr = 0x2a,
848 .no_i2c_bridge = 1,
849 },
850};
851
852static struct mt2063_config terratec_mt2063_config[] = {
853 {
854 .tuner_address = 0x60,
855 }, {
856 .tuner_address = 0x67,
857 },
858};
859
49bf0e67
AP		 860static const struct tda10071_platform_data hauppauge_tda10071_pdata = {
861 .clk = 40444000, /* 40.444 MHz */
862 .i2c_wr_max = 64,
863 .ts_mode = TDA10071_TS_SERIAL,
864 .pll_multiplier = 20,
865 .tuner_i2c_addr = 0x54,
866};
867
36efec48
MS		 868static const struct si2165_config hauppauge_hvr4400_si2165_config = {
869 .i2c_addr = 0x64,
870 .chip_mode = SI2165_MODE_PLL_XTAL,
871 .ref_freq_Hz = 16000000,
872};
873
29442266
OS		 874static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
875 .i2c_addr = 0x68,
876 .clock = 27000000,
877 .i2c_wr_max = 33,
878 .clock_out = 0,
879 .ts_mode = M88DS3103_TS_PARALLEL,
880 .ts_clk = 16000,
881 .ts_clk_pol = 1,
882 .lnb_en_pol = 1,
883 .lnb_hv_pol = 0,
884 .agc = 0x99,
885};
886
0e6c7b01 887static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
888 .i2c_addr = 0x68,
889 .clock = 27000000,
890 .i2c_wr_max = 33,
891 .clock_out = 0,
892 .ts_mode = M88DS3103_TS_CI,
893 .ts_clk = 10000,
894 .ts_clk_pol = 1,
895 .lnb_en_pol = 1,
896 .lnb_hv_pol = 0,
897 .agc = 0x99,
898};
899
c29d6a83 900static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = {
901 .i2c_addr = 0x68,
902 .clock = 27000000,
903 .i2c_wr_max = 33,
904 .clock_out = 0,
905 .ts_mode = M88DS3103_TS_SERIAL,
906 .ts_clk = 96000,
907 .ts_clk_pol = 0,
908 .lnb_en_pol = 1,
909 .lnb_hv_pol = 0,
910 .agc = 0x99,
911};
912
1fc77d01
AP		 913static const struct m88ds3103_config hauppauge_hvr5525_m88ds3103_config = {
914 .i2c_addr = 0x69,
915 .clock = 27000000,
916 .i2c_wr_max = 33,
917 .ts_mode = M88DS3103_TS_PARALLEL,
918 .ts_clk = 16000,
919 .ts_clk_pol = 1,
920 .agc = 0x99,
921};
922
ada73eee 923static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
78db8547
IL		 924{
925 struct cx23885_dev *dev = (struct cx23885_dev *)device;
926 unsigned long timeout = jiffies + msecs_to_jiffies(1);
d164460f 927 uint32_t mem = 0;
78db8547 928
d164460f 929 mem = cx_read(MC417_RWD);
78db8547
IL		 930 if (read)
931 cx_set(MC417_OEN, ALT_DATA);
932 else {
933 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
78db8547
IL		 934 mem &= ~ALT_DATA;
935 mem |= (data & ALT_DATA);
78db8547
IL		 936 }
937
938 if (flag)
d164460f 939 mem |= ALT_AD_RG;
78db8547 940 else
d164460f 941 mem &= ~ALT_AD_RG;
78db8547 942
d164460f 943 mem &= ~ALT_CS;
78db8547 944 if (read)
d164460f 945 mem = (mem & ~ALT_RD) | ALT_WR;
78db8547 946 else
d164460f
AO		 947 mem = (mem & ~ALT_WR) | ALT_RD;
948
949 cx_write(MC417_RWD, mem); /* start RW cycle */
78db8547
IL		 950
951 for (;;) {
952 mem = cx_read(MC417_RWD);
953 if ((mem & ALT_RDY) == 0)
954 break;
955 if (time_after(jiffies, timeout))
956 break;
957 udelay(1);
958 }
959
960 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
961 if (read)
962 return mem & ALT_DATA;
963
964 return 0;
965};
ea5697fe 966
46b21bba
JH		 967static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
968{
969 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
970
971 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
972}
973
974static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
975{
976 return 0;
977}
978
979static struct dib0070_config dib7070p_dib0070_config = {
980 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
981 .reset = dib7070_tuner_reset,
982 .sleep = dib7070_tuner_sleep,
983 .clock_khz = 12000,
46b21bba
JH		 984 .freq_offset_khz_vhf = 550,
985 /* .flip_chip = 1, */
986};
987
988/* DIB7070 generic */
989static struct dibx000_agc_config dib7070_agc_config = {
990 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
991
992 /*
993 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
994 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
995 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
996 */
997 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
998 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
999 .inv_gain = 600,
1000 .time_stabiliz = 10,
1001 .alpha_level = 0,
1002 .thlock = 118,
1003 .wbd_inv = 0,
1004 .wbd_ref = 3530,
1005 .wbd_sel = 1,
1006 .wbd_alpha = 5,
1007 .agc1_max = 65535,
1008 .agc1_min = 0,
1009 .agc2_max = 65535,
1010 .agc2_min = 0,
1011 .agc1_pt1 = 0,
1012 .agc1_pt2 = 40,
1013 .agc1_pt3 = 183,
1014 .agc1_slope1 = 206,
1015 .agc1_slope2 = 255,
1016 .agc2_pt1 = 72,
1017 .agc2_pt2 = 152,
1018 .agc2_slope1 = 88,
1019 .agc2_slope2 = 90,
1020 .alpha_mant = 17,
1021 .alpha_exp = 27,
1022 .beta_mant = 23,
1023 .beta_exp = 51,
1024 .perform_agc_softsplit = 0,
1025};
1026
1027static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
1028 .internal = 60000,
1029 .sampling = 15000,
1030 .pll_prediv = 1,
1031 .pll_ratio = 20,
1032 .pll_range = 3,
1033 .pll_reset = 1,
1034 .pll_bypass = 0,
1035 .enable_refdiv = 0,
1036 .bypclk_div = 0,
1037 .IO_CLK_en_core = 1,
1038 .ADClkSrc = 1,
1039 .modulo = 2,
1040 /* refsel, sel, freq_15k */
1041 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1042 .ifreq = (0 << 25) | 0,
1043 .timf = 20452225,
1044 .xtal_hz = 12000000,
1045};
1046
1047static struct dib7000p_config dib7070p_dib7000p_config = {
1048 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1049 .output_mode = OUTMODE_MPEG2_SERIAL,
1050 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1051 .output_mpeg2_in_188_bytes = 1,
1052
1053 .agc_config_count = 1,
1054 .agc = &dib7070_agc_config,
1055 .bw = &dib7070_bw_config_12_mhz,
1056 .tuner_is_baseband = 1,
1057 .spur_protect = 1,
1058
1059 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1060 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1061 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1062
1063 .hostbus_diversity = 1,
1064};
1065
2b0aac30
MCC		 1066static int dvb_register_ci_mac(struct cx23885_tsport *port)
1067{
1068 struct cx23885_dev *dev = port->dev;
1069 struct i2c_client *client_ci = NULL;
1070 struct vb2_dvb_frontend *fe0;
1071
1072 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1073 if (!fe0)
1074 return -EINVAL;
1075
1076 switch (dev->board) {
1077 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1078 static struct netup_card_info cinfo;
1079
1080 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1081 memcpy(port->frontends.adapter.proposed_mac,
1082 cinfo.port[port->nr - 1].mac, 6);
1083 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1084 port->nr, port->frontends.adapter.proposed_mac);
1085
1086 netup_ci_init(port);
1087 return 0;
1088 }
1089 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1090 struct altera_ci_config netup_ci_cfg = {
1091 .dev = dev,/* magic number to identify*/
1092 .adapter = &port->frontends.adapter,/* for CI */
1093 .demux = &fe0->dvb.demux,/* for hw pid filter */
1094 .fpga_rw = netup_altera_fpga_rw,
1095 };
1096
1097 altera_ci_init(&netup_ci_cfg, port->nr);
1098 return 0;
1099 }
1100 case CX23885_BOARD_TEVII_S470: {
1101 u8 eeprom[256]; /* 24C02 i2c eeprom */
1102
1103 if (port->nr != 1)
1104 return 0;
1105
1106 /* Read entire EEPROM */
1107 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1108 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1109 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1110 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1111 return 0;
1112 }
1113 case CX23885_BOARD_DVBSKY_T9580:
1114 case CX23885_BOARD_DVBSKY_S950:
1115 case CX23885_BOARD_DVBSKY_S952:
1116 case CX23885_BOARD_DVBSKY_T982: {
1117 u8 eeprom[256]; /* 24C02 i2c eeprom */
1118
1119 if (port->nr > 2)
1120 return 0;
1121
1122 /* Read entire EEPROM */
1123 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1124 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1125 sizeof(eeprom));
1126 printk(KERN_INFO "%s port %d MAC address: %pM\n",
1127 cx23885_boards[dev->board].name, port->nr,
1128 eeprom + 0xc0 + (port->nr-1) * 8);
1129 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1130 (port->nr-1) * 8, 6);
1131 return 0;
1132 }
1133 case CX23885_BOARD_DVBSKY_S950C:
1134 case CX23885_BOARD_DVBSKY_T980C:
1135 case CX23885_BOARD_TT_CT2_4500_CI: {
1136 u8 eeprom[256]; /* 24C02 i2c eeprom */
1137 struct sp2_config sp2_config;
1138 struct i2c_board_info info;
1139 struct cx23885_i2c *i2c_bus2 = &dev->i2c_bus[1];
1140
1141 /* attach CI */
1142 memset(&sp2_config, 0, sizeof(sp2_config));
1143 sp2_config.dvb_adap = &port->frontends.adapter;
1144 sp2_config.priv = port;
1145 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
1146 memset(&info, 0, sizeof(struct i2c_board_info));
1147 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
1148 info.addr = 0x40;
1149 info.platform_data = &sp2_config;
1150 request_module(info.type);
1151 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
1152 if (client_ci == NULL || client_ci->dev.driver == NULL)
1153 return -ENODEV;
1154 if (!try_module_get(client_ci->dev.driver->owner)) {
1155 i2c_unregister_device(client_ci);
1156 return -ENODEV;
1157 }
1158 port->i2c_client_ci = client_ci;
1159
1160 if (port->nr != 1)
1161 return 0;
1162
1163 /* Read entire EEPROM */
1164 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1165 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1166 sizeof(eeprom));
1167 printk(KERN_INFO "%s MAC address: %pM\n",
1168 cx23885_boards[dev->board].name, eeprom + 0xc0);
1169 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
1170 return 0;
1171 }
1172 }
1173 return 0;
1174}
1175
d19770e5
ST		 1176static int dvb_register(struct cx23885_tsport *port)
1177{
8abe4a0a 1178 struct dib7000p_ops dib7000p_ops;
d19770e5 1179 struct cx23885_dev *dev = port->dev;
493b7127 1180 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
453afdd9 1181 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
29442266
OS		 1182 struct si2168_config si2168_config;
1183 struct si2157_config si2157_config;
d76e0878 1184 struct ts2020_config ts2020_config;
29442266
OS		 1185 struct i2c_board_info info;
1186 struct i2c_adapter *adapter;
2b0aac30 1187 struct i2c_client *client_demod = NULL, *client_tuner = NULL;
bf5e3ef0 1188 struct i2c_client *client_sec = NULL;
c29d6a83 1189 const struct m88ds3103_config *p_m88ds3103_config = NULL;
0df289a2
MCC		 1190 int (*p_set_voltage)(struct dvb_frontend *fe,
1191 enum fe_sec_voltage voltage) = NULL;
78db8547 1192 int mfe_shared = 0; /* bus not shared by default */
5a23b076 1193 int ret;
363c35fc 1194
f972e0bd 1195 /* Get the first frontend */
453afdd9 1196 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST		 1197 if (!fe0)
1198 return -EINVAL;
d19770e5 1199
453afdd9 1200 /* init struct vb2_dvb */
363c35fc 1201 fe0->dvb.name = dev->name;
d19770e5 1202
78db8547
IL		 1203 /* multi-frontend gate control is undefined or defaults to fe0 */
1204 port->frontends.gate = 0;
1205
1206 /* Sets the gate control callback to be used by i2c command calls */
1207 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1208
d19770e5
ST		 1209 /* init frontend */
1210 switch (dev->board) {
a77743bc 1211 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 1212 i2c_bus = &dev->i2c_bus[0];
363c35fc 1213 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 1214 &hauppauge_generic_config,
f139fa71 1215 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1216 if (fe0->dvb.frontend == NULL)
1217 break;
1218 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1219 &i2c_bus->i2c_adap,
1220 &hauppauge_generic_tunerconfig, 0);
d19770e5 1221 break;
a5dbf457 1222 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1223 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK		 1224 i2c_bus = &dev->i2c_bus[0];
1225 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
247bc540 1226 &hauppauge_lgdt3305_config,
a5dbf457 1227 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1228 if (fe0->dvb.frontend == NULL)
1229 break;
1230 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1231 0x60, &dev->i2c_bus[1].i2c_adap,
1232 &hauppauge_hvr127x_config);
15472faf
MCC		 1233 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1234 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
a5dbf457 1235 break;
19bc5796 1236 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1237 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
19bc5796
MK		 1238 i2c_bus = &dev->i2c_bus[0];
1239 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1240 &hcw_s5h1411_config,
1241 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1242 if (fe0->dvb.frontend == NULL)
1243 break;
1244
1245 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1246 0x60, &dev->i2c_bus[1].i2c_adap,
1247 &hauppauge_tda18271_config);
0ac60acb
DH		 1248
1249 tda18271_attach(&dev->ts1.analog_fe,
1250 0x60, &dev->i2c_bus[1].i2c_adap,
1251 &hauppauge_tda18271_config);
1252
19bc5796 1253 break;
3ba71d21
MK		 1254 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1255 i2c_bus = &dev->i2c_bus[0];
92abe9ee 1256 switch (alt_tuner) {
3ba71d21 1257 case 1:
363c35fc 1258 fe0->dvb.frontend =
3ba71d21
MK		 1259 dvb_attach(s5h1409_attach,
1260 &hauppauge_ezqam_config,
1261 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1262 if (fe0->dvb.frontend == NULL)
1263 break;
1264
1265 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1266 &dev->i2c_bus[1].i2c_adap, 0x42,
1267 &tda829x_no_probe);
1268 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1269 0x60, &dev->i2c_bus[1].i2c_adap,
1270 &hauppauge_tda18271_config);
3ba71d21
MK		 1271 break;
1272 case 0:
1273 default:
363c35fc 1274 fe0->dvb.frontend =
3ba71d21
MK		 1275 dvb_attach(s5h1409_attach,
1276 &hauppauge_generic_config,
1277 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1278 if (fe0->dvb.frontend == NULL)
1279 break;
1280 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1281 &i2c_bus->i2c_adap,
1282 &hauppauge_generic_tunerconfig, 0);
3ba71d21
MK		 1283 }
1284 break;
fc959bef 1285 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 1286 i2c_bus = &dev->i2c_bus[0];
363c35fc 1287 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 1288 &hauppauge_hvr1800lp_config,
f139fa71 1289 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1290 if (fe0->dvb.frontend == NULL)
1291 break;
1292 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1293 &i2c_bus->i2c_adap,
1294 &hauppauge_generic_tunerconfig, 0);
fc959bef 1295 break;
9bc37caa 1296 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 1297 i2c_bus = &dev->i2c_bus[0];
363c35fc 1298 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 1299 &fusionhdtv_5_express,
f139fa71 1300 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1301 if (fe0->dvb.frontend == NULL)
1302 break;
1303 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1304 &i2c_bus->i2c_adap, 0x61,
1305 TUNER_LG_TDVS_H06XF);
9bc37caa 1306 break;
d1987d55
ST		 1307 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1308 i2c_bus = &dev->i2c_bus[1];
363c35fc 1309 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST		 1310 &hauppauge_hvr1500q_config,
1311 &dev->i2c_bus[0].i2c_adap);
ed3da2bf
MCC		 1312 if (fe0->dvb.frontend == NULL)
1313 break;
1314 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1315 &i2c_bus->i2c_adap,
1316 &hauppauge_hvr1500q_tunerconfig);
d1987d55 1317 break;
07b4a835
MK		 1318 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1319 i2c_bus = &dev->i2c_bus[1];
363c35fc 1320 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK		 1321 &hauppauge_hvr1500_config,
1322 &dev->i2c_bus[0].i2c_adap);
363c35fc 1323 if (fe0->dvb.frontend != NULL) {
07b4a835
MK		 1324 struct dvb_frontend *fe;
1325 struct xc2028_config cfg = {
1326 .i2c_adap = &i2c_bus->i2c_adap,
1327 .i2c_addr = 0x61,
07b4a835
MK		 1328 };
1329 static struct xc2028_ctrl ctl = {
ef80bfeb 1330 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 1331 .max_len = 64,
52c3d29c 1332 .demod = XC3028_FE_OREN538,
07b4a835
MK		 1333 };
1334
1335 fe = dvb_attach(xc2028_attach,
363c35fc 1336 fe0->dvb.frontend, &cfg);
07b4a835
MK		 1337 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1338 fe->ops.tuner_ops.set_config(fe, &ctl);
1339 }
1340 break;
b3ea0166 1341 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1342 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 1343 i2c_bus = &dev->i2c_bus[0];
363c35fc 1344 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST		 1345 &hauppauge_hvr1200_config,
1346 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1347 if (fe0->dvb.frontend == NULL)
1348 break;
1349 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1350 &dev->i2c_bus[1].i2c_adap, 0x42,
1351 &tda829x_no_probe);
1352 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1353 0x60, &dev->i2c_bus[1].i2c_adap,
1354 &hauppauge_hvr1200_tuner_config);
6b926eca
MK		 1355 break;
1356 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1357 i2c_bus = &dev->i2c_bus[0];
1358 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1359 &hauppauge_hvr1210_config,
1360 &i2c_bus->i2c_adap);
1361 if (fe0->dvb.frontend != NULL) {
1362 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1363 0x60, &dev->i2c_bus[1].i2c_adap,
1364 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST		 1365 }
1366 break;
66762373
ST		 1367 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1368 i2c_bus = &dev->i2c_bus[0];
8abe4a0a
MCC		 1369
1370 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1371 return -ENODEV;
1372
1373 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
66762373 1374 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 1375 if (fe0->dvb.frontend != NULL) {
66762373
ST		 1376 struct dvb_frontend *fe;
1377 struct xc2028_config cfg = {
1378 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1379 .i2c_addr = 0x64,
66762373
ST		 1380 };
1381 static struct xc2028_ctrl ctl = {
ef80bfeb 1382 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373 1383 .max_len = 64,
9bed77ee 1384 .demod = XC3028_FE_DIBCOM52,
9c8ced51
ST		 1385 /* This is true for all demods with
1386 v36 firmware? */
0975fc68 1387 .type = XC2028_D2633,
66762373
ST		 1388 };
1389
1390 fe = dvb_attach(xc2028_attach,
363c35fc 1391 fe0->dvb.frontend, &cfg);
66762373
ST		 1392 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1393 fe->ops.tuner_ops.set_config(fe, &ctl);
1394 }
1395 break;
335377b7
MK		 1396 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1397 i2c_bus = &dev->i2c_bus[port->nr - 1];
1398
363c35fc 1399 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK		 1400 &dvico_s5h1409_config,
1401 &i2c_bus->i2c_adap);
363c35fc
ST		 1402 if (fe0->dvb.frontend == NULL)
1403 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK		 1404 &dvico_s5h1411_config,
1405 &i2c_bus->i2c_adap);
363c35fc
ST		 1406 if (fe0->dvb.frontend != NULL)
1407 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 1408 &i2c_bus->i2c_adap,
1409 &dvico_xc5000_tunerconfig);
335377b7 1410 break;
aef2d186
ST		 1411 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1412 i2c_bus = &dev->i2c_bus[port->nr - 1];
1413
363c35fc 1414 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST		 1415 &dvico_fusionhdtv_xc3028,
1416 &i2c_bus->i2c_adap);
363c35fc 1417 if (fe0->dvb.frontend != NULL) {
aef2d186
ST		 1418 struct dvb_frontend *fe;
1419 struct xc2028_config cfg = {
1420 .i2c_adap = &i2c_bus->i2c_adap,
1421 .i2c_addr = 0x61,
aef2d186
ST		 1422 };
1423 static struct xc2028_ctrl ctl = {
ef80bfeb 1424 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST		 1425 .max_len = 64,
1426 .demod = XC3028_FE_ZARLINK456,
1427 };
1428
363c35fc 1429 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST		 1430 &cfg);
1431 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1432 fe->ops.tuner_ops.set_config(fe, &ctl);
1433 }
1434 break;
46b21bba
JH		 1435 }
1436 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1437 i2c_bus = &dev->i2c_bus[port->nr - 1];
1438 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1439 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1440
1441 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1442 return -ENODEV;
1443
1444 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1445 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1446 return -ENODEV;
1447 }
1448 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1449 if (fe0->dvb.frontend != NULL) {
1450 struct i2c_adapter *tun_i2c;
1451
1452 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1453 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1454 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1455 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1456 return -ENODEV;
1457 }
1458 break;
aef2d186 1459 }
4c56b04a 1460 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1461 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1462 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 1463 i2c_bus = &dev->i2c_bus[0];
1464
363c35fc 1465 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST		 1466 &dvico_fusionhdtv_xc3028,
1467 &i2c_bus->i2c_adap);
363c35fc 1468 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST		 1469 struct dvb_frontend *fe;
1470 struct xc2028_config cfg = {
1471 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1472 .i2c_addr = 0x61,
4c56b04a
ST		 1473 };
1474 static struct xc2028_ctrl ctl = {
ef80bfeb 1475 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST		 1476 .max_len = 64,
1477 .demod = XC3028_FE_ZARLINK456,
1478 };
1479
363c35fc 1480 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST		 1481 &cfg);
1482 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1483 fe->ops.tuner_ops.set_config(fe, &ctl);
1484 }
96318d0c 1485 break;
0cf8af57 1486 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1487 i2c_bus = &dev->i2c_bus[0];
1488
1489 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1490 &dvico_fusionhdtv_xc3028,
1491 &i2c_bus->i2c_adap);
1492 if (fe0->dvb.frontend != NULL) {
1493 struct dvb_frontend *fe;
1494 struct xc4000_config cfg = {
1495 .i2c_address = 0x61,
1496 .default_pm = 0,
1497 .dvb_amplitude = 134,
1498 .set_smoothedcvbs = 1,
1499 .if_khz = 4560
1500 };
1501
1502 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1503 &dev->i2c_bus[1].i2c_adap, &cfg);
a7c8aada
MS		 1504 if (!fe) {
1505 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1506 dev->name);
1507 goto frontend_detach;
1508 }
0cf8af57 1509 }
1510 break;
96318d0c 1511 case CX23885_BOARD_TBS_6920:
09ea33e5 1512 i2c_bus = &dev->i2c_bus[1];
96318d0c
IL		 1513
1514 fe0->dvb.frontend = dvb_attach(cx24116_attach,
09ea33e5
IL		 1515 &tbs_cx24116_config,
1516 &i2c_bus->i2c_adap);
96318d0c 1517 if (fe0->dvb.frontend != NULL)
09ea33e5 1518 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
96318d0c 1519
579943f5 1520 break;
e6001482
LA		 1521 case CX23885_BOARD_TBS_6980:
1522 case CX23885_BOARD_TBS_6981:
1523 i2c_bus = &dev->i2c_bus[1];
1524
1525 switch (port->nr) {
1526 /* PORT B */
1527 case 1:
1528 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1529 &tbs_cx24117_config,
d10e8280 1530 &i2c_bus->i2c_adap);
e6001482
LA		 1531 break;
1532 /* PORT C */
1533 case 2:
e6001482
LA		 1534 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1535 &tbs_cx24117_config,
d10e8280 1536 &i2c_bus->i2c_adap);
e6001482
LA		 1537 break;
1538 }
1539 break;
579943f5
IL		 1540 case CX23885_BOARD_TEVII_S470:
1541 i2c_bus = &dev->i2c_bus[1];
1542
09ea33e5
IL		 1543 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1544 &tevii_ds3000_config,
1545 &i2c_bus->i2c_adap);
73f0af44
KD		 1546 if (fe0->dvb.frontend != NULL) {
1547 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1548 &tevii_ts2020_config, &i2c_bus->i2c_adap);
09ea33e5 1549 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
73f0af44 1550 }
579943f5 1551
4c56b04a 1552 break;
c9b8b04b
IL		 1553 case CX23885_BOARD_DVBWORLD_2005:
1554 i2c_bus = &dev->i2c_bus[1];
1555
1556 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1557 &dvbworld_cx24116_config,
1558 &i2c_bus->i2c_adap);
1559 break;
5a23b076
IL		 1560 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1561 i2c_bus = &dev->i2c_bus[0];
1562 switch (port->nr) {
1563 /* port B */
1564 case 1:
1565 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1566 &netup_stv0900_config,
1567 &i2c_bus->i2c_adap, 0);
1568 if (fe0->dvb.frontend != NULL) {
1569 if (dvb_attach(stv6110_attach,
1570 fe0->dvb.frontend,
1571 &netup_stv6110_tunerconfig_a,
1572 &i2c_bus->i2c_adap)) {
1573 if (!dvb_attach(lnbh24_attach,
1574 fe0->dvb.frontend,
1575 &i2c_bus->i2c_adap,
9329fb5b
AO		 1576 LNBH24_PCL | LNBH24_TTX,
1577 LNBH24_TEN, 0x09))
5a23b076
IL		 1578 printk(KERN_ERR
1579 "No LNBH24 found!\n");
1580
1581 }
1582 }
1583 break;
1584 /* port C */
1585 case 2:
1586 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1587 &netup_stv0900_config,
1588 &i2c_bus->i2c_adap, 1);
1589 if (fe0->dvb.frontend != NULL) {
1590 if (dvb_attach(stv6110_attach,
1591 fe0->dvb.frontend,
1592 &netup_stv6110_tunerconfig_b,
1593 &i2c_bus->i2c_adap)) {
1594 if (!dvb_attach(lnbh24_attach,
1595 fe0->dvb.frontend,
1596 &i2c_bus->i2c_adap,
9329fb5b
AO		 1597 LNBH24_PCL | LNBH24_TTX,
1598 LNBH24_TEN, 0x0a))
5a23b076
IL		 1599 printk(KERN_ERR
1600 "No LNBH24 found!\n");
1601
1602 }
1603 }
1604 break;
1605 }
1606 break;
493b7127
DW		 1607 case CX23885_BOARD_MYGICA_X8506:
1608 i2c_bus = &dev->i2c_bus[0];
1609 i2c_bus2 = &dev->i2c_bus[1];
1610 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1611 &mygica_x8506_lgs8gl5_config,
1612 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1613 if (fe0->dvb.frontend == NULL)
1614 break;
1615 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1616 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config);
15472faf 1617 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
493b7127 1618 break;
0d1b5265
MCC		 1619 case CX23885_BOARD_MYGICA_X8507:
1620 i2c_bus = &dev->i2c_bus[0];
1621 i2c_bus2 = &dev->i2c_bus[1];
1622 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1623 &mygica_x8507_mb86a20s_config,
1624 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1625 if (fe0->dvb.frontend == NULL)
1626 break;
1627
1628 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1629 &i2c_bus2->i2c_adap,
1630 &mygica_x8507_xc5000_config);
0d1b5265
MCC		 1631 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1632 break;
2365b2d3
DW		 1633 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1634 i2c_bus = &dev->i2c_bus[0];
1635 i2c_bus2 = &dev->i2c_bus[1];
1636 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1637 &magicpro_prohdtve2_lgs8g75_config,
1638 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1639 if (fe0->dvb.frontend == NULL)
1640 break;
1641 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1642 &i2c_bus2->i2c_adap,
1643 &magicpro_prohdtve2_xc5000_config);
15472faf 1644 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
2365b2d3 1645 break;
13697380 1646 case CX23885_BOARD_HAUPPAUGE_HVR1850:
35045137
ST		 1647 i2c_bus = &dev->i2c_bus[0];
1648 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1649 &hcw_s5h1411_config,
1650 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1651 if (fe0->dvb.frontend == NULL)
1652 break;
1653 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1654 0x60, &dev->i2c_bus[0].i2c_adap,
1655 &hauppauge_tda18271_config);
35045137
ST		 1656
1657 tda18271_attach(&dev->ts1.analog_fe,
1658 0x60, &dev->i2c_bus[1].i2c_adap,
1659 &hauppauge_tda18271_config);
1660
1661 break;
aee0b24c 1662 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 1663 i2c_bus = &dev->i2c_bus[0];
1664 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1665 &hcw_s5h1411_config,
1666 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1667 if (fe0->dvb.frontend == NULL)
1668 break;
1669 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1670 0x60, &dev->i2c_bus[0].i2c_adap,
1671 &hauppauge_tda18271_config);
13697380 1672 break;
ea5697fe
DW		 1673 case CX23885_BOARD_MYGICA_X8558PRO:
1674 switch (port->nr) {
1675 /* port B */
1676 case 1:
1677 i2c_bus = &dev->i2c_bus[0];
1678 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1679 &mygica_x8558pro_atbm8830_cfg1,
1680 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1681 if (fe0->dvb.frontend == NULL)
1682 break;
1683 dvb_attach(max2165_attach, fe0->dvb.frontend,
1684 &i2c_bus->i2c_adap,
1685 &mygic_x8558pro_max2165_cfg1);
ea5697fe
DW		 1686 break;
1687 /* port C */
1688 case 2:
1689 i2c_bus = &dev->i2c_bus[1];
1690 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1691 &mygica_x8558pro_atbm8830_cfg2,
1692 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1693 if (fe0->dvb.frontend == NULL)
1694 break;
1695 dvb_attach(max2165_attach, fe0->dvb.frontend,
1696 &i2c_bus->i2c_adap,
1697 &mygic_x8558pro_max2165_cfg2);
ea5697fe
DW		 1698 }
1699 break;
78db8547
IL		 1700 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1701 i2c_bus = &dev->i2c_bus[0];
1702 mfe_shared = 1;/* MFE */
1703 port->frontends.gate = 0;/* not clear for me yet */
1704 /* ports B, C */
1705 /* MFE frontend 1 DVB-T */
1706 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1707 &netup_stv0367_config[port->nr - 1],
1708 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1709 if (fe0->dvb.frontend == NULL)
1710 break;
1711 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend,
78db8547
IL		 1712 &i2c_bus->i2c_adap,
1713 &netup_xc5000_config[port->nr - 1]))
ed3da2bf
MCC		 1714 goto frontend_detach;
1715 /* load xc5000 firmware */
1716 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1717
78db8547 1718 /* MFE frontend 2 */
453afdd9 1719 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
78db8547
IL		 1720 if (fe1 == NULL)
1721 goto frontend_detach;
1722 /* DVB-C init */
1723 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1724 &netup_stv0367_config[port->nr - 1],
1725 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1726 if (fe1->dvb.frontend == NULL)
1727 break;
1728
1729 fe1->dvb.frontend->id = 1;
1730 if (NULL == dvb_attach(xc5000_attach,
1731 fe1->dvb.frontend,
1732 &i2c_bus->i2c_adap,
1733 &netup_xc5000_config[port->nr - 1]))
1734 goto frontend_detach;
78db8547 1735 break;
722c90eb
SR		 1736 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1737 i2c_bus = &dev->i2c_bus[0];
1738 i2c_bus2 = &dev->i2c_bus[1];
1739
1740 switch (port->nr) {
1741 /* port b */
1742 case 1:
1743 fe0->dvb.frontend = dvb_attach(drxk_attach,
1744 &terratec_drxk_config[0],
1745 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1746 if (fe0->dvb.frontend == NULL)
1747 break;
1748 if (!dvb_attach(mt2063_attach,
1749 fe0->dvb.frontend,
1750 &terratec_mt2063_config[0],
1751 &i2c_bus2->i2c_adap))
1752 goto frontend_detach;
722c90eb
SR		 1753 break;
1754 /* port c */
1755 case 2:
1756 fe0->dvb.frontend = dvb_attach(drxk_attach,
1757 &terratec_drxk_config[1],
1758 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1759 if (fe0->dvb.frontend == NULL)
1760 break;
1761 if (!dvb_attach(mt2063_attach,
1762 fe0->dvb.frontend,
1763 &terratec_mt2063_config[1],
1764 &i2c_bus2->i2c_adap))
1765 goto frontend_detach;
722c90eb
SR		 1766 break;
1767 }
1768 break;
7b134e85
IL		 1769 case CX23885_BOARD_TEVII_S471:
1770 i2c_bus = &dev->i2c_bus[1];
1771
1772 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1773 &tevii_ds3000_config,
1774 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1775 if (fe0->dvb.frontend == NULL)
1776 break;
1777 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1778 &tevii_ts2020_config, &i2c_bus->i2c_adap);
7b134e85 1779 break;
f667190b
MB		 1780 case CX23885_BOARD_PROF_8000:
1781 i2c_bus = &dev->i2c_bus[0];
1782
1783 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1784 &prof_8000_stv090x_config,
1785 &i2c_bus->i2c_adap,
1786 STV090x_DEMODULATOR_0);
ed3da2bf
MCC		 1787 if (fe0->dvb.frontend == NULL)
1788 break;
1789 if (!dvb_attach(stb6100_attach,
1790 fe0->dvb.frontend,
1791 &prof_8000_stb6100_config,
1792 &i2c_bus->i2c_adap))
1793 goto frontend_detach;
f667190b 1794
ed3da2bf 1795 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
f667190b 1796 break;
a4569507
AP		 1797 case CX23885_BOARD_HAUPPAUGE_HVR4400: {
1798 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1799 struct a8293_platform_data a8293_pdata = {};
1800
7c62f5a1 1801 i2c_bus = &dev->i2c_bus[0];
36efec48
MS		 1802 i2c_bus2 = &dev->i2c_bus[1];
1803 switch (port->nr) {
1804 /* port b */
1805 case 1:
a4569507
AP		 1806 /* attach demod + tuner combo */
1807 memset(&info, 0, sizeof(info));
1808 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1809 info.addr = 0x05;
1810 info.platform_data = &tda10071_pdata;
1811 request_module("tda10071");
1812 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1813 if (!client_demod || !client_demod->dev.driver)
ed3da2bf 1814 goto frontend_detach;
a4569507
AP		 1815 if (!try_module_get(client_demod->dev.driver->owner)) {
1816 i2c_unregister_device(client_demod);
1817 goto frontend_detach;
1818 }
1819 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1820 port->i2c_client_demod = client_demod;
1821
1822 /* attach SEC */
1823 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1824 memset(&info, 0, sizeof(info));
1825 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1826 info.addr = 0x0b;
1827 info.platform_data = &a8293_pdata;
1828 request_module("a8293");
1829 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1830 if (!client_sec || !client_sec->dev.driver)
1831 goto frontend_detach;
1832 if (!try_module_get(client_sec->dev.driver->owner)) {
1833 i2c_unregister_device(client_sec);
1834 goto frontend_detach;
1835 }
1836 port->i2c_client_sec = client_sec;
36efec48
MS		 1837 break;
1838 /* port c */
1839 case 2:
1840 fe0->dvb.frontend = dvb_attach(si2165_attach,
1841 &hauppauge_hvr4400_si2165_config,
1842 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1843 if (fe0->dvb.frontend == NULL)
1844 break;
1845 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1846 if (!dvb_attach(tda18271_attach,
1847 fe0->dvb.frontend,
1848 0x60, &i2c_bus2->i2c_adap,
1849 &hauppauge_hvr4400_tuner_config))
1850 goto frontend_detach;
36efec48 1851 break;
7c62f5a1
MK		 1852 }
1853 break;
a4569507 1854 }
49bf0e67
AP		 1855 case CX23885_BOARD_HAUPPAUGE_STARBURST: {
1856 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1857 struct a8293_platform_data a8293_pdata = {};
1858
721f3223 1859 i2c_bus = &dev->i2c_bus[0];
49bf0e67
AP		 1860
1861 /* attach demod + tuner combo */
1862 memset(&info, 0, sizeof(info));
1863 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1864 info.addr = 0x05;
1865 info.platform_data = &tda10071_pdata;
1866 request_module("tda10071");
1867 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1868 if (!client_demod || !client_demod->dev.driver)
1869 goto frontend_detach;
1870 if (!try_module_get(client_demod->dev.driver->owner)) {
1871 i2c_unregister_device(client_demod);
1872 goto frontend_detach;
721f3223 1873 }
49bf0e67
AP		 1874 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1875 port->i2c_client_demod = client_demod;
1876
1877 /* attach SEC */
1878 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1879 memset(&info, 0, sizeof(info));
1880 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1881 info.addr = 0x0b;
1882 info.platform_data = &a8293_pdata;
1883 request_module("a8293");
1884 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1885 if (!client_sec || !client_sec->dev.driver)
1886 goto frontend_detach;
1887 if (!try_module_get(client_sec->dev.driver->owner)) {
1888 i2c_unregister_device(client_sec);
1889 goto frontend_detach;
1890 }
1891 port->i2c_client_sec = client_sec;
721f3223 1892 break;
49bf0e67 1893 }
29442266 1894 case CX23885_BOARD_DVBSKY_T9580:
cba5480c 1895 case CX23885_BOARD_DVBSKY_S950:
29442266
OS		 1896 i2c_bus = &dev->i2c_bus[0];
1897 i2c_bus2 = &dev->i2c_bus[1];
1898 switch (port->nr) {
1899 /* port b - satellite */
1900 case 1:
1901 /* attach frontend */
1902 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1903 &dvbsky_t9580_m88ds3103_config,
1904 &i2c_bus2->i2c_adap, &adapter);
1905 if (fe0->dvb.frontend == NULL)
1906 break;
1907
1908 /* attach tuner */
d76e0878
AP		 1909 memset(&ts2020_config, 0, sizeof(ts2020_config));
1910 ts2020_config.fe = fe0->dvb.frontend;
0f91c9d6 1911 ts2020_config.get_agc_pwm = m88ds3103_get_agc_pwm;
29442266 1912 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 1913 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
29442266 1914 info.addr = 0x60;
d76e0878 1915 info.platform_data = &ts2020_config;
29442266
OS		 1916 request_module(info.type);
1917 client_tuner = i2c_new_device(adapter, &info);
1918 if (client_tuner == NULL ||
1919 client_tuner->dev.driver == NULL)
1920 goto frontend_detach;
1921 if (!try_module_get(client_tuner->dev.driver->owner)) {
1922 i2c_unregister_device(client_tuner);
1923 goto frontend_detach;
1924 }
1925
1926 /* delegate signal strength measurement to tuner */
1927 fe0->dvb.frontend->ops.read_signal_strength =
1928 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1929
1930 /*
1931 * for setting the voltage we need to set GPIOs on
1932 * the card.
1933 */
1934 port->fe_set_voltage =
1935 fe0->dvb.frontend->ops.set_voltage;
1936 fe0->dvb.frontend->ops.set_voltage =
1937 dvbsky_t9580_set_voltage;
1938
1939 port->i2c_client_tuner = client_tuner;
1940
1941 break;
1942 /* port c - terrestrial/cable */
1943 case 2:
1944 /* attach frontend */
143800a5 1945 memset(&si2168_config, 0, sizeof(si2168_config));
29442266
OS		 1946 si2168_config.i2c_adapter = &adapter;
1947 si2168_config.fe = &fe0->dvb.frontend;
1948 si2168_config.ts_mode = SI2168_TS_SERIAL;
1949 memset(&info, 0, sizeof(struct i2c_board_info));
1950 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1951 info.addr = 0x64;
1952 info.platform_data = &si2168_config;
1953 request_module(info.type);
1954 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1955 if (client_demod == NULL ||
1956 client_demod->dev.driver == NULL)
1957 goto frontend_detach;
1958 if (!try_module_get(client_demod->dev.driver->owner)) {
1959 i2c_unregister_device(client_demod);
1960 goto frontend_detach;
1961 }
1962 port->i2c_client_demod = client_demod;
1963
1964 /* attach tuner */
143800a5 1965 memset(&si2157_config, 0, sizeof(si2157_config));
29442266 1966 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 1967 si2157_config.if_port = 1;
29442266
OS		 1968 memset(&info, 0, sizeof(struct i2c_board_info));
1969 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1970 info.addr = 0x60;
1971 info.platform_data = &si2157_config;
1972 request_module(info.type);
1973 client_tuner = i2c_new_device(adapter, &info);
1974 if (client_tuner == NULL ||
2b0aac30 1975 client_tuner->dev.driver == NULL)
29442266 1976 goto frontend_detach;
2b0aac30 1977
29442266
OS		 1978 if (!try_module_get(client_tuner->dev.driver->owner)) {
1979 i2c_unregister_device(client_tuner);
29442266
OS		 1980 goto frontend_detach;
1981 }
1982 port->i2c_client_tuner = client_tuner;
1983 break;
1984 }
1985 break;
82c10276 1986 case CX23885_BOARD_DVBSKY_T980C:
61b103e8 1987 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276 1988 i2c_bus = &dev->i2c_bus[1];
24e77409 1989 i2c_bus2 = &dev->i2c_bus[0];
82c10276
OS		 1990
1991 /* attach frontend */
1992 memset(&si2168_config, 0, sizeof(si2168_config));
1993 si2168_config.i2c_adapter = &adapter;
1994 si2168_config.fe = &fe0->dvb.frontend;
1995 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1996 memset(&info, 0, sizeof(struct i2c_board_info));
1997 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1998 info.addr = 0x64;
1999 info.platform_data = &si2168_config;
2000 request_module(info.type);
2001 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 2002 if (client_demod == NULL || client_demod->dev.driver == NULL)
82c10276
OS		 2003 goto frontend_detach;
2004 if (!try_module_get(client_demod->dev.driver->owner)) {
2005 i2c_unregister_device(client_demod);
2006 goto frontend_detach;
2007 }
2008 port->i2c_client_demod = client_demod;
2009
2010 /* attach tuner */
2011 memset(&si2157_config, 0, sizeof(si2157_config));
2012 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2013 si2157_config.if_port = 1;
82c10276
OS		 2014 memset(&info, 0, sizeof(struct i2c_board_info));
2015 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2016 info.addr = 0x60;
2017 info.platform_data = &si2157_config;
2018 request_module(info.type);
2019 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC		 2020 if (client_tuner == NULL ||
2021 client_tuner->dev.driver == NULL)
82c10276 2022 goto frontend_detach;
82c10276
OS		 2023 if (!try_module_get(client_tuner->dev.driver->owner)) {
2024 i2c_unregister_device(client_tuner);
82c10276
OS		 2025 goto frontend_detach;
2026 }
0e6c7b01 2027 port->i2c_client_tuner = client_tuner;
2028 break;
2029 case CX23885_BOARD_DVBSKY_S950C:
2030 i2c_bus = &dev->i2c_bus[1];
2031 i2c_bus2 = &dev->i2c_bus[0];
2032
2033 /* attach frontend */
2034 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2035 &dvbsky_s950c_m88ds3103_config,
2036 &i2c_bus->i2c_adap, &adapter);
2037 if (fe0->dvb.frontend == NULL)
2038 break;
2039
2040 /* attach tuner */
d76e0878
AP		 2041 memset(&ts2020_config, 0, sizeof(ts2020_config));
2042 ts2020_config.fe = fe0->dvb.frontend;
0f91c9d6 2043 ts2020_config.get_agc_pwm = m88ds3103_get_agc_pwm;
0e6c7b01 2044 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2045 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
0e6c7b01 2046 info.addr = 0x60;
d76e0878 2047 info.platform_data = &ts2020_config;
0e6c7b01 2048 request_module(info.type);
2049 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2050 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
0e6c7b01 2051 goto frontend_detach;
2052 if (!try_module_get(client_tuner->dev.driver->owner)) {
2053 i2c_unregister_device(client_tuner);
2054 goto frontend_detach;
2055 }
2056
2057 /* delegate signal strength measurement to tuner */
2058 fe0->dvb.frontend->ops.read_signal_strength =
2059 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2060
c29d6a83 2061 port->i2c_client_tuner = client_tuner;
2062 break;
2063 case CX23885_BOARD_DVBSKY_S952:
2064 switch (port->nr) {
2065 /* port b */
2066 case 1:
2067 i2c_bus = &dev->i2c_bus[1];
2068 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config;
2069 p_set_voltage = dvbsky_t9580_set_voltage;
2070 break;
2071 /* port c */
2072 case 2:
2073 i2c_bus = &dev->i2c_bus[0];
2074 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config;
2075 p_set_voltage = dvbsky_s952_portc_set_voltage;
2076 break;
2077 }
2078
2079 /* attach frontend */
2080 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2081 p_m88ds3103_config,
2082 &i2c_bus->i2c_adap, &adapter);
2083 if (fe0->dvb.frontend == NULL)
2084 break;
2085
2086 /* attach tuner */
d76e0878
AP		 2087 memset(&ts2020_config, 0, sizeof(ts2020_config));
2088 ts2020_config.fe = fe0->dvb.frontend;
0f91c9d6 2089 ts2020_config.get_agc_pwm = m88ds3103_get_agc_pwm;
c29d6a83 2090 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2091 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
c29d6a83 2092 info.addr = 0x60;
d76e0878 2093 info.platform_data = &ts2020_config;
c29d6a83 2094 request_module(info.type);
2095 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2096 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
c29d6a83 2097 goto frontend_detach;
2098 if (!try_module_get(client_tuner->dev.driver->owner)) {
2099 i2c_unregister_device(client_tuner);
2100 goto frontend_detach;
2101 }
2102
2103 /* delegate signal strength measurement to tuner */
2104 fe0->dvb.frontend->ops.read_signal_strength =
2105 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2106
2107 /*
2108 * for setting the voltage we need to set GPIOs on
2109 * the card.
2110 */
2111 port->fe_set_voltage =
2112 fe0->dvb.frontend->ops.set_voltage;
2113 fe0->dvb.frontend->ops.set_voltage = p_set_voltage;
2114
c02ef64a
NM		 2115 port->i2c_client_tuner = client_tuner;
2116 break;
2117 case CX23885_BOARD_DVBSKY_T982:
2118 memset(&si2168_config, 0, sizeof(si2168_config));
2119 switch (port->nr) {
2120 /* port b */
2121 case 1:
2122 i2c_bus = &dev->i2c_bus[1];
2123 si2168_config.ts_mode = SI2168_TS_PARALLEL;
2124 break;
2125 /* port c */
2126 case 2:
2127 i2c_bus = &dev->i2c_bus[0];
2128 si2168_config.ts_mode = SI2168_TS_SERIAL;
2129 break;
2130 }
2131
2132 /* attach frontend */
2133 si2168_config.i2c_adapter = &adapter;
2134 si2168_config.fe = &fe0->dvb.frontend;
2135 memset(&info, 0, sizeof(struct i2c_board_info));
2136 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2137 info.addr = 0x64;
2138 info.platform_data = &si2168_config;
2139 request_module(info.type);
2140 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 2141 if (client_demod == NULL || client_demod->dev.driver == NULL)
c02ef64a
NM		 2142 goto frontend_detach;
2143 if (!try_module_get(client_demod->dev.driver->owner)) {
2144 i2c_unregister_device(client_demod);
2145 goto frontend_detach;
2146 }
2147 port->i2c_client_demod = client_demod;
2148
2149 /* attach tuner */
2150 memset(&si2157_config, 0, sizeof(si2157_config));
2151 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2152 si2157_config.if_port = 1;
c02ef64a
NM		 2153 memset(&info, 0, sizeof(struct i2c_board_info));
2154 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2155 info.addr = 0x60;
2156 info.platform_data = &si2157_config;
2157 request_module(info.type);
2158 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC		 2159 if (client_tuner == NULL ||
2160 client_tuner->dev.driver == NULL)
c02ef64a 2161 goto frontend_detach;
c02ef64a
NM		 2162 if (!try_module_get(client_tuner->dev.driver->owner)) {
2163 i2c_unregister_device(client_tuner);
c02ef64a
NM		 2164 goto frontend_detach;
2165 }
82c10276
OS		 2166 port->i2c_client_tuner = client_tuner;
2167 break;
1fc77d01
AP		 2168 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2169 switch (port->nr) {
2170 struct m88rs6000t_config m88rs6000t_config;
49b7cb5d 2171 struct a8293_platform_data a8293_pdata = {};
1fc77d01
AP		 2172
2173 /* port b - satellite */
2174 case 1:
2175 /* attach frontend */
2176 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2177 &hauppauge_hvr5525_m88ds3103_config,
2178 &dev->i2c_bus[0].i2c_adap, &adapter);
2179 if (fe0->dvb.frontend == NULL)
2180 break;
2181
2182 /* attach SEC */
49b7cb5d
AP		 2183 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
2184 memset(&info, 0, sizeof(info));
2185 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
2186 info.addr = 0x0b;
2187 info.platform_data = &a8293_pdata;
2188 request_module("a8293");
2189 client_sec = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2190 if (!client_sec || !client_sec->dev.driver)
1fc77d01 2191 goto frontend_detach;
49b7cb5d
AP		 2192 if (!try_module_get(client_sec->dev.driver->owner)) {
2193 i2c_unregister_device(client_sec);
2194 goto frontend_detach;
2195 }
2196 port->i2c_client_sec = client_sec;
1fc77d01
AP		 2197
2198 /* attach tuner */
2199 memset(&m88rs6000t_config, 0, sizeof(m88rs6000t_config));
2200 m88rs6000t_config.fe = fe0->dvb.frontend;
2201 memset(&info, 0, sizeof(struct i2c_board_info));
2202 strlcpy(info.type, "m88rs6000t", I2C_NAME_SIZE);
2203 info.addr = 0x21;
2204 info.platform_data = &m88rs6000t_config;
2205 request_module("%s", info.type);
2206 client_tuner = i2c_new_device(adapter, &info);
2207 if (!client_tuner || !client_tuner->dev.driver)
2208 goto frontend_detach;
2209 if (!try_module_get(client_tuner->dev.driver->owner)) {
2210 i2c_unregister_device(client_tuner);
2211 goto frontend_detach;
2212 }
2213 port->i2c_client_tuner = client_tuner;
2214
2215 /* delegate signal strength measurement to tuner */
2216 fe0->dvb.frontend->ops.read_signal_strength =
2217 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2218 break;
2219 /* port c - terrestrial/cable */
2220 case 2:
2221 /* attach frontend */
2222 memset(&si2168_config, 0, sizeof(si2168_config));
2223 si2168_config.i2c_adapter = &adapter;
2224 si2168_config.fe = &fe0->dvb.frontend;
2225 si2168_config.ts_mode = SI2168_TS_SERIAL;
2226 memset(&info, 0, sizeof(struct i2c_board_info));
2227 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2228 info.addr = 0x64;
2229 info.platform_data = &si2168_config;
2230 request_module("%s", info.type);
2231 client_demod = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2232 if (!client_demod || !client_demod->dev.driver)
2233 goto frontend_detach;
2234 if (!try_module_get(client_demod->dev.driver->owner)) {
2235 i2c_unregister_device(client_demod);
2236 goto frontend_detach;
2237 }
2238 port->i2c_client_demod = client_demod;
2239
2240 /* attach tuner */
2241 memset(&si2157_config, 0, sizeof(si2157_config));
2242 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2243 si2157_config.if_port = 1;
1fc77d01
AP		 2244 memset(&info, 0, sizeof(struct i2c_board_info));
2245 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2246 info.addr = 0x60;
2247 info.platform_data = &si2157_config;
2248 request_module("%s", info.type);
2249 client_tuner = i2c_new_device(&dev->i2c_bus[1].i2c_adap, &info);
2250 if (!client_tuner || !client_tuner->dev.driver) {
2251 module_put(client_demod->dev.driver->owner);
2252 i2c_unregister_device(client_demod);
2253 port->i2c_client_demod = NULL;
2254 goto frontend_detach;
2255 }
2256 if (!try_module_get(client_tuner->dev.driver->owner)) {
2257 i2c_unregister_device(client_tuner);
2258 module_put(client_demod->dev.driver->owner);
2259 i2c_unregister_device(client_demod);
2260 port->i2c_client_demod = NULL;
2261 goto frontend_detach;
2262 }
2263 port->i2c_client_tuner = client_tuner;
2264 break;
2265 }
2266 break;
d19770e5 2267 default:
9c8ced51
ST		 2268 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
2269 " isn't supported yet\n",
d19770e5
ST		 2270 dev->name);
2271 break;
2272 }
78db8547
IL		 2273
2274 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
9c8ced51 2275 printk(KERN_ERR "%s: frontend initialization failed\n",
78db8547
IL		 2276 dev->name);
2277 goto frontend_detach;
d19770e5 2278 }
78db8547 2279
d7cba043 2280 /* define general-purpose callback pointer */
363c35fc 2281 fe0->dvb.frontend->callback = cx23885_tuner_callback;
78db8547
IL		 2282 if (fe1)
2283 fe1->dvb.frontend->callback = cx23885_tuner_callback;
2284#if 0
2285 /* Ensure all frontends negotiate bus access */
2286 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2287 if (fe1)
2288 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2289#endif
d19770e5
ST		 2290
2291 /* Put the analog decoder in standby to keep it quiet */
622b828a 2292 call_all(dev, core, s_power, 0);
d19770e5 2293
363c35fc
ST		 2294 if (fe0->dvb.frontend->ops.analog_ops.standby)
2295 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 2296
d19770e5 2297 /* register everything */
453afdd9 2298 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
9adf6132 2299 &dev->pci->dev, adapter_nr, mfe_shared);
bee30192 2300 if (ret)
78db8547 2301 goto frontend_detach;
363c35fc 2302
2b0aac30
MCC		 2303 ret = dvb_register_ci_mac(port);
2304 if (ret)
2305 goto frontend_detach;
24e77409 2306
2b0aac30 2307 return 0;
82c10276 2308
2b0aac30 2309frontend_detach:
bf5e3ef0
AP		 2310 /* remove I2C client for SEC */
2311 client_sec = port->i2c_client_sec;
2312 if (client_sec) {
2313 module_put(client_sec->dev.driver->owner);
2314 i2c_unregister_device(client_sec);
2315 port->i2c_client_sec = NULL;
2316 }
2317
2b0aac30
MCC		 2318 /* remove I2C client for tuner */
2319 client_tuner = port->i2c_client_tuner;
2320 if (client_tuner) {
2321 module_put(client_tuner->dev.driver->owner);
2322 i2c_unregister_device(client_tuner);
2323 port->i2c_client_tuner = NULL;
5a23b076
IL		 2324 }
2325
2b0aac30
MCC		 2326 /* remove I2C client for demodulator */
2327 client_demod = port->i2c_client_demod;
2328 if (client_demod) {
2329 module_put(client_demod->dev.driver->owner);
2330 i2c_unregister_device(client_demod);
2331 port->i2c_client_demod = NULL;
2332 }
78db8547 2333
78db8547 2334 port->gate_ctrl = NULL;
453afdd9 2335 vb2_dvb_dealloc_frontends(&port->frontends);
78db8547 2336 return -EINVAL;
d19770e5
ST		 2337}
2338
2339int cx23885_dvb_register(struct cx23885_tsport *port)
2340{
363c35fc 2341
453afdd9 2342 struct vb2_dvb_frontend *fe0;
d19770e5 2343 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST		 2344 int err, i;
2345
2346 /* Here we need to allocate the correct number of frontends,
af901ca1 2347 * as reflected in the cards struct. The reality is that currently
eb0c58bb
ST		 2348 * no cx23885 boards support this - yet. But, if we don't modify this
2349 * code then the second frontend would never be allocated (later)
2350 * and fail with error before the attach in dvb_register().
2351 * Without these changes we risk an OOPS later. The changes here
2352 * are for safety, and should provide a good foundation for the
2353 * future addition of any multi-frontend cx23885 based boards.
2354 */
2355 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2356 port->num_frontends);
d19770e5 2357
eb0c58bb 2358 for (i = 1; i <= port->num_frontends; i++) {
453afdd9
HV		 2359 struct vb2_queue *q;
2360
2361 if (vb2_dvb_alloc_frontend(
9c8ced51 2362 &port->frontends, i) == NULL) {
eb0c58bb
ST		 2363 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2364 return -ENOMEM;
2365 }
2366
453afdd9 2367 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
eb0c58bb 2368 if (!fe0)
ed3da2bf 2369 return -EINVAL;
363c35fc 2370
eb0c58bb 2371 dprintk(1, "%s\n", __func__);
9c8ced51 2372 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST		 2373 dev->board,
2374 dev->name,
2375 dev->pci_bus,
2376 dev->pci_slot);
d19770e5 2377
eb0c58bb 2378 err = -ENODEV;
d19770e5 2379
eb0c58bb
ST		 2380 /* dvb stuff */
2381 /* We have to init the queue for each frontend on a port. */
9c8ced51 2382 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
453afdd9
HV		 2383 q = &fe0->dvb.dvbq;
2384 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2385 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2386 q->gfp_flags = GFP_DMA32;
2387 q->min_buffers_needed = 2;
2388 q->drv_priv = port;
2389 q->buf_struct_size = sizeof(struct cx23885_buffer);
2390 q->ops = &dvb_qops;
2391 q->mem_ops = &vb2_dma_sg_memops;
2392 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2393 q->lock = &dev->lock;
2394
2395 err = vb2_queue_init(q);
2396 if (err < 0)
2397 return err;
eb0c58bb 2398 }
d19770e5
ST		 2399 err = dvb_register(port);
2400 if (err != 0)
9c8ced51
ST		 2401 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2402 __func__, err);
d19770e5 2403
d19770e5
ST		 2404 return err;
2405}
2406
2407int cx23885_dvb_unregister(struct cx23885_tsport *port)
2408{
453afdd9 2409 struct vb2_dvb_frontend *fe0;
b0b12e63
OS		 2410 struct i2c_client *client;
2411
e450de45
OS		 2412 /* remove I2C client for CI */
2413 client = port->i2c_client_ci;
2414 if (client) {
2415 module_put(client->dev.driver->owner);
2416 i2c_unregister_device(client);
2417 }
2418
bf5e3ef0
AP		 2419 /* remove I2C client for SEC */
2420 client = port->i2c_client_sec;
2421 if (client) {
2422 module_put(client->dev.driver->owner);
2423 i2c_unregister_device(client);
2424 }
2425
b0b12e63
OS		 2426 /* remove I2C client for tuner */
2427 client = port->i2c_client_tuner;
2428 if (client) {
2429 module_put(client->dev.driver->owner);
2430 i2c_unregister_device(client);
2431 }
2432
2433 /* remove I2C client for demodulator */
2434 client = port->i2c_client_demod;
2435 if (client) {
2436 module_put(client->dev.driver->owner);
2437 i2c_unregister_device(client);
2438 }
363c35fc 2439
453afdd9 2440 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
b0b12e63 2441
e66131ce 2442 if (fe0 && fe0->dvb.frontend)
453afdd9 2443 vb2_dvb_unregister_bus(&port->frontends);
d19770e5 2444
afd96668
HV		 2445 switch (port->dev->board) {
2446 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2447 netup_ci_exit(port);
2448 break;
78db8547
IL		 2449 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2450 altera_ci_release(port->dev, port->nr);
2451 break;
afd96668 2452 }
5a23b076 2453
78db8547
IL		 2454 port->gate_ctrl = NULL;
2455
d19770e5
ST		 2456 return 0;
2457}
Linux 6.x block layer and io_uring tree(s)