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media: cx23885: Enable new Hauppauge PCIe ImpactVCBe variant
[linux-2.6-block.git] / drivers / media / pci / cx23885 / cx23885-cards.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST		 16 */
17
e39682b5
MCC		 18#include "cx23885.h"
19
d19770e5
ST		 20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/pci.h>
23#include <linux/delay.h>
d647f0b7 24#include <media/drv-intf/cx25840.h>
78db8547 25#include <linux/firmware.h>
cff4fa84 26#include <misc/altera.h>
d19770e5 27
90a71b1c 28#include "tuner-xc2028.h"
b8f0d306 29#include "netup-eeprom.h"
5a23b076 30#include "netup-init.h"
78db8547 31#include "altera-ci.h"
0cf8af57 32#include "xc4000.h"
78db8547 33#include "xc5000.h"
29f8a0a5 34#include "cx23888-ir.h"
d19770e5 35
89343055 36static unsigned int netup_card_rev = 4;
2d12421d
AO		 37module_param(netup_card_rev, int, 0644);
38MODULE_PARM_DESC(netup_card_rev,
39 "NetUP Dual DVB-T/C CI card revision");
fa647f24
AW		 40static unsigned int enable_885_ir;
41module_param(enable_885_ir, int, 0644);
42MODULE_PARM_DESC(enable_885_ir,
43 "Enable integrated IR controller for supported\n"
44 "\t\t CX2388[57] boards that are wired for it:\n"
45 "\t\t\tHVR-1250 (reported safe)\n"
076f0e35 46 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
fa647f24
AW		 47 "\t\t\tTeVii S470 (reported unsafe)\n"
48 "\t\t This can cause an interrupt storm with some cards.\n"
49 "\t\t Default: 0 [Disabled]");
50
d19770e5
ST		 51/* ------------------------------------------------------------------ */
52/* board config info */
53
54struct cx23885_board cx23885_boards[] = {
55 [CX23885_BOARD_UNKNOWN] = {
56 .name = "UNKNOWN/GENERIC",
c7712613
ST		 57 /* Ensure safe default for unknown boards */
58 .clk_freq = 0,
d19770e5
ST		 59 .input = {{
60 .type = CX23885_VMUX_COMPOSITE1,
61 .vmux = 0,
9c8ced51 62 }, {
d19770e5
ST		 63 .type = CX23885_VMUX_COMPOSITE2,
64 .vmux = 1,
9c8ced51 65 }, {
d19770e5
ST		 66 .type = CX23885_VMUX_COMPOSITE3,
67 .vmux = 2,
9c8ced51 68 }, {
d19770e5
ST		 69 .type = CX23885_VMUX_COMPOSITE4,
70 .vmux = 3,
9c8ced51 71 } },
d19770e5
ST		 72 },
73 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
74 .name = "Hauppauge WinTV-HVR1800lp",
d19770e5
ST		 75 .portc = CX23885_MPEG_DVB,
76 .input = {{
77 .type = CX23885_VMUX_TELEVISION,
78 .vmux = 0,
79 .gpio0 = 0xff00,
9c8ced51 80 }, {
d19770e5
ST		 81 .type = CX23885_VMUX_DEBUG,
82 .vmux = 0,
83 .gpio0 = 0xff01,
9c8ced51 84 }, {
d19770e5
ST		 85 .type = CX23885_VMUX_COMPOSITE1,
86 .vmux = 1,
87 .gpio0 = 0xff02,
9c8ced51 88 }, {
d19770e5
ST		 89 .type = CX23885_VMUX_SVIDEO,
90 .vmux = 2,
91 .gpio0 = 0xff02,
9c8ced51 92 } },
d19770e5
ST		 93 },
94 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
95 .name = "Hauppauge WinTV-HVR1800",
7b888014 96 .porta = CX23885_ANALOG_VIDEO,
a589b665 97 .portb = CX23885_MPEG_ENCODER,
d19770e5 98 .portc = CX23885_MPEG_DVB,
7b888014
ST		 99 .tuner_type = TUNER_PHILIPS_TDA8290,
100 .tuner_addr = 0x42, /* 0x84 >> 1 */
557f48d5 101 .tuner_bus = 1,
d19770e5
ST		 102 .input = {{
103 .type = CX23885_VMUX_TELEVISION,
7b888014
ST		 104 .vmux = CX25840_VIN7_CH3 |
105 CX25840_VIN5_CH2 |
106 CX25840_VIN2_CH1,
33cdeb35 107 .amux = CX25840_AUDIO8,
7b888014 108 .gpio0 = 0,
9c8ced51 109 }, {
d19770e5 110 .type = CX23885_VMUX_COMPOSITE1,
7b888014
ST		 111 .vmux = CX25840_VIN7_CH3 |
112 CX25840_VIN4_CH2 |
113 CX25840_VIN6_CH1,
33cdeb35 114 .amux = CX25840_AUDIO7,
7b888014 115 .gpio0 = 0,
9c8ced51 116 }, {
d19770e5 117 .type = CX23885_VMUX_SVIDEO,
7b888014
ST		 118 .vmux = CX25840_VIN7_CH3 |
119 CX25840_VIN4_CH2 |
120 CX25840_VIN8_CH1 |
121 CX25840_SVIDEO_ON,
33cdeb35 122 .amux = CX25840_AUDIO7,
7b888014 123 .gpio0 = 0,
9c8ced51 124 } },
d19770e5 125 },
a77743bc
ST		 126 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
127 .name = "Hauppauge WinTV-HVR1250",
d214ddc8 128 .porta = CX23885_ANALOG_VIDEO,
a77743bc 129 .portc = CX23885_MPEG_DVB,
d214ddc8
DH		 130#ifdef MT2131_NO_ANALOG_SUPPORT_YET
131 .tuner_type = TUNER_PHILIPS_TDA8290,
132 .tuner_addr = 0x42, /* 0x84 >> 1 */
133 .tuner_bus = 1,
134#endif
135 .force_bff = 1,
a77743bc 136 .input = {{
d214ddc8 137#ifdef MT2131_NO_ANALOG_SUPPORT_YET
a77743bc 138 .type = CX23885_VMUX_TELEVISION,
d214ddc8
DH		 139 .vmux = CX25840_VIN7_CH3 |
140 CX25840_VIN5_CH2 |
141 CX25840_VIN2_CH1,
142 .amux = CX25840_AUDIO8,
a77743bc 143 .gpio0 = 0xff00,
9c8ced51 144 }, {
d214ddc8 145#endif
a77743bc 146 .type = CX23885_VMUX_COMPOSITE1,
d214ddc8
DH		 147 .vmux = CX25840_VIN7_CH3 |
148 CX25840_VIN4_CH2 |
149 CX25840_VIN6_CH1,
150 .amux = CX25840_AUDIO7,
a77743bc 151 .gpio0 = 0xff02,
9c8ced51 152 }, {
a77743bc 153 .type = CX23885_VMUX_SVIDEO,
d214ddc8
DH		 154 .vmux = CX25840_VIN7_CH3 |
155 CX25840_VIN4_CH2 |
156 CX25840_VIN8_CH1 |
157 CX25840_SVIDEO_ON,
158 .amux = CX25840_AUDIO7,
a77743bc 159 .gpio0 = 0xff02,
9c8ced51 160 } },
a77743bc 161 },
9bc37caa
MK		 162 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
163 .name = "DViCO FusionHDTV5 Express",
a6a3f140 164 .portb = CX23885_MPEG_DVB,
9bc37caa 165 },
d1987d55
ST		 166 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
167 .name = "Hauppauge WinTV-HVR1500Q",
168 .portc = CX23885_MPEG_DVB,
169 },
07b4a835
MK		 170 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
171 .name = "Hauppauge WinTV-HVR1500",
18d64476 172 .porta = CX23885_ANALOG_VIDEO,
07b4a835 173 .portc = CX23885_MPEG_DVB,
18d64476
MM		 174 .tuner_type = TUNER_XC2028,
175 .tuner_addr = 0x61, /* 0xc2 >> 1 */
176 .input = {{
177 .type = CX23885_VMUX_TELEVISION,
178 .vmux = CX25840_VIN7_CH3 |
179 CX25840_VIN5_CH2 |
180 CX25840_VIN2_CH1,
181 .gpio0 = 0,
182 }, {
183 .type = CX23885_VMUX_COMPOSITE1,
184 .vmux = CX25840_VIN7_CH3 |
185 CX25840_VIN4_CH2 |
186 CX25840_VIN6_CH1,
187 .gpio0 = 0,
188 }, {
189 .type = CX23885_VMUX_SVIDEO,
190 .vmux = CX25840_VIN7_CH3 |
191 CX25840_VIN4_CH2 |
192 CX25840_VIN8_CH1 |
193 CX25840_SVIDEO_ON,
194 .gpio0 = 0,
195 } },
07b4a835 196 },
b3ea0166
ST		 197 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
198 .name = "Hauppauge WinTV-HVR1200",
199 .portc = CX23885_MPEG_DVB,
200 },
a780a31c
ST		 201 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
202 .name = "Hauppauge WinTV-HVR1700",
203 .portc = CX23885_MPEG_DVB,
204 },
66762373
ST		 205 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
206 .name = "Hauppauge WinTV-HVR1400",
207 .portc = CX23885_MPEG_DVB,
208 },
335377b7
MK		 209 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
210 .name = "DViCO FusionHDTV7 Dual Express",
aaadeac8 211 .portb = CX23885_MPEG_DVB,
335377b7
MK		 212 .portc = CX23885_MPEG_DVB,
213 },
aef2d186
ST		 214 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
215 .name = "DViCO FusionHDTV DVB-T Dual Express",
216 .portb = CX23885_MPEG_DVB,
217 .portc = CX23885_MPEG_DVB,
218 },
4c56b04a
ST		 219 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
220 .name = "Leadtek Winfast PxDVR3200 H",
221 .portc = CX23885_MPEG_DVB,
222 },
642ca1a0
AE		 223 [CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200] = {
224 .name = "Leadtek Winfast PxPVR2200",
225 .porta = CX23885_ANALOG_VIDEO,
226 .tuner_type = TUNER_XC2028,
227 .tuner_addr = 0x61,
228 .tuner_bus = 1,
229 .input = {{
230 .type = CX23885_VMUX_TELEVISION,
231 .vmux = CX25840_VIN2_CH1 |
232 CX25840_VIN5_CH2,
233 .amux = CX25840_AUDIO8,
234 .gpio0 = 0x704040,
235 }, {
236 .type = CX23885_VMUX_COMPOSITE1,
237 .vmux = CX25840_COMPOSITE1,
238 .amux = CX25840_AUDIO7,
239 .gpio0 = 0x704040,
240 }, {
241 .type = CX23885_VMUX_SVIDEO,
242 .vmux = CX25840_SVIDEO_LUMA3 |
243 CX25840_SVIDEO_CHROMA4,
244 .amux = CX25840_AUDIO7,
245 .gpio0 = 0x704040,
246 }, {
247 .type = CX23885_VMUX_COMPONENT,
248 .vmux = CX25840_VIN7_CH1 |
249 CX25840_VIN6_CH2 |
250 CX25840_VIN8_CH3 |
251 CX25840_COMPONENT_ON,
252 .amux = CX25840_AUDIO7,
253 .gpio0 = 0x704040,
254 } },
255 },
0cf8af57 256 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
257 .name = "Leadtek Winfast PxDVR3200 H XC4000",
258 .porta = CX23885_ANALOG_VIDEO,
259 .portc = CX23885_MPEG_DVB,
260 .tuner_type = TUNER_XC4000,
261 .tuner_addr = 0x61,
9ee8537f
MS		 262 .radio_type = UNSET,
263 .radio_addr = ADDR_UNSET,
0cf8af57 264 .input = {{
265 .type = CX23885_VMUX_TELEVISION,
266 .vmux = CX25840_VIN2_CH1 |
267 CX25840_VIN5_CH2 |
268 CX25840_NONE0_CH3,
269 }, {
270 .type = CX23885_VMUX_COMPOSITE1,
271 .vmux = CX25840_COMPOSITE1,
272 }, {
273 .type = CX23885_VMUX_SVIDEO,
274 .vmux = CX25840_SVIDEO_LUMA3 |
275 CX25840_SVIDEO_CHROMA4,
276 }, {
277 .type = CX23885_VMUX_COMPONENT,
278 .vmux = CX25840_VIN7_CH1 |
279 CX25840_VIN6_CH2 |
280 CX25840_VIN8_CH3 |
281 CX25840_COMPONENT_ON,
282 } },
283 },
9bb1b7e8
IL		 284 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
285 .name = "Compro VideoMate E650F",
286 .portc = CX23885_MPEG_DVB,
287 },
96318d0c
IL		 288 [CX23885_BOARD_TBS_6920] = {
289 .name = "TurboSight TBS 6920",
290 .portb = CX23885_MPEG_DVB,
291 },
e6001482
LA		 292 [CX23885_BOARD_TBS_6980] = {
293 .name = "TurboSight TBS 6980",
294 .portb = CX23885_MPEG_DVB,
295 .portc = CX23885_MPEG_DVB,
296 },
297 [CX23885_BOARD_TBS_6981] = {
298 .name = "TurboSight TBS 6981",
299 .portb = CX23885_MPEG_DVB,
300 .portc = CX23885_MPEG_DVB,
301 },
579943f5
IL		 302 [CX23885_BOARD_TEVII_S470] = {
303 .name = "TeVii S470",
304 .portb = CX23885_MPEG_DVB,
305 },
c9b8b04b
IL		 306 [CX23885_BOARD_DVBWORLD_2005] = {
307 .name = "DVBWorld DVB-S2 2005",
308 .portb = CX23885_MPEG_DVB,
309 },
5a23b076 310 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
78db8547 311 .ci_type = 1,
5a23b076
IL		 312 .name = "NetUP Dual DVB-S2 CI",
313 .portb = CX23885_MPEG_DVB,
314 .portc = CX23885_MPEG_DVB,
315 },
2074dffa
ST		 316 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
317 .name = "Hauppauge WinTV-HVR1270",
a5dbf457 318 .portc = CX23885_MPEG_DVB,
2074dffa 319 },
d099becb
MK		 320 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
321 .name = "Hauppauge WinTV-HVR1275",
322 .portc = CX23885_MPEG_DVB,
323 },
19bc5796
MK		 324 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
325 .name = "Hauppauge WinTV-HVR1255",
0ac60acb 326 .porta = CX23885_ANALOG_VIDEO,
19bc5796 327 .portc = CX23885_MPEG_DVB,
0ac60acb
DH		 328 .tuner_type = TUNER_ABSENT,
329 .tuner_addr = 0x42, /* 0x84 >> 1 */
330 .force_bff = 1,
331 .input = {{
332 .type = CX23885_VMUX_TELEVISION,
333 .vmux = CX25840_VIN7_CH3 |
334 CX25840_VIN5_CH2 |
335 CX25840_VIN2_CH1 |
336 CX25840_DIF_ON,
337 .amux = CX25840_AUDIO8,
338 }, {
339 .type = CX23885_VMUX_COMPOSITE1,
340 .vmux = CX25840_VIN7_CH3 |
341 CX25840_VIN4_CH2 |
342 CX25840_VIN6_CH1,
343 .amux = CX25840_AUDIO7,
344 }, {
345 .type = CX23885_VMUX_SVIDEO,
346 .vmux = CX25840_VIN7_CH3 |
347 CX25840_VIN4_CH2 |
348 CX25840_VIN8_CH1 |
349 CX25840_SVIDEO_ON,
350 .amux = CX25840_AUDIO7,
351 } },
352 },
353 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
354 .name = "Hauppauge WinTV-HVR1255",
355 .porta = CX23885_ANALOG_VIDEO,
356 .portc = CX23885_MPEG_DVB,
357 .tuner_type = TUNER_ABSENT,
358 .tuner_addr = 0x42, /* 0x84 >> 1 */
359 .force_bff = 1,
360 .input = {{
361 .type = CX23885_VMUX_TELEVISION,
362 .vmux = CX25840_VIN7_CH3 |
363 CX25840_VIN5_CH2 |
364 CX25840_VIN2_CH1 |
365 CX25840_DIF_ON,
366 .amux = CX25840_AUDIO8,
367 }, {
368 .type = CX23885_VMUX_SVIDEO,
369 .vmux = CX25840_VIN7_CH3 |
370 CX25840_VIN4_CH2 |
371 CX25840_VIN8_CH1 |
372 CX25840_SVIDEO_ON,
373 .amux = CX25840_AUDIO7,
374 } },
19bc5796 375 },
6b926eca
MK		 376 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
377 .name = "Hauppauge WinTV-HVR1210",
378 .portc = CX23885_MPEG_DVB,
379 },
493b7127
DW		 380 [CX23885_BOARD_MYGICA_X8506] = {
381 .name = "Mygica X8506 DMB-TH",
6f0d8c02
DW		 382 .tuner_type = TUNER_XC5000,
383 .tuner_addr = 0x61,
557f48d5 384 .tuner_bus = 1,
bc1548ad 385 .porta = CX23885_ANALOG_VIDEO,
493b7127 386 .portb = CX23885_MPEG_DVB,
bc1548ad 387 .input = {
6f0d8c02
DW		 388 {
389 .type = CX23885_VMUX_TELEVISION,
390 .vmux = CX25840_COMPOSITE2,
391 },
bc1548ad
DW		 392 {
393 .type = CX23885_VMUX_COMPOSITE1,
394 .vmux = CX25840_COMPOSITE8,
395 },
396 {
397 .type = CX23885_VMUX_SVIDEO,
398 .vmux = CX25840_SVIDEO_LUMA3 |
399 CX25840_SVIDEO_CHROMA4,
400 },
401 {
402 .type = CX23885_VMUX_COMPONENT,
403 .vmux = CX25840_COMPONENT_ON |
404 CX25840_VIN1_CH1 |
405 CX25840_VIN6_CH2 |
406 CX25840_VIN7_CH3,
407 },
408 },
493b7127 409 },
2365b2d3
DW		 410 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
411 .name = "Magic-Pro ProHDTV Extreme 2",
6f0d8c02
DW		 412 .tuner_type = TUNER_XC5000,
413 .tuner_addr = 0x61,
557f48d5 414 .tuner_bus = 1,
bc1548ad 415 .porta = CX23885_ANALOG_VIDEO,
2365b2d3 416 .portb = CX23885_MPEG_DVB,
bc1548ad 417 .input = {
6f0d8c02
DW		 418 {
419 .type = CX23885_VMUX_TELEVISION,
420 .vmux = CX25840_COMPOSITE2,
421 },
bc1548ad
DW		 422 {
423 .type = CX23885_VMUX_COMPOSITE1,
424 .vmux = CX25840_COMPOSITE8,
425 },
426 {
427 .type = CX23885_VMUX_SVIDEO,
428 .vmux = CX25840_SVIDEO_LUMA3 |
429 CX25840_SVIDEO_CHROMA4,
430 },
431 {
432 .type = CX23885_VMUX_COMPONENT,
433 .vmux = CX25840_COMPONENT_ON |
434 CX25840_VIN1_CH1 |
435 CX25840_VIN6_CH2 |
436 CX25840_VIN7_CH3,
437 },
438 },
2365b2d3 439 },
13697380
ST		 440 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
441 .name = "Hauppauge WinTV-HVR1850",
35045137 442 .porta = CX23885_ANALOG_VIDEO,
13697380
ST		 443 .portb = CX23885_MPEG_ENCODER,
444 .portc = CX23885_MPEG_DVB,
35045137
ST		 445 .tuner_type = TUNER_ABSENT,
446 .tuner_addr = 0x42, /* 0x84 >> 1 */
447 .force_bff = 1,
448 .input = {{
449 .type = CX23885_VMUX_TELEVISION,
450 .vmux = CX25840_VIN7_CH3 |
451 CX25840_VIN5_CH2 |
452 CX25840_VIN2_CH1 |
453 CX25840_DIF_ON,
454 .amux = CX25840_AUDIO8,
455 }, {
456 .type = CX23885_VMUX_COMPOSITE1,
457 .vmux = CX25840_VIN7_CH3 |
458 CX25840_VIN4_CH2 |
459 CX25840_VIN6_CH1,
460 .amux = CX25840_AUDIO7,
461 }, {
462 .type = CX23885_VMUX_SVIDEO,
463 .vmux = CX25840_VIN7_CH3 |
464 CX25840_VIN4_CH2 |
465 CX25840_VIN8_CH1 |
466 CX25840_SVIDEO_ON,
467 .amux = CX25840_AUDIO7,
468 } },
13697380 469 },
34e383dd
VG		 470 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
471 .name = "Compro VideoMate E800",
472 .portc = CX23885_MPEG_DVB,
473 },
aee0b24c
MK		 474 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
475 .name = "Hauppauge WinTV-HVR1290",
476 .portc = CX23885_MPEG_DVB,
477 },
ea5697fe
DW		 478 [CX23885_BOARD_MYGICA_X8558PRO] = {
479 .name = "Mygica X8558 PRO DMB-TH",
480 .portb = CX23885_MPEG_DVB,
481 .portc = CX23885_MPEG_DVB,
482 },
0b32d65c
KK		 483 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
484 .name = "LEADTEK WinFast PxTV1200",
485 .porta = CX23885_ANALOG_VIDEO,
486 .tuner_type = TUNER_XC2028,
487 .tuner_addr = 0x61,
557f48d5 488 .tuner_bus = 1,
0b32d65c
KK		 489 .input = {{
490 .type = CX23885_VMUX_TELEVISION,
491 .vmux = CX25840_VIN2_CH1 |
492 CX25840_VIN5_CH2 |
493 CX25840_NONE0_CH3,
494 }, {
495 .type = CX23885_VMUX_COMPOSITE1,
496 .vmux = CX25840_COMPOSITE1,
497 }, {
498 .type = CX23885_VMUX_SVIDEO,
499 .vmux = CX25840_SVIDEO_LUMA3 |
500 CX25840_SVIDEO_CHROMA4,
501 }, {
502 .type = CX23885_VMUX_COMPONENT,
503 .vmux = CX25840_VIN7_CH1 |
504 CX25840_VIN6_CH2 |
505 CX25840_VIN8_CH3 |
506 CX25840_COMPONENT_ON,
507 } },
508 },
9028f58f
AC		 509 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
510 .name = "GoTView X5 3D Hybrid",
511 .tuner_type = TUNER_XC5000,
512 .tuner_addr = 0x64,
557f48d5 513 .tuner_bus = 1,
9028f58f
AC		 514 .porta = CX23885_ANALOG_VIDEO,
515 .portb = CX23885_MPEG_DVB,
516 .input = {{
517 .type = CX23885_VMUX_TELEVISION,
518 .vmux = CX25840_VIN2_CH1 |
519 CX25840_VIN5_CH2,
520 .gpio0 = 0x02,
521 }, {
522 .type = CX23885_VMUX_COMPOSITE1,
523 .vmux = CX23885_VMUX_COMPOSITE1,
524 }, {
525 .type = CX23885_VMUX_SVIDEO,
526 .vmux = CX25840_SVIDEO_LUMA3 |
527 CX25840_SVIDEO_CHROMA4,
528 } },
529 },
78db8547
IL		 530 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
531 .ci_type = 2,
532 .name = "NetUP Dual DVB-T/C-CI RF",
533 .porta = CX23885_ANALOG_VIDEO,
534 .portb = CX23885_MPEG_DVB,
535 .portc = CX23885_MPEG_DVB,
10d0dcd7
IL		 536 .num_fds_portb = 2,
537 .num_fds_portc = 2,
78db8547
IL		 538 .tuner_type = TUNER_XC5000,
539 .tuner_addr = 0x64,
540 .input = { {
541 .type = CX23885_VMUX_TELEVISION,
542 .vmux = CX25840_COMPOSITE1,
543 } },
544 },
2cb9ccd4
ST		 545 [CX23885_BOARD_MPX885] = {
546 .name = "MPX-885",
547 .porta = CX23885_ANALOG_VIDEO,
548 .input = {{
549 .type = CX23885_VMUX_COMPOSITE1,
550 .vmux = CX25840_COMPOSITE1,
551 .amux = CX25840_AUDIO6,
552 .gpio0 = 0,
553 }, {
554 .type = CX23885_VMUX_COMPOSITE2,
555 .vmux = CX25840_COMPOSITE2,
556 .amux = CX25840_AUDIO6,
557 .gpio0 = 0,
558 }, {
559 .type = CX23885_VMUX_COMPOSITE3,
560 .vmux = CX25840_COMPOSITE3,
561 .amux = CX25840_AUDIO7,
562 .gpio0 = 0,
563 }, {
564 .type = CX23885_VMUX_COMPOSITE4,
565 .vmux = CX25840_COMPOSITE4,
566 .amux = CX25840_AUDIO7,
567 .gpio0 = 0,
568 } },
569 },
87988753 570 [CX23885_BOARD_MYGICA_X8507] = {
0d1b5265 571 .name = "Mygica X8502/X8507 ISDB-T",
87988753
AJD		 572 .tuner_type = TUNER_XC5000,
573 .tuner_addr = 0x61,
574 .tuner_bus = 1,
575 .porta = CX23885_ANALOG_VIDEO,
0d1b5265 576 .portb = CX23885_MPEG_DVB,
87988753
AJD		 577 .input = {
578 {
579 .type = CX23885_VMUX_TELEVISION,
580 .vmux = CX25840_COMPOSITE2,
581 .amux = CX25840_AUDIO8,
582 },
583 {
584 .type = CX23885_VMUX_COMPOSITE1,
585 .vmux = CX25840_COMPOSITE8,
082c0576 586 .amux = CX25840_AUDIO7,
87988753
AJD		 587 },
588 {
589 .type = CX23885_VMUX_SVIDEO,
590 .vmux = CX25840_SVIDEO_LUMA3 |
591 CX25840_SVIDEO_CHROMA4,
082c0576 592 .amux = CX25840_AUDIO7,
87988753
AJD		 593 },
594 {
595 .type = CX23885_VMUX_COMPONENT,
596 .vmux = CX25840_COMPONENT_ON |
597 CX25840_VIN1_CH1 |
598 CX25840_VIN6_CH2 |
599 CX25840_VIN7_CH3,
082c0576 600 .amux = CX25840_AUDIO7,
87988753
AJD		 601 },
602 },
722c90eb
SR		 603 },
604 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
605 .name = "TerraTec Cinergy T PCIe Dual",
606 .portb = CX23885_MPEG_DVB,
607 .portc = CX23885_MPEG_DVB,
7b134e85
IL		 608 },
609 [CX23885_BOARD_TEVII_S471] = {
610 .name = "TeVii S471",
611 .portb = CX23885_MPEG_DVB,
f667190b
MB		 612 },
613 [CX23885_BOARD_PROF_8000] = {
614 .name = "Prof Revolution DVB-S2 8000",
615 .portb = CX23885_MPEG_DVB,
7c62f5a1
MK		 616 },
617 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
721f3223 618 .name = "Hauppauge WinTV-HVR4400/HVR5500",
36efec48 619 .porta = CX23885_ANALOG_VIDEO,
7c62f5a1 620 .portb = CX23885_MPEG_DVB,
36efec48
MS		 621 .portc = CX23885_MPEG_DVB,
622 .tuner_type = TUNER_NXP_TDA18271,
623 .tuner_addr = 0x60, /* 0xc0 >> 1 */
624 .tuner_bus = 1,
7c62f5a1 625 },
721f3223
MS		 626 [CX23885_BOARD_HAUPPAUGE_STARBURST] = {
627 .name = "Hauppauge WinTV Starburst",
628 .portb = CX23885_MPEG_DVB,
629 },
e8d42373
OK		 630 [CX23885_BOARD_AVERMEDIA_HC81R] = {
631 .name = "AVerTV Hybrid Express Slim HC81R",
632 .tuner_type = TUNER_XC2028,
633 .tuner_addr = 0x61, /* 0xc2 >> 1 */
634 .tuner_bus = 1,
635 .porta = CX23885_ANALOG_VIDEO,
636 .input = {{
637 .type = CX23885_VMUX_TELEVISION,
638 .vmux = CX25840_VIN2_CH1 |
639 CX25840_VIN5_CH2 |
640 CX25840_NONE0_CH3 |
641 CX25840_NONE1_CH3,
642 .amux = CX25840_AUDIO8,
643 }, {
644 .type = CX23885_VMUX_SVIDEO,
645 .vmux = CX25840_VIN8_CH1 |
646 CX25840_NONE_CH2 |
647 CX25840_VIN7_CH3 |
648 CX25840_SVIDEO_ON,
649 .amux = CX25840_AUDIO6,
650 }, {
651 .type = CX23885_VMUX_COMPONENT,
652 .vmux = CX25840_VIN1_CH1 |
653 CX25840_NONE_CH2 |
654 CX25840_NONE0_CH3 |
655 CX25840_NONE1_CH3,
656 .amux = CX25840_AUDIO6,
657 } },
cce11b09 658 },
46b21bba
JH		 659 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2] = {
660 .name = "DViCO FusionHDTV DVB-T Dual Express2",
661 .portb = CX23885_MPEG_DVB,
662 .portc = CX23885_MPEG_DVB,
663 },
cce11b09
HV		 664 [CX23885_BOARD_HAUPPAUGE_IMPACTVCBE] = {
665 .name = "Hauppauge ImpactVCB-e",
666 .tuner_type = TUNER_ABSENT,
667 .porta = CX23885_ANALOG_VIDEO,
668 .input = {{
669 .type = CX23885_VMUX_COMPOSITE1,
670 .vmux = CX25840_VIN7_CH3 |
671 CX25840_VIN4_CH2 |
672 CX25840_VIN6_CH1,
673 .amux = CX25840_AUDIO7,
674 }, {
675 .type = CX23885_VMUX_SVIDEO,
676 .vmux = CX25840_VIN7_CH3 |
677 CX25840_VIN4_CH2 |
678 CX25840_VIN8_CH1 |
679 CX25840_SVIDEO_ON,
680 .amux = CX25840_AUDIO7,
681 } },
682 },
29442266
OS		 683 [CX23885_BOARD_DVBSKY_T9580] = {
684 .name = "DVBSky T9580",
685 .portb = CX23885_MPEG_DVB,
686 .portc = CX23885_MPEG_DVB,
687 },
82c10276
OS		 688 [CX23885_BOARD_DVBSKY_T980C] = {
689 .name = "DVBSky T980C",
690 .portb = CX23885_MPEG_DVB,
691 },
0e6c7b01 692 [CX23885_BOARD_DVBSKY_S950C] = {
693 .name = "DVBSky S950C",
694 .portb = CX23885_MPEG_DVB,
695 },
61b103e8
OS		 696 [CX23885_BOARD_TT_CT2_4500_CI] = {
697 .name = "Technotrend TT-budget CT2-4500 CI",
698 .portb = CX23885_MPEG_DVB,
699 },
cba5480c 700 [CX23885_BOARD_DVBSKY_S950] = {
701 .name = "DVBSky S950",
702 .portb = CX23885_MPEG_DVB,
703 },
c29d6a83 704 [CX23885_BOARD_DVBSKY_S952] = {
705 .name = "DVBSky S952",
706 .portb = CX23885_MPEG_DVB,
707 .portc = CX23885_MPEG_DVB,
708 },
c02ef64a
NM		 709 [CX23885_BOARD_DVBSKY_T982] = {
710 .name = "DVBSky T982",
711 .portb = CX23885_MPEG_DVB,
712 .portc = CX23885_MPEG_DVB,
713 },
1fc77d01
AP		 714 [CX23885_BOARD_HAUPPAUGE_HVR5525] = {
715 .name = "Hauppauge WinTV-HVR5525",
716 .portb = CX23885_MPEG_DVB,
717 .portc = CX23885_MPEG_DVB,
718 },
6c43a217
HV		 719 [CX23885_BOARD_VIEWCAST_260E] = {
720 .name = "ViewCast 260e",
721 .porta = CX23885_ANALOG_VIDEO,
722 .force_bff = 1,
723 .input = {{
724 .type = CX23885_VMUX_COMPOSITE1,
725 .vmux = CX25840_VIN6_CH1,
726 .amux = CX25840_AUDIO7,
727 }, {
728 .type = CX23885_VMUX_SVIDEO,
729 .vmux = CX25840_VIN7_CH3 |
730 CX25840_VIN5_CH1 |
731 CX25840_SVIDEO_ON,
732 .amux = CX25840_AUDIO7,
733 }, {
734 .type = CX23885_VMUX_COMPONENT,
735 .vmux = CX25840_VIN7_CH3 |
736 CX25840_VIN6_CH2 |
737 CX25840_VIN5_CH1 |
738 CX25840_COMPONENT_ON,
739 .amux = CX25840_AUDIO7,
740 } },
741 },
742 [CX23885_BOARD_VIEWCAST_460E] = {
743 .name = "ViewCast 460e",
744 .porta = CX23885_ANALOG_VIDEO,
745 .force_bff = 1,
746 .input = {{
747 .type = CX23885_VMUX_COMPOSITE1,
748 .vmux = CX25840_VIN4_CH1,
749 .amux = CX25840_AUDIO7,
750 }, {
751 .type = CX23885_VMUX_SVIDEO,
752 .vmux = CX25840_VIN7_CH3 |
753 CX25840_VIN6_CH1 |
754 CX25840_SVIDEO_ON,
755 .amux = CX25840_AUDIO7,
756 }, {
757 .type = CX23885_VMUX_COMPONENT,
758 .vmux = CX25840_VIN7_CH3 |
759 CX25840_VIN6_CH1 |
760 CX25840_VIN5_CH2 |
761 CX25840_COMPONENT_ON,
762 .amux = CX25840_AUDIO7,
763 }, {
764 .type = CX23885_VMUX_COMPOSITE2,
765 .vmux = CX25840_VIN6_CH1,
766 .amux = CX25840_AUDIO7,
767 } },
768 },
10a5210e
SB		 769 [CX23885_BOARD_HAUPPAUGE_QUADHD_DVB] = {
770 .name = "Hauppauge WinTV-QuadHD-DVB",
771 .portb = CX23885_MPEG_DVB,
772 .portc = CX23885_MPEG_DVB,
773 },
dd9ad4fb
SB		 774 [CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC] = {
775 .name = "Hauppauge WinTV-QuadHD-ATSC",
776 .portb = CX23885_MPEG_DVB,
777 .portc = CX23885_MPEG_DVB,
778 },
d19770e5
ST		 779};
780const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
781
782/* ------------------------------------------------------------------ */
783/* PCI subsystem IDs */
784
785struct cx23885_subid cx23885_subids[] = {
786 {
787 .subvendor = 0x0070,
788 .subdevice = 0x3400,
789 .card = CX23885_BOARD_UNKNOWN,
9c8ced51 790 }, {
d19770e5
ST		 791 .subvendor = 0x0070,
792 .subdevice = 0x7600,
793 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
9c8ced51 794 }, {
d19770e5
ST		 795 .subvendor = 0x0070,
796 .subdevice = 0x7800,
797 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 798 }, {
d19770e5
ST		 799 .subvendor = 0x0070,
800 .subdevice = 0x7801,
801 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 802 }, {
6ccb8cfb
MK		 803 .subvendor = 0x0070,
804 .subdevice = 0x7809,
805 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
9c8ced51 806 }, {
a77743bc
ST		 807 .subvendor = 0x0070,
808 .subdevice = 0x7911,
809 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
9c8ced51 810 }, {
9bc37caa
MK		 811 .subvendor = 0x18ac,
812 .subdevice = 0xd500,
813 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
9c8ced51 814 }, {
b00fff0b
MK		 815 .subvendor = 0x0070,
816 .subdevice = 0x7790,
817 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 818 }, {
d1987d55
ST		 819 .subvendor = 0x0070,
820 .subdevice = 0x7797,
821 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
9c8ced51 822 }, {
b00fff0b
MK		 823 .subvendor = 0x0070,
824 .subdevice = 0x7710,
825 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
9c8ced51 826 }, {
07b4a835
MK		 827 .subvendor = 0x0070,
828 .subdevice = 0x7717,
829 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
b3ea0166
ST		 830 }, {
831 .subvendor = 0x0070,
832 .subdevice = 0x71d1,
833 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
3c3852cd
MK		 834 }, {
835 .subvendor = 0x0070,
836 .subdevice = 0x71d3,
837 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
a780a31c
ST		 838 }, {
839 .subvendor = 0x0070,
840 .subdevice = 0x8101,
841 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
66762373
ST		 842 }, {
843 .subvendor = 0x0070,
844 .subdevice = 0x8010,
845 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
9c8ced51 846 }, {
335377b7
MK		 847 .subvendor = 0x18ac,
848 .subdevice = 0xd618,
849 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
9c8ced51 850 }, {
aef2d186
ST		 851 .subvendor = 0x18ac,
852 .subdevice = 0xdb78,
853 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
4c56b04a
ST		 854 }, {
855 .subvendor = 0x107d,
856 .subdevice = 0x6681,
857 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
642ca1a0
AE		 858 }, {
859 .subvendor = 0x107d,
860 .subdevice = 0x6f21,
861 .card = CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200,
0cf8af57 862 }, {
863 .subvendor = 0x107d,
864 .subdevice = 0x6f39,
865 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
9bb1b7e8
IL		 866 }, {
867 .subvendor = 0x185b,
868 .subdevice = 0xe800,
869 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
96318d0c
IL		 870 }, {
871 .subvendor = 0x6920,
872 .subdevice = 0x8888,
873 .card = CX23885_BOARD_TBS_6920,
e6001482
LA		 874 }, {
875 .subvendor = 0x6980,
876 .subdevice = 0x8888,
877 .card = CX23885_BOARD_TBS_6980,
878 }, {
879 .subvendor = 0x6981,
880 .subdevice = 0x8888,
881 .card = CX23885_BOARD_TBS_6981,
579943f5
IL		 882 }, {
883 .subvendor = 0xd470,
884 .subdevice = 0x9022,
885 .card = CX23885_BOARD_TEVII_S470,
c9b8b04b
IL		 886 }, {
887 .subvendor = 0x0001,
888 .subdevice = 0x2005,
889 .card = CX23885_BOARD_DVBWORLD_2005,
5a23b076
IL		 890 }, {
891 .subvendor = 0x1b55,
892 .subdevice = 0x2a2c,
893 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
2074dffa
ST		 894 }, {
895 .subvendor = 0x0070,
896 .subdevice = 0x2211,
897 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
d099becb
MK		 898 }, {
899 .subvendor = 0x0070,
900 .subdevice = 0x2215,
901 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
7d7b5284
MK		 902 }, {
903 .subvendor = 0x0070,
904 .subdevice = 0x221d,
905 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
19bc5796
MK		 906 }, {
907 .subvendor = 0x0070,
908 .subdevice = 0x2251,
909 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
7d7b5284
MK		 910 }, {
911 .subvendor = 0x0070,
912 .subdevice = 0x2259,
0ac60acb 913 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
6b926eca
MK		 914 }, {
915 .subvendor = 0x0070,
916 .subdevice = 0x2291,
917 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
918 }, {
919 .subvendor = 0x0070,
920 .subdevice = 0x2295,
921 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
7d7b5284
MK		 922 }, {
923 .subvendor = 0x0070,
924 .subdevice = 0x2299,
925 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
926 }, {
927 .subvendor = 0x0070,
928 .subdevice = 0x229d,
929 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
930 }, {
931 .subvendor = 0x0070,
932 .subdevice = 0x22f0,
933 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
934 }, {
935 .subvendor = 0x0070,
936 .subdevice = 0x22f1,
937 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
938 }, {
939 .subvendor = 0x0070,
940 .subdevice = 0x22f2,
941 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
942 }, {
943 .subvendor = 0x0070,
944 .subdevice = 0x22f3,
945 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
946 }, {
947 .subvendor = 0x0070,
948 .subdevice = 0x22f4,
949 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
950 }, {
951 .subvendor = 0x0070,
952 .subdevice = 0x22f5,
953 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
493b7127
DW		 954 }, {
955 .subvendor = 0x14f1,
956 .subdevice = 0x8651,
957 .card = CX23885_BOARD_MYGICA_X8506,
2365b2d3
DW		 958 }, {
959 .subvendor = 0x14f1,
960 .subdevice = 0x8657,
961 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
13697380
ST		 962 }, {
963 .subvendor = 0x0070,
964 .subdevice = 0x8541,
965 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
34e383dd
VG		 966 }, {
967 .subvendor = 0x1858,
968 .subdevice = 0xe800,
969 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
aee0b24c
MK		 970 }, {
971 .subvendor = 0x0070,
972 .subdevice = 0x8551,
973 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
ea5697fe
DW		 974 }, {
975 .subvendor = 0x14f1,
976 .subdevice = 0x8578,
977 .card = CX23885_BOARD_MYGICA_X8558PRO,
0b32d65c
KK		 978 }, {
979 .subvendor = 0x107d,
980 .subdevice = 0x6f22,
981 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
9028f58f
AC		 982 }, {
983 .subvendor = 0x5654,
984 .subdevice = 0x2390,
985 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
78db8547
IL		 986 }, {
987 .subvendor = 0x1b55,
988 .subdevice = 0xe2e4,
989 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
87988753
AJD		 990 }, {
991 .subvendor = 0x14f1,
992 .subdevice = 0x8502,
993 .card = CX23885_BOARD_MYGICA_X8507,
722c90eb
SR		 994 }, {
995 .subvendor = 0x153b,
996 .subdevice = 0x117e,
997 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
7b134e85
IL		 998 }, {
999 .subvendor = 0xd471,
1000 .subdevice = 0x9022,
1001 .card = CX23885_BOARD_TEVII_S471,
f667190b
MB		 1002 }, {
1003 .subvendor = 0x8000,
1004 .subdevice = 0x3034,
1005 .card = CX23885_BOARD_PROF_8000,
7c62f5a1
MK		 1006 }, {
1007 .subvendor = 0x0070,
1008 .subdevice = 0xc108,
721f3223 1009 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-4400 (Model 121xxx, Hybrid DVB-T/S2, IR) */
7c62f5a1
MK		 1010 }, {
1011 .subvendor = 0x0070,
1012 .subdevice = 0xc138,
721f3223 1013 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
7c62f5a1
MK		 1014 }, {
1015 .subvendor = 0x0070,
1016 .subdevice = 0xc12a,
721f3223 1017 .card = CX23885_BOARD_HAUPPAUGE_STARBURST, /* Hauppauge WinTV Starburst (Model 121x00, DVB-S2, IR) */
7c62f5a1
MK		 1018 }, {
1019 .subvendor = 0x0070,
1020 .subdevice = 0xc1f8,
721f3223 1021 .card = CX23885_BOARD_HAUPPAUGE_HVR4400, /* Hauppauge WinTV HVR-5500 (Model 121xxx, Hybrid DVB-T/C/S2, IR) */
e8d42373
OK		 1022 }, {
1023 .subvendor = 0x1461,
1024 .subdevice = 0xd939,
1025 .card = CX23885_BOARD_AVERMEDIA_HC81R,
cce11b09
HV		 1026 }, {
1027 .subvendor = 0x0070,
1028 .subdevice = 0x7133,
1029 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
8177733a
BL		 1030 }, {
1031 .subvendor = 0x0070,
1032 .subdevice = 0x7137,
1033 .card = CX23885_BOARD_HAUPPAUGE_IMPACTVCBE,
46b21bba
JH		 1034 }, {
1035 .subvendor = 0x18ac,
1036 .subdevice = 0xdb98,
1037 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2,
29442266
OS		 1038 }, {
1039 .subvendor = 0x4254,
1040 .subdevice = 0x9580,
1041 .card = CX23885_BOARD_DVBSKY_T9580,
82c10276
OS		 1042 }, {
1043 .subvendor = 0x4254,
1044 .subdevice = 0x980c,
1045 .card = CX23885_BOARD_DVBSKY_T980C,
0e6c7b01 1046 }, {
1047 .subvendor = 0x4254,
1048 .subdevice = 0x950c,
1049 .card = CX23885_BOARD_DVBSKY_S950C,
61b103e8
OS		 1050 }, {
1051 .subvendor = 0x13c2,
1052 .subdevice = 0x3013,
1053 .card = CX23885_BOARD_TT_CT2_4500_CI,
cba5480c 1054 }, {
1055 .subvendor = 0x4254,
1056 .subdevice = 0x0950,
1057 .card = CX23885_BOARD_DVBSKY_S950,
c29d6a83 1058 }, {
1059 .subvendor = 0x4254,
1060 .subdevice = 0x0952,
1061 .card = CX23885_BOARD_DVBSKY_S952,
c02ef64a
NM		 1062 }, {
1063 .subvendor = 0x4254,
1064 .subdevice = 0x0982,
1065 .card = CX23885_BOARD_DVBSKY_T982,
1fc77d01
AP		 1066 }, {
1067 .subvendor = 0x0070,
1068 .subdevice = 0xf038,
1069 .card = CX23885_BOARD_HAUPPAUGE_HVR5525,
6c43a217
HV		 1070 }, {
1071 .subvendor = 0x1576,
1072 .subdevice = 0x0260,
1073 .card = CX23885_BOARD_VIEWCAST_260E,
1074 }, {
1075 .subvendor = 0x1576,
1076 .subdevice = 0x0460,
1077 .card = CX23885_BOARD_VIEWCAST_460E,
10a5210e
SB		 1078 }, {
1079 .subvendor = 0x0070,
1080 .subdevice = 0x6a28,
1081 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 1 */
1082 }, {
1083 .subvendor = 0x0070,
1084 .subdevice = 0x6b28,
1085 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_DVB, /* Tuner Pair 2 */
dd9ad4fb
SB		 1086 }, {
1087 .subvendor = 0x0070,
1088 .subdevice = 0x6a18,
1089 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 1 */
1090 }, {
1091 .subvendor = 0x0070,
1092 .subdevice = 0x6b18,
1093 .card = CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC, /* Tuner Pair 2 */
d19770e5
ST		 1094 },
1095};
1096const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
1097
1098void cx23885_card_list(struct cx23885_dev *dev)
1099{
1100 int i;
1101
1102 if (0 == dev->pci->subsystem_vendor &&
1103 0 == dev->pci->subsystem_device) {
e39682b5
MCC		 1104 pr_info("%s: Board has no valid PCIe Subsystem ID and can't\n"
1105 "%s: be autodetected. Pass card=<n> insmod option\n"
1106 "%s: to workaround that. Redirect complaints to the\n"
1107 "%s: vendor of the TV card. Best regards,\n"
1108 "%s: -- tux\n",
1109 dev->name, dev->name, dev->name, dev->name, dev->name);
d19770e5 1110 } else {
e39682b5
MCC		 1111 pr_info("%s: Your board isn't known (yet) to the driver.\n"
1112 "%s: Try to pick one of the existing card configs via\n"
1113 "%s: card=<n> insmod option. Updating to the latest\n"
1114 "%s: version might help as well.\n",
1115 dev->name, dev->name, dev->name, dev->name);
d19770e5 1116 }
e39682b5 1117 pr_info("%s: Here is a list of valid choices for the card=<n> insmod option:\n",
d19770e5
ST		 1118 dev->name);
1119 for (i = 0; i < cx23885_bcount; i++)
e39682b5
MCC		 1120 pr_info("%s: card=%d -> %s\n",
1121 dev->name, i, cx23885_boards[i].name);
d19770e5
ST		 1122}
1123
6c43a217
HV		 1124static void viewcast_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1125{
1126 u32 sn;
1127
1128 /* The serial number record begins with tag 0x59 */
1129 if (*(eeprom_data + 0x00) != 0x59) {
1130 pr_info("%s() eeprom records are undefined, no serial number\n",
1131 __func__);
1132 return;
1133 }
1134
1135 sn = (*(eeprom_data + 0x06) << 24) |
1136 (*(eeprom_data + 0x05) << 16) |
1137 (*(eeprom_data + 0x04) << 8) |
1138 (*(eeprom_data + 0x03));
1139
1140 pr_info("%s: card '%s' sn# MM%d\n",
1141 dev->name,
1142 cx23885_boards[dev->board].name,
1143 sn);
1144}
1145
d19770e5
ST		 1146static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
1147{
1148 struct tveeprom tv;
1149
446aba66 1150 tveeprom_hauppauge_analog(&tv, eeprom_data);
d19770e5 1151
d19770e5 1152 /* Make sure we support the board model */
9c8ced51 1153 switch (tv.model) {
5308cf09
MK		 1154 case 22001:
1155 /* WinTV-HVR1270 (PCIe, Retail, half height)
1156 * ATSC/QAM and basic analog, IR Blast */
1157 case 22009:
1158 /* WinTV-HVR1210 (PCIe, Retail, half height)
1159 * DVB-T and basic analog, IR Blast */
1160 case 22011:
1161 /* WinTV-HVR1270 (PCIe, Retail, half height)
1162 * ATSC/QAM and basic analog, IR Recv */
1163 case 22019:
1164 /* WinTV-HVR1210 (PCIe, Retail, half height)
1165 * DVB-T and basic analog, IR Recv */
1166 case 22021:
1167 /* WinTV-HVR1275 (PCIe, Retail, half height)
1168 * ATSC/QAM and basic analog, IR Recv */
1169 case 22029:
1170 /* WinTV-HVR1210 (PCIe, Retail, half height)
1171 * DVB-T and basic analog, IR Recv */
1172 case 22101:
1173 /* WinTV-HVR1270 (PCIe, Retail, full height)
1174 * ATSC/QAM and basic analog, IR Blast */
1175 case 22109:
1176 /* WinTV-HVR1210 (PCIe, Retail, full height)
1177 * DVB-T and basic analog, IR Blast */
1178 case 22111:
1179 /* WinTV-HVR1270 (PCIe, Retail, full height)
1180 * ATSC/QAM and basic analog, IR Recv */
1181 case 22119:
1182 /* WinTV-HVR1210 (PCIe, Retail, full height)
1183 * DVB-T and basic analog, IR Recv */
1184 case 22121:
1185 /* WinTV-HVR1275 (PCIe, Retail, full height)
1186 * ATSC/QAM and basic analog, IR Recv */
1187 case 22129:
1188 /* WinTV-HVR1210 (PCIe, Retail, full height)
1189 * DVB-T and basic analog, IR Recv */
36396c89
MK		 1190 case 71009:
1191 /* WinTV-HVR1200 (PCIe, Retail, full height)
1192 * DVB-T and basic analog */
cce11b09
HV		 1193 case 71100:
1194 /* WinTV-ImpactVCB-e (PCIe, Retail, half height)
1195 * Basic analog */
36396c89
MK		 1196 case 71359:
1197 /* WinTV-HVR1200 (PCIe, OEM, half height)
1198 * DVB-T and basic analog */
1199 case 71439:
1200 /* WinTV-HVR1200 (PCIe, OEM, half height)
1201 * DVB-T and basic analog */
1202 case 71449:
1203 /* WinTV-HVR1200 (PCIe, OEM, full height)
1204 * DVB-T and basic analog */
1205 case 71939:
1206 /* WinTV-HVR1200 (PCIe, OEM, half height)
1207 * DVB-T and basic analog */
1208 case 71949:
1209 /* WinTV-HVR1200 (PCIe, OEM, full height)
1210 * DVB-T and basic analog */
1211 case 71959:
1212 /* WinTV-HVR1200 (PCIe, OEM, full height)
1213 * DVB-T and basic analog */
1214 case 71979:
1215 /* WinTV-HVR1200 (PCIe, OEM, half height)
1216 * DVB-T and basic analog */
1217 case 71999:
1218 /* WinTV-HVR1200 (PCIe, OEM, full height)
1219 * DVB-T and basic analog */
9c8ced51
ST		 1220 case 76601:
1221 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
1222 channel ATSC and MPEG2 HW Encoder */
1223 case 77001:
1224 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
1225 and Basic analog */
1226 case 77011:
1227 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
1228 and Basic analog */
1229 case 77041:
1230 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
1231 and Basic analog */
1232 case 77051:
1233 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
1234 and Basic analog */
1235 case 78011:
1236 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
1237 Dual channel ATSC and MPEG2 HW Encoder */
1238 case 78501:
1239 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1240 Dual channel ATSC and MPEG2 HW Encoder */
1241 case 78521:
1242 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
1243 Dual channel ATSC and MPEG2 HW Encoder */
1244 case 78531:
1245 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
1246 Dual channel ATSC and MPEG2 HW Encoder */
1247 case 78631:
1248 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
1249 Dual channel ATSC and MPEG2 HW Encoder */
1250 case 79001:
1251 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
1252 ATSC and Basic analog */
1253 case 79101:
1254 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
1255 ATSC and Basic analog */
ebbeb460
AW		 1256 case 79501:
1257 /* WinTV-HVR1250 (PCIe, No IR, half height,
1258 ATSC [at least] and Basic analog) */
9c8ced51
ST		 1259 case 79561:
1260 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1261 ATSC and Basic analog */
1262 case 79571:
1263 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
1264 ATSC and Basic analog */
1265 case 79671:
1266 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
1267 ATSC and Basic analog */
66762373
ST		 1268 case 80019:
1269 /* WinTV-HVR1400 (Express Card, Retail, IR,
1270 * DVB-T and Basic analog */
36396c89
MK		 1271 case 81509:
1272 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1273 * DVB-T and MPEG2 HW Encoder */
a780a31c 1274 case 81519:
36396c89 1275 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
a780a31c 1276 * DVB-T and MPEG2 HW Encoder */
d19770e5 1277 break;
13697380 1278 case 85021:
73a5f419 1279 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
13697380
ST		 1280 Dual channel ATSC and MPEG2 HW Encoder */
1281 break;
73a5f419
MK		 1282 case 85721:
1283 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1284 Dual channel ATSC and Basic analog */
82cf5f4f
MS		 1285 case 121019:
1286 /* WinTV-HVR4400 (PCIe, DVB-S2, DVB-C/T) */
1287 break;
1288 case 121029:
1289 /* WinTV-HVR5500 (PCIe, DVB-S2, DVB-C/T) */
1290 break;
1fc77d01
AP		 1291 case 150329:
1292 /* WinTV-HVR5525 (PCIe, DVB-S/S2, DVB-T/T2/C) */
73a5f419 1293 break;
10a5210e
SB		 1294 case 166100:
1295 /* WinTV-QuadHD (DVB) Tuner Pair 1 (PCIe, IR, half height,
1296 DVB-T/T2/C, DVB-T/T2/C */
1297 break;
1298 case 166101:
1299 /* WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1300 DVB-T/T2/C, DVB-T/T2/C */
1301 break;
dd9ad4fb
SB		 1302 case 165100:
1303 /*
1304 * WinTV-QuadHD (ATSC) Tuner Pair 1 (PCIe, IR, half height,
1305 * ATSC, ATSC
1306 */
1307 break;
1308 case 165101:
1309 /*
1310 * WinTV-QuadHD (DVB) Tuner Pair 2 (PCIe, IR, half height,
1311 * ATSC, ATSC
1312 */
1313 break;
d19770e5 1314 default:
e39682b5 1315 pr_warn("%s: warning: unknown hauppauge model #%d\n",
9c8ced51 1316 dev->name, tv.model);
d19770e5
ST		 1317 break;
1318 }
1319
e39682b5
MCC		 1320 pr_info("%s: hauppauge eeprom: model=%d\n",
1321 dev->name, tv.model);
d19770e5
ST		 1322}
1323
e6001482
LA		 1324/* Some TBS cards require initing a chip using a bitbanged SPI attached
1325 to the cx23885 gpio's. If this chip doesn't get init'ed the demod
1326 doesn't respond to any command. */
1327static void tbs_card_init(struct cx23885_dev *dev)
1328{
1329 int i;
601b1f0a 1330 static const u8 buf[] = {
e6001482
LA		 1331 0xe0, 0x06, 0x66, 0x33, 0x65,
1332 0x01, 0x17, 0x06, 0xde};
1333
1334 switch (dev->board) {
1335 case CX23885_BOARD_TBS_6980:
1336 case CX23885_BOARD_TBS_6981:
1337 cx_set(GP0_IO, 0x00070007);
1338 usleep_range(1000, 10000);
1339 cx_clear(GP0_IO, 2);
1340 usleep_range(1000, 10000);
1341 for (i = 0; i < 9 * 8; i++) {
1342 cx_clear(GP0_IO, 7);
1343 usleep_range(1000, 10000);
1344 cx_set(GP0_IO,
1345 ((buf[i >> 3] >> (7 - (i & 7))) & 1) | 4);
1346 usleep_range(1000, 10000);
1347 }
1348 cx_set(GP0_IO, 7);
1349 break;
1350 }
1351}
1352
d7cba043 1353int cx23885_tuner_callback(void *priv, int component, int command, int arg)
8c70017f 1354{
89ce2216
ST		 1355 struct cx23885_tsport *port = priv;
1356 struct cx23885_dev *dev = port->dev;
6df51690
ST		 1357 u32 bitmask = 0;
1358
c6cff169 1359 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
89ce2216
ST		 1360 return 0;
1361
6df51690 1362 if (command != 0) {
e39682b5
MCC		 1363 pr_err("%s(): Unknown command 0x%x.\n",
1364 __func__, command);
6df51690
ST		 1365 return -EINVAL;
1366 }
8c70017f 1367
9c8ced51 1368 switch (dev->board) {
90a71b1c
ST		 1369 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1370 case CX23885_BOARD_HAUPPAUGE_HVR1500:
8c70017f 1371 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
4c56b04a 1372 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
642ca1a0 1373 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
0cf8af57 1374 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
9bb1b7e8 1375 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1376 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
0b32d65c 1377 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
90a71b1c 1378 /* Tuner Reset Command */
4c56b04a 1379 bitmask = 0x04;
6df51690
ST		 1380 break;
1381 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 1382 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
46b21bba 1383 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
4c56b04a
ST		 1384 /* Two identical tuners on two different i2c buses,
1385 * we need to reset the correct gpio. */
d4dc673d 1386 if (port->nr == 1)
4c56b04a 1387 bitmask = 0x01;
d4dc673d 1388 else if (port->nr == 2)
4c56b04a 1389 bitmask = 0x04;
8c70017f 1390 break;
9028f58f
AC		 1391 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1392 /* Tuner Reset Command */
1393 bitmask = 0x02;
1394 break;
78db8547
IL		 1395 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1396 altera_ci_tuner_reset(dev, port->nr);
1397 break;
e8d42373
OK		 1398 case CX23885_BOARD_AVERMEDIA_HC81R:
1399 /* XC3028L Reset Command */
1400 bitmask = 1 << 2;
1401 break;
8c70017f
ST		 1402 }
1403
6df51690
ST		 1404 if (bitmask) {
1405 /* Drive the tuner into reset and back out */
1406 cx_clear(GP0_IO, bitmask);
1407 mdelay(200);
1408 cx_set(GP0_IO, bitmask);
1409 }
1410
1411 return 0;
8c70017f 1412}
73c993a8 1413
a6a3f140
ST		 1414void cx23885_gpio_setup(struct cx23885_dev *dev)
1415{
9c8ced51 1416 switch (dev->board) {
a6a3f140
ST		 1417 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1418 /* GPIO-0 cx24227 demodulator reset */
1419 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1420 break;
07b4a835
MK		 1421 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1422 /* GPIO-0 cx24227 demodulator */
1423 /* GPIO-2 xc3028 tuner */
1424
1425 /* Put the parts into reset */
1426 cx_set(GP0_IO, 0x00050000);
1427 cx_clear(GP0_IO, 0x00000005);
1428 msleep(5);
1429
1430 /* Bring the parts out of reset */
1431 cx_set(GP0_IO, 0x00050005);
1432 break;
d1987d55
ST		 1433 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1434 /* GPIO-0 cx24227 demodulator reset */
1435 /* GPIO-2 xc5000 tuner reset */
1436 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1437 break;
a6a3f140
ST		 1438 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1439 /* GPIO-0 656_CLK */
1440 /* GPIO-1 656_D0 */
1441 /* GPIO-2 8295A Reset */
1442 /* GPIO-3-10 cx23417 data0-7 */
1443 /* GPIO-11-14 cx23417 addr0-3 */
1444 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1445 /* GPIO-19 IR_RX */
3ba71d21 1446
a589b665
ST		 1447 /* CX23417 GPIO's */
1448 /* EIO15 Zilog Reset */
1449 /* EIO14 S5H1409/CX24227 Reset */
f659c513
ST		 1450 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1451
1452 /* Put the demod into reset and protect the eeprom */
1453 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1454 mdelay(100);
1455
1456 /* Bring the demod and blaster out of reset */
1457 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1458 mdelay(100);
a589b665 1459
5206d6ec 1460 /* Force the TDA8295A into reset and back */
21ff3e4f
ST		 1461 cx23885_gpio_enable(dev, GPIO_2, 1);
1462 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 1463 mdelay(20);
21ff3e4f 1464 cx23885_gpio_clear(dev, GPIO_2);
5206d6ec 1465 mdelay(20);
21ff3e4f 1466 cx23885_gpio_set(dev, GPIO_2);
5206d6ec 1467 mdelay(20);
a6a3f140 1468 break;
b3ea0166
ST		 1469 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1470 /* GPIO-0 tda10048 demodulator reset */
1471 /* GPIO-2 tda18271 tuner reset */
1472
a780a31c
ST		 1473 /* Put the parts into reset and back */
1474 cx_set(GP0_IO, 0x00050000);
1475 mdelay(20);
1476 cx_clear(GP0_IO, 0x00000005);
1477 mdelay(20);
1478 cx_set(GP0_IO, 0x00050005);
1479 break;
1480 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1481 /* GPIO-0 TDA10048 demodulator reset */
1482 /* GPIO-2 TDA8295A Reset */
1483 /* GPIO-3-10 cx23417 data0-7 */
1484 /* GPIO-11-14 cx23417 addr0-3 */
1485 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1486
1487 /* The following GPIO's are on the interna AVCore (cx25840) */
1488 /* GPIO-19 IR_RX */
1489 /* GPIO-20 IR_TX 416/DVBT Select */
1490 /* GPIO-21 IIS DAT */
1491 /* GPIO-22 IIS WCLK */
1492 /* GPIO-23 IIS BCLK */
1493
66762373
ST		 1494 /* Put the parts into reset and back */
1495 cx_set(GP0_IO, 0x00050000);
1496 mdelay(20);
1497 cx_clear(GP0_IO, 0x00000005);
1498 mdelay(20);
1499 cx_set(GP0_IO, 0x00050005);
1500 break;
1501 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1502 /* GPIO-0 Dibcom7000p demodulator reset */
1503 /* GPIO-2 xc3028L tuner reset */
1504 /* GPIO-13 LED */
1505
b3ea0166
ST		 1506 /* Put the parts into reset and back */
1507 cx_set(GP0_IO, 0x00050000);
1508 mdelay(20);
1509 cx_clear(GP0_IO, 0x00000005);
1510 mdelay(20);
1511 cx_set(GP0_IO, 0x00050005);
1512 break;
1ecc5aed
ST		 1513 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1514 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1515 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1516 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1517 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1518
aef2d186
ST		 1519 /* Put the parts into reset and back */
1520 cx_set(GP0_IO, 0x000f0000);
1521 mdelay(20);
1522 cx_clear(GP0_IO, 0x0000000f);
1523 mdelay(20);
1524 cx_set(GP0_IO, 0x000f000f);
1525 break;
1526 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
46b21bba 1527 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
aef2d186
ST		 1528 /* GPIO-0 portb xc3028 reset */
1529 /* GPIO-1 portb zl10353 reset */
1530 /* GPIO-2 portc xc3028 reset */
1531 /* GPIO-3 portc zl10353 reset */
1532
1ecc5aed
ST		 1533 /* Put the parts into reset and back */
1534 cx_set(GP0_IO, 0x000f0000);
1535 mdelay(20);
1536 cx_clear(GP0_IO, 0x0000000f);
1537 mdelay(20);
1538 cx_set(GP0_IO, 0x000f000f);
1539 break;
4c56b04a 1540 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
642ca1a0 1541 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
0cf8af57 1542 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
9bb1b7e8 1543 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1544 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
0b32d65c 1545 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
4c56b04a
ST		 1546 /* GPIO-2 xc3028 tuner reset */
1547
1548 /* The following GPIO's are on the internal AVCore (cx25840) */
1549 /* GPIO-? zl10353 demod reset */
1550
1551 /* Put the parts into reset and back */
1552 cx_set(GP0_IO, 0x00040000);
1553 mdelay(20);
1554 cx_clear(GP0_IO, 0x00000004);
1555 mdelay(20);
1556 cx_set(GP0_IO, 0x00040004);
1557 break;
96318d0c 1558 case CX23885_BOARD_TBS_6920:
e6001482
LA		 1559 case CX23885_BOARD_TBS_6980:
1560 case CX23885_BOARD_TBS_6981:
f667190b 1561 case CX23885_BOARD_PROF_8000:
96318d0c
IL		 1562 cx_write(MC417_CTL, 0x00000036);
1563 cx_write(MC417_OEN, 0x00001000);
09ea33e5
IL		 1564 cx_set(MC417_RWD, 0x00000002);
1565 mdelay(200);
1566 cx_clear(MC417_RWD, 0x00000800);
1567 mdelay(200);
1568 cx_set(MC417_RWD, 0x00000800);
1569 mdelay(200);
96318d0c 1570 break;
5a23b076
IL		 1571 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1572 /* GPIO-0 INTA from CiMax1
1573 GPIO-1 INTB from CiMax2
1574 GPIO-2 reset chips
1575 GPIO-3 to GPIO-10 data/addr for CA
1576 GPIO-11 ~CS0 to CiMax1
1577 GPIO-12 ~CS1 to CiMax2
1578 GPIO-13 ADL0 load LSB addr
1579 GPIO-14 ADL1 load MSB addr
1580 GPIO-15 ~RDY from CiMax
1581 GPIO-17 ~RD to CiMax
1582 GPIO-18 ~WR to CiMax
1583 */
1584 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1585 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1586 cx_clear(GP0_IO, 0x00030004);
1587 mdelay(100);/* reset delay */
1588 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1589 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1590 /* GPIO-15 IN as ~ACK, rest as OUT */
1591 cx_write(MC417_OEN, 0x00001000);
1592 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1593 cx_write(MC417_RWD, 0x0000c300);
1594 /* enable irq */
1595 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1596 break;
2074dffa 1597 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1598 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 1599 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1600 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
6b926eca 1601 case CX23885_BOARD_HAUPPAUGE_HVR1210:
d099becb 1602 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
6b926eca
MK		 1603 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1604 /* GPIO-9 Demod reset */
2074dffa
ST		 1605
1606 /* Put the parts into reset and back */
d099becb
MK		 1607 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1608 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
2074dffa
ST		 1609 cx23885_gpio_clear(dev, GPIO_9);
1610 mdelay(20);
1611 cx23885_gpio_set(dev, GPIO_9);
1612 break;
493b7127 1613 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 1614 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
87988753 1615 case CX23885_BOARD_MYGICA_X8507:
8e069bb9 1616 /* GPIO-0 (0)Analog / (1)Digital TV */
493b7127 1617 /* GPIO-1 reset XC5000 */
0d1b5265 1618 /* GPIO-2 demod reset */
8e069bb9
DW		 1619 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1620 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
493b7127 1621 mdelay(100);
8e069bb9 1622 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
493b7127
DW		 1623 mdelay(100);
1624 break;
ea5697fe
DW		 1625 case CX23885_BOARD_MYGICA_X8558PRO:
1626 /* GPIO-0 reset first ATBM8830 */
1627 /* GPIO-1 reset second ATBM8830 */
1628 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1629 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1630 mdelay(100);
1631 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1632 mdelay(100);
1633 break;
13697380 1634 case CX23885_BOARD_HAUPPAUGE_HVR1850:
aee0b24c 1635 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 1636 /* GPIO-0 656_CLK */
1637 /* GPIO-1 656_D0 */
1638 /* GPIO-2 Wake# */
1639 /* GPIO-3-10 cx23417 data0-7 */
1640 /* GPIO-11-14 cx23417 addr0-3 */
1641 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1642 /* GPIO-19 IR_RX */
1643 /* GPIO-20 C_IR_TX */
1644 /* GPIO-21 I2S DAT */
1645 /* GPIO-22 I2S WCLK */
1646 /* GPIO-23 I2S BCLK */
1647 /* ALT GPIO: EXP GPIO LATCH */
1648
1649 /* CX23417 GPIO's */
1650 /* GPIO-14 S5H1411/CX24228 Reset */
1651 /* GPIO-13 EEPROM write protect */
1652 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1653
1654 /* Put the demod into reset and protect the eeprom */
1655 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1656 mdelay(100);
1657
1658 /* Bring the demod out of reset */
1659 mc417_gpio_set(dev, GPIO_14);
1660 mdelay(100);
1661
1662 /* CX24228 GPIO */
1663 /* Connected to IF / Mux */
1664 break;
9028f58f
AC		 1665 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1666 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1667 break;
78db8547
IL		 1668 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1669 /* GPIO-0 ~INT in
1670 GPIO-1 TMS out
1671 GPIO-2 ~reset chips out
1672 GPIO-3 to GPIO-10 data/addr for CA in/out
1673 GPIO-11 ~CS out
1674 GPIO-12 ADDR out
1675 GPIO-13 ~WR out
1676 GPIO-14 ~RD out
1677 GPIO-15 ~RDY in
1678 GPIO-16 TCK out
1679 GPIO-17 TDO in
1680 GPIO-18 TDI out
1681 */
1682 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1683 /* GPIO-0 as INT, reset & TMS low */
1684 cx_clear(GP0_IO, 0x00010006);
1685 mdelay(100);/* reset delay */
1686 cx_set(GP0_IO, 0x00000004); /* reset high */
1687 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1688 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1689 cx_write(MC417_OEN, 0x00005000);
1690 /* ~RD, ~WR high; ADDR low; ~CS high */
1691 cx_write(MC417_RWD, 0x00000d00);
1692 /* enable irq */
1693 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1694 break;
7c62f5a1 1695 case CX23885_BOARD_HAUPPAUGE_HVR4400:
721f3223 1696 case CX23885_BOARD_HAUPPAUGE_STARBURST:
7c62f5a1 1697 /* GPIO-8 tda10071 demod reset */
721f3223 1698 /* GPIO-9 si2165 demod reset (only HVR4400/HVR5500)*/
7c62f5a1
MK		 1699
1700 /* Put the parts into reset and back */
36efec48
MS		 1701 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1702
1703 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
7c62f5a1 1704 mdelay(100);
36efec48 1705 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
7c62f5a1 1706 mdelay(100);
36efec48 1707
7c62f5a1 1708 break;
e8d42373
OK		 1709 case CX23885_BOARD_AVERMEDIA_HC81R:
1710 cx_clear(MC417_CTL, 1);
1711 /* GPIO-0,1,2 setup direction as output */
1712 cx_set(GP0_IO, 0x00070000);
1713 mdelay(10);
1714 /* AF9013 demod reset */
1715 cx_set(GP0_IO, 0x00010001);
1716 mdelay(10);
1717 cx_clear(GP0_IO, 0x00010001);
1718 mdelay(10);
1719 cx_set(GP0_IO, 0x00010001);
1720 mdelay(10);
1721 /* demod tune? */
1722 cx_clear(GP0_IO, 0x00030003);
1723 mdelay(10);
1724 cx_set(GP0_IO, 0x00020002);
1725 mdelay(10);
1726 cx_set(GP0_IO, 0x00010001);
1727 mdelay(10);
1728 cx_clear(GP0_IO, 0x00020002);
1729 /* XC3028L tuner reset */
1730 cx_set(GP0_IO, 0x00040004);
1731 cx_clear(GP0_IO, 0x00040004);
1732 cx_set(GP0_IO, 0x00040004);
1733 mdelay(60);
1734 break;
29442266 1735 case CX23885_BOARD_DVBSKY_T9580:
c29d6a83 1736 case CX23885_BOARD_DVBSKY_S952:
c02ef64a 1737 case CX23885_BOARD_DVBSKY_T982:
29442266
OS		 1738 /* enable GPIO3-18 pins */
1739 cx_write(MC417_CTL, 0x00000037);
1740 cx23885_gpio_enable(dev, GPIO_2 | GPIO_11, 1);
1741 cx23885_gpio_clear(dev, GPIO_2 | GPIO_11);
1742 mdelay(100);
1743 cx23885_gpio_set(dev, GPIO_2 | GPIO_11);
1744 break;
82c10276 1745 case CX23885_BOARD_DVBSKY_T980C:
0e6c7b01 1746 case CX23885_BOARD_DVBSKY_S950C:
61b103e8 1747 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276
OS		 1748 /*
1749 * GPIO-0 INTA from CiMax, input
1750 * GPIO-1 reset CiMax, output, high active
1751 * GPIO-2 reset demod, output, low active
1752 * GPIO-3 to GPIO-10 data/addr for CAM
1753 * GPIO-11 ~CS0 to CiMax1
1754 * GPIO-12 ~CS1 to CiMax2
1755 * GPIO-13 ADL0 load LSB addr
1756 * GPIO-14 ADL1 load MSB addr
1757 * GPIO-15 ~RDY from CiMax
1758 * GPIO-17 ~RD to CiMax
1759 * GPIO-18 ~WR to CiMax
1760 */
1761
1762 cx_set(GP0_IO, 0x00060002); /* GPIO 1/2 as output */
1763 cx_clear(GP0_IO, 0x00010004); /* GPIO 0 as input */
1764 mdelay(100); /* reset delay */
1765 cx_set(GP0_IO, 0x00060004); /* GPIO as out, reset high */
1766 cx_clear(GP0_IO, 0x00010002);
1767 cx_write(MC417_CTL, 0x00000037); /* enable GPIO3-18 pins */
1768
1769 /* GPIO-15 IN as ~ACK, rest as OUT */
1770 cx_write(MC417_OEN, 0x00001000);
1771
1772 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1773 cx_write(MC417_RWD, 0x0000c300);
1774
1775 /* enable irq */
1776 cx_write(GPIO_ISM, 0x00000000); /* INTERRUPTS active low */
cba5480c 1777 break;
1778 case CX23885_BOARD_DVBSKY_S950:
1779 cx23885_gpio_enable(dev, GPIO_2, 1);
1780 cx23885_gpio_clear(dev, GPIO_2);
1781 msleep(100);
1782 cx23885_gpio_set(dev, GPIO_2);
1783 break;
1fc77d01 1784 case CX23885_BOARD_HAUPPAUGE_HVR5525:
10a5210e 1785 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
dd9ad4fb 1786 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
1fc77d01 1787 /*
10a5210e
SB		 1788 * HVR5525 GPIO Details:
1789 * GPIO-00 IR_WIDE
1790 * GPIO-02 wake#
1791 * GPIO-03 VAUX Pres.
1792 * GPIO-07 PROG#
1793 * GPIO-08 SAT_RESN
1794 * GPIO-09 TER_RESN
1795 * GPIO-10 B2_SENSE
1796 * GPIO-11 B1_SENSE
1797 * GPIO-15 IR_LED_STATUS
1798 * GPIO-19 IR_NARROW
1799 * GPIO-20 Blauster1
1800 * ALTGPIO VAUX_SWITCH
1801 * AUX_PLL_CLK : Blaster2
1fc77d01
AP		 1802 */
1803 /* Put the parts into reset and back */
1804 cx23885_gpio_enable(dev, GPIO_8 | GPIO_9, 1);
1805 cx23885_gpio_clear(dev, GPIO_8 | GPIO_9);
1806 msleep(100);
1807 cx23885_gpio_set(dev, GPIO_8 | GPIO_9);
1808 msleep(100);
1809 break;
6c43a217
HV		 1810 case CX23885_BOARD_VIEWCAST_260E:
1811 case CX23885_BOARD_VIEWCAST_460E:
1812 /* For documentation purposes, it's worth noting that this
1813 * card does not have any GPIO's connected to subcomponents.
1814 */
1815 break;
a6a3f140
ST		 1816 }
1817}
1818
1819int cx23885_ir_init(struct cx23885_dev *dev)
1820{
98d109f9 1821 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
81f287da 1822 {
4eb2f557 1823 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
81f287da
AW		 1824 .pin = CX23885_PIN_IR_RX_GPIO19,
1825 .function = CX23885_PAD_IR_RX,
1826 .value = 0,
1827 .strength = CX25840_PIN_DRIVE_MEDIUM,
1828 }, {
4eb2f557 1829 .flags = BIT(V4L2_SUBDEV_IO_PIN_OUTPUT),
81f287da
AW		 1830 .pin = CX23885_PIN_IR_TX_GPIO20,
1831 .function = CX23885_PAD_IR_TX,
1832 .value = 0,
1833 .strength = CX25840_PIN_DRIVE_MEDIUM,
1834 }
1835 };
98d109f9
AW		 1836 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1837
1838 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1839 {
4eb2f557 1840 .flags = BIT(V4L2_SUBDEV_IO_PIN_INPUT),
98d109f9
AW		 1841 .pin = CX23885_PIN_IR_RX_GPIO19,
1842 .function = CX23885_PAD_IR_RX,
1843 .value = 0,
1844 .strength = CX25840_PIN_DRIVE_MEDIUM,
1845 }
1846 };
1847 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
81f287da
AW		 1848
1849 struct v4l2_subdev_ir_parameters params;
29f8a0a5 1850 int ret = 0;
a6a3f140 1851 switch (dev->board) {
07b4a835 1852 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 1853 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 1854 case CX23885_BOARD_HAUPPAUGE_HVR1800:
b3ea0166 1855 case CX23885_BOARD_HAUPPAUGE_HVR1200:
66762373 1856 case CX23885_BOARD_HAUPPAUGE_HVR1400:
d099becb 1857 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 1858 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1859 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
6b926eca 1860 case CX23885_BOARD_HAUPPAUGE_HVR1210:
10a5210e 1861 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
dd9ad4fb 1862 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
a6a3f140
ST		 1863 /* FIXME: Implement me */
1864 break;
9b3d8ecc
AW		 1865 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1866 ret = cx23888_ir_probe(dev);
1867 if (ret)
1868 break;
1869 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1870 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1871 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1872 break;
29f8a0a5 1873 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 1874 case CX23885_BOARD_HAUPPAUGE_HVR1290:
29f8a0a5
AW		 1875 ret = cx23888_ir_probe(dev);
1876 if (ret)
1877 break;
1878 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
81f287da 1879 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
98d109f9 1880 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
81f287da
AW		 1881 /*
1882 * For these boards we need to invert the Tx output via the
1883 * IR controller to have the LED off while idle
1884 */
1885 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1886 params.enable = false;
1887 params.shutdown = false;
1888 params.invert_level = true;
1889 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1890 params.shutdown = true;
1891 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
29f8a0a5 1892 break;
076f0e35 1893 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
98d109f9 1894 case CX23885_BOARD_TEVII_S470:
e5f670b7 1895 case CX23885_BOARD_MYGICA_X8507:
e6001482
LA		 1896 case CX23885_BOARD_TBS_6980:
1897 case CX23885_BOARD_TBS_6981:
d11a3835 1898 case CX23885_BOARD_DVBSKY_T9580:
070e6661 1899 case CX23885_BOARD_DVBSKY_T980C:
1900 case CX23885_BOARD_DVBSKY_S950C:
61b103e8 1901 case CX23885_BOARD_TT_CT2_4500_CI:
cba5480c 1902 case CX23885_BOARD_DVBSKY_S950:
c29d6a83 1903 case CX23885_BOARD_DVBSKY_S952:
c02ef64a 1904 case CX23885_BOARD_DVBSKY_T982:
fa647f24
AW		 1905 if (!enable_885_ir)
1906 break;
98d109f9
AW		 1907 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1908 if (dev->sd_ir == NULL) {
1909 ret = -ENODEV;
1910 break;
1911 }
1912 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1913 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
98d109f9
AW		 1914 break;
1915 case CX23885_BOARD_HAUPPAUGE_HVR1250:
fa647f24
AW		 1916 if (!enable_885_ir)
1917 break;
98d109f9
AW		 1918 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1919 if (dev->sd_ir == NULL) {
1920 ret = -ENODEV;
1921 break;
1922 }
1923 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1924 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
98d109f9 1925 break;
12886871 1926 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
46b21bba 1927 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
12886871
ST		 1928 request_module("ir-kbd-i2c");
1929 break;
a6a3f140
ST		 1930 }
1931
29f8a0a5 1932 return ret;
a6a3f140
ST		 1933}
1934
f59ad611
AW		 1935void cx23885_ir_fini(struct cx23885_dev *dev)
1936{
1937 switch (dev->board) {
9b3d8ecc 1938 case CX23885_BOARD_HAUPPAUGE_HVR1270:
f59ad611 1939 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 1940 case CX23885_BOARD_HAUPPAUGE_HVR1290:
dbe83a3b 1941 cx23885_irq_remove(dev, PCI_MSK_IR);
f59ad611
AW		 1942 cx23888_ir_remove(dev);
1943 dev->sd_ir = NULL;
1944 break;
076f0e35 1945 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
98d109f9
AW		 1946 case CX23885_BOARD_TEVII_S470:
1947 case CX23885_BOARD_HAUPPAUGE_HVR1250:
e5f670b7 1948 case CX23885_BOARD_MYGICA_X8507:
e6001482
LA		 1949 case CX23885_BOARD_TBS_6980:
1950 case CX23885_BOARD_TBS_6981:
d11a3835 1951 case CX23885_BOARD_DVBSKY_T9580:
070e6661 1952 case CX23885_BOARD_DVBSKY_T980C:
1953 case CX23885_BOARD_DVBSKY_S950C:
61b103e8 1954 case CX23885_BOARD_TT_CT2_4500_CI:
cba5480c 1955 case CX23885_BOARD_DVBSKY_S950:
c29d6a83 1956 case CX23885_BOARD_DVBSKY_S952:
c02ef64a 1957 case CX23885_BOARD_DVBSKY_T982:
dbe83a3b 1958 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
98d109f9
AW		 1959 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1960 dev->sd_ir = NULL;
1961 break;
f59ad611
AW		 1962 }
1963}
1964
ada73eee 1965static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
78db8547
IL		 1966{
1967 int data;
1968 int tdo = 0;
1969 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1970 /*TMS*/
1971 data = ((cx_read(GP0_IO)) & (~0x00000002));
1972 data |= (tms ? 0x00020002 : 0x00020000);
1973 cx_write(GP0_IO, data);
1974
1975 /*TDI*/
1976 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1977 data |= (tdi ? 0x00008000 : 0);
1978 cx_write(MC417_RWD, data);
1979 if (read_tdo)
1980 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1981
1982 cx_write(MC417_RWD, data | 0x00002000);
1983 udelay(1);
1984 /*TCK*/
1985 cx_write(MC417_RWD, data);
1986
1987 return tdo;
1988}
1989
f59ad611
AW		 1990void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1991{
1992 switch (dev->board) {
9b3d8ecc 1993 case CX23885_BOARD_HAUPPAUGE_HVR1270:
f59ad611 1994 case CX23885_BOARD_HAUPPAUGE_HVR1850:
7fec6fee 1995 case CX23885_BOARD_HAUPPAUGE_HVR1290:
dbe83a3b
AW		 1996 if (dev->sd_ir)
1997 cx23885_irq_add_enable(dev, PCI_MSK_IR);
f59ad611 1998 break;
076f0e35 1999 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
98d109f9
AW		 2000 case CX23885_BOARD_TEVII_S470:
2001 case CX23885_BOARD_HAUPPAUGE_HVR1250:
e5f670b7 2002 case CX23885_BOARD_MYGICA_X8507:
e6001482
LA		 2003 case CX23885_BOARD_TBS_6980:
2004 case CX23885_BOARD_TBS_6981:
d11a3835 2005 case CX23885_BOARD_DVBSKY_T9580:
070e6661 2006 case CX23885_BOARD_DVBSKY_T980C:
2007 case CX23885_BOARD_DVBSKY_S950C:
61b103e8 2008 case CX23885_BOARD_TT_CT2_4500_CI:
cba5480c 2009 case CX23885_BOARD_DVBSKY_S950:
c29d6a83 2010 case CX23885_BOARD_DVBSKY_S952:
c02ef64a 2011 case CX23885_BOARD_DVBSKY_T982:
dbe83a3b
AW		 2012 if (dev->sd_ir)
2013 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
98d109f9 2014 break;
f59ad611
AW		 2015 }
2016}
2017
d19770e5
ST		 2018void cx23885_card_setup(struct cx23885_dev *dev)
2019{
a6a3f140
ST		 2020 struct cx23885_tsport *ts1 = &dev->ts1;
2021 struct cx23885_tsport *ts2 = &dev->ts2;
2022
d19770e5
ST		 2023 static u8 eeprom[256];
2024
2025 if (dev->i2c_bus[0].i2c_rc == 0) {
2026 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
44a6481d
MK		 2027 tveeprom_read(&dev->i2c_bus[0].i2c_client,
2028 eeprom, sizeof(eeprom));
d19770e5
ST		 2029 }
2030
2031 switch (dev->board) {
a77743bc 2032 case CX23885_BOARD_HAUPPAUGE_HVR1250:
ebbeb460
AW		 2033 if (dev->i2c_bus[0].i2c_rc == 0) {
2034 if (eeprom[0x80] != 0x84)
2035 hauppauge_eeprom(dev, eeprom+0xc0);
2036 else
2037 hauppauge_eeprom(dev, eeprom+0x80);
2038 }
2039 break;
07b4a835 2040 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 2041 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
66762373 2042 case CX23885_BOARD_HAUPPAUGE_HVR1400:
c88133ec
ST		 2043 if (dev->i2c_bus[0].i2c_rc == 0)
2044 hauppauge_eeprom(dev, eeprom+0x80);
2045 break;
d19770e5
ST		 2046 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2047 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 2048 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 2049 case CX23885_BOARD_HAUPPAUGE_HVR1700:
2074dffa 2050 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 2051 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 2052 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 2053 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
6b926eca 2054 case CX23885_BOARD_HAUPPAUGE_HVR1210:
13697380 2055 case CX23885_BOARD_HAUPPAUGE_HVR1850:
aee0b24c 2056 case CX23885_BOARD_HAUPPAUGE_HVR1290:
7c62f5a1 2057 case CX23885_BOARD_HAUPPAUGE_HVR4400:
721f3223 2058 case CX23885_BOARD_HAUPPAUGE_STARBURST:
cce11b09 2059 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
1fc77d01 2060 case CX23885_BOARD_HAUPPAUGE_HVR5525:
10a5210e 2061 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
dd9ad4fb 2062 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
d19770e5 2063 if (dev->i2c_bus[0].i2c_rc == 0)
c88133ec 2064 hauppauge_eeprom(dev, eeprom+0xc0);
d19770e5 2065 break;
6c43a217
HV		 2066 case CX23885_BOARD_VIEWCAST_260E:
2067 case CX23885_BOARD_VIEWCAST_460E:
2068 dev->i2c_bus[1].i2c_client.addr = 0xa0 >> 1;
2069 tveeprom_read(&dev->i2c_bus[1].i2c_client,
2070 eeprom, sizeof(eeprom));
2071 if (dev->i2c_bus[0].i2c_rc == 0)
2072 viewcast_eeprom(dev, eeprom);
2073 break;
d19770e5 2074 }
a6a3f140
ST		 2075
2076 switch (dev->board) {
e8d42373
OK		 2077 case CX23885_BOARD_AVERMEDIA_HC81R:
2078 /* Defaults for VID B */
2079 ts1->gen_ctrl_val = 0x4; /* Parallel */
2080 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2081 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2082 /* Defaults for VID C */
2083 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2084 ts2->gen_ctrl_val = 0x10e;
2085 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2086 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2087 break;
335377b7 2088 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
aef2d186 2089 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
46b21bba 2090 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2:
335377b7
MK		 2091 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2092 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2093 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
06eeefe8 2094 /* fall-through */
a6a3f140
ST		 2095 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2096 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2097 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2098 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2099 break;
35045137 2100 case CX23885_BOARD_HAUPPAUGE_HVR1850:
a589b665
ST		 2101 case CX23885_BOARD_HAUPPAUGE_HVR1800:
2102 /* Defaults for VID B - Analog encoder */
2103 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
2104 ts1->gen_ctrl_val = 0x10e;
2105 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2106 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2107
2108 /* APB_TSVALERR_POL (active low)*/
2109 ts1->vld_misc_val = 0x2000;
2110 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
35045137 2111 cx_write(0x130184, 0xc);
a589b665
ST		 2112
2113 /* Defaults for VID C */
2114 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2115 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2116 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
96318d0c
IL		 2117 break;
2118 case CX23885_BOARD_TBS_6920:
09ea33e5
IL		 2119 ts1->gen_ctrl_val = 0x4; /* Parallel */
2120 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2121 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2122 break;
2123 case CX23885_BOARD_TEVII_S470:
7b134e85 2124 case CX23885_BOARD_TEVII_S471:
c9b8b04b 2125 case CX23885_BOARD_DVBWORLD_2005:
f667190b 2126 case CX23885_BOARD_PROF_8000:
82c10276 2127 case CX23885_BOARD_DVBSKY_T980C:
0e6c7b01 2128 case CX23885_BOARD_DVBSKY_S950C:
61b103e8 2129 case CX23885_BOARD_TT_CT2_4500_CI:
cba5480c 2130 case CX23885_BOARD_DVBSKY_S950:
96318d0c
IL		 2131 ts1->gen_ctrl_val = 0x5; /* Parallel */
2132 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2133 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
a589b665 2134 break;
5a23b076 2135 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
78db8547 2136 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
722c90eb 2137 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
5a23b076
IL		 2138 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2139 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2140 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2141 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2142 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2143 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2144 break;
e6001482
LA		 2145 case CX23885_BOARD_TBS_6980:
2146 case CX23885_BOARD_TBS_6981:
2147 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2148 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2149 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2150 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2151 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2152 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2153 tbs_card_init(dev);
2154 break;
493b7127 2155 case CX23885_BOARD_MYGICA_X8506:
2365b2d3 2156 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
0d1b5265 2157 case CX23885_BOARD_MYGICA_X8507:
493b7127
DW		 2158 ts1->gen_ctrl_val = 0x5; /* Parallel */
2159 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2160 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2161 break;
ea5697fe
DW		 2162 case CX23885_BOARD_MYGICA_X8558PRO:
2163 ts1->gen_ctrl_val = 0x5; /* Parallel */
2164 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2165 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2166 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2167 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2168 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2169 break;
7c62f5a1
MK		 2170 case CX23885_BOARD_HAUPPAUGE_HVR4400:
2171 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2172 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2173 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
36efec48
MS		 2174 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2175 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2176 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
7c62f5a1 2177 break;
721f3223
MS		 2178 case CX23885_BOARD_HAUPPAUGE_STARBURST:
2179 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2180 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2181 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2182 break;
29442266 2183 case CX23885_BOARD_DVBSKY_T9580:
c02ef64a 2184 case CX23885_BOARD_DVBSKY_T982:
29442266
OS		 2185 ts1->gen_ctrl_val = 0x5; /* Parallel */
2186 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2187 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2188 ts2->gen_ctrl_val = 0x8; /* Serial bus */
2189 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2190 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2191 break;
c29d6a83 2192 case CX23885_BOARD_DVBSKY_S952:
2193 ts1->gen_ctrl_val = 0x5; /* Parallel */
2194 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2195 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2196 ts2->gen_ctrl_val = 0xe; /* Serial bus */
2197 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2198 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1fc77d01
AP		 2199 break;
2200 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2201 ts1->gen_ctrl_val = 0x5; /* Parallel */
2202 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2203 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2204 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2205 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2206 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
c29d6a83 2207 break;
10a5210e 2208 case CX23885_BOARD_HAUPPAUGE_QUADHD_DVB:
dd9ad4fb 2209 case CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC:
10a5210e
SB		 2210 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2211 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2212 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2213 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2214 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2215 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2216 break;
a6a3f140 2217 case CX23885_BOARD_HAUPPAUGE_HVR1250:
07b4a835 2218 case CX23885_BOARD_HAUPPAUGE_HVR1500:
d1987d55 2219 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
a6a3f140 2220 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
b3ea0166 2221 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 2222 case CX23885_BOARD_HAUPPAUGE_HVR1700:
66762373 2223 case CX23885_BOARD_HAUPPAUGE_HVR1400:
cce11b09 2224 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
4c56b04a 2225 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
642ca1a0 2226 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
0cf8af57 2227 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
9bb1b7e8 2228 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
2074dffa 2229 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 2230 case CX23885_BOARD_HAUPPAUGE_HVR1275:
19bc5796 2231 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 2232 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
6b926eca 2233 case CX23885_BOARD_HAUPPAUGE_HVR1210:
34e383dd 2234 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
aee0b24c 2235 case CX23885_BOARD_HAUPPAUGE_HVR1290:
9028f58f 2236 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
a6a3f140
ST		 2237 default:
2238 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2239 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2240 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2241 }
2242
ce89cfb4
ST		 2243 /* Certain boards support analog, or require the avcore to be
2244 * loaded, ensure this happens.
2245 */
2246 switch (dev->board) {
fa647f24 2247 case CX23885_BOARD_TEVII_S470:
fa647f24
AW		 2248 /* Currently only enabled for the integrated IR controller */
2249 if (!enable_885_ir)
2250 break;
06eeefe8 2251 /* fall-through */
d214ddc8 2252 case CX23885_BOARD_HAUPPAUGE_HVR1250:
ce89cfb4 2253 case CX23885_BOARD_HAUPPAUGE_HVR1800:
cce11b09 2254 case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
ce89cfb4
ST		 2255 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
2256 case CX23885_BOARD_HAUPPAUGE_HVR1700:
4c56b04a 2257 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
642ca1a0 2258 case CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200:
0cf8af57 2259 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
9bb1b7e8 2260 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
5a23b076 2261 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
78db8547 2262 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
34e383dd 2263 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
0ac60acb
DH		 2264 case CX23885_BOARD_HAUPPAUGE_HVR1255:
2265 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
9b3d8ecc 2266 case CX23885_BOARD_HAUPPAUGE_HVR1270:
c6b7053b 2267 case CX23885_BOARD_HAUPPAUGE_HVR1850:
bc1548ad
DW		 2268 case CX23885_BOARD_MYGICA_X8506:
2269 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
aee0b24c 2270 case CX23885_BOARD_HAUPPAUGE_HVR1290:
0b32d65c 2271 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
9028f58f 2272 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
18d64476 2273 case CX23885_BOARD_HAUPPAUGE_HVR1500:
2cb9ccd4 2274 case CX23885_BOARD_MPX885:
87988753 2275 case CX23885_BOARD_MYGICA_X8507:
722c90eb 2276 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
e8d42373 2277 case CX23885_BOARD_AVERMEDIA_HC81R:
e6001482
LA		 2278 case CX23885_BOARD_TBS_6980:
2279 case CX23885_BOARD_TBS_6981:
29442266 2280 case CX23885_BOARD_DVBSKY_T9580:
82c10276 2281 case CX23885_BOARD_DVBSKY_T980C:
0e6c7b01 2282 case CX23885_BOARD_DVBSKY_S950C:
61b103e8 2283 case CX23885_BOARD_TT_CT2_4500_CI:
cba5480c 2284 case CX23885_BOARD_DVBSKY_S950:
c29d6a83 2285 case CX23885_BOARD_DVBSKY_S952:
c02ef64a 2286 case CX23885_BOARD_DVBSKY_T982:
6c43a217
HV		 2287 case CX23885_BOARD_VIEWCAST_260E:
2288 case CX23885_BOARD_VIEWCAST_460E:
e6574f2f
HV		 2289 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
2290 &dev->i2c_bus[2].i2c_adap,
9a1f8b34 2291 "cx25840", 0x88 >> 1, NULL);
d6b1850d
AW		 2292 if (dev->sd_cx25840) {
2293 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
2294 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
2295 }
ce89cfb4
ST		 2296 break;
2297 }
5a23b076 2298
6c43a217
HV		 2299 switch (dev->board) {
2300 case CX23885_BOARD_VIEWCAST_260E:
2301 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2302 &dev->i2c_bus[0].i2c_adap,
2303 "cs3308", 0x82 >> 1, NULL);
2304 break;
2305 case CX23885_BOARD_VIEWCAST_460E:
2306 /* This cs3308 controls the audio from the breakout cable */
2307 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2308 &dev->i2c_bus[0].i2c_adap,
2309 "cs3308", 0x80 >> 1, NULL);
2310 /* This cs3308 controls the audio from the onboard header */
2311 v4l2_i2c_new_subdev(&dev->v4l2_dev,
2312 &dev->i2c_bus[0].i2c_adap,
2313 "cs3308", 0x82 >> 1, NULL);
2314 break;
2315 }
2316
5a23b076
IL		 2317 /* AUX-PLL 27MHz CLK */
2318 switch (dev->board) {
2319 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2320 netup_initialize(dev);
2321 break;
78db8547
IL		 2322 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2323 int ret;
2324 const struct firmware *fw;
2325 const char *filename = "dvb-netup-altera-01.fw";
2326 char *action = "configure";
b8f0d306 2327 static struct netup_card_info cinfo;
78db8547
IL		 2328 struct altera_config netup_config = {
2329 .dev = dev,
2330 .action = action,
2331 .jtag_io = netup_jtag_io,
2332 };
2333
2334 netup_initialize(dev);
2335
b8f0d306 2336 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2d12421d
AO		 2337 if (netup_card_rev)
2338 cinfo.rev = netup_card_rev;
2339
b8f0d306
AO		 2340 switch (cinfo.rev) {
2341 case 0x4:
2342 filename = "dvb-netup-altera-04.fw";
2343 break;
2344 default:
2345 filename = "dvb-netup-altera-01.fw";
2346 break;
2347 }
e39682b5
MCC		 2348 pr_info("NetUP card rev=0x%x fw_filename=%s\n",
2349 cinfo.rev, filename);
b8f0d306 2350
78db8547
IL		 2351 ret = request_firmware(&fw, filename, &dev->pci->dev);
2352 if (ret != 0)
e39682b5 2353 pr_err("did not find the firmware file. (%s) Please see linux/Documentation/dvb/ for more details on firmware-problems.",
07ab29e1 2354 filename);
78db8547
IL		 2355 else
2356 altera_init(&netup_config, fw);
2357
3f84a4e1 2358 release_firmware(fw);
78db8547
IL		 2359 break;
2360 }
5a23b076 2361 }
d19770e5 2362}
Linux 6.x block layer and io_uring tree(s)