Commit | Line | Data |
---|---|---|
1c1e45d1 HV |
1 | /* |
2 | * cx18 buffer queues | |
3 | * | |
4 | * Derived from ivtv-queue.c | |
5 | * | |
6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
6afdeaf8 | 7 | * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> |
1c1e45d1 HV |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
1c1e45d1 HV |
18 | */ |
19 | ||
20 | #include "cx18-driver.h" | |
1c1e45d1 | 21 | #include "cx18-queue.h" |
21a278b8 | 22 | #include "cx18-streams.h" |
1c1e45d1 | 23 | #include "cx18-scb.h" |
52fcb3ec | 24 | #include "cx18-io.h" |
1c1e45d1 | 25 | |
1c1e45d1 HV |
26 | void cx18_buf_swap(struct cx18_buffer *buf) |
27 | { | |
28 | int i; | |
29 | ||
30 | for (i = 0; i < buf->bytesused; i += 4) | |
31 | swab32s((u32 *)(buf->buf + i)); | |
32 | } | |
33 | ||
52fcb3ec AW |
34 | void _cx18_mdl_swap(struct cx18_mdl *mdl) |
35 | { | |
36 | struct cx18_buffer *buf; | |
37 | ||
38 | list_for_each_entry(buf, &mdl->buf_list, list) { | |
39 | if (buf->bytesused == 0) | |
40 | break; | |
41 | cx18_buf_swap(buf); | |
42 | } | |
43 | } | |
44 | ||
1c1e45d1 HV |
45 | void cx18_queue_init(struct cx18_queue *q) |
46 | { | |
47 | INIT_LIST_HEAD(&q->list); | |
c37b11bf | 48 | atomic_set(&q->depth, 0); |
1c1e45d1 HV |
49 | q->bytesused = 0; |
50 | } | |
51 | ||
52fcb3ec | 52 | struct cx18_queue *_cx18_enqueue(struct cx18_stream *s, struct cx18_mdl *mdl, |
66c2a6b0 | 53 | struct cx18_queue *q, int to_front) |
1c1e45d1 | 54 | { |
52fcb3ec | 55 | /* clear the mdl if it is not to be enqueued to the full queue */ |
66c2a6b0 | 56 | if (q != &s->q_full) { |
52fcb3ec AW |
57 | mdl->bytesused = 0; |
58 | mdl->readpos = 0; | |
59 | mdl->m_flags = 0; | |
60 | mdl->skipped = 0; | |
61 | mdl->curr_buf = NULL; | |
1c1e45d1 | 62 | } |
66c2a6b0 | 63 | |
0ef02892 AW |
64 | /* q_busy is restricted to a max buffer count imposed by firmware */ |
65 | if (q == &s->q_busy && | |
c37b11bf | 66 | atomic_read(&q->depth) >= CX18_MAX_FW_MDLS_PER_STREAM) |
66c2a6b0 AW |
67 | q = &s->q_free; |
68 | ||
40c5520f AW |
69 | spin_lock(&q->lock); |
70 | ||
b80e1074 | 71 | if (to_front) |
52fcb3ec | 72 | list_add(&mdl->list, &q->list); /* LIFO */ |
b80e1074 | 73 | else |
52fcb3ec AW |
74 | list_add_tail(&mdl->list, &q->list); /* FIFO */ |
75 | q->bytesused += mdl->bytesused - mdl->readpos; | |
c37b11bf | 76 | atomic_inc(&q->depth); |
66c2a6b0 | 77 | |
40c5520f | 78 | spin_unlock(&q->lock); |
66c2a6b0 | 79 | return q; |
1c1e45d1 HV |
80 | } |
81 | ||
52fcb3ec | 82 | struct cx18_mdl *cx18_dequeue(struct cx18_stream *s, struct cx18_queue *q) |
1c1e45d1 | 83 | { |
52fcb3ec | 84 | struct cx18_mdl *mdl = NULL; |
1c1e45d1 | 85 | |
40c5520f | 86 | spin_lock(&q->lock); |
1c1e45d1 | 87 | if (!list_empty(&q->list)) { |
52fcb3ec AW |
88 | mdl = list_first_entry(&q->list, struct cx18_mdl, list); |
89 | list_del_init(&mdl->list); | |
90 | q->bytesused -= mdl->bytesused - mdl->readpos; | |
91 | mdl->skipped = 0; | |
c37b11bf | 92 | atomic_dec(&q->depth); |
1c1e45d1 | 93 | } |
40c5520f | 94 | spin_unlock(&q->lock); |
52fcb3ec AW |
95 | return mdl; |
96 | } | |
97 | ||
ad689d54 AW |
98 | static void _cx18_mdl_update_bufs_for_cpu(struct cx18_stream *s, |
99 | struct cx18_mdl *mdl) | |
52fcb3ec AW |
100 | { |
101 | struct cx18_buffer *buf; | |
102 | u32 buf_size = s->buf_size; | |
103 | u32 bytesused = mdl->bytesused; | |
104 | ||
105 | list_for_each_entry(buf, &mdl->buf_list, list) { | |
106 | buf->readpos = 0; | |
107 | if (bytesused >= buf_size) { | |
108 | buf->bytesused = buf_size; | |
109 | bytesused -= buf_size; | |
110 | } else { | |
111 | buf->bytesused = bytesused; | |
112 | bytesused = 0; | |
113 | } | |
ad689d54 | 114 | cx18_buf_sync_for_cpu(s, buf); |
52fcb3ec | 115 | } |
1c1e45d1 HV |
116 | } |
117 | ||
ad689d54 AW |
118 | static inline void cx18_mdl_update_bufs_for_cpu(struct cx18_stream *s, |
119 | struct cx18_mdl *mdl) | |
52fcb3ec AW |
120 | { |
121 | struct cx18_buffer *buf; | |
122 | ||
123 | if (list_is_singular(&mdl->buf_list)) { | |
124 | buf = list_first_entry(&mdl->buf_list, struct cx18_buffer, | |
125 | list); | |
126 | buf->bytesused = mdl->bytesused; | |
127 | buf->readpos = 0; | |
ad689d54 | 128 | cx18_buf_sync_for_cpu(s, buf); |
52fcb3ec | 129 | } else { |
ad689d54 | 130 | _cx18_mdl_update_bufs_for_cpu(s, mdl); |
52fcb3ec AW |
131 | } |
132 | } | |
133 | ||
134 | struct cx18_mdl *cx18_queue_get_mdl(struct cx18_stream *s, u32 id, | |
1c1e45d1 HV |
135 | u32 bytesused) |
136 | { | |
137 | struct cx18 *cx = s->cx; | |
52fcb3ec AW |
138 | struct cx18_mdl *mdl; |
139 | struct cx18_mdl *tmp; | |
140 | struct cx18_mdl *ret = NULL; | |
40c5520f AW |
141 | LIST_HEAD(sweep_up); |
142 | ||
143 | /* | |
144 | * We don't have to acquire multiple q locks here, because we are | |
145 | * serialized by the single threaded work handler. | |
52fcb3ec | 146 | * MDLs from the firmware will thus remain in order as |
40c5520f AW |
147 | * they are moved from q_busy to q_full or to the dvb ring buffer. |
148 | */ | |
149 | spin_lock(&s->q_busy.lock); | |
52fcb3ec | 150 | list_for_each_entry_safe(mdl, tmp, &s->q_busy.list, list) { |
40c5520f AW |
151 | /* |
152 | * We should find what the firmware told us is done, | |
153 | * right at the front of the queue. If we don't, we likely have | |
52fcb3ec AW |
154 | * missed an mdl done message from the firmware. |
155 | * Once we skip an mdl repeatedly, relative to the size of | |
40c5520f AW |
156 | * q_busy, we have high confidence we've missed it. |
157 | */ | |
52fcb3ec AW |
158 | if (mdl->id != id) { |
159 | mdl->skipped++; | |
160 | if (mdl->skipped >= atomic_read(&s->q_busy.depth)-1) { | |
161 | /* mdl must have fallen out of rotation */ | |
6beb1388 MCC |
162 | CX18_WARN("Skipped %s, MDL %d, %d times - it must have dropped out of rotation\n", |
163 | s->name, mdl->id, | |
52fcb3ec | 164 | mdl->skipped); |
40c5520f | 165 | /* Sweep it up to put it back into rotation */ |
52fcb3ec | 166 | list_move_tail(&mdl->list, &sweep_up); |
c37b11bf | 167 | atomic_dec(&s->q_busy.depth); |
bca11a57 | 168 | } |
1c1e45d1 | 169 | continue; |
ee2d64f5 | 170 | } |
40c5520f | 171 | /* |
52fcb3ec | 172 | * We pull the desired mdl off of the queue here. Something |
40c5520f AW |
173 | * will have to put it back on a queue later. |
174 | */ | |
52fcb3ec | 175 | list_del_init(&mdl->list); |
c37b11bf | 176 | atomic_dec(&s->q_busy.depth); |
52fcb3ec | 177 | ret = mdl; |
bca11a57 | 178 | break; |
1c1e45d1 | 179 | } |
40c5520f AW |
180 | spin_unlock(&s->q_busy.lock); |
181 | ||
182 | /* | |
52fcb3ec | 183 | * We found the mdl for which we were looking. Get it ready for |
40c5520f AW |
184 | * the caller to put on q_full or in the dvb ring buffer. |
185 | */ | |
186 | if (ret != NULL) { | |
187 | ret->bytesused = bytesused; | |
188 | ret->skipped = 0; | |
52fcb3ec | 189 | /* 0'ed readpos, m_flags & curr_buf when mdl went on q_busy */ |
ad689d54 | 190 | cx18_mdl_update_bufs_for_cpu(s, ret); |
40c5520f | 191 | if (s->type != CX18_ENC_STREAM_TYPE_TS) |
52fcb3ec | 192 | set_bit(CX18_F_M_NEED_SWAP, &ret->m_flags); |
40c5520f AW |
193 | } |
194 | ||
52fcb3ec AW |
195 | /* Put any mdls the firmware is ignoring back into normal rotation */ |
196 | list_for_each_entry_safe(mdl, tmp, &sweep_up, list) { | |
197 | list_del_init(&mdl->list); | |
198 | cx18_enqueue(s, mdl, &s->q_free); | |
40c5520f | 199 | } |
bca11a57 | 200 | return ret; |
1c1e45d1 HV |
201 | } |
202 | ||
52fcb3ec AW |
203 | /* Move all mdls of a queue, while flushing the mdl */ |
204 | static void cx18_queue_flush(struct cx18_stream *s, | |
205 | struct cx18_queue *q_src, struct cx18_queue *q_dst) | |
1c1e45d1 | 206 | { |
52fcb3ec | 207 | struct cx18_mdl *mdl; |
1c1e45d1 | 208 | |
52fcb3ec AW |
209 | /* It only makes sense to flush to q_free or q_idle */ |
210 | if (q_src == q_dst || q_dst == &s->q_full || q_dst == &s->q_busy) | |
6c9de528 | 211 | return; |
1c1e45d1 | 212 | |
52fcb3ec AW |
213 | spin_lock(&q_src->lock); |
214 | spin_lock(&q_dst->lock); | |
215 | while (!list_empty(&q_src->list)) { | |
216 | mdl = list_first_entry(&q_src->list, struct cx18_mdl, list); | |
217 | list_move_tail(&mdl->list, &q_dst->list); | |
218 | mdl->bytesused = 0; | |
219 | mdl->readpos = 0; | |
220 | mdl->m_flags = 0; | |
221 | mdl->skipped = 0; | |
222 | mdl->curr_buf = NULL; | |
223 | atomic_inc(&q_dst->depth); | |
1c1e45d1 | 224 | } |
52fcb3ec AW |
225 | cx18_queue_init(q_src); |
226 | spin_unlock(&q_src->lock); | |
227 | spin_unlock(&q_dst->lock); | |
1c1e45d1 HV |
228 | } |
229 | ||
230 | void cx18_flush_queues(struct cx18_stream *s) | |
231 | { | |
52fcb3ec AW |
232 | cx18_queue_flush(s, &s->q_busy, &s->q_free); |
233 | cx18_queue_flush(s, &s->q_full, &s->q_free); | |
234 | } | |
235 | ||
236 | /* | |
237 | * Note, s->buf_pool is not protected by a lock, | |
238 | * the stream better not have *anything* going on when calling this | |
239 | */ | |
240 | void cx18_unload_queues(struct cx18_stream *s) | |
241 | { | |
242 | struct cx18_queue *q_idle = &s->q_idle; | |
243 | struct cx18_mdl *mdl; | |
244 | struct cx18_buffer *buf; | |
245 | ||
246 | /* Move all MDLS to q_idle */ | |
247 | cx18_queue_flush(s, &s->q_busy, q_idle); | |
248 | cx18_queue_flush(s, &s->q_full, q_idle); | |
249 | cx18_queue_flush(s, &s->q_free, q_idle); | |
250 | ||
251 | /* Reset MDL id's and move all buffers back to the stream's buf_pool */ | |
252 | spin_lock(&q_idle->lock); | |
253 | list_for_each_entry(mdl, &q_idle->list, list) { | |
254 | while (!list_empty(&mdl->buf_list)) { | |
255 | buf = list_first_entry(&mdl->buf_list, | |
256 | struct cx18_buffer, list); | |
257 | list_move_tail(&buf->list, &s->buf_pool); | |
258 | buf->bytesused = 0; | |
259 | buf->readpos = 0; | |
260 | } | |
261 | mdl->id = s->mdl_base_idx; /* reset id to a "safe" value */ | |
262 | /* all other mdl fields were cleared by cx18_queue_flush() */ | |
263 | } | |
264 | spin_unlock(&q_idle->lock); | |
265 | } | |
266 | ||
267 | /* | |
268 | * Note, s->buf_pool is not protected by a lock, | |
269 | * the stream better not have *anything* going on when calling this | |
270 | */ | |
271 | void cx18_load_queues(struct cx18_stream *s) | |
272 | { | |
273 | struct cx18 *cx = s->cx; | |
274 | struct cx18_mdl *mdl; | |
275 | struct cx18_buffer *buf; | |
276 | int mdl_id; | |
277 | int i; | |
1047a838 | 278 | u32 partial_buf_size; |
52fcb3ec AW |
279 | |
280 | /* | |
281 | * Attach buffers to MDLs, give the MDLs ids, and add MDLs to q_free | |
282 | * Excess MDLs are left on q_idle | |
283 | * Excess buffers are left in buf_pool and/or on an MDL in q_idle | |
284 | */ | |
285 | mdl_id = s->mdl_base_idx; | |
286 | for (mdl = cx18_dequeue(s, &s->q_idle), i = s->bufs_per_mdl; | |
287 | mdl != NULL && i == s->bufs_per_mdl; | |
288 | mdl = cx18_dequeue(s, &s->q_idle)) { | |
289 | ||
290 | mdl->id = mdl_id; | |
291 | ||
292 | for (i = 0; i < s->bufs_per_mdl; i++) { | |
293 | if (list_empty(&s->buf_pool)) | |
294 | break; | |
295 | ||
296 | buf = list_first_entry(&s->buf_pool, struct cx18_buffer, | |
297 | list); | |
298 | list_move_tail(&buf->list, &mdl->buf_list); | |
299 | ||
300 | /* update the firmware's MDL array with this buffer */ | |
301 | cx18_writel(cx, buf->dma_handle, | |
302 | &cx->scb->cpu_mdl[mdl_id + i].paddr); | |
303 | cx18_writel(cx, s->buf_size, | |
304 | &cx->scb->cpu_mdl[mdl_id + i].length); | |
305 | } | |
306 | ||
1047a838 AW |
307 | if (i == s->bufs_per_mdl) { |
308 | /* | |
309 | * The encoder doesn't honor s->mdl_size. So in the | |
310 | * case of a non-integral number of buffers to meet | |
311 | * mdl_size, we lie about the size of the last buffer | |
312 | * in the MDL to get the encoder to really only send | |
313 | * us mdl_size bytes per MDL transfer. | |
314 | */ | |
315 | partial_buf_size = s->mdl_size % s->buf_size; | |
316 | if (partial_buf_size) { | |
317 | cx18_writel(cx, partial_buf_size, | |
318 | &cx->scb->cpu_mdl[mdl_id + i - 1].length); | |
319 | } | |
52fcb3ec | 320 | cx18_enqueue(s, mdl, &s->q_free); |
1047a838 AW |
321 | } else { |
322 | /* Not enough buffers for this MDL; we won't use it */ | |
323 | cx18_push(s, mdl, &s->q_idle); | |
324 | } | |
52fcb3ec AW |
325 | mdl_id += i; |
326 | } | |
327 | } | |
328 | ||
52fcb3ec AW |
329 | void _cx18_mdl_sync_for_device(struct cx18_stream *s, struct cx18_mdl *mdl) |
330 | { | |
331 | int dma = s->dma; | |
332 | u32 buf_size = s->buf_size; | |
333 | struct pci_dev *pci_dev = s->cx->pci_dev; | |
334 | struct cx18_buffer *buf; | |
335 | ||
336 | list_for_each_entry(buf, &mdl->buf_list, list) | |
337 | pci_dma_sync_single_for_device(pci_dev, buf->dma_handle, | |
338 | buf_size, dma); | |
1c1e45d1 HV |
339 | } |
340 | ||
341 | int cx18_stream_alloc(struct cx18_stream *s) | |
342 | { | |
343 | struct cx18 *cx = s->cx; | |
344 | int i; | |
345 | ||
346 | if (s->buffers == 0) | |
347 | return 0; | |
348 | ||
6beb1388 | 349 | CX18_DEBUG_INFO("Allocate %s stream: %d x %d buffers (%d.%02d kB total)\n", |
1c1e45d1 | 350 | s->name, s->buffers, s->buf_size, |
22dce188 AW |
351 | s->buffers * s->buf_size / 1024, |
352 | (s->buffers * s->buf_size * 100 / 1024) % 100); | |
1c1e45d1 | 353 | |
fa655dda | 354 | if (((char __iomem *)&cx->scb->cpu_mdl[cx->free_mdl_idx + s->buffers] - |
c6eb8eaf HV |
355 | (char __iomem *)cx->scb) > SCB_RESERVED_SIZE) { |
356 | unsigned bufsz = (((char __iomem *)cx->scb) + SCB_RESERVED_SIZE - | |
357 | ((char __iomem *)cx->scb->cpu_mdl)); | |
1c1e45d1 HV |
358 | |
359 | CX18_ERR("Too many buffers, cannot fit in SCB area\n"); | |
339f06c5 | 360 | CX18_ERR("Max buffers = %zu\n", |
f0076e60 | 361 | bufsz / sizeof(struct cx18_mdl_ent)); |
1c1e45d1 HV |
362 | return -ENOMEM; |
363 | } | |
364 | ||
fa655dda | 365 | s->mdl_base_idx = cx->free_mdl_idx; |
1c1e45d1 | 366 | |
52fcb3ec | 367 | /* allocate stream buffers and MDLs */ |
1c1e45d1 | 368 | for (i = 0; i < s->buffers; i++) { |
52fcb3ec AW |
369 | struct cx18_mdl *mdl; |
370 | struct cx18_buffer *buf; | |
1c1e45d1 | 371 | |
52fcb3ec AW |
372 | /* 1 MDL per buffer to handle the worst & also default case */ |
373 | mdl = kzalloc(sizeof(struct cx18_mdl), GFP_KERNEL|__GFP_NOWARN); | |
374 | if (mdl == NULL) | |
1c1e45d1 | 375 | break; |
52fcb3ec AW |
376 | |
377 | buf = kzalloc(sizeof(struct cx18_buffer), | |
378 | GFP_KERNEL|__GFP_NOWARN); | |
379 | if (buf == NULL) { | |
380 | kfree(mdl); | |
381 | break; | |
382 | } | |
383 | ||
3f98387e | 384 | buf->buf = kmalloc(s->buf_size, GFP_KERNEL|__GFP_NOWARN); |
1c1e45d1 | 385 | if (buf->buf == NULL) { |
52fcb3ec | 386 | kfree(mdl); |
1c1e45d1 HV |
387 | kfree(buf); |
388 | break; | |
389 | } | |
52fcb3ec AW |
390 | |
391 | INIT_LIST_HEAD(&mdl->list); | |
392 | INIT_LIST_HEAD(&mdl->buf_list); | |
393 | mdl->id = s->mdl_base_idx; /* a somewhat safe value */ | |
394 | cx18_enqueue(s, mdl, &s->q_idle); | |
395 | ||
1c1e45d1 | 396 | INIT_LIST_HEAD(&buf->list); |
3d05913d | 397 | buf->dma_handle = pci_map_single(s->cx->pci_dev, |
1c1e45d1 HV |
398 | buf->buf, s->buf_size, s->dma); |
399 | cx18_buf_sync_for_cpu(s, buf); | |
52fcb3ec | 400 | list_add_tail(&buf->list, &s->buf_pool); |
1c1e45d1 HV |
401 | } |
402 | if (i == s->buffers) { | |
fa655dda | 403 | cx->free_mdl_idx += s->buffers; |
1c1e45d1 HV |
404 | return 0; |
405 | } | |
406 | CX18_ERR("Couldn't allocate buffers for %s stream\n", s->name); | |
407 | cx18_stream_free(s); | |
408 | return -ENOMEM; | |
409 | } | |
410 | ||
411 | void cx18_stream_free(struct cx18_stream *s) | |
412 | { | |
52fcb3ec | 413 | struct cx18_mdl *mdl; |
1c1e45d1 | 414 | struct cx18_buffer *buf; |
7b1dde03 AW |
415 | struct cx18 *cx = s->cx; |
416 | ||
417 | CX18_DEBUG_INFO("Deallocating buffers for %s stream\n", s->name); | |
1c1e45d1 | 418 | |
52fcb3ec AW |
419 | /* move all buffers to buf_pool and all MDLs to q_idle */ |
420 | cx18_unload_queues(s); | |
421 | ||
422 | /* empty q_idle */ | |
423 | while ((mdl = cx18_dequeue(s, &s->q_idle))) | |
424 | kfree(mdl); | |
425 | ||
426 | /* empty buf_pool */ | |
427 | while (!list_empty(&s->buf_pool)) { | |
428 | buf = list_first_entry(&s->buf_pool, struct cx18_buffer, list); | |
429 | list_del_init(&buf->list); | |
1c1e45d1 | 430 | |
3d05913d | 431 | pci_unmap_single(s->cx->pci_dev, buf->dma_handle, |
1c1e45d1 HV |
432 | s->buf_size, s->dma); |
433 | kfree(buf->buf); | |
434 | kfree(buf); | |
435 | } | |
436 | } |