[linux-block.git] / drivers / media / pci / cx18 / cx18-i2c.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  cx18 I2C functions
 *
 *  Derived from ivtv-i2c.c
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
 */

#include "cx18-driver.h"
#include "cx18-io.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "cx18-i2c.h"
#include "cx18-irq.h"

#define CX18_REG_I2C_1_WR   0xf15000
#define CX18_REG_I2C_1_RD   0xf15008
#define CX18_REG_I2C_2_WR   0xf25100
#define CX18_REG_I2C_2_RD   0xf25108

#define SETSCL_BIT      0x0001
#define SETSDL_BIT      0x0002
#define GETSCL_BIT      0x0004
#define GETSDL_BIT      0x0008

#define CX18_CS5345_I2C_ADDR		0x4c
#define CX18_Z8F0811_IR_TX_I2C_ADDR	0x70
#define CX18_Z8F0811_IR_RX_I2C_ADDR	0x71

/* This array should match the CX18_HW_ defines */
static const u8 hw_addrs[] = {
	0,				/* CX18_HW_TUNER */
	0,				/* CX18_HW_TVEEPROM */
	CX18_CS5345_I2C_ADDR,		/* CX18_HW_CS5345 */
	0,				/* CX18_HW_DVB */
	0,				/* CX18_HW_418_AV */
	0,				/* CX18_HW_GPIO_MUX */
	0,				/* CX18_HW_GPIO_RESET_CTRL */
	CX18_Z8F0811_IR_RX_I2C_ADDR,	/* CX18_HW_Z8F0811_IR_HAUP */
};

/* This array should match the CX18_HW_ defines */
/* This might well become a card-specific array */
static const u8 hw_bus[] = {
	1,	/* CX18_HW_TUNER */
	0,	/* CX18_HW_TVEEPROM */
	0,	/* CX18_HW_CS5345 */
	0,	/* CX18_HW_DVB */
	0,	/* CX18_HW_418_AV */
	0,	/* CX18_HW_GPIO_MUX */
	0,	/* CX18_HW_GPIO_RESET_CTRL */
	0,	/* CX18_HW_Z8F0811_IR_HAUP */
};

/* This array should match the CX18_HW_ defines */
static const char * const hw_devicenames[] = {
	"tuner",
	"tveeprom",
	"cs5345",
	"cx23418_DTV",
	"cx23418_AV",
	"gpio_mux",
	"gpio_reset_ctrl",
	"ir_z8f0811_haup",
};

static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
			   const char *type, u8 addr)
{
	struct i2c_board_info info;
	struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
	unsigned short addr_list[2] = { addr, I2C_CLIENT_END };

	memset(&info, 0, sizeof(struct i2c_board_info));
	strscpy(info.type, type, I2C_NAME_SIZE);

	/* Our default information for ir-kbd-i2c.c to use */
	switch (hw) {
	case CX18_HW_Z8F0811_IR_HAUP:
		init_data->ir_codes = RC_MAP_HAUPPAUGE;
		init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
		init_data->type = RC_PROTO_BIT_RC5 | RC_PROTO_BIT_RC6_MCE |
							RC_PROTO_BIT_RC6_6A_32;
		init_data->name = cx->card_name;
		info.platform_data = init_data;
		break;
	}

	return IS_ERR(i2c_new_scanned_device(adap, &info, addr_list, NULL)) ?
	       -1 : 0;
}

int cx18_i2c_register(struct cx18 *cx, unsigned idx)
{
	struct v4l2_subdev *sd;
	int bus = hw_bus[idx];
	struct i2c_adapter *adap = &cx->i2c_adap[bus];
	const char *type = hw_devicenames[idx];
	u32 hw = 1 << idx;

	if (hw == CX18_HW_TUNER) {
		/* special tuner group handling */
		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
				adap, type, 0, cx->card_i2c->radio);
		if (sd != NULL)
			sd->grp_id = hw;
		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
				adap, type, 0, cx->card_i2c->demod);
		if (sd != NULL)
			sd->grp_id = hw;
		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
				adap, type, 0, cx->card_i2c->tv);
		if (sd != NULL)
			sd->grp_id = hw;
		return sd != NULL ? 0 : -1;
	}

	if (hw == CX18_HW_Z8F0811_IR_HAUP)
		return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);

	/* Is it not an I2C device or one we do not wish to register? */
	if (!hw_addrs[idx])
		return -1;

	/* It's an I2C device other than an analog tuner or IR chip */
	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
				 NULL);
	if (sd != NULL)
		sd->grp_id = hw;
	return sd != NULL ? 0 : -1;
}

/* Find the first member of the subdev group id in hw */
struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
{
	struct v4l2_subdev *result = NULL;
	struct v4l2_subdev *sd;

	spin_lock(&cx->v4l2_dev.lock);
	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
		if (sd->grp_id == hw) {
			result = sd;
			break;
		}
	}
	spin_unlock(&cx->v4l2_dev.lock);
	return result;
}

static void cx18_setscl(void *data, int state)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
	u32 r = cx18_read_reg(cx, addr);

	if (state)
		cx18_write_reg(cx, r | SETSCL_BIT, addr);
	else
		cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
}

static void cx18_setsda(void *data, int state)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
	u32 r = cx18_read_reg(cx, addr);

	if (state)
		cx18_write_reg(cx, r | SETSDL_BIT, addr);
	else
		cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
}

static int cx18_getscl(void *data)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;

	return cx18_read_reg(cx, addr) & GETSCL_BIT;
}

static int cx18_getsda(void *data)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;

	return cx18_read_reg(cx, addr) & GETSDL_BIT;
}

/* template for i2c-bit-algo */
static const struct i2c_adapter cx18_i2c_adap_template = {
	.name = "cx18 i2c driver",
	.algo = NULL,                   /* set by i2c-algo-bit */
	.algo_data = NULL,              /* filled from template */
	.owner = THIS_MODULE,
};

#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */

static const struct i2c_algo_bit_data cx18_i2c_algo_template = {
	.setsda		= cx18_setsda,
	.setscl		= cx18_setscl,
	.getsda		= cx18_getsda,
	.getscl		= cx18_getscl,
	.udelay		= CX18_SCL_PERIOD/2,       /* 1/2 clock period in usec*/
	.timeout	= CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
};

/* init + register i2c adapter */
int init_cx18_i2c(struct cx18 *cx)
{
	int i, err;
	CX18_DEBUG_I2C("i2c init\n");

	for (i = 0; i < 2; i++) {
		/* Setup algorithm for adapter */
		cx->i2c_algo[i] = cx18_i2c_algo_template;
		cx->i2c_algo_cb_data[i].cx = cx;
		cx->i2c_algo_cb_data[i].bus_index = i;
		cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];

		/* Setup adapter */
		cx->i2c_adap[i] = cx18_i2c_adap_template;
		cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
		sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
				" #%d-%d", cx->instance, i);
		i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
		cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
	}

	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
		/* Reset/Unreset I2C hardware block */
		/* Clock select 220MHz */
		cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
					  0x00000000, 0x10001000);
		/* Clock Enable */
		cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
					  0x00001000, 0x10001000);
	}
	/* courtesy of Steven Toth <stoth@hauppauge.com> */
	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
	mdelay(10);
	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
	mdelay(10);
	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
	mdelay(10);

	/* Set to edge-triggered intrs. */
	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
	/* Clear any stale intrs */
	cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
		       ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);

	/* Hw I2C1 Clock Freq ~100kHz */
	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);

	/* Hw I2C2 Clock Freq ~100kHz */
	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);

	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
		     core, reset, (u32) CX18_GPIO_RESET_I2C);

	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
	if (err)
		goto err;
	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
	if (err)
		goto err_del_bus_0;
	return 0;

 err_del_bus_0:
	i2c_del_adapter(&cx->i2c_adap[0]);
 err:
	return err;
}

void exit_cx18_i2c(struct cx18 *cx)
{
	int i;
	CX18_DEBUG_I2C("i2c exit\n");
	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
							CX18_REG_I2C_1_WR);
	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
							CX18_REG_I2C_2_WR);

	for (i = 0; i < 2; i++) {
		i2c_del_adapter(&cx->i2c_adap[i]);
	}
}

/*
   Hauppauge HVR1600 should have:
   32 cx24227
   98 unknown
   a0 eeprom
   c2 tuner
   e? zilog ir
   */
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
1c1e45d1 HV	2	/*
	3	* cx18 I2C functions
	4	*
	5	* Derived from ivtv-i2c.c
	6	*
	7	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6afdeaf8	8	* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
1c1e45d1 HV	9	*/
	10
	11	#include "cx18-driver.h"
b1526421	12	#include "cx18-io.h"
1c1e45d1 HV	13	#include "cx18-cards.h"
1c1e45d1 HV	14	#include "cx18-gpio.h"
50510993	15	#include "cx18-i2c.h"
ced07371	16	#include "cx18-irq.h"
1c1e45d1	17
1c1e45d1 HV	18	#define CX18_REG_I2C_1_WR 0xf15000
	19	#define CX18_REG_I2C_1_RD 0xf15008
	20	#define CX18_REG_I2C_2_WR 0xf25100
	21	#define CX18_REG_I2C_2_RD 0xf25108
	22
	23	#define SETSCL_BIT 0x0001
	24	#define SETSDL_BIT 0x0002
	25	#define GETSCL_BIT 0x0004
	26	#define GETSDL_BIT 0x0008
	27
1c1e45d1	28	#define CX18_CS5345_I2C_ADDR 0x4c
8ca95568 AW	29	#define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
8ca95568 AW	30	#define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
1c1e45d1	31
1c1e45d1 HV	32	/* This array should match the CX18_HW_ defines */
1c1e45d1 HV	33	static const u8 hw_addrs[] = {
8ca95568 AW	34	0, /* CX18_HW_TUNER */
	35	0, /* CX18_HW_TVEEPROM */
	36	CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
	37	0, /* CX18_HW_DVB */
	38	0, /* CX18_HW_418_AV */
	39	0, /* CX18_HW_GPIO_MUX */
	40	0, /* CX18_HW_GPIO_RESET_CTRL */
ab5222ed	41	CX18_Z8F0811_IR_RX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_HAUP */
1c1e45d1 HV	42	};
	43
	44	/* This array should match the CX18_HW_ defines */
	45	/* This might well become a card-specific array */
	46	static const u8 hw_bus[] = {
ff2a2001 AW	47	1, /* CX18_HW_TUNER */
	48	0, /* CX18_HW_TVEEPROM */
	49	0, /* CX18_HW_CS5345 */
	50	0, /* CX18_HW_DVB */
	51	0, /* CX18_HW_418_AV */
eefe1010 AW	52	0, /* CX18_HW_GPIO_MUX */
eefe1010 AW	53	0, /* CX18_HW_GPIO_RESET_CTRL */
ab5222ed	54	0, /* CX18_HW_Z8F0811_IR_HAUP */
ff2a2001 AW	55	};
ff2a2001 AW	56
1c1e45d1	57	/* This array should match the CX18_HW_ defines */
af294867	58	static const char * const hw_devicenames[] = {
1c1e45d1 HV	59	"tuner",
	60	"tveeprom",
	61	"cs5345",
ff2a2001 AW	62	"cx23418_DTV",
ff2a2001 AW	63	"cx23418_AV",
eefe1010 AW	64	"gpio_mux",
eefe1010 AW	65	"gpio_reset_ctrl",
ab5222ed	66	"ir_z8f0811_haup",
1c1e45d1 HV	67	};
1c1e45d1 HV	68
83526190 AW	69	static int cx18_i2c_new_ir(struct cx18 cx, struct i2c_adapter adap, u32 hw,
83526190 AW	70	const char *type, u8 addr)
8ca95568 AW	71	{
8ca95568 AW	72	struct i2c_board_info info;
83526190	73	struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
8ca95568 AW	74	unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
	75
	76	memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1	77	strscpy(info.type, type, I2C_NAME_SIZE);
8ca95568 AW	78
	79	/* Our default information for ir-kbd-i2c.c to use */
	80	switch (hw) {
ab5222ed	81	case CX18_HW_Z8F0811_IR_HAUP:
af86ce79	82	init_data->ir_codes = RC_MAP_HAUPPAUGE;
83526190	83	init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
6d741bfe SY	84	init_data->type = RC_PROTO_BIT_RC5 \| RC_PROTO_BIT_RC6_MCE \|
6d741bfe SY	85	RC_PROTO_BIT_RC6_6A_32;
83526190 AW	86	init_data->name = cx->card_name;
83526190 AW	87	info.platform_data = init_data;
8ca95568 AW	88	break;
	89	}
	90
d2d39fe2	91	return IS_ERR(i2c_new_scanned_device(adap, &info, addr_list, NULL)) ?
9a94241a	92	-1 : 0;
8ca95568 AW	93	}
8ca95568 AW	94
1c1e45d1 HV	95	int cx18_i2c_register(struct cx18 *cx, unsigned idx)
1c1e45d1 HV	96	{
ff2a2001 AW	97	struct v4l2_subdev *sd;
	98	int bus = hw_bus[idx];
	99	struct i2c_adapter *adap = &cx->i2c_adap[bus];
ff2a2001 AW	100	const char *type = hw_devicenames[idx];
	101	u32 hw = 1 << idx;
	102
ff2a2001 AW	103	if (hw == CX18_HW_TUNER) {
ff2a2001 AW	104	/* special tuner group handling */
53dacb15	105	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
9a1f8b34	106	adap, type, 0, cx->card_i2c->radio);
ff2a2001 AW	107	if (sd != NULL)
ff2a2001 AW	108	sd->grp_id = hw;
53dacb15	109	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
9a1f8b34	110	adap, type, 0, cx->card_i2c->demod);
ff2a2001 AW	111	if (sd != NULL)
ff2a2001 AW	112	sd->grp_id = hw;
53dacb15	113	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
9a1f8b34	114	adap, type, 0, cx->card_i2c->tv);
ff2a2001 AW	115	if (sd != NULL)
	116	sd->grp_id = hw;
	117	return sd != NULL ? 0 : -1;
1c1e45d1 HV	118	}
1c1e45d1 HV	119
ab5222ed	120	if (hw == CX18_HW_Z8F0811_IR_HAUP)
83526190	121	return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
8ca95568	122
ff2a2001 AW	123	/* Is it not an I2C device or one we do not wish to register? */
	124	if (!hw_addrs[idx])
	125	return -1;
1c1e45d1	126
8ca95568	127	/* It's an I2C device other than an analog tuner or IR chip */
9a1f8b34	128	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, type, hw_addrs[idx],
aa55f3a4	129	NULL);
ff2a2001 AW	130	if (sd != NULL)
	131	sd->grp_id = hw;
	132	return sd != NULL ? 0 : -1;
1c1e45d1 HV	133	}
1c1e45d1 HV	134
ff2a2001 AW	135	/* Find the first member of the subdev group id in hw */
ff2a2001 AW	136	struct v4l2_subdev cx18_find_hw(struct cx18 cx, u32 hw)
1c1e45d1	137	{
ff2a2001 AW	138	struct v4l2_subdev *result = NULL;
ff2a2001 AW	139	struct v4l2_subdev *sd;
1c1e45d1	140
ff2a2001 AW	141	spin_lock(&cx->v4l2_dev.lock);
	142	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
	143	if (sd->grp_id == hw) {
	144	result = sd;
1c1e45d1 HV	145	break;
	146	}
	147	}
ff2a2001 AW	148	spin_unlock(&cx->v4l2_dev.lock);
ff2a2001 AW	149	return result;
1c1e45d1 HV	150	}
	151
	152	static void cx18_setscl(void *data, int state)
	153	{
	154	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	155	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	156	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421	157	u32 r = cx18_read_reg(cx, addr);
1c1e45d1 HV	158
1c1e45d1 HV	159	if (state)
3f75c616	160	cx18_write_reg(cx, r \| SETSCL_BIT, addr);
1c1e45d1	161	else
3f75c616	162	cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
1c1e45d1 HV	163	}
	164
	165	static void cx18_setsda(void *data, int state)
	166	{
	167	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	168	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	169	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421	170	u32 r = cx18_read_reg(cx, addr);
1c1e45d1 HV	171
1c1e45d1 HV	172	if (state)
3f75c616	173	cx18_write_reg(cx, r \| SETSDL_BIT, addr);
1c1e45d1	174	else
3f75c616	175	cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
1c1e45d1 HV	176	}
	177
	178	static int cx18_getscl(void *data)
	179	{
	180	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	181	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	182	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
	183
b1526421	184	return cx18_read_reg(cx, addr) & GETSCL_BIT;
1c1e45d1 HV	185	}
	186
	187	static int cx18_getsda(void *data)
	188	{
	189	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	190	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	191	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
	192
b1526421	193	return cx18_read_reg(cx, addr) & GETSDL_BIT;
1c1e45d1 HV	194	}
	195
	196	/* template for i2c-bit-algo */
e5fffebe	197	static const struct i2c_adapter cx18_i2c_adap_template = {
1c1e45d1	198	.name = "cx18 i2c driver",
1c1e45d1 HV	199	.algo = NULL, /* set by i2c-algo-bit */
1c1e45d1 HV	200	.algo_data = NULL, /* filled from template */
1c1e45d1 HV	201	.owner = THIS_MODULE,
	202	};
	203
	204	#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
	205	#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
	206
597c147b	207	static const struct i2c_algo_bit_data cx18_i2c_algo_template = {
1c1e45d1 HV	208	.setsda = cx18_setsda,
	209	.setscl = cx18_setscl,
	210	.getsda = cx18_getsda,
	211	.getscl = cx18_getscl,
	212	.udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
	213	.timeout = CX18_ALGO_BIT_TIMEOUTHZ / jiffies */
	214	};
	215
a824f0f4	216	/* init + register i2c adapter */
1c1e45d1 HV	217	int init_cx18_i2c(struct cx18 *cx)
1c1e45d1 HV	218	{
272aa396	219	int i, err;
1c1e45d1 HV	220	CX18_DEBUG_I2C("i2c init\n");
	221
	222	for (i = 0; i < 2; i++) {
ff2a2001	223	/* Setup algorithm for adapter */
2e814af5	224	cx->i2c_algo[i] = cx18_i2c_algo_template;
1c1e45d1 HV	225	cx->i2c_algo_cb_data[i].cx = cx;
	226	cx->i2c_algo_cb_data[i].bus_index = i;
	227	cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
1c1e45d1	228
ff2a2001	229	/* Setup adapter */
2e814af5	230	cx->i2c_adap[i] = cx18_i2c_adap_template;
ff2a2001	231	cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
1c1e45d1	232	sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
5811cf99	233	" #%d-%d", cx->instance, i);
ff2a2001	234	i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
3d05913d	235	cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
1c1e45d1 HV	236	}
1c1e45d1 HV	237
b1526421	238	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
1c1e45d1	239	/* Reset/Unreset I2C hardware block */
b1526421	240	/* Clock select 220MHz */
ced07371 AW	241	cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
ced07371 AW	242	0x00000000, 0x10001000);
b1526421	243	/* Clock Enable */
ced07371 AW	244	cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
ced07371 AW	245	0x00001000, 0x10001000);
1c1e45d1 HV	246	}
1c1e45d1 HV	247	/* courtesy of Steven Toth <stoth@hauppauge.com> */
ced07371	248	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
1c1e45d1	249	mdelay(10);
ced07371	250	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
1c1e45d1	251	mdelay(10);
ced07371	252	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
53ad02ef	253	mdelay(10);
1c1e45d1	254
b1526421	255	/* Set to edge-triggered intrs. */
ced07371	256	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
b1526421	257	/* Clear any stale intrs */
ced07371 AW	258	cx18_write_reg_expect(cx, HW2_I2C1_INT\|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
ced07371 AW	259	~(HW2_I2C1_INT\|HW2_I2C2_INT), HW2_I2C1_INT\|HW2_I2C2_INT);
1c1e45d1 HV	260
1c1e45d1 HV	261	/* Hw I2C1 Clock Freq ~100kHz */
3f75c616	262	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
1c1e45d1 HV	263	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
	264	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
	265
	266	/* Hw I2C2 Clock Freq ~100kHz */
3f75c616	267	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
1c1e45d1 HV	268	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
	269	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
	270
eefe1010 AW	271	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
eefe1010 AW	272	core, reset, (u32) CX18_GPIO_RESET_I2C);
1f09e8a2	273
272aa396 JD	274	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
	275	if (err)
	276	goto err;
	277	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
	278	if (err)
	279	goto err_del_bus_0;
	280	return 0;
	281
	282	err_del_bus_0:
	283	i2c_del_adapter(&cx->i2c_adap[0]);
	284	err:
	285	return err;
1c1e45d1 HV	286	}
	287
	288	void exit_cx18_i2c(struct cx18 *cx)
	289	{
	290	int i;
	291	CX18_DEBUG_I2C("i2c exit\n");
b1526421 AW	292	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) \| 4,
	293	CX18_REG_I2C_1_WR);
	294	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) \| 4,
	295	CX18_REG_I2C_2_WR);
1c1e45d1 HV	296
	297	for (i = 0; i < 2; i++) {
	298	i2c_del_adapter(&cx->i2c_adap[i]);
	299	}
	300	}
	301
	302	/*
	303	Hauppauge HVR1600 should have:
	304	32 cx24227
	305	98 unknown
	306	a0 eeprom
	307	c2 tuner
	308	e? zilog ir
	309	*/