Commit | Line | Data |
---|---|---|
c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1c1e45d1 HV |
2 | /* |
3 | * cx18 driver initialization and card probing | |
4 | * | |
5 | * Derived from ivtv-driver.c | |
6 | * | |
7 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
6afdeaf8 | 8 | * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> |
1c1e45d1 HV |
9 | */ |
10 | ||
11 | #include "cx18-driver.h" | |
b1526421 | 12 | #include "cx18-io.h" |
1c1e45d1 HV |
13 | #include "cx18-version.h" |
14 | #include "cx18-cards.h" | |
15 | #include "cx18-i2c.h" | |
16 | #include "cx18-irq.h" | |
17 | #include "cx18-gpio.h" | |
18 | #include "cx18-firmware.h" | |
21a278b8 | 19 | #include "cx18-queue.h" |
1c1e45d1 HV |
20 | #include "cx18-streams.h" |
21 | #include "cx18-av-core.h" | |
22 | #include "cx18-scb.h" | |
23 | #include "cx18-mailbox.h" | |
24 | #include "cx18-ioctl.h" | |
a75b9be1 | 25 | #include "cx18-controls.h" |
d76231e4 | 26 | #include "xc2028.h" |
3907b019 | 27 | #include <linux/dma-mapping.h> |
1c1e45d1 HV |
28 | #include <media/tveeprom.h> |
29 | ||
1c1e45d1 HV |
30 | /* If you have already X v4l cards, then set this to X. This way |
31 | the device numbers stay matched. Example: you have a WinTV card | |
32 | without radio and a Compro H900 with. Normally this would give a | |
33 | video1 device together with a radio0 device for the Compro. By | |
34 | setting this to 1 you ensure that radio0 is now also radio1. */ | |
35 | int cx18_first_minor; | |
36 | ||
d68b687b DH |
37 | /* Callback for registering extensions */ |
38 | int (*cx18_ext_init)(struct cx18 *); | |
39 | EXPORT_SYMBOL(cx18_ext_init); | |
40 | ||
1c1e45d1 | 41 | /* add your revision and whatnot here */ |
1482ccda | 42 | static const struct pci_device_id cx18_pci_tbl[] = { |
1c1e45d1 HV |
43 | {PCI_VENDOR_ID_CX, PCI_DEVICE_ID_CX23418, |
44 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
45 | {0,} | |
46 | }; | |
47 | ||
48 | MODULE_DEVICE_TABLE(pci, cx18_pci_tbl); | |
49 | ||
5811cf99 AW |
50 | static atomic_t cx18_instance = ATOMIC_INIT(0); |
51 | ||
1c1e45d1 HV |
52 | /* Parameter declarations */ |
53 | static int cardtype[CX18_MAX_CARDS]; | |
54 | static int tuner[CX18_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1, | |
55 | -1, -1, -1, -1, -1, -1, -1, -1, | |
56 | -1, -1, -1, -1, -1, -1, -1, -1, | |
57 | -1, -1, -1, -1, -1, -1, -1, -1 }; | |
58 | static int radio[CX18_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1, | |
59 | -1, -1, -1, -1, -1, -1, -1, -1, | |
60 | -1, -1, -1, -1, -1, -1, -1, -1, | |
61 | -1, -1, -1, -1, -1, -1, -1, -1 }; | |
c6eb8eaf HV |
62 | static unsigned cardtype_c = 1; |
63 | static unsigned tuner_c = 1; | |
b3f5bada | 64 | static unsigned radio_c = 1; |
1c1e45d1 HV |
65 | static char pal[] = "--"; |
66 | static char secam[] = "--"; | |
67 | static char ntsc[] = "-"; | |
68 | ||
69 | /* Buffers */ | |
1c1e45d1 | 70 | static int enc_ts_buffers = CX18_DEFAULT_ENC_TS_BUFFERS; |
6ecd86dc AW |
71 | static int enc_mpg_buffers = CX18_DEFAULT_ENC_MPG_BUFFERS; |
72 | static int enc_idx_buffers = CX18_DEFAULT_ENC_IDX_BUFFERS; | |
1c1e45d1 HV |
73 | static int enc_yuv_buffers = CX18_DEFAULT_ENC_YUV_BUFFERS; |
74 | static int enc_vbi_buffers = CX18_DEFAULT_ENC_VBI_BUFFERS; | |
75 | static int enc_pcm_buffers = CX18_DEFAULT_ENC_PCM_BUFFERS; | |
76 | ||
6ecd86dc AW |
77 | static int enc_ts_bufsize = CX18_DEFAULT_ENC_TS_BUFSIZE; |
78 | static int enc_mpg_bufsize = CX18_DEFAULT_ENC_MPG_BUFSIZE; | |
79 | static int enc_idx_bufsize = CX18_DEFAULT_ENC_IDX_BUFSIZE; | |
80 | static int enc_yuv_bufsize = CX18_DEFAULT_ENC_YUV_BUFSIZE; | |
6ecd86dc AW |
81 | static int enc_pcm_bufsize = CX18_DEFAULT_ENC_PCM_BUFSIZE; |
82 | ||
83 | static int enc_ts_bufs = -1; | |
84 | static int enc_mpg_bufs = -1; | |
efc0b127 | 85 | static int enc_idx_bufs = CX18_MAX_FW_MDLS_PER_STREAM; |
6ecd86dc AW |
86 | static int enc_yuv_bufs = -1; |
87 | static int enc_vbi_bufs = -1; | |
88 | static int enc_pcm_bufs = -1; | |
89 | ||
90 | ||
1c1e45d1 HV |
91 | static int cx18_pci_latency = 1; |
92 | ||
3f75c616 AW |
93 | static int mmio_ndelay; |
94 | static int retry_mmio = 1; | |
95 | ||
1c1e45d1 HV |
96 | int cx18_debug; |
97 | ||
98 | module_param_array(tuner, int, &tuner_c, 0644); | |
b3f5bada | 99 | module_param_array(radio, int, &radio_c, 0644); |
1c1e45d1 HV |
100 | module_param_array(cardtype, int, &cardtype_c, 0644); |
101 | module_param_string(pal, pal, sizeof(pal), 0644); | |
102 | module_param_string(secam, secam, sizeof(secam), 0644); | |
103 | module_param_string(ntsc, ntsc, sizeof(ntsc), 0644); | |
104 | module_param_named(debug, cx18_debug, int, 0644); | |
3f75c616 AW |
105 | module_param(mmio_ndelay, int, 0644); |
106 | module_param(retry_mmio, int, 0644); | |
1c1e45d1 HV |
107 | module_param(cx18_pci_latency, int, 0644); |
108 | module_param(cx18_first_minor, int, 0644); | |
109 | ||
1c1e45d1 | 110 | module_param(enc_ts_buffers, int, 0644); |
6ecd86dc AW |
111 | module_param(enc_mpg_buffers, int, 0644); |
112 | module_param(enc_idx_buffers, int, 0644); | |
1c1e45d1 HV |
113 | module_param(enc_yuv_buffers, int, 0644); |
114 | module_param(enc_vbi_buffers, int, 0644); | |
115 | module_param(enc_pcm_buffers, int, 0644); | |
116 | ||
6ecd86dc AW |
117 | module_param(enc_ts_bufsize, int, 0644); |
118 | module_param(enc_mpg_bufsize, int, 0644); | |
119 | module_param(enc_idx_bufsize, int, 0644); | |
120 | module_param(enc_yuv_bufsize, int, 0644); | |
6ecd86dc AW |
121 | module_param(enc_pcm_bufsize, int, 0644); |
122 | ||
123 | module_param(enc_ts_bufs, int, 0644); | |
124 | module_param(enc_mpg_bufs, int, 0644); | |
125 | module_param(enc_idx_bufs, int, 0644); | |
126 | module_param(enc_yuv_bufs, int, 0644); | |
127 | module_param(enc_vbi_bufs, int, 0644); | |
128 | module_param(enc_pcm_bufs, int, 0644); | |
129 | ||
1c1e45d1 HV |
130 | MODULE_PARM_DESC(tuner, "Tuner type selection,\n" |
131 | "\t\t\tsee tuner.h for values"); | |
132 | MODULE_PARM_DESC(radio, | |
133 | "Enable or disable the radio. Use only if autodetection\n" | |
134 | "\t\t\tfails. 0 = disable, 1 = enable"); | |
135 | MODULE_PARM_DESC(cardtype, | |
136 | "Only use this option if your card is not detected properly.\n" | |
137 | "\t\tSpecify card type:\n" | |
138 | "\t\t\t 1 = Hauppauge HVR 1600 (ESMT memory)\n" | |
139 | "\t\t\t 2 = Hauppauge HVR 1600 (Samsung memory)\n" | |
140 | "\t\t\t 3 = Compro VideoMate H900\n" | |
141 | "\t\t\t 4 = Yuan MPC718\n" | |
03c28085 | 142 | "\t\t\t 5 = Conexant Raptor PAL/SECAM\n" |
9eee4fb6 | 143 | "\t\t\t 6 = Toshiba Qosmio DVB-T/Analog\n" |
9d5af862 AW |
144 | "\t\t\t 7 = Leadtek WinFast PVR2100\n" |
145 | "\t\t\t 8 = Leadtek WinFast DVR3100 H\n" | |
a3634363 | 146 | "\t\t\t 9 = GoTView PCI DVD3 Hybrid\n" |
e3bfeabb | 147 | "\t\t\t 10 = Hauppauge HVR 1600 (S5H1411)\n" |
1c1e45d1 HV |
148 | "\t\t\t 0 = Autodetect (default)\n" |
149 | "\t\t\t-1 = Ignore this card\n\t\t"); | |
150 | MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60"); | |
151 | MODULE_PARM_DESC(secam, "Set SECAM standard: B, G, H, D, K, L, LC"); | |
152 | MODULE_PARM_DESC(ntsc, "Set NTSC standard: M, J, K"); | |
153 | MODULE_PARM_DESC(debug, | |
154 | "Debug level (bitmask). Default: 0\n" | |
155 | "\t\t\t 1/0x0001: warning\n" | |
156 | "\t\t\t 2/0x0002: info\n" | |
157 | "\t\t\t 4/0x0004: mailbox\n" | |
158 | "\t\t\t 8/0x0008: dma\n" | |
159 | "\t\t\t 16/0x0010: ioctl\n" | |
160 | "\t\t\t 32/0x0020: file\n" | |
161 | "\t\t\t 64/0x0040: i2c\n" | |
162 | "\t\t\t128/0x0080: irq\n" | |
163 | "\t\t\t256/0x0100: high volume\n"); | |
164 | MODULE_PARM_DESC(cx18_pci_latency, | |
165 | "Change the PCI latency to 64 if lower: 0 = No, 1 = Yes,\n" | |
166 | "\t\t\tDefault: Yes"); | |
d267d851 | 167 | MODULE_PARM_DESC(retry_mmio, |
3f75c616 AW |
168 | "(Deprecated) MMIO writes are now always checked and retried\n" |
169 | "\t\t\tEffectively: 1 [Yes]"); | |
c641d09c | 170 | MODULE_PARM_DESC(mmio_ndelay, |
3f75c616 AW |
171 | "(Deprecated) MMIO accesses are now never purposely delayed\n" |
172 | "\t\t\tEffectively: 0 ns"); | |
1c1e45d1 | 173 | MODULE_PARM_DESC(enc_ts_buffers, |
6ecd86dc | 174 | "Encoder TS buffer memory (MB). (enc_ts_bufs can override)\n" |
1c1e45d1 | 175 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_TS_BUFFERS)); |
6ecd86dc AW |
176 | MODULE_PARM_DESC(enc_ts_bufsize, |
177 | "Size of an encoder TS buffer (kB)\n" | |
178 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_TS_BUFSIZE)); | |
179 | MODULE_PARM_DESC(enc_ts_bufs, | |
180 | "Number of encoder TS buffers\n" | |
181 | "\t\t\tDefault is computed from other enc_ts_* parameters"); | |
182 | MODULE_PARM_DESC(enc_mpg_buffers, | |
183 | "Encoder MPG buffer memory (MB). (enc_mpg_bufs can override)\n" | |
184 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_MPG_BUFFERS)); | |
185 | MODULE_PARM_DESC(enc_mpg_bufsize, | |
186 | "Size of an encoder MPG buffer (kB)\n" | |
187 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_MPG_BUFSIZE)); | |
188 | MODULE_PARM_DESC(enc_mpg_bufs, | |
189 | "Number of encoder MPG buffers\n" | |
190 | "\t\t\tDefault is computed from other enc_mpg_* parameters"); | |
191 | MODULE_PARM_DESC(enc_idx_buffers, | |
efc0b127 AW |
192 | "(Deprecated) Encoder IDX buffer memory (MB)\n" |
193 | "\t\t\tIgnored, except 0 disables IDX buffer allocations\n" | |
194 | "\t\t\tDefault: 1 [Enabled]"); | |
6ecd86dc AW |
195 | MODULE_PARM_DESC(enc_idx_bufsize, |
196 | "Size of an encoder IDX buffer (kB)\n" | |
efc0b127 AW |
197 | "\t\t\tAllowed values are multiples of 1.5 kB rounded up\n" |
198 | "\t\t\t(multiples of size required for 64 index entries)\n" | |
199 | "\t\t\tDefault: 2"); | |
6ecd86dc AW |
200 | MODULE_PARM_DESC(enc_idx_bufs, |
201 | "Number of encoder IDX buffers\n" | |
efc0b127 | 202 | "\t\t\tDefault: " __stringify(CX18_MAX_FW_MDLS_PER_STREAM)); |
1c1e45d1 | 203 | MODULE_PARM_DESC(enc_yuv_buffers, |
6ecd86dc | 204 | "Encoder YUV buffer memory (MB). (enc_yuv_bufs can override)\n" |
1c1e45d1 | 205 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_YUV_BUFFERS)); |
6ecd86dc AW |
206 | MODULE_PARM_DESC(enc_yuv_bufsize, |
207 | "Size of an encoder YUV buffer (kB)\n" | |
22dce188 AW |
208 | "\t\t\tAllowed values are multiples of 33.75 kB rounded up\n" |
209 | "\t\t\t(multiples of size required for 32 screen lines)\n" | |
210 | "\t\t\tDefault: 102"); | |
6ecd86dc AW |
211 | MODULE_PARM_DESC(enc_yuv_bufs, |
212 | "Number of encoder YUV buffers\n" | |
213 | "\t\t\tDefault is computed from other enc_yuv_* parameters"); | |
1c1e45d1 | 214 | MODULE_PARM_DESC(enc_vbi_buffers, |
6ecd86dc | 215 | "Encoder VBI buffer memory (MB). (enc_vbi_bufs can override)\n" |
1c1e45d1 | 216 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_VBI_BUFFERS)); |
6ecd86dc AW |
217 | MODULE_PARM_DESC(enc_vbi_bufs, |
218 | "Number of encoder VBI buffers\n" | |
127ce5f0 | 219 | "\t\t\tDefault is computed from enc_vbi_buffers"); |
1c1e45d1 | 220 | MODULE_PARM_DESC(enc_pcm_buffers, |
6ecd86dc | 221 | "Encoder PCM buffer memory (MB). (enc_pcm_bufs can override)\n" |
1c1e45d1 | 222 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_PCM_BUFFERS)); |
6ecd86dc AW |
223 | MODULE_PARM_DESC(enc_pcm_bufsize, |
224 | "Size of an encoder PCM buffer (kB)\n" | |
225 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_PCM_BUFSIZE)); | |
226 | MODULE_PARM_DESC(enc_pcm_bufs, | |
227 | "Number of encoder PCM buffers\n" | |
228 | "\t\t\tDefault is computed from other enc_pcm_* parameters"); | |
1c1e45d1 | 229 | |
f8bd9d26 DH |
230 | MODULE_PARM_DESC(cx18_first_minor, |
231 | "Set device node number assigned to first card"); | |
1c1e45d1 HV |
232 | |
233 | MODULE_AUTHOR("Hans Verkuil"); | |
234 | MODULE_DESCRIPTION("CX23418 driver"); | |
1c1e45d1 HV |
235 | MODULE_LICENSE("GPL"); |
236 | ||
237 | MODULE_VERSION(CX18_VERSION); | |
238 | ||
583d338d MCC |
239 | #if defined(CONFIG_MODULES) && defined(MODULE) |
240 | static void request_module_async(struct work_struct *work) | |
241 | { | |
242 | struct cx18 *dev = container_of(work, struct cx18, request_module_wk); | |
243 | ||
244 | /* Make sure cx18-alsa module is loaded */ | |
245 | request_module("cx18-alsa"); | |
246 | ||
247 | /* Initialize cx18-alsa for this instance of the cx18 device */ | |
af28c996 | 248 | if (cx18_ext_init) |
583d338d MCC |
249 | cx18_ext_init(dev); |
250 | } | |
251 | ||
252 | static void request_modules(struct cx18 *dev) | |
253 | { | |
254 | INIT_WORK(&dev->request_module_wk, request_module_async); | |
255 | schedule_work(&dev->request_module_wk); | |
256 | } | |
707bcf32 TH |
257 | |
258 | static void flush_request_modules(struct cx18 *dev) | |
259 | { | |
43829731 | 260 | flush_work(&dev->request_module_wk); |
707bcf32 | 261 | } |
583d338d MCC |
262 | #else |
263 | #define request_modules(dev) | |
707bcf32 | 264 | #define flush_request_modules(dev) |
583d338d | 265 | #endif /* CONFIG_MODULES */ |
d68b687b | 266 | |
1c1e45d1 HV |
267 | /* Generic utility functions */ |
268 | int cx18_msleep_timeout(unsigned int msecs, int intr) | |
269 | { | |
330c6ec8 | 270 | long int timeout = msecs_to_jiffies(msecs); |
1c1e45d1 HV |
271 | int sig; |
272 | ||
273 | do { | |
274 | set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE); | |
275 | timeout = schedule_timeout(timeout); | |
276 | sig = intr ? signal_pending(current) : 0; | |
277 | } while (!sig && timeout); | |
278 | return sig; | |
279 | } | |
280 | ||
281 | /* Release ioremapped memory */ | |
282 | static void cx18_iounmap(struct cx18 *cx) | |
283 | { | |
af28c996 | 284 | if (!cx) |
1c1e45d1 HV |
285 | return; |
286 | ||
287 | /* Release io memory */ | |
af28c996 | 288 | if (cx->enc_mem) { |
1c1e45d1 HV |
289 | CX18_DEBUG_INFO("releasing enc_mem\n"); |
290 | iounmap(cx->enc_mem); | |
291 | cx->enc_mem = NULL; | |
292 | } | |
293 | } | |
294 | ||
25a42e4d AW |
295 | static void cx18_eeprom_dump(struct cx18 *cx, unsigned char *eedata, int len) |
296 | { | |
297 | int i; | |
298 | ||
299 | CX18_INFO("eeprom dump:\n"); | |
300 | for (i = 0; i < len; i++) { | |
301 | if (0 == (i % 16)) | |
302 | CX18_INFO("eeprom %02x:", i); | |
303 | printk(KERN_CONT " %02x", eedata[i]); | |
304 | if (15 == (i % 16)) | |
305 | printk(KERN_CONT "\n"); | |
306 | } | |
307 | } | |
308 | ||
1c1e45d1 HV |
309 | /* Hauppauge card? get values from tveeprom */ |
310 | void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv) | |
311 | { | |
1d212cf0 | 312 | struct i2c_client *c; |
1c1e45d1 HV |
313 | u8 eedata[256]; |
314 | ||
e351bf25 DC |
315 | memset(tv, 0, sizeof(*tv)); |
316 | ||
1d212cf0 | 317 | c = kzalloc(sizeof(*c), GFP_KERNEL); |
e351bf25 DC |
318 | if (!c) |
319 | return; | |
1d212cf0 | 320 | |
c0decac1 | 321 | strscpy(c->name, "cx18 tveeprom tmp", sizeof(c->name)); |
1d212cf0 MCC |
322 | c->adapter = &cx->i2c_adap[0]; |
323 | c->addr = 0xa0 >> 1; | |
ff2a2001 | 324 | |
1d212cf0 MCC |
325 | if (tveeprom_read(c, eedata, sizeof(eedata))) |
326 | goto ret; | |
25a42e4d AW |
327 | |
328 | switch (cx->card->type) { | |
329 | case CX18_CARD_HVR_1600_ESMT: | |
330 | case CX18_CARD_HVR_1600_SAMSUNG: | |
e3bfeabb | 331 | case CX18_CARD_HVR_1600_S5H1411: |
446aba66 | 332 | tveeprom_hauppauge_analog(tv, eedata); |
25a42e4d AW |
333 | break; |
334 | case CX18_CARD_YUAN_MPC718: | |
a3634363 | 335 | case CX18_CARD_GOTVIEW_PCI_DVD3: |
25a42e4d AW |
336 | tv->model = 0x718; |
337 | cx18_eeprom_dump(cx, eedata, sizeof(eedata)); | |
338 | CX18_INFO("eeprom PCI ID: %02x%02x:%02x%02x\n", | |
339 | eedata[2], eedata[1], eedata[4], eedata[3]); | |
340 | break; | |
341 | default: | |
342 | tv->model = 0xffffffff; | |
343 | cx18_eeprom_dump(cx, eedata, sizeof(eedata)); | |
344 | break; | |
345 | } | |
1d212cf0 MCC |
346 | |
347 | ret: | |
348 | kfree(c); | |
1c1e45d1 HV |
349 | } |
350 | ||
351 | static void cx18_process_eeprom(struct cx18 *cx) | |
352 | { | |
353 | struct tveeprom tv; | |
354 | ||
355 | cx18_read_eeprom(cx, &tv); | |
356 | ||
357 | /* Many thanks to Steven Toth from Hauppauge for providing the | |
358 | model numbers */ | |
1d081601 HV |
359 | /* Note: the Samsung memory models cannot be reliably determined |
360 | from the model number. Use the cardtype module option if you | |
361 | have one of these preproduction models. */ | |
1c1e45d1 | 362 | switch (tv.model) { |
e3bfeabb DH |
363 | case 74301: /* Retail models */ |
364 | case 74321: | |
365 | case 74351: /* OEM models */ | |
366 | case 74361: | |
367 | /* Digital side is s5h1411/tda18271 */ | |
368 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_S5H1411); | |
369 | break; | |
370 | case 74021: /* Retail models */ | |
371 | case 74031: | |
372 | case 74041: | |
373 | case 74141: | |
374 | case 74541: /* OEM models */ | |
375 | case 74551: | |
376 | case 74591: | |
377 | case 74651: | |
378 | case 74691: | |
379 | case 74751: | |
380 | case 74891: | |
381 | /* Digital side is s5h1409/mxl5005s */ | |
1c1e45d1 HV |
382 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
383 | break; | |
25a42e4d AW |
384 | case 0x718: |
385 | return; | |
386 | case 0xffffffff: | |
387 | CX18_INFO("Unknown EEPROM encoding\n"); | |
388 | return; | |
1c1e45d1 HV |
389 | case 0: |
390 | CX18_ERR("Invalid EEPROM\n"); | |
391 | return; | |
392 | default: | |
6beb1388 MCC |
393 | CX18_ERR("Unknown model %d, defaulting to original HVR-1600 (cardtype=1)\n", |
394 | tv.model); | |
1c1e45d1 HV |
395 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
396 | break; | |
397 | } | |
398 | ||
399 | cx->v4l2_cap = cx->card->v4l2_capabilities; | |
400 | cx->card_name = cx->card->name; | |
401 | cx->card_i2c = cx->card->i2c; | |
402 | ||
403 | CX18_INFO("Autodetected %s\n", cx->card_name); | |
404 | ||
405 | if (tv.tuner_type == TUNER_ABSENT) | |
4442ee8b | 406 | CX18_ERR("tveeprom cannot autodetect tuner!\n"); |
1c1e45d1 HV |
407 | |
408 | if (cx->options.tuner == -1) | |
409 | cx->options.tuner = tv.tuner_type; | |
410 | if (cx->options.radio == -1) | |
411 | cx->options.radio = (tv.has_radio != 0); | |
412 | ||
413 | if (cx->std != 0) | |
414 | /* user specified tuner standard */ | |
415 | return; | |
416 | ||
417 | /* autodetect tuner standard */ | |
2bfe2fa4 AW |
418 | #define TVEEPROM_TUNER_FORMAT_ALL (V4L2_STD_B | V4L2_STD_GH | \ |
419 | V4L2_STD_MN | \ | |
420 | V4L2_STD_PAL_I | \ | |
421 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC | \ | |
422 | V4L2_STD_DK) | |
423 | if ((tv.tuner_formats & TVEEPROM_TUNER_FORMAT_ALL) | |
424 | == TVEEPROM_TUNER_FORMAT_ALL) { | |
425 | CX18_DEBUG_INFO("Worldwide tuner detected\n"); | |
426 | cx->std = V4L2_STD_ALL; | |
427 | } else if (tv.tuner_formats & V4L2_STD_PAL) { | |
1c1e45d1 HV |
428 | CX18_DEBUG_INFO("PAL tuner detected\n"); |
429 | cx->std |= V4L2_STD_PAL_BG | V4L2_STD_PAL_H; | |
430 | } else if (tv.tuner_formats & V4L2_STD_NTSC) { | |
431 | CX18_DEBUG_INFO("NTSC tuner detected\n"); | |
432 | cx->std |= V4L2_STD_NTSC_M; | |
433 | } else if (tv.tuner_formats & V4L2_STD_SECAM) { | |
434 | CX18_DEBUG_INFO("SECAM tuner detected\n"); | |
435 | cx->std |= V4L2_STD_SECAM_L; | |
436 | } else { | |
437 | CX18_INFO("No tuner detected, default to NTSC-M\n"); | |
438 | cx->std |= V4L2_STD_NTSC_M; | |
439 | } | |
440 | } | |
441 | ||
442 | static v4l2_std_id cx18_parse_std(struct cx18 *cx) | |
443 | { | |
444 | switch (pal[0]) { | |
445 | case '6': | |
446 | return V4L2_STD_PAL_60; | |
447 | case 'b': | |
448 | case 'B': | |
449 | case 'g': | |
450 | case 'G': | |
451 | return V4L2_STD_PAL_BG; | |
452 | case 'h': | |
453 | case 'H': | |
454 | return V4L2_STD_PAL_H; | |
455 | case 'n': | |
456 | case 'N': | |
457 | if (pal[1] == 'c' || pal[1] == 'C') | |
458 | return V4L2_STD_PAL_Nc; | |
459 | return V4L2_STD_PAL_N; | |
460 | case 'i': | |
461 | case 'I': | |
462 | return V4L2_STD_PAL_I; | |
463 | case 'd': | |
464 | case 'D': | |
465 | case 'k': | |
466 | case 'K': | |
467 | return V4L2_STD_PAL_DK; | |
468 | case 'M': | |
469 | case 'm': | |
470 | return V4L2_STD_PAL_M; | |
471 | case '-': | |
472 | break; | |
473 | default: | |
474 | CX18_WARN("pal= argument not recognised\n"); | |
475 | return 0; | |
476 | } | |
477 | ||
478 | switch (secam[0]) { | |
479 | case 'b': | |
480 | case 'B': | |
481 | case 'g': | |
482 | case 'G': | |
483 | case 'h': | |
484 | case 'H': | |
485 | return V4L2_STD_SECAM_B | V4L2_STD_SECAM_G | V4L2_STD_SECAM_H; | |
486 | case 'd': | |
487 | case 'D': | |
488 | case 'k': | |
489 | case 'K': | |
490 | return V4L2_STD_SECAM_DK; | |
491 | case 'l': | |
492 | case 'L': | |
493 | if (secam[1] == 'C' || secam[1] == 'c') | |
494 | return V4L2_STD_SECAM_LC; | |
495 | return V4L2_STD_SECAM_L; | |
496 | case '-': | |
497 | break; | |
498 | default: | |
499 | CX18_WARN("secam= argument not recognised\n"); | |
500 | return 0; | |
501 | } | |
502 | ||
503 | switch (ntsc[0]) { | |
504 | case 'm': | |
505 | case 'M': | |
506 | return V4L2_STD_NTSC_M; | |
507 | case 'j': | |
508 | case 'J': | |
509 | return V4L2_STD_NTSC_M_JP; | |
510 | case 'k': | |
511 | case 'K': | |
512 | return V4L2_STD_NTSC_M_KR; | |
513 | case '-': | |
514 | break; | |
515 | default: | |
516 | CX18_WARN("ntsc= argument not recognised\n"); | |
517 | return 0; | |
518 | } | |
519 | ||
520 | /* no match found */ | |
521 | return 0; | |
522 | } | |
523 | ||
524 | static void cx18_process_options(struct cx18 *cx) | |
525 | { | |
526 | int i, j; | |
527 | ||
1c1e45d1 | 528 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_TS] = enc_ts_buffers; |
6ecd86dc AW |
529 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_MPG] = enc_mpg_buffers; |
530 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_IDX] = enc_idx_buffers; | |
1c1e45d1 HV |
531 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_YUV] = enc_yuv_buffers; |
532 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_VBI] = enc_vbi_buffers; | |
533 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_PCM] = enc_pcm_buffers; | |
6ecd86dc AW |
534 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_RAD] = 0; /* control only */ |
535 | ||
536 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_TS] = enc_ts_bufs; | |
537 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_MPG] = enc_mpg_bufs; | |
538 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_IDX] = enc_idx_bufs; | |
539 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_YUV] = enc_yuv_bufs; | |
540 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_VBI] = enc_vbi_bufs; | |
541 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_PCM] = enc_pcm_bufs; | |
542 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_RAD] = 0; /* control, no data */ | |
543 | ||
544 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_TS] = enc_ts_bufsize; | |
545 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_MPG] = enc_mpg_bufsize; | |
546 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_IDX] = enc_idx_bufsize; | |
547 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_YUV] = enc_yuv_bufsize; | |
318de791 | 548 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_VBI] = VBI_ACTIVE_SAMPLES * 36; |
6ecd86dc AW |
549 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_PCM] = enc_pcm_bufsize; |
550 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_RAD] = 0; /* control no data */ | |
551 | ||
466df464 | 552 | /* Ensure stream_buffers & stream_buf_size are valid */ |
6ecd86dc | 553 | for (i = 0; i < CX18_MAX_STREAMS; i++) { |
466df464 AW |
554 | if (cx->stream_buffers[i] == 0 || /* User said 0 buffers */ |
555 | cx->options.megabytes[i] <= 0 || /* User said 0 MB total */ | |
556 | cx->stream_buf_size[i] <= 0) { /* User said buf size 0 */ | |
6ecd86dc AW |
557 | cx->options.megabytes[i] = 0; |
558 | cx->stream_buffers[i] = 0; | |
559 | cx->stream_buf_size[i] = 0; | |
560 | continue; | |
561 | } | |
466df464 | 562 | /* |
22dce188 AW |
563 | * YUV is a special case where the stream_buf_size needs to be |
564 | * an integral multiple of 33.75 kB (storage for 32 screens | |
efc0b127 AW |
565 | * lines to maintain alignment in case of lost buffers). |
566 | * | |
567 | * IDX is a special case where the stream_buf_size should be | |
568 | * an integral multiple of 1.5 kB (storage for 64 index entries | |
569 | * to maintain alignment in case of lost buffers). | |
570 | * | |
22dce188 AW |
571 | */ |
572 | if (i == CX18_ENC_STREAM_TYPE_YUV) { | |
573 | cx->stream_buf_size[i] *= 1024; | |
574 | cx->stream_buf_size[i] -= | |
575 | (cx->stream_buf_size[i] % CX18_UNIT_ENC_YUV_BUFSIZE); | |
576 | ||
577 | if (cx->stream_buf_size[i] < CX18_UNIT_ENC_YUV_BUFSIZE) | |
578 | cx->stream_buf_size[i] = | |
579 | CX18_UNIT_ENC_YUV_BUFSIZE; | |
efc0b127 AW |
580 | } else if (i == CX18_ENC_STREAM_TYPE_IDX) { |
581 | cx->stream_buf_size[i] *= 1024; | |
582 | cx->stream_buf_size[i] -= | |
583 | (cx->stream_buf_size[i] % CX18_UNIT_ENC_IDX_BUFSIZE); | |
584 | ||
585 | if (cx->stream_buf_size[i] < CX18_UNIT_ENC_IDX_BUFSIZE) | |
586 | cx->stream_buf_size[i] = | |
587 | CX18_UNIT_ENC_IDX_BUFSIZE; | |
22dce188 AW |
588 | } |
589 | /* | |
efc0b127 | 590 | * YUV and IDX are special cases where the stream_buf_size is |
22dce188 | 591 | * now in bytes. |
466df464 AW |
592 | * VBI is a special case where the stream_buf_size is fixed |
593 | * and already in bytes | |
594 | */ | |
22dce188 | 595 | if (i == CX18_ENC_STREAM_TYPE_VBI || |
efc0b127 AW |
596 | i == CX18_ENC_STREAM_TYPE_YUV || |
597 | i == CX18_ENC_STREAM_TYPE_IDX) { | |
466df464 AW |
598 | if (cx->stream_buffers[i] < 0) { |
599 | cx->stream_buffers[i] = | |
600 | cx->options.megabytes[i] * 1024 * 1024 | |
601 | / cx->stream_buf_size[i]; | |
602 | } else { | |
603 | /* N.B. This might round down to 0 */ | |
604 | cx->options.megabytes[i] = | |
605 | cx->stream_buffers[i] | |
606 | * cx->stream_buf_size[i]/(1024 * 1024); | |
6ecd86dc | 607 | } |
6ecd86dc | 608 | } else { |
22dce188 AW |
609 | /* All other streams have stream_buf_size in kB here */ |
610 | if (cx->stream_buffers[i] < 0) { | |
611 | cx->stream_buffers[i] = | |
612 | cx->options.megabytes[i] * 1024 | |
613 | / cx->stream_buf_size[i]; | |
614 | } else { | |
615 | /* N.B. This might round down to 0 */ | |
616 | cx->options.megabytes[i] = | |
617 | cx->stream_buffers[i] | |
618 | * cx->stream_buf_size[i] / 1024; | |
619 | } | |
620 | /* convert from kB to bytes */ | |
621 | cx->stream_buf_size[i] *= 1024; | |
6ecd86dc | 622 | } |
6beb1388 MCC |
623 | CX18_DEBUG_INFO("Stream type %d options: %d MB, %d buffers, %d bytes\n", |
624 | i, cx->options.megabytes[i], | |
22dce188 | 625 | cx->stream_buffers[i], cx->stream_buf_size[i]); |
6ecd86dc AW |
626 | } |
627 | ||
5811cf99 AW |
628 | cx->options.cardtype = cardtype[cx->instance]; |
629 | cx->options.tuner = tuner[cx->instance]; | |
630 | cx->options.radio = radio[cx->instance]; | |
1c1e45d1 HV |
631 | |
632 | cx->std = cx18_parse_std(cx); | |
633 | if (cx->options.cardtype == -1) { | |
634 | CX18_INFO("Ignore card\n"); | |
635 | return; | |
636 | } | |
637 | cx->card = cx18_get_card(cx->options.cardtype - 1); | |
638 | if (cx->card) | |
639 | CX18_INFO("User specified %s card\n", cx->card->name); | |
640 | else if (cx->options.cardtype != 0) | |
641 | CX18_ERR("Unknown user specified type, trying to autodetect card\n"); | |
af28c996 | 642 | if (!cx->card) { |
3d05913d | 643 | if (cx->pci_dev->subsystem_vendor == CX18_PCI_ID_HAUPPAUGE) { |
1c1e45d1 HV |
644 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
645 | CX18_INFO("Autodetected Hauppauge card\n"); | |
646 | } | |
647 | } | |
af28c996 | 648 | if (!cx->card) { |
1c1e45d1 | 649 | for (i = 0; (cx->card = cx18_get_card(i)); i++) { |
af28c996 | 650 | if (!cx->card->pci_list) |
1c1e45d1 HV |
651 | continue; |
652 | for (j = 0; cx->card->pci_list[j].device; j++) { | |
3d05913d | 653 | if (cx->pci_dev->device != |
1c1e45d1 HV |
654 | cx->card->pci_list[j].device) |
655 | continue; | |
3d05913d | 656 | if (cx->pci_dev->subsystem_vendor != |
1c1e45d1 HV |
657 | cx->card->pci_list[j].subsystem_vendor) |
658 | continue; | |
3d05913d | 659 | if (cx->pci_dev->subsystem_device != |
1c1e45d1 HV |
660 | cx->card->pci_list[j].subsystem_device) |
661 | continue; | |
662 | CX18_INFO("Autodetected %s card\n", cx->card->name); | |
663 | goto done; | |
664 | } | |
665 | } | |
666 | } | |
667 | done: | |
668 | ||
af28c996 | 669 | if (!cx->card) { |
1c1e45d1 | 670 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
29e66a6c | 671 | CX18_ERR("Unknown card: vendor/device: [%04x:%04x]\n", |
3d05913d | 672 | cx->pci_dev->vendor, cx->pci_dev->device); |
29e66a6c | 673 | CX18_ERR(" subsystem vendor/device: [%04x:%04x]\n", |
3d05913d AW |
674 | cx->pci_dev->subsystem_vendor, |
675 | cx->pci_dev->subsystem_device); | |
1c1e45d1 HV |
676 | CX18_ERR("Defaulting to %s card\n", cx->card->name); |
677 | CX18_ERR("Please mail the vendor/device and subsystem vendor/device IDs and what kind of\n"); | |
55f240a2 | 678 | CX18_ERR("card you have to the linux-media mailinglist (www.linuxtv.org)\n"); |
1c1e45d1 HV |
679 | CX18_ERR("Prefix your subject line with [UNKNOWN CX18 CARD].\n"); |
680 | } | |
681 | cx->v4l2_cap = cx->card->v4l2_capabilities; | |
682 | cx->card_name = cx->card->name; | |
683 | cx->card_i2c = cx->card->i2c; | |
684 | } | |
685 | ||
4c62e976 | 686 | static int cx18_create_in_workq(struct cx18 *cx) |
87116159 AW |
687 | { |
688 | snprintf(cx->in_workq_name, sizeof(cx->in_workq_name), "%s-in", | |
689 | cx->v4l2_dev.name); | |
d8537548 | 690 | cx->in_work_queue = alloc_ordered_workqueue("%s", 0, cx->in_workq_name); |
af28c996 | 691 | if (!cx->in_work_queue) { |
87116159 AW |
692 | CX18_ERR("Unable to create incoming mailbox handler thread\n"); |
693 | return -ENOMEM; | |
694 | } | |
695 | return 0; | |
696 | } | |
697 | ||
4c62e976 | 698 | static void cx18_init_in_work_orders(struct cx18 *cx) |
87116159 AW |
699 | { |
700 | int i; | |
701 | for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) { | |
702 | cx->in_work_order[i].cx = cx; | |
703 | cx->in_work_order[i].str = cx->epu_debug_str; | |
704 | INIT_WORK(&cx->in_work_order[i].work, cx18_in_work_handler); | |
705 | } | |
706 | } | |
707 | ||
1c1e45d1 | 708 | /* Precondition: the cx18 structure has been memset to 0. Only |
5811cf99 | 709 | the dev and instance fields have been filled in. |
1c1e45d1 HV |
710 | No assumptions on the card type may be made here (see cx18_init_struct2 |
711 | for that). | |
712 | */ | |
4c62e976 | 713 | static int cx18_init_struct1(struct cx18 *cx) |
1c1e45d1 | 714 | { |
87116159 | 715 | int ret; |
ee2d64f5 | 716 | |
3d05913d | 717 | cx->base_addr = pci_resource_start(cx->pci_dev, 0); |
1c1e45d1 HV |
718 | |
719 | mutex_init(&cx->serialize_lock); | |
8abdd00d | 720 | mutex_init(&cx->gpio_lock); |
72c2d6d3 AW |
721 | mutex_init(&cx->epu2apu_mb_lock); |
722 | mutex_init(&cx->epu2cpu_mb_lock); | |
1c1e45d1 | 723 | |
87116159 | 724 | ret = cx18_create_in_workq(cx); |
a3bc5e33 | 725 | if (ret) |
87116159 | 726 | return ret; |
1d6782bd | 727 | |
87116159 AW |
728 | cx18_init_in_work_orders(cx); |
729 | ||
1c1e45d1 HV |
730 | /* start counting open_id at 1 */ |
731 | cx->open_id = 1; | |
732 | ||
733 | /* Initial settings */ | |
a75b9be1 HV |
734 | cx->cxhdl.port = CX2341X_PORT_MEMORY; |
735 | cx->cxhdl.capabilities = CX2341X_CAP_HAS_TS | CX2341X_CAP_HAS_SLICED_VBI; | |
736 | cx->cxhdl.ops = &cx18_cxhdl_ops; | |
737 | cx->cxhdl.func = cx18_api_func; | |
7ee9e64a | 738 | cx->cxhdl.priv = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; |
a75b9be1 HV |
739 | ret = cx2341x_handler_init(&cx->cxhdl, 50); |
740 | if (ret) | |
741 | return ret; | |
742 | cx->v4l2_dev.ctrl_handler = &cx->cxhdl.hdl; | |
743 | ||
744 | cx->temporal_strength = cx->cxhdl.video_temporal_filter->cur.val; | |
745 | cx->spatial_strength = cx->cxhdl.video_spatial_filter->cur.val; | |
746 | cx->filter_mode = cx->cxhdl.video_spatial_filter_mode->cur.val | | |
747 | (cx->cxhdl.video_temporal_filter_mode->cur.val << 1) | | |
748 | (cx->cxhdl.video_median_filter_type->cur.val << 2); | |
749 | ||
1c1e45d1 HV |
750 | init_waitqueue_head(&cx->cap_w); |
751 | init_waitqueue_head(&cx->mb_apu_waitq); | |
752 | init_waitqueue_head(&cx->mb_cpu_waitq); | |
1c1e45d1 HV |
753 | init_waitqueue_head(&cx->dma_waitq); |
754 | ||
755 | /* VBI */ | |
dd073434 | 756 | cx->vbi.in.type = V4L2_BUF_TYPE_VBI_CAPTURE; |
1c1e45d1 | 757 | cx->vbi.sliced_in = &cx->vbi.in.fmt.sliced; |
af009cf6 | 758 | |
52fcb3ec AW |
759 | /* IVTV style VBI insertion into MPEG streams */ |
760 | INIT_LIST_HEAD(&cx->vbi.sliced_mpeg_buf.list); | |
761 | INIT_LIST_HEAD(&cx->vbi.sliced_mpeg_mdl.list); | |
762 | INIT_LIST_HEAD(&cx->vbi.sliced_mpeg_mdl.buf_list); | |
763 | list_add(&cx->vbi.sliced_mpeg_buf.list, | |
764 | &cx->vbi.sliced_mpeg_mdl.buf_list); | |
1c1e45d1 HV |
765 | return 0; |
766 | } | |
767 | ||
768 | /* Second initialization part. Here the card type has been | |
769 | autodetected. */ | |
4c62e976 | 770 | static void cx18_init_struct2(struct cx18 *cx) |
1c1e45d1 HV |
771 | { |
772 | int i; | |
773 | ||
274cb009 | 774 | for (i = 0; i < CX18_CARD_MAX_VIDEO_INPUTS; i++) |
1c1e45d1 HV |
775 | if (cx->card->video_inputs[i].video_type == 0) |
776 | break; | |
777 | cx->nof_inputs = i; | |
274cb009 | 778 | for (i = 0; i < CX18_CARD_MAX_AUDIO_INPUTS; i++) |
1c1e45d1 HV |
779 | if (cx->card->audio_inputs[i].audio_type == 0) |
780 | break; | |
781 | cx->nof_audio_inputs = i; | |
782 | ||
783 | /* Find tuner input */ | |
784 | for (i = 0; i < cx->nof_inputs; i++) { | |
785 | if (cx->card->video_inputs[i].video_type == | |
786 | CX18_CARD_INPUT_VID_TUNER) | |
787 | break; | |
788 | } | |
789 | if (i == cx->nof_inputs) | |
790 | i = 0; | |
791 | cx->active_input = i; | |
792 | cx->audio_input = cx->card->video_inputs[i].audio_index; | |
1c1e45d1 HV |
793 | } |
794 | ||
3d05913d | 795 | static int cx18_setup_pci(struct cx18 *cx, struct pci_dev *pci_dev, |
1c1e45d1 HV |
796 | const struct pci_device_id *pci_id) |
797 | { | |
798 | u16 cmd; | |
799 | unsigned char pci_latency; | |
800 | ||
801 | CX18_DEBUG_INFO("Enabling pci device\n"); | |
802 | ||
3d05913d | 803 | if (pci_enable_device(pci_dev)) { |
5811cf99 | 804 | CX18_ERR("Can't enable device %d!\n", cx->instance); |
1c1e45d1 HV |
805 | return -EIO; |
806 | } | |
887069f4 | 807 | if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) { |
5811cf99 | 808 | CX18_ERR("No suitable DMA available, card %d\n", cx->instance); |
1c1e45d1 HV |
809 | return -EIO; |
810 | } | |
811 | if (!request_mem_region(cx->base_addr, CX18_MEM_SIZE, "cx18 encoder")) { | |
5811cf99 AW |
812 | CX18_ERR("Cannot request encoder memory region, card %d\n", |
813 | cx->instance); | |
1c1e45d1 HV |
814 | return -EIO; |
815 | } | |
816 | ||
4519064c | 817 | /* Enable bus mastering and memory mapped IO for the CX23418 */ |
3d05913d | 818 | pci_read_config_word(pci_dev, PCI_COMMAND, &cmd); |
4519064c | 819 | cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; |
3d05913d | 820 | pci_write_config_word(pci_dev, PCI_COMMAND, cmd); |
1c1e45d1 | 821 | |
abd34d8d | 822 | cx->card_rev = pci_dev->revision; |
3d05913d | 823 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &pci_latency); |
1c1e45d1 HV |
824 | |
825 | if (pci_latency < 64 && cx18_pci_latency) { | |
6beb1388 MCC |
826 | CX18_INFO("Unreasonably low latency timer, setting to 64 (was %d)\n", |
827 | pci_latency); | |
3d05913d AW |
828 | pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, 64); |
829 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &pci_latency); | |
1c1e45d1 | 830 | } |
1c1e45d1 | 831 | |
6beb1388 | 832 | CX18_DEBUG_INFO("cx%d (rev %d) at %02x:%02x.%x, irq: %d, latency: %d, memory: 0x%llx\n", |
3d05913d AW |
833 | cx->pci_dev->device, cx->card_rev, pci_dev->bus->number, |
834 | PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn), | |
42d0c3ad | 835 | cx->pci_dev->irq, pci_latency, (u64)cx->base_addr); |
1c1e45d1 HV |
836 | |
837 | return 0; | |
838 | } | |
839 | ||
ff2a2001 | 840 | static void cx18_init_subdevs(struct cx18 *cx) |
1c1e45d1 HV |
841 | { |
842 | u32 hw = cx->card->hw_all; | |
ff2a2001 | 843 | u32 device; |
1c1e45d1 HV |
844 | int i; |
845 | ||
ff2a2001 | 846 | for (i = 0, device = 1; i < 32; i++, device <<= 1) { |
1c1e45d1 HV |
847 | |
848 | if (!(device & hw)) | |
849 | continue; | |
ff2a2001 AW |
850 | |
851 | switch (device) { | |
ff2a2001 AW |
852 | case CX18_HW_DVB: |
853 | case CX18_HW_TVEEPROM: | |
854 | /* These subordinate devices do not use probing */ | |
1c1e45d1 | 855 | cx->hw_flags |= device; |
ff2a2001 AW |
856 | break; |
857 | case CX18_HW_418_AV: | |
858 | /* The A/V decoder gets probed earlier to set PLLs */ | |
859 | /* Just note that the card uses it (i.e. has analog) */ | |
1c1e45d1 | 860 | cx->hw_flags |= device; |
ff2a2001 | 861 | break; |
eefe1010 AW |
862 | case CX18_HW_GPIO_RESET_CTRL: |
863 | /* | |
864 | * The Reset Controller gets probed and added to | |
865 | * hw_flags earlier for i2c adapter/bus initialization | |
866 | */ | |
867 | break; | |
868 | case CX18_HW_GPIO_MUX: | |
869 | if (cx18_gpio_register(cx, device) == 0) | |
870 | cx->hw_flags |= device; | |
871 | break; | |
ff2a2001 AW |
872 | default: |
873 | if (cx18_i2c_register(cx, i) == 0) | |
874 | cx->hw_flags |= device; | |
875 | break; | |
876 | } | |
1c1e45d1 HV |
877 | } |
878 | ||
ff2a2001 AW |
879 | if (cx->hw_flags & CX18_HW_418_AV) |
880 | cx->sd_av = cx18_find_hw(cx, CX18_HW_418_AV); | |
881 | ||
882 | if (cx->card->hw_muxer != 0) | |
883 | cx->sd_extmux = cx18_find_hw(cx, cx->card->hw_muxer); | |
1c1e45d1 HV |
884 | } |
885 | ||
4c62e976 GKH |
886 | static int cx18_probe(struct pci_dev *pci_dev, |
887 | const struct pci_device_id *pci_id) | |
1c1e45d1 HV |
888 | { |
889 | int retval = 0; | |
ff086575 | 890 | int i; |
1c1e45d1 HV |
891 | u32 devtype; |
892 | struct cx18 *cx; | |
893 | ||
5811cf99 AW |
894 | /* FIXME - module parameter arrays constrain max instances */ |
895 | i = atomic_inc_return(&cx18_instance) - 1; | |
896 | if (i >= CX18_MAX_CARDS) { | |
6beb1388 MCC |
897 | printk(KERN_ERR "cx18: cannot manage card %d, driver has a limit of 0 - %d\n", |
898 | i, CX18_MAX_CARDS - 1); | |
1c1e45d1 HV |
899 | return -ENOMEM; |
900 | } | |
901 | ||
ad89e2e3 | 902 | cx = kzalloc(sizeof(*cx), GFP_KERNEL); |
c38e8657 | 903 | if (!cx) |
1c1e45d1 | 904 | return -ENOMEM; |
c38e8657 | 905 | |
888cdb07 | 906 | cx->pci_dev = pci_dev; |
5811cf99 AW |
907 | cx->instance = i; |
908 | ||
888cdb07 AW |
909 | retval = v4l2_device_register(&pci_dev->dev, &cx->v4l2_dev); |
910 | if (retval) { | |
6beb1388 MCC |
911 | printk(KERN_ERR "cx18: v4l2_device_register of card %d failed\n", |
912 | cx->instance); | |
5811cf99 AW |
913 | kfree(cx); |
914 | return retval; | |
888cdb07 | 915 | } |
5811cf99 AW |
916 | snprintf(cx->v4l2_dev.name, sizeof(cx->v4l2_dev.name), "cx18-%d", |
917 | cx->instance); | |
918 | CX18_INFO("Initializing card %d\n", cx->instance); | |
888cdb07 | 919 | |
1c1e45d1 HV |
920 | cx18_process_options(cx); |
921 | if (cx->options.cardtype == -1) { | |
922 | retval = -ENODEV; | |
5811cf99 | 923 | goto err; |
1c1e45d1 | 924 | } |
87116159 AW |
925 | |
926 | retval = cx18_init_struct1(cx); | |
927 | if (retval) | |
5811cf99 | 928 | goto err; |
1c1e45d1 | 929 | |
42d0c3ad | 930 | CX18_DEBUG_INFO("base addr: 0x%llx\n", (u64)cx->base_addr); |
1c1e45d1 HV |
931 | |
932 | /* PCI Device Setup */ | |
3d05913d | 933 | retval = cx18_setup_pci(cx, pci_dev, pci_id); |
572bfea7 | 934 | if (retval != 0) |
87116159 | 935 | goto free_workqueues; |
572bfea7 | 936 | |
1c1e45d1 | 937 | /* map io memory */ |
42d0c3ad HV |
938 | CX18_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n", |
939 | (u64)cx->base_addr + CX18_MEM_OFFSET, CX18_MEM_SIZE); | |
4bdc0d67 | 940 | cx->enc_mem = ioremap(cx->base_addr + CX18_MEM_OFFSET, |
1c1e45d1 HV |
941 | CX18_MEM_SIZE); |
942 | if (!cx->enc_mem) { | |
6beb1388 MCC |
943 | CX18_ERR("ioremap failed. Can't get a window into CX23418 memory and register space\n"); |
944 | CX18_ERR("Each capture card with a CX23418 needs 64 MB of vmalloc address space for the window\n"); | |
fa98447f | 945 | CX18_ERR("Check the output of 'grep Vmalloc /proc/meminfo'\n"); |
6beb1388 | 946 | CX18_ERR("Use the vmalloc= kernel command line option to set VmallocTotal to a larger value\n"); |
1c1e45d1 HV |
947 | retval = -ENOMEM; |
948 | goto free_mem; | |
949 | } | |
950 | cx->reg_mem = cx->enc_mem + CX18_REG_OFFSET; | |
b1526421 | 951 | devtype = cx18_read_reg(cx, 0xC72028); |
1c1e45d1 HV |
952 | switch (devtype & 0xff000000) { |
953 | case 0xff000000: | |
954 | CX18_INFO("cx23418 revision %08x (A)\n", devtype); | |
955 | break; | |
956 | case 0x01000000: | |
957 | CX18_INFO("cx23418 revision %08x (B)\n", devtype); | |
958 | break; | |
959 | default: | |
960 | CX18_INFO("cx23418 revision %08x (Unknown)\n", devtype); | |
961 | break; | |
962 | } | |
963 | ||
964 | cx18_init_power(cx, 1); | |
965 | cx18_init_memory(cx); | |
966 | ||
990c81c8 | 967 | cx->scb = (struct cx18_scb __iomem *)(cx->enc_mem + SCB_OFFSET); |
1c1e45d1 HV |
968 | cx18_init_scb(cx); |
969 | ||
970 | cx18_gpio_init(cx); | |
971 | ||
ff2a2001 AW |
972 | /* Initialize integrated A/V decoder early to set PLLs, just in case */ |
973 | retval = cx18_av_probe(cx); | |
fa3e7036 AW |
974 | if (retval) { |
975 | CX18_ERR("Could not register A/V decoder subdevice\n"); | |
976 | goto free_map; | |
977 | } | |
fa3e7036 | 978 | |
eefe1010 AW |
979 | /* Initialize GPIO Reset Controller to do chip resets during i2c init */ |
980 | if (cx->card->hw_all & CX18_HW_GPIO_RESET_CTRL) { | |
981 | if (cx18_gpio_register(cx, CX18_HW_GPIO_RESET_CTRL) != 0) | |
6beb1388 | 982 | CX18_WARN("Could not register GPIO reset controllersubdevice; proceeding anyway.\n"); |
eefe1010 AW |
983 | else |
984 | cx->hw_flags |= CX18_HW_GPIO_RESET_CTRL; | |
985 | } | |
986 | ||
1c1e45d1 HV |
987 | /* active i2c */ |
988 | CX18_DEBUG_INFO("activating i2c...\n"); | |
9b4a7c8a AW |
989 | retval = init_cx18_i2c(cx); |
990 | if (retval) { | |
1c1e45d1 HV |
991 | CX18_ERR("Could not initialize i2c\n"); |
992 | goto free_map; | |
993 | } | |
994 | ||
1c1e45d1 HV |
995 | if (cx->card->hw_all & CX18_HW_TVEEPROM) { |
996 | /* Based on the model number the cardtype may be changed. | |
997 | The PCI IDs are not always reliable. */ | |
2bfe2fa4 | 998 | const struct cx18_card *orig_card = cx->card; |
1c1e45d1 | 999 | cx18_process_eeprom(cx); |
2bfe2fa4 AW |
1000 | |
1001 | if (cx->card != orig_card) { | |
1002 | /* Changed the cardtype; re-reset the I2C chips */ | |
1003 | cx18_gpio_init(cx); | |
1004 | cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL, | |
1005 | core, reset, (u32) CX18_GPIO_RESET_I2C); | |
1006 | } | |
1c1e45d1 HV |
1007 | } |
1008 | if (cx->card->comment) | |
1009 | CX18_INFO("%s", cx->card->comment); | |
1010 | if (cx->card->v4l2_capabilities == 0) { | |
1011 | retval = -ENODEV; | |
1012 | goto free_i2c; | |
1013 | } | |
1014 | cx18_init_memory(cx); | |
fd6b9c97 | 1015 | cx18_init_scb(cx); |
1c1e45d1 HV |
1016 | |
1017 | /* Register IRQ */ | |
3d05913d | 1018 | retval = request_irq(cx->pci_dev->irq, cx18_irq_handler, |
9a373d17 | 1019 | IRQF_SHARED, cx->v4l2_dev.name, (void *)cx); |
1c1e45d1 HV |
1020 | if (retval) { |
1021 | CX18_ERR("Failed to register irq %d\n", retval); | |
1022 | goto free_i2c; | |
1023 | } | |
1024 | ||
1025 | if (cx->std == 0) | |
1026 | cx->std = V4L2_STD_NTSC_M; | |
1027 | ||
1028 | if (cx->options.tuner == -1) { | |
1c1e45d1 HV |
1029 | for (i = 0; i < CX18_CARD_MAX_TUNERS; i++) { |
1030 | if ((cx->std & cx->card->tuners[i].std) == 0) | |
1031 | continue; | |
1032 | cx->options.tuner = cx->card->tuners[i].tuner; | |
1033 | break; | |
1034 | } | |
1035 | } | |
1036 | /* if no tuner was found, then pick the first tuner in the card list */ | |
1037 | if (cx->options.tuner == -1 && cx->card->tuners[0].std) { | |
1038 | cx->std = cx->card->tuners[0].std; | |
c3cb4d95 HV |
1039 | if (cx->std & V4L2_STD_PAL) |
1040 | cx->std = V4L2_STD_PAL_BG | V4L2_STD_PAL_H; | |
1041 | else if (cx->std & V4L2_STD_NTSC) | |
1042 | cx->std = V4L2_STD_NTSC_M; | |
1043 | else if (cx->std & V4L2_STD_SECAM) | |
1044 | cx->std = V4L2_STD_SECAM_L; | |
1c1e45d1 HV |
1045 | cx->options.tuner = cx->card->tuners[0].tuner; |
1046 | } | |
1047 | if (cx->options.radio == -1) | |
1048 | cx->options.radio = (cx->card->radio_input.audio_type != 0); | |
1049 | ||
1050 | /* The card is now fully identified, continue with card-specific | |
1051 | initialization. */ | |
1052 | cx18_init_struct2(cx); | |
1053 | ||
ff2a2001 | 1054 | cx18_init_subdevs(cx); |
1c1e45d1 | 1055 | |
8d037ed1 | 1056 | if (cx->std & V4L2_STD_525_60) |
1c1e45d1 | 1057 | cx->is_60hz = 1; |
8d037ed1 | 1058 | else |
1c1e45d1 | 1059 | cx->is_50hz = 1; |
8d037ed1 | 1060 | |
a75b9be1 | 1061 | cx2341x_handler_set_50hz(&cx->cxhdl, !cx->is_60hz); |
1c1e45d1 | 1062 | |
1c1e45d1 HV |
1063 | if (cx->options.radio > 0) |
1064 | cx->v4l2_cap |= V4L2_CAP_RADIO; | |
1065 | ||
1c1e45d1 HV |
1066 | if (cx->options.tuner > -1) { |
1067 | struct tuner_setup setup; | |
1068 | ||
1069 | setup.addr = ADDR_UNSET; | |
1070 | setup.type = cx->options.tuner; | |
1071 | setup.mode_mask = T_ANALOG_TV; /* matches TV tuners */ | |
6a03dc92 | 1072 | setup.config = NULL; |
c8c741b6 AW |
1073 | if (cx->options.radio > 0) |
1074 | setup.mode_mask |= T_RADIO; | |
1c1e45d1 HV |
1075 | setup.tuner_callback = (setup.type == TUNER_XC2028) ? |
1076 | cx18_reset_tuner_gpio : NULL; | |
ff2a2001 | 1077 | cx18_call_all(cx, tuner, s_type_addr, &setup); |
1c1e45d1 HV |
1078 | if (setup.type == TUNER_XC2028) { |
1079 | static struct xc2028_ctrl ctrl = { | |
1080 | .fname = XC2028_DEFAULT_FIRMWARE, | |
1081 | .max_len = 64, | |
1082 | }; | |
1083 | struct v4l2_priv_tun_config cfg = { | |
1084 | .tuner = cx->options.tuner, | |
1085 | .priv = &ctrl, | |
1086 | }; | |
ff2a2001 | 1087 | cx18_call_all(cx, tuner, s_config, &cfg); |
1c1e45d1 HV |
1088 | } |
1089 | } | |
1090 | ||
1091 | /* The tuner is fixed to the standard. The other inputs (e.g. S-Video) | |
1092 | are not. */ | |
1093 | cx->tuner_std = cx->std; | |
2bfe2fa4 AW |
1094 | if (cx->std == V4L2_STD_ALL) |
1095 | cx->std = V4L2_STD_NTSC_M; | |
1c1e45d1 | 1096 | |
5e7fdc5e HV |
1097 | retval = cx18_streams_setup(cx); |
1098 | if (retval) { | |
1099 | CX18_ERR("Error %d setting up streams\n", retval); | |
1100 | goto free_irq; | |
1101 | } | |
1102 | retval = cx18_streams_register(cx); | |
1103 | if (retval) { | |
1104 | CX18_ERR("Error %d registering devices\n", retval); | |
1105 | goto free_streams; | |
1106 | } | |
1c1e45d1 | 1107 | |
5811cf99 | 1108 | CX18_INFO("Initialized card: %s\n", cx->card_name); |
d68b687b DH |
1109 | |
1110 | /* Load cx18 submodules (cx18-alsa) */ | |
1111 | request_modules(cx); | |
1c1e45d1 HV |
1112 | return 0; |
1113 | ||
1114 | free_streams: | |
3f98387e | 1115 | cx18_streams_cleanup(cx, 1); |
1c1e45d1 | 1116 | free_irq: |
3d05913d | 1117 | free_irq(cx->pci_dev->irq, (void *)cx); |
1c1e45d1 HV |
1118 | free_i2c: |
1119 | exit_cx18_i2c(cx); | |
1120 | free_map: | |
1121 | cx18_iounmap(cx); | |
1122 | free_mem: | |
1123 | release_mem_region(cx->base_addr, CX18_MEM_SIZE); | |
87116159 | 1124 | free_workqueues: |
deed75ed | 1125 | destroy_workqueue(cx->in_work_queue); |
1c1e45d1 | 1126 | err: |
1c1e45d1 HV |
1127 | CX18_ERR("Error %d on initialization\n", retval); |
1128 | ||
5811cf99 AW |
1129 | v4l2_device_unregister(&cx->v4l2_dev); |
1130 | kfree(cx); | |
1c1e45d1 HV |
1131 | return retval; |
1132 | } | |
1133 | ||
1134 | int cx18_init_on_first_open(struct cx18 *cx) | |
1135 | { | |
1136 | int video_input; | |
1137 | int fw_retry_count = 3; | |
1138 | struct v4l2_frequency vf; | |
3b6fe58f | 1139 | struct cx18_open_id fh; |
2bfe2fa4 | 1140 | v4l2_std_id std; |
3b6fe58f AW |
1141 | |
1142 | fh.cx = cx; | |
1c1e45d1 HV |
1143 | |
1144 | if (test_bit(CX18_F_I_FAILED, &cx->i_flags)) | |
1145 | return -ENXIO; | |
1146 | ||
1147 | if (test_and_set_bit(CX18_F_I_INITED, &cx->i_flags)) | |
1148 | return 0; | |
1149 | ||
1150 | while (--fw_retry_count > 0) { | |
1151 | /* load firmware */ | |
1152 | if (cx18_firmware_init(cx) == 0) | |
1153 | break; | |
1154 | if (fw_retry_count > 1) | |
1155 | CX18_WARN("Retry loading firmware\n"); | |
1156 | } | |
1157 | ||
1158 | if (fw_retry_count == 0) { | |
1159 | set_bit(CX18_F_I_FAILED, &cx->i_flags); | |
1160 | return -ENXIO; | |
1161 | } | |
1162 | set_bit(CX18_F_I_LOADED_FW, &cx->i_flags); | |
1163 | ||
350145a4 AW |
1164 | /* |
1165 | * Init the firmware twice to work around a silicon bug | |
1166 | * with the digital TS. | |
1167 | * | |
1168 | * The second firmware load requires us to normalize the APU state, | |
1169 | * or the audio for the first analog capture will be badly incorrect. | |
1170 | * | |
1171 | * I can't seem to call APU_RESETAI and have it succeed without the | |
1172 | * APU capturing audio, so we start and stop it here to do the reset | |
1173 | */ | |
1174 | ||
1175 | /* MPEG Encoding, 224 kbps, MPEG Layer II, 48 ksps */ | |
1176 | cx18_vapi(cx, CX18_APU_START, 2, CX18_APU_ENCODING_METHOD_MPEG|0xb9, 0); | |
1177 | cx18_vapi(cx, CX18_APU_RESETAI, 0); | |
1178 | cx18_vapi(cx, CX18_APU_STOP, 1, CX18_APU_ENCODING_METHOD_MPEG); | |
1c1e45d1 HV |
1179 | |
1180 | fw_retry_count = 3; | |
1181 | while (--fw_retry_count > 0) { | |
1182 | /* load firmware */ | |
1183 | if (cx18_firmware_init(cx) == 0) | |
1184 | break; | |
1185 | if (fw_retry_count > 1) | |
1186 | CX18_WARN("Retry loading firmware\n"); | |
1187 | } | |
1188 | ||
1189 | if (fw_retry_count == 0) { | |
1190 | set_bit(CX18_F_I_FAILED, &cx->i_flags); | |
1191 | return -ENXIO; | |
1192 | } | |
1193 | ||
d5c02f6b AW |
1194 | /* |
1195 | * The second firmware load requires us to normalize the APU state, | |
1196 | * or the audio for the first analog capture will be badly incorrect. | |
1197 | * | |
1198 | * I can't seem to call APU_RESETAI and have it succeed without the | |
1199 | * APU capturing audio, so we start and stop it here to do the reset | |
1200 | */ | |
1201 | ||
1202 | /* MPEG Encoding, 224 kbps, MPEG Layer II, 48 ksps */ | |
1203 | cx18_vapi(cx, CX18_APU_START, 2, CX18_APU_ENCODING_METHOD_MPEG|0xb9, 0); | |
1204 | cx18_vapi(cx, CX18_APU_RESETAI, 0); | |
1205 | cx18_vapi(cx, CX18_APU_STOP, 1, CX18_APU_ENCODING_METHOD_MPEG); | |
1206 | ||
fa3e7036 | 1207 | /* Init the A/V decoder, if it hasn't been already */ |
cc26b076 | 1208 | v4l2_subdev_call(cx->sd_av, core, load_fw); |
fa3e7036 | 1209 | |
1c1e45d1 HV |
1210 | vf.tuner = 0; |
1211 | vf.type = V4L2_TUNER_ANALOG_TV; | |
1212 | vf.frequency = 6400; /* the tuner 'baseline' frequency */ | |
1213 | ||
1214 | /* Set initial frequency. For PAL/SECAM broadcasts no | |
1215 | 'default' channel exists AFAIK. */ | |
1216 | if (cx->std == V4L2_STD_NTSC_M_JP) | |
1217 | vf.frequency = 1460; /* ch. 1 91250*16/1000 */ | |
1218 | else if (cx->std & V4L2_STD_NTSC_M) | |
1219 | vf.frequency = 1076; /* ch. 4 67250*16/1000 */ | |
1220 | ||
1221 | video_input = cx->active_input; | |
1222 | cx->active_input++; /* Force update of input */ | |
3b6fe58f | 1223 | cx18_s_input(NULL, &fh, video_input); |
1c1e45d1 HV |
1224 | |
1225 | /* Let the VIDIOC_S_STD ioctl do all the work, keeps the code | |
1226 | in one place. */ | |
1227 | cx->std++; /* Force full standard initialization */ | |
2bfe2fa4 | 1228 | std = (cx->tuner_std == V4L2_STD_ALL) ? V4L2_STD_NTSC_M : cx->tuner_std; |
314527ac | 1229 | cx18_s_std(NULL, &fh, std); |
3b6fe58f | 1230 | cx18_s_frequency(NULL, &fh, &vf); |
1c1e45d1 HV |
1231 | return 0; |
1232 | } | |
1233 | ||
deed75ed | 1234 | static void cx18_cancel_in_work_orders(struct cx18 *cx) |
18b5dc2e AW |
1235 | { |
1236 | int i; | |
deed75ed AW |
1237 | for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) |
1238 | cancel_work_sync(&cx->in_work_order[i].work); | |
18b5dc2e AW |
1239 | } |
1240 | ||
21a278b8 AW |
1241 | static void cx18_cancel_out_work_orders(struct cx18 *cx) |
1242 | { | |
1243 | int i; | |
1244 | for (i = 0; i < CX18_MAX_STREAMS; i++) | |
eb1ca9a4 | 1245 | if (cx->streams[i].video_dev.v4l2_dev) |
21a278b8 AW |
1246 | cancel_work_sync(&cx->streams[i].out_work_order); |
1247 | } | |
1248 | ||
1c1e45d1 HV |
1249 | static void cx18_remove(struct pci_dev *pci_dev) |
1250 | { | |
888cdb07 | 1251 | struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev); |
5811cf99 | 1252 | struct cx18 *cx = to_cx18(v4l2_dev); |
6da6bf5e | 1253 | int i; |
1c1e45d1 | 1254 | |
5811cf99 | 1255 | CX18_DEBUG_INFO("Removing Card\n"); |
1c1e45d1 | 1256 | |
707bcf32 TH |
1257 | flush_request_modules(cx); |
1258 | ||
1c1e45d1 HV |
1259 | /* Stop all captures */ |
1260 | CX18_DEBUG_INFO("Stopping all streams\n"); | |
31554ae5 | 1261 | if (atomic_read(&cx->tot_capturing) > 0) |
1c1e45d1 HV |
1262 | cx18_stop_all_captures(cx); |
1263 | ||
87116159 | 1264 | /* Stop interrupts that cause incoming work to be queued */ |
b1526421 | 1265 | cx18_sw1_irq_disable(cx, IRQ_CPU_TO_EPU | IRQ_APU_TO_EPU); |
87116159 AW |
1266 | |
1267 | /* Incoming work can cause outgoing work, so clean up incoming first */ | |
1268 | cx18_cancel_in_work_orders(cx); | |
21a278b8 | 1269 | cx18_cancel_out_work_orders(cx); |
87116159 AW |
1270 | |
1271 | /* Stop ack interrupts that may have been needed for work to finish */ | |
b1526421 | 1272 | cx18_sw2_irq_disable(cx, IRQ_CPU_TO_EPU_ACK | IRQ_APU_TO_EPU_ACK); |
1c1e45d1 HV |
1273 | |
1274 | cx18_halt_firmware(cx); | |
1275 | ||
deed75ed | 1276 | destroy_workqueue(cx->in_work_queue); |
572bfea7 | 1277 | |
3f98387e | 1278 | cx18_streams_cleanup(cx, 1); |
1c1e45d1 HV |
1279 | |
1280 | exit_cx18_i2c(cx); | |
1281 | ||
3d05913d | 1282 | free_irq(cx->pci_dev->irq, (void *)cx); |
1c1e45d1 | 1283 | |
cba627a5 | 1284 | cx18_iounmap(cx); |
1c1e45d1 HV |
1285 | |
1286 | release_mem_region(cx->base_addr, CX18_MEM_SIZE); | |
1287 | ||
3d05913d | 1288 | pci_disable_device(cx->pci_dev); |
6da6bf5e | 1289 | |
af28c996 | 1290 | if (cx->vbi.sliced_mpeg_data[0]) |
6da6bf5e AW |
1291 | for (i = 0; i < CX18_VBI_FRAMES; i++) |
1292 | kfree(cx->vbi.sliced_mpeg_data[i]); | |
1c1e45d1 | 1293 | |
a75b9be1 HV |
1294 | v4l2_ctrl_handler_free(&cx->av_state.hdl); |
1295 | ||
5811cf99 | 1296 | CX18_INFO("Removed %s\n", cx->card_name); |
888cdb07 | 1297 | |
5811cf99 AW |
1298 | v4l2_device_unregister(v4l2_dev); |
1299 | kfree(cx); | |
1c1e45d1 HV |
1300 | } |
1301 | ||
d68b687b | 1302 | |
1c1e45d1 HV |
1303 | /* define a pci_driver for card detection */ |
1304 | static struct pci_driver cx18_pci_driver = { | |
1305 | .name = "cx18", | |
1306 | .id_table = cx18_pci_tbl, | |
1307 | .probe = cx18_probe, | |
1308 | .remove = cx18_remove, | |
1309 | }; | |
1310 | ||
9710e7a7 | 1311 | static int __init module_start(void) |
1c1e45d1 | 1312 | { |
f8bd9d26 DH |
1313 | printk(KERN_INFO "cx18: Start initialization, version %s\n", |
1314 | CX18_VERSION); | |
1c1e45d1 | 1315 | |
1c1e45d1 HV |
1316 | /* Validate parameters */ |
1317 | if (cx18_first_minor < 0 || cx18_first_minor >= CX18_MAX_CARDS) { | |
dd89601d | 1318 | printk(KERN_ERR "cx18: Exiting, cx18_first_minor must be between 0 and %d\n", |
1c1e45d1 HV |
1319 | CX18_MAX_CARDS - 1); |
1320 | return -1; | |
1321 | } | |
1322 | ||
1323 | if (cx18_debug < 0 || cx18_debug > 511) { | |
1324 | cx18_debug = 0; | |
1325 | printk(KERN_INFO "cx18: Debug value must be >= 0 and <= 511!\n"); | |
1326 | } | |
1327 | ||
1328 | if (pci_register_driver(&cx18_pci_driver)) { | |
1329 | printk(KERN_ERR "cx18: Error detecting PCI card\n"); | |
1330 | return -ENODEV; | |
1331 | } | |
1332 | printk(KERN_INFO "cx18: End initialization\n"); | |
1333 | return 0; | |
1334 | } | |
1335 | ||
9710e7a7 | 1336 | static void __exit module_cleanup(void) |
1c1e45d1 | 1337 | { |
1c1e45d1 | 1338 | pci_unregister_driver(&cx18_pci_driver); |
1c1e45d1 HV |
1339 | } |
1340 | ||
1341 | module_init(module_start); | |
1342 | module_exit(module_cleanup); | |
8a7bf1d4 | 1343 | MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE); |