media: use strscpy() instead of strlcpy()
[linux-2.6-block.git] / drivers / media / pci / bt8xx / dvb-bt8xx.c
CommitLineData
1da177e4
LT
1/*
2 * Bt8xx based DVB adapter driver
3 *
4 * Copyright (C) 2002,2003 Florian Schirmer <jolt@tuxbox.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
1da177e4
LT
16 */
17
fa132a64 18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
6c59eefd 19
1da177e4
LT
20#include <linux/bitops.h>
21#include <linux/module.h>
1da177e4 22#include <linux/init.h>
0496daa7 23#include <linux/kernel.h>
1da177e4
LT
24#include <linux/device.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/i2c.h>
28
fada1935
MCC
29#include <media/dmxdev.h>
30#include <media/dvbdev.h>
31#include <media/dvb_demux.h>
32#include <media/dvb_frontend.h>
1da177e4 33#include "dvb-bt8xx.h"
1da177e4
LT
34#include "bt878.h"
35
36static int debug;
37
38module_param(debug, int, 0644);
39MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
40
78e92006
JG
41DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
42
fa132a64
MCC
43#define dprintk(fmt, arg...) do { \
44 if (debug) \
45 printk(KERN_DEBUG pr_fmt("%s: " fmt), \
46 __func__, ##arg); \
47} while (0)
48
1da177e4 49
05ade5a5
DJ
50#define IF_FREQUENCYx6 217 /* 6 * 36.16666666667MHz */
51
1da177e4
LT
52static void dvb_bt8xx_task(unsigned long data)
53{
54 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *)data;
55
fa132a64 56 dprintk("%d\n", card->bt->finished_block);
1da177e4
LT
57
58 while (card->bt->last_block != card->bt->finished_block) {
59 (card->bt->TS_Size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter)
60 (&card->demux,
61 &card->bt->buf_cpu[card->bt->last_block *
62 card->bt->block_bytes],
63 card->bt->block_bytes);
64 card->bt->last_block = (card->bt->last_block + 1) %
65 card->bt->block_count;
66 }
67}
68
69static int dvb_bt8xx_start_feed(struct dvb_demux_feed *dvbdmxfeed)
70{
2bfe031d 71 struct dvb_demux*dvbdmx = dvbdmxfeed->demux;
1da177e4
LT
72 struct dvb_bt8xx_card *card = dvbdmx->priv;
73 int rc;
74
75 dprintk("dvb_bt8xx: start_feed\n");
76
77 if (!dvbdmx->dmx.frontend)
78 return -EINVAL;
79
3593cab5 80 mutex_lock(&card->lock);
1da177e4
LT
81 card->nfeeds++;
82 rc = card->nfeeds;
83 if (card->nfeeds == 1)
84 bt878_start(card->bt, card->gpio_mode,
85 card->op_sync_orin, card->irq_err_ignore);
3593cab5 86 mutex_unlock(&card->lock);
1da177e4
LT
87 return rc;
88}
89
90static int dvb_bt8xx_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
91{
92 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
93 struct dvb_bt8xx_card *card = dvbdmx->priv;
94
95 dprintk("dvb_bt8xx: stop_feed\n");
96
97 if (!dvbdmx->dmx.frontend)
98 return -EINVAL;
99
3593cab5 100 mutex_lock(&card->lock);
1da177e4
LT
101 card->nfeeds--;
102 if (card->nfeeds == 0)
103 bt878_stop(card->bt);
3593cab5 104 mutex_unlock(&card->lock);
1da177e4
LT
105
106 return 0;
107}
108
109static int is_pci_slot_eq(struct pci_dev* adev, struct pci_dev* bdev)
110{
111 if ((adev->subsystem_vendor == bdev->subsystem_vendor) &&
112 (adev->subsystem_device == bdev->subsystem_device) &&
113 (adev->bus->number == bdev->bus->number) &&
114 (PCI_SLOT(adev->devfn) == PCI_SLOT(bdev->devfn)))
115 return 1;
116 return 0;
117}
118
4c62e976
GKH
119static struct bt878 *dvb_bt8xx_878_match(unsigned int bttv_nr,
120 struct pci_dev* bttv_pci_dev)
1da177e4
LT
121{
122 unsigned int card_nr;
123
124 /* Hmm, n squared. Hope n is small */
1f15ddd0 125 for (card_nr = 0; card_nr < bt878_num; card_nr++)
1da177e4
LT
126 if (is_pci_slot_eq(bt878[card_nr].dev, bttv_pci_dev))
127 return &bt878[card_nr];
1da177e4
LT
128 return NULL;
129}
130
1da177e4
LT
131static int thomson_dtt7579_demod_init(struct dvb_frontend* fe)
132{
133 static u8 mt352_clock_config [] = { 0x89, 0x38, 0x38 };
134 static u8 mt352_reset [] = { 0x50, 0x80 };
135 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
136 static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0x20 };
137 static u8 mt352_gpp_ctl_cfg [] = { 0x8C, 0x33 };
138 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
139
140 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
141 udelay(2000);
142 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
143 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
144
145 mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
50b215a0 146 mt352_write(fe, mt352_gpp_ctl_cfg, sizeof(mt352_gpp_ctl_cfg));
1da177e4
LT
147 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
148
149 return 0;
150}
151
249fa0b0 152static int thomson_dtt7579_tuner_calc_regs(struct dvb_frontend *fe, u8* pllbuf, int buf_len)
1da177e4 153{
249fa0b0 154 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
155 u32 div;
156 unsigned char bs = 0;
157 unsigned char cp = 0;
158
74aa7a29
AQ
159 if (buf_len < 5)
160 return -EINVAL;
161
249fa0b0 162 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
1da177e4 163
249fa0b0 164 if (c->frequency < 542000000)
1f15ddd0 165 cp = 0xb4;
249fa0b0 166 else if (c->frequency < 771000000)
1f15ddd0
DJ
167 cp = 0xbc;
168 else
169 cp = 0xf4;
1da177e4 170
249fa0b0 171 if (c->frequency == 0)
1f15ddd0 172 bs = 0x03;
249fa0b0 173 else if (c->frequency < 443250000)
1f15ddd0
DJ
174 bs = 0x02;
175 else
176 bs = 0x08;
1da177e4 177
74aa7a29 178 pllbuf[0] = 0x60;
1da177e4
LT
179 pllbuf[1] = div >> 8;
180 pllbuf[2] = div & 0xff;
181 pllbuf[3] = cp;
182 pllbuf[4] = bs;
183
74aa7a29 184 return 5;
1da177e4
LT
185}
186
187static struct mt352_config thomson_dtt7579_config = {
1da177e4
LT
188 .demod_address = 0x0f,
189 .demod_init = thomson_dtt7579_demod_init,
1da177e4
LT
190};
191
8c99024b
MK
192static struct zl10353_config thomson_dtt7579_zl10353_config = {
193 .demod_address = 0x0f,
8c99024b
MK
194};
195
14d24d14 196static int cx24108_tuner_set_params(struct dvb_frontend *fe)
1da177e4 197{
cba3f88a
MCC
198 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
199 u32 freq = c->frequency;
1f15ddd0
DJ
200 int i, a, n, pump;
201 u32 band, pll;
1f15ddd0
DJ
202 u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000,
203 1576000,1718000,1856000,2036000,2150000};
204 u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000,
205 0x00102000,0x00104000,0x00108000,0x00110000,
206 0x00120000,0x00140000};
1da177e4 207
1f15ddd0 208 #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */
37965546 209 dprintk("cx24108 debug: entering SetTunerFreq, freq=%d\n", freq);
50b215a0
JS
210
211 /* This is really the bit driving the tuner chip cx24108 */
212
1f15ddd0
DJ
213 if (freq<950000)
214 freq = 950000; /* kHz */
215 else if (freq>2150000)
216 freq = 2150000; /* satellite IF is 950..2150MHz */
50b215a0
JS
217
218 /* decide which VCO to use for the input frequency */
491aa96a 219 for(i = 1; (i < ARRAY_SIZE(osci) - 1) && (osci[i] < freq); i++);
37965546 220 dprintk("cx24108 debug: select vco #%d (f=%d)\n", i, freq);
50b215a0
JS
221 band=bandsel[i];
222 /* the gain values must be set by SetSymbolrate */
223 /* compute the pll divider needed, from Conexant data sheet,
224 resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4,
225 depending on the divider bit. It is set to /4 on the 2 lowest
226 bands */
227 n=((i<=2?2:1)*freq*10L)/(XTAL/100);
228 a=n%32; n/=32; if(a==0) n--;
229 pump=(freq<(osci[i-1]+osci[i])/2);
230 pll=0xf8000000|
231 ((pump?1:2)<<(14+11))|
232 ((n&0x1ff)<<(5+11))|
233 ((a&0x1f)<<11);
234 /* everything is shifted left 11 bits to left-align the bits in the
235 32bit word. Output to the tuner goes MSB-aligned, after all */
37965546 236 dprintk("cx24108 debug: pump=%d, n=%d, a=%d\n", pump, n, a);
50b215a0
JS
237 cx24110_pll_write(fe,band);
238 /* set vga and vca to their widest-band settings, as a precaution.
239 SetSymbolrate might not be called to set this up */
240 cx24110_pll_write(fe,0x500c0000);
241 cx24110_pll_write(fe,0x83f1f800);
242 cx24110_pll_write(fe,pll);
1f15ddd0 243 //writereg(client,0x56,0x7f);
1da177e4
LT
244
245 return 0;
246}
247
74aa7a29 248static int pinnsat_tuner_init(struct dvb_frontend* fe)
1da177e4 249{
e7ac4646
MA
250 struct dvb_bt8xx_card *card = fe->dvb->priv;
251
252 bttv_gpio_enable(card->bttv_nr, 1, 1); /* output */
253 bttv_write_gpio(card->bttv_nr, 1, 1); /* relay on */
6457af5f 254
e7ac4646
MA
255 return 0;
256}
257
74aa7a29 258static int pinnsat_tuner_sleep(struct dvb_frontend* fe)
e7ac4646
MA
259{
260 struct dvb_bt8xx_card *card = fe->dvb->priv;
261
262 bttv_write_gpio(card->bttv_nr, 1, 0); /* relay off */
263
1f15ddd0 264 return 0;
1da177e4
LT
265}
266
1da177e4 267static struct cx24110_config pctvsat_config = {
1da177e4 268 .demod_address = 0x55,
1da177e4
LT
269};
270
14d24d14 271static int microtune_mt7202dtf_tuner_set_params(struct dvb_frontend *fe)
1da177e4 272{
cba3f88a 273 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
274 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
275 u8 cfg, cpump, band_select;
276 u8 data[4];
277 u32 div;
278 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
279
cba3f88a 280 div = (36000000 + c->frequency + 83333) / 166666;
1da177e4
LT
281 cfg = 0x88;
282
cba3f88a 283 if (c->frequency < 175000000)
1f15ddd0 284 cpump = 2;
cba3f88a 285 else if (c->frequency < 390000000)
1f15ddd0 286 cpump = 1;
cba3f88a 287 else if (c->frequency < 470000000)
1f15ddd0 288 cpump = 2;
cba3f88a 289 else if (c->frequency < 750000000)
1f15ddd0
DJ
290 cpump = 2;
291 else
292 cpump = 3;
1da177e4 293
cba3f88a 294 if (c->frequency < 175000000)
1f15ddd0 295 band_select = 0x0e;
cba3f88a 296 else if (c->frequency < 470000000)
1f15ddd0
DJ
297 band_select = 0x05;
298 else
299 band_select = 0x03;
1da177e4
LT
300
301 data[0] = (div >> 8) & 0x7f;
302 data[1] = div & 0xff;
303 data[2] = ((div >> 10) & 0x60) | cfg;
2b70a2f5 304 data[3] = (cpump << 6) | band_select;
1da177e4 305
dea74869
PB
306 if (fe->ops.i2c_gate_ctrl)
307 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT
308 i2c_transfer(card->i2c_adapter, &msg, 1);
309 return (div * 166666 - 36000000);
310}
311
312static int microtune_mt7202dtf_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
313{
314 struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv;
315
316 return request_firmware(fw, name, &bt->bt->dev->dev);
317}
318
64e423d4 319static const struct sp887x_config microtune_mt7202dtf_config = {
1da177e4 320 .demod_address = 0x70,
1da177e4
LT
321 .request_firmware = microtune_mt7202dtf_request_firmware,
322};
323
1da177e4
LT
324static int advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe)
325{
326 static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d };
327 static u8 mt352_reset [] = { 0x50, 0x80 };
328 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
329 static u8 mt352_agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
50b215a0 330 0x00, 0xFF, 0x00, 0x40, 0x40 };
1da177e4
LT
331 static u8 mt352_av771_extra[] = { 0xB5, 0x7A };
332 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
333
1da177e4
LT
334 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
335 udelay(2000);
336 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
337 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
338
339 mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg));
340 udelay(2000);
341 mt352_write(fe, mt352_av771_extra,sizeof(mt352_av771_extra));
342 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
343
344 return 0;
345}
346
249fa0b0 347static int advbt771_samsung_tdtc9251dh0_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
1da177e4 348{
249fa0b0 349 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
350 u32 div;
351 unsigned char bs = 0;
352 unsigned char cp = 0;
353
74aa7a29
AQ
354 if (buf_len < 5) return -EINVAL;
355
249fa0b0 356 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
1da177e4 357
249fa0b0 358 if (c->frequency < 150000000)
1f15ddd0 359 cp = 0xB4;
249fa0b0 360 else if (c->frequency < 173000000)
1f15ddd0 361 cp = 0xBC;
249fa0b0 362 else if (c->frequency < 250000000)
1f15ddd0 363 cp = 0xB4;
249fa0b0 364 else if (c->frequency < 400000000)
1f15ddd0 365 cp = 0xBC;
249fa0b0 366 else if (c->frequency < 420000000)
1f15ddd0 367 cp = 0xF4;
249fa0b0 368 else if (c->frequency < 470000000)
1f15ddd0 369 cp = 0xFC;
249fa0b0 370 else if (c->frequency < 600000000)
1f15ddd0 371 cp = 0xBC;
249fa0b0 372 else if (c->frequency < 730000000)
1f15ddd0
DJ
373 cp = 0xF4;
374 else
375 cp = 0xFC;
376
249fa0b0 377 if (c->frequency < 150000000)
1f15ddd0 378 bs = 0x01;
249fa0b0 379 else if (c->frequency < 173000000)
1f15ddd0 380 bs = 0x01;
249fa0b0 381 else if (c->frequency < 250000000)
1f15ddd0 382 bs = 0x02;
249fa0b0 383 else if (c->frequency < 400000000)
1f15ddd0 384 bs = 0x02;
249fa0b0 385 else if (c->frequency < 420000000)
1f15ddd0 386 bs = 0x02;
249fa0b0 387 else if (c->frequency < 470000000)
1f15ddd0 388 bs = 0x02;
1f15ddd0
DJ
389 else
390 bs = 0x08;
1da177e4 391
74aa7a29 392 pllbuf[0] = 0x61;
1da177e4
LT
393 pllbuf[1] = div >> 8;
394 pllbuf[2] = div & 0xff;
395 pllbuf[3] = cp;
396 pllbuf[4] = bs;
397
74aa7a29 398 return 5;
1da177e4
LT
399}
400
401static struct mt352_config advbt771_samsung_tdtc9251dh0_config = {
1da177e4
LT
402 .demod_address = 0x0f,
403 .demod_init = advbt771_samsung_tdtc9251dh0_demod_init,
1da177e4
LT
404};
405
1da177e4 406static struct dst_config dst_config = {
1da177e4
LT
407 .demod_address = 0x55,
408};
409
1da177e4
LT
410static int or51211_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
411{
412 struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv;
413
414 return request_firmware(fw, name, &bt->bt->dev->dev);
415}
416
417static void or51211_setmode(struct dvb_frontend * fe, int mode)
418{
419 struct dvb_bt8xx_card *bt = fe->dvb->priv;
420 bttv_write_gpio(bt->bttv_nr, 0x0002, mode); /* Reset */
421 msleep(20);
422}
423
424static void or51211_reset(struct dvb_frontend * fe)
425{
426 struct dvb_bt8xx_card *bt = fe->dvb->priv;
427
428 /* RESET DEVICE
25985edc 429 * reset is controlled by GPIO-0
1da177e4
LT
430 * when set to 0 causes reset and when to 1 for normal op
431 * must remain reset for 128 clock cycles on a 50Mhz clock
25985edc 432 * also PRM1 PRM2 & PRM4 are controlled by GPIO-1,GPIO-2 & GPIO-4
1da177e4
LT
433 * We assume that the reset has be held low long enough or we
434 * have been reset by a power on. When the driver is unloaded
435 * reset set to 0 so if reloaded we have been reset.
436 */
437 /* reset & PRM1,2&4 are outputs */
438 int ret = bttv_gpio_enable(bt->bttv_nr, 0x001F, 0x001F);
1f15ddd0 439 if (ret != 0)
fa132a64 440 pr_warn("or51211: Init Error - Can't Reset DVR (%i)\n", ret);
1da177e4
LT
441 bttv_write_gpio(bt->bttv_nr, 0x001F, 0x0000); /* Reset */
442 msleep(20);
443 /* Now set for normal operation */
444 bttv_write_gpio(bt->bttv_nr, 0x0001F, 0x0001);
445 /* wait for operation to begin */
446 msleep(500);
447}
448
449static void or51211_sleep(struct dvb_frontend * fe)
450{
451 struct dvb_bt8xx_card *bt = fe->dvb->priv;
452 bttv_write_gpio(bt->bttv_nr, 0x0001, 0x0000);
453}
454
4a40c73e 455static const struct or51211_config or51211_config = {
1da177e4
LT
456 .demod_address = 0x15,
457 .request_firmware = or51211_request_firmware,
458 .setmode = or51211_setmode,
459 .reset = or51211_reset,
460 .sleep = or51211_sleep,
461};
462
14d24d14 463static int vp3021_alps_tded4_tuner_set_params(struct dvb_frontend *fe)
1da177e4 464{
cba3f88a 465 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
466 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
467 u8 buf[4];
468 u32 div;
469 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf) };
470
cba3f88a 471 div = (c->frequency + 36166667) / 166667;
1da177e4
LT
472
473 buf[0] = (div >> 8) & 0x7F;
474 buf[1] = div & 0xFF;
475 buf[2] = 0x85;
cba3f88a 476 if ((c->frequency >= 47000000) && (c->frequency < 153000000))
1da177e4 477 buf[3] = 0x01;
cba3f88a 478 else if ((c->frequency >= 153000000) && (c->frequency < 430000000))
1da177e4 479 buf[3] = 0x02;
cba3f88a 480 else if ((c->frequency >= 430000000) && (c->frequency < 824000000))
1da177e4 481 buf[3] = 0x0C;
cba3f88a 482 else if ((c->frequency >= 824000000) && (c->frequency < 863000000))
1da177e4
LT
483 buf[3] = 0x8C;
484 else
485 return -EINVAL;
486
dea74869
PB
487 if (fe->ops.i2c_gate_ctrl)
488 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT
489 i2c_transfer(card->i2c_adapter, &msg, 1);
490 return 0;
491}
492
493static struct nxt6000_config vp3021_alps_tded4_config = {
1da177e4
LT
494 .demod_address = 0x0a,
495 .clock_inversion = 1,
1da177e4
LT
496};
497
05ade5a5
DJ
498static int digitv_alps_tded4_demod_init(struct dvb_frontend* fe)
499{
500 static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d };
501 static u8 mt352_reset [] = { 0x50, 0x80 };
502 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
503 static u8 mt352_agc_cfg [] = { 0x67, 0x20, 0xa0 };
504 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
505
506 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
507 udelay(2000);
508 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
509 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
510 mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg));
511 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
512
513 return 0;
514}
515
249fa0b0 516static int digitv_alps_tded4_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
05ade5a5
DJ
517{
518 u32 div;
249fa0b0 519 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
05ade5a5 520
74aa7a29
AQ
521 if (buf_len < 5)
522 return -EINVAL;
523
249fa0b0 524 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
05ade5a5 525
74aa7a29 526 pllbuf[0] = 0x61;
05ade5a5
DJ
527 pllbuf[1] = (div >> 8) & 0x7F;
528 pllbuf[2] = div & 0xFF;
529 pllbuf[3] = 0x85;
530
249fa0b0 531 dprintk("frequency %u, div %u\n", c->frequency, div);
05ade5a5 532
249fa0b0 533 if (c->frequency < 470000000)
05ade5a5 534 pllbuf[4] = 0x02;
249fa0b0 535 else if (c->frequency > 823000000)
05ade5a5
DJ
536 pllbuf[4] = 0x88;
537 else
538 pllbuf[4] = 0x08;
539
249fa0b0 540 if (c->bandwidth_hz == 8000000)
05ade5a5
DJ
541 pllbuf[4] |= 0x04;
542
74aa7a29 543 return 5;
05ade5a5
DJ
544}
545
546static void digitv_alps_tded4_reset(struct dvb_bt8xx_card *bt)
547{
548 /*
549 * Reset the frontend, must be called before trying
550 * to initialise the MT352 or mt352_attach
163d8fed 551 * will fail. Same goes for the nxt6000 frontend.
05ade5a5
DJ
552 *
553 */
554
555 int ret = bttv_gpio_enable(bt->bttv_nr, 0x08, 0x08);
556 if (ret != 0)
fa132a64
MCC
557 pr_warn("digitv_alps_tded4: Init Error - Can't Reset DVR (%i)\n",
558 ret);
05ade5a5
DJ
559
560 /* Pulse the reset line */
561 bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */
562 bttv_write_gpio(bt->bttv_nr, 0x08, 0x00); /* Low */
563 msleep(100);
564
565 bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */
566}
567
568static struct mt352_config digitv_alps_tded4_config = {
569 .demod_address = 0x0a,
570 .demod_init = digitv_alps_tded4_demod_init,
05ade5a5
DJ
571};
572
3cff00d9 573static struct lgdt330x_config tdvs_tua6034_config = {
3cff00d9
MK
574 .demod_chip = LGDT3303,
575 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
3cff00d9
MK
576};
577
578static void lgdt330x_reset(struct dvb_bt8xx_card *bt)
579{
580 /* Set pin 27 of the lgdt3303 chip high to reset the frontend */
581
582 /* Pulse the reset line */
583 bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */
584 bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000000); /* Low */
585 msleep(100);
586
587 bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */
588 msleep(100);
589}
590
1da177e4
LT
591static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
592{
50b215a0
JS
593 struct dst_state* state = NULL;
594
1da177e4 595 switch(type) {
6cffcc23 596 case BTTV_BOARD_DVICO_DVBT_LITE:
2bfe031d 597 card->fe = dvb_attach(mt352_attach, &thomson_dtt7579_config, card->i2c_adapter);
8c99024b
MK
598
599 if (card->fe == NULL)
2bfe031d 600 card->fe = dvb_attach(zl10353_attach, &thomson_dtt7579_zl10353_config,
8c99024b
MK
601 card->i2c_adapter);
602
1da177e4 603 if (card->fe != NULL) {
dea74869 604 card->fe->ops.tuner_ops.calc_regs = thomson_dtt7579_tuner_calc_regs;
f1b1eabf
MCC
605 card->fe->ops.info.frequency_min_hz = 174 * MHz;
606 card->fe->ops.info.frequency_max_hz = 862 * MHz;
1da177e4
LT
607 }
608 break;
1da177e4 609
6cffcc23 610 case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE:
3cff00d9 611 lgdt330x_reset(card);
23ba635d
MCC
612 card->fe = dvb_attach(lgdt330x_attach, &tdvs_tua6034_config,
613 0x0e, card->i2c_adapter);
74aa7a29 614 if (card->fe != NULL) {
827855d3
MK
615 dvb_attach(simple_tuner_attach, card->fe,
616 card->i2c_adapter, 0x61,
617 TUNER_LG_TDVS_H06XF);
fa132a64 618 dprintk("dvb_bt8xx: lgdt330x detected\n");
74aa7a29 619 }
3cff00d9 620 break;
3cff00d9 621
6cffcc23 622 case BTTV_BOARD_NEBULA_DIGITV:
05ade5a5
DJ
623 /*
624 * It is possible to determine the correct frontend using the I2C bus (see the Nebula SDK);
625 * this would be a cleaner solution than trying each frontend in turn.
626 */
627
628 /* Old Nebula (marked (c)2003 on high profile pci card) has nxt6000 demod */
163d8fed 629 digitv_alps_tded4_reset(card);
2bfe031d 630 card->fe = dvb_attach(nxt6000_attach, &vp3021_alps_tded4_config, card->i2c_adapter);
f30db067 631 if (card->fe != NULL) {
dea74869 632 card->fe->ops.tuner_ops.set_params = vp3021_alps_tded4_tuner_set_params;
fa132a64 633 dprintk("dvb_bt8xx: an nxt6000 was detected on your digitv card\n");
f30db067
SA
634 break;
635 }
05ade5a5
DJ
636
637 /* New Nebula (marked (c)2005 on low profile pci card) has mt352 demod */
638 digitv_alps_tded4_reset(card);
2bfe031d 639 card->fe = dvb_attach(mt352_attach, &digitv_alps_tded4_config, card->i2c_adapter);
05ade5a5 640
74aa7a29 641 if (card->fe != NULL) {
dea74869 642 card->fe->ops.tuner_ops.calc_regs = digitv_alps_tded4_tuner_calc_regs;
fa132a64 643 dprintk("dvb_bt8xx: an mt352 was detected on your digitv card\n");
74aa7a29 644 }
1da177e4
LT
645 break;
646
6cffcc23 647 case BTTV_BOARD_AVDVBT_761:
2bfe031d 648 card->fe = dvb_attach(sp887x_attach, &microtune_mt7202dtf_config, card->i2c_adapter);
74aa7a29 649 if (card->fe) {
dea74869 650 card->fe->ops.tuner_ops.set_params = microtune_mt7202dtf_tuner_set_params;
74aa7a29 651 }
1da177e4
LT
652 break;
653
6cffcc23 654 case BTTV_BOARD_AVDVBT_771:
2bfe031d 655 card->fe = dvb_attach(mt352_attach, &advbt771_samsung_tdtc9251dh0_config, card->i2c_adapter);
1da177e4 656 if (card->fe != NULL) {
dea74869 657 card->fe->ops.tuner_ops.calc_regs = advbt771_samsung_tdtc9251dh0_tuner_calc_regs;
f1b1eabf
MCC
658 card->fe->ops.info.frequency_min_hz = 174 * MHz;
659 card->fe->ops.info.frequency_max_hz = 862 * MHz;
1da177e4
LT
660 }
661 break;
662
6cffcc23 663 case BTTV_BOARD_TWINHAN_DST:
50b215a0 664 /* DST is not a frontend driver !!! */
5cbded58 665 state = kmalloc(sizeof (struct dst_state), GFP_KERNEL);
626ae83b 666 if (!state) {
6c59eefd 667 pr_err("No memory\n");
626ae83b
AC
668 break;
669 }
50b215a0
JS
670 /* Setup the Card */
671 state->config = &dst_config;
672 state->i2c = card->i2c_adapter;
673 state->bt = card->bt;
bbdd11fa 674 state->dst_ca = NULL;
50b215a0 675 /* DST is not a frontend, attaching the ASIC */
2bfe031d 676 if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) {
6c59eefd 677 pr_err("%s: Could not find a Twinhan DST\n", __func__);
6792eb0c 678 kfree(state);
50b215a0
JS
679 break;
680 }
bbdd11fa
MA
681 /* Attach other DST peripherals if any */
682 /* Conditional Access device */
50b215a0 683 card->fe = &state->frontend;
bbdd11fa
MA
684 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
685 dvb_attach(dst_ca_attach, state, &card->dvb_adapter);
1da177e4
LT
686 break;
687
6cffcc23 688 case BTTV_BOARD_PINNACLESAT:
2bfe031d 689 card->fe = dvb_attach(cx24110_attach, &pctvsat_config, card->i2c_adapter);
74aa7a29 690 if (card->fe) {
dea74869
PB
691 card->fe->ops.tuner_ops.init = pinnsat_tuner_init;
692 card->fe->ops.tuner_ops.sleep = pinnsat_tuner_sleep;
693 card->fe->ops.tuner_ops.set_params = cx24108_tuner_set_params;
74aa7a29 694 }
1da177e4
LT
695 break;
696
6cffcc23 697 case BTTV_BOARD_PC_HDTV:
2bfe031d 698 card->fe = dvb_attach(or51211_attach, &or51211_config, card->i2c_adapter);
cd2cd0aa 699 if (card->fe != NULL)
967be9a9
MK
700 dvb_attach(simple_tuner_attach, card->fe,
701 card->i2c_adapter, 0x61,
702 TUNER_PHILIPS_FCV1236D);
1da177e4
LT
703 break;
704 }
705
1f15ddd0 706 if (card->fe == NULL)
6c59eefd 707 pr_err("A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
1da177e4
LT
708 card->bt->dev->vendor,
709 card->bt->dev->device,
710 card->bt->dev->subsystem_vendor,
711 card->bt->dev->subsystem_device);
1f15ddd0 712 else
fdc53a6d 713 if (dvb_register_frontend(&card->dvb_adapter, card->fe)) {
6c59eefd 714 pr_err("Frontend registration failed!\n");
f52a838b 715 dvb_frontend_detach(card->fe);
1da177e4
LT
716 card->fe = NULL;
717 }
1da177e4
LT
718}
719
4c62e976 720static int dvb_bt8xx_load_card(struct dvb_bt8xx_card *card, u32 type)
1da177e4
LT
721{
722 int result;
723
78e92006
JG
724 result = dvb_register_adapter(&card->dvb_adapter, card->card_name,
725 THIS_MODULE, &card->bt->dev->dev,
726 adapter_nr);
727 if (result < 0) {
6c59eefd 728 pr_err("dvb_register_adapter failed (errno = %d)\n", result);
1da177e4 729 return result;
1da177e4 730 }
fdc53a6d 731 card->dvb_adapter.priv = card;
1da177e4
LT
732
733 card->bt->adapter = card->i2c_adapter;
734
735 memset(&card->demux, 0, sizeof(struct dvb_demux));
736
737 card->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
738
739 card->demux.priv = card;
740 card->demux.filternum = 256;
741 card->demux.feednum = 256;
742 card->demux.start_feed = dvb_bt8xx_start_feed;
743 card->demux.stop_feed = dvb_bt8xx_stop_feed;
744 card->demux.write_to_decoder = NULL;
745
e4b8537c
JN
746 result = dvb_dmx_init(&card->demux);
747 if (result < 0) {
6c59eefd 748 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 749 goto err_unregister_adaptor;
1da177e4
LT
750 }
751
752 card->dmxdev.filternum = 256;
753 card->dmxdev.demux = &card->demux.dmx;
754 card->dmxdev.capabilities = 0;
755
e4b8537c
JN
756 result = dvb_dmxdev_init(&card->dmxdev, &card->dvb_adapter);
757 if (result < 0) {
6c59eefd 758 pr_err("dvb_dmxdev_init failed (errno = %d)\n", result);
e4b8537c 759 goto err_dmx_release;
1da177e4
LT
760 }
761
762 card->fe_hw.source = DMX_FRONTEND_0;
763
e4b8537c
JN
764 result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_hw);
765 if (result < 0) {
6c59eefd 766 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 767 goto err_dmxdev_release;
1da177e4
LT
768 }
769
770 card->fe_mem.source = DMX_MEMORY_FE;
771
e4b8537c
JN
772 result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_mem);
773 if (result < 0) {
6c59eefd 774 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 775 goto err_remove_hw_frontend;
1da177e4
LT
776 }
777
e4b8537c
JN
778 result = card->demux.dmx.connect_frontend(&card->demux.dmx, &card->fe_hw);
779 if (result < 0) {
6c59eefd 780 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 781 goto err_remove_mem_frontend;
1da177e4
LT
782 }
783
2dbbac33
JN
784 result = dvb_net_init(&card->dvb_adapter, &card->dvbnet, &card->demux.dmx);
785 if (result < 0) {
6c59eefd 786 pr_err("dvb_net_init failed (errno = %d)\n", result);
2dbbac33
JN
787 goto err_disconnect_frontend;
788 }
1da177e4
LT
789
790 tasklet_init(&card->bt->tasklet, dvb_bt8xx_task, (unsigned long) card);
791
792 frontend_init(card, type);
793
794 return 0;
e4b8537c 795
2dbbac33
JN
796err_disconnect_frontend:
797 card->demux.dmx.disconnect_frontend(&card->demux.dmx);
e4b8537c
JN
798err_remove_mem_frontend:
799 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
800err_remove_hw_frontend:
801 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
802err_dmxdev_release:
803 dvb_dmxdev_release(&card->dmxdev);
804err_dmx_release:
805 dvb_dmx_release(&card->demux);
806err_unregister_adaptor:
807 dvb_unregister_adapter(&card->dvb_adapter);
808 return result;
1da177e4
LT
809}
810
4c62e976 811static int dvb_bt8xx_probe(struct bttv_sub_device *sub)
1da177e4 812{
1da177e4
LT
813 struct dvb_bt8xx_card *card;
814 struct pci_dev* bttv_pci_dev;
815 int ret;
816
7408187d 817 if (!(card = kzalloc(sizeof(struct dvb_bt8xx_card), GFP_KERNEL)))
1da177e4
LT
818 return -ENOMEM;
819
3593cab5 820 mutex_init(&card->lock);
1da177e4 821 card->bttv_nr = sub->core->nr;
c0decac1
MCC
822 strscpy(card->card_name, sub->core->v4l2_dev.name,
823 sizeof(card->card_name));
1da177e4
LT
824 card->i2c_adapter = &sub->core->i2c_adap;
825
1f15ddd0 826 switch(sub->core->type) {
6cffcc23 827 case BTTV_BOARD_PINNACLESAT:
1da177e4
LT
828 card->gpio_mode = 0x0400c060;
829 /* should be: BT878_A_GAIN=0,BT878_A_PWRDN,BT878_DA_DPM,BT878_DA_SBR,
50b215a0 830 BT878_DA_IOM=1,BT878_DA_APP to enable serial highspeed mode. */
df5a4f4f
MA
831 card->op_sync_orin = BT878_RISC_SYNC_MASK;
832 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
833 break;
834
6cffcc23 835 case BTTV_BOARD_DVICO_DVBT_LITE:
1da177e4 836 card->gpio_mode = 0x0400C060;
df5a4f4f
MA
837 card->op_sync_orin = BT878_RISC_SYNC_MASK;
838 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
839 /* 26, 15, 14, 6, 5
840 * A_PWRDN DA_DPM DA_SBR DA_IOM_DA
841 * DA_APP(parallel) */
842 break;
843
6cffcc23 844 case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE:
3cff00d9
MK
845 card->gpio_mode = 0x0400c060;
846 card->op_sync_orin = BT878_RISC_SYNC_MASK;
847 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
848 break;
849
6cffcc23 850 case BTTV_BOARD_NEBULA_DIGITV:
6cffcc23 851 case BTTV_BOARD_AVDVBT_761:
1da177e4 852 card->gpio_mode = (1 << 26) | (1 << 14) | (1 << 5);
df5a4f4f
MA
853 card->op_sync_orin = BT878_RISC_SYNC_MASK;
854 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
855 /* A_PWRDN DA_SBR DA_APP (high speed serial) */
856 break;
857
6cffcc23 858 case BTTV_BOARD_AVDVBT_771: //case 0x07711461:
1da177e4
LT
859 card->gpio_mode = 0x0400402B;
860 card->op_sync_orin = BT878_RISC_SYNC_MASK;
df5a4f4f 861 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
862 /* A_PWRDN DA_SBR DA_APP[0] PKTP=10 RISC_ENABLE FIFO_ENABLE*/
863 break;
864
6cffcc23 865 case BTTV_BOARD_TWINHAN_DST:
1da177e4
LT
866 card->gpio_mode = 0x2204f2c;
867 card->op_sync_orin = BT878_RISC_SYNC_MASK;
868 card->irq_err_ignore = BT878_APABORT | BT878_ARIPERR |
869 BT878_APPERR | BT878_AFBUS;
870 /* 25,21,14,11,10,9,8,3,2 then
871 * 0x33 = 5,4,1,0
872 * A_SEL=SML, DA_MLB, DA_SBR,
873 * DA_SDR=f, fifo trigger = 32 DWORDS
874 * IOM = 0 == audio A/D
875 * DPM = 0 == digital audio mode
876 * == async data parallel port
877 * then 0x33 (13 is set by start_capture)
878 * DA_APP = async data parallel port,
879 * ACAP_EN = 1,
880 * RISC+FIFO ENABLE */
881 break;
882
6cffcc23 883 case BTTV_BOARD_PC_HDTV:
1da177e4 884 card->gpio_mode = 0x0100EC7B;
df5a4f4f
MA
885 card->op_sync_orin = BT878_RISC_SYNC_MASK;
886 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
887 break;
888
05ade5a5 889 default:
6c59eefd 890 pr_err("Unknown bttv card type: %d\n", sub->core->type);
1da177e4
LT
891 kfree(card);
892 return -ENODEV;
893 }
894
895 dprintk("dvb_bt8xx: identified card%d as %s\n", card->bttv_nr, card->card_name);
896
897 if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) {
6c59eefd 898 pr_err("no pci device for card %d\n", card->bttv_nr);
1da177e4 899 kfree(card);
16d6c0b0 900 return -ENODEV;
1da177e4
LT
901 }
902
903 if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) {
6c59eefd
JN
904 pr_err("unable to determine DMA core of card %d,\n", card->bttv_nr);
905 pr_err("if you have the ALSA bt87x audio driver installed, try removing it.\n");
1da177e4
LT
906
907 kfree(card);
16d6c0b0 908 return -ENODEV;
1da177e4
LT
909 }
910
3593cab5 911 mutex_init(&card->bt->gpio_lock);
1da177e4
LT
912 card->bt->bttv_nr = sub->core->nr;
913
914 if ( (ret = dvb_bt8xx_load_card(card, sub->core->type)) ) {
915 kfree(card);
916 return ret;
917 }
918
348290a4 919 dev_set_drvdata(&sub->dev, card);
1da177e4
LT
920 return 0;
921}
922
a462e9ff 923static void dvb_bt8xx_remove(struct bttv_sub_device *sub)
1da177e4 924{
348290a4 925 struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev);
1da177e4
LT
926
927 dprintk("dvb_bt8xx: unloading card%d\n", card->bttv_nr);
928
929 bt878_stop(card->bt);
930 tasklet_kill(&card->bt->tasklet);
931 dvb_net_release(&card->dvbnet);
932 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
933 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
934 dvb_dmxdev_release(&card->dmxdev);
935 dvb_dmx_release(&card->demux);
2bfe031d 936 if (card->fe) {
1f15ddd0 937 dvb_unregister_frontend(card->fe);
f52a838b 938 dvb_frontend_detach(card->fe);
2bfe031d 939 }
fdc53a6d 940 dvb_unregister_adapter(&card->dvb_adapter);
1da177e4
LT
941
942 kfree(card);
1da177e4
LT
943}
944
945static struct bttv_sub_driver driver = {
946 .drv = {
947 .name = "dvb-bt8xx",
1da177e4 948 },
348290a4
RK
949 .probe = dvb_bt8xx_probe,
950 .remove = dvb_bt8xx_remove,
951 /* FIXME:
952 * .shutdown = dvb_bt8xx_shutdown,
953 * .suspend = dvb_bt8xx_suspend,
954 * .resume = dvb_bt8xx_resume,
955 */
1da177e4
LT
956};
957
958static int __init dvb_bt8xx_init(void)
959{
960 return bttv_sub_register(&driver, "dvb");
961}
962
963static void __exit dvb_bt8xx_exit(void)
964{
965 bttv_sub_unregister(&driver);
966}
967
968module_init(dvb_bt8xx_init);
969module_exit(dvb_bt8xx_exit);
970
971MODULE_DESCRIPTION("Bt8xx based DVB adapter driver");
972MODULE_AUTHOR("Florian Schirmer <jolt@tuxbox.org>");
973MODULE_LICENSE("GPL");