Commit | Line | Data |
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5cebaac6 MR |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * video-i2c.c - Support for I2C transport video devices | |
4 | * | |
5 | * Copyright (C) 2018 Matt Ranostay <matt.ranostay@konsulko.com> | |
6 | * | |
7 | * Supported: | |
8 | * - Panasonic AMG88xx Grid-Eye Sensors | |
8866cfbf | 9 | * - Melexis MLX90640 Thermal Cameras |
5cebaac6 MR |
10 | */ |
11 | ||
786dc07b | 12 | #include <linux/bits.h> |
5cebaac6 MR |
13 | #include <linux/delay.h> |
14 | #include <linux/freezer.h> | |
acbea679 | 15 | #include <linux/hwmon.h> |
5cebaac6 MR |
16 | #include <linux/kthread.h> |
17 | #include <linux/i2c.h> | |
18 | #include <linux/list.h> | |
7c7e33b7 | 19 | #include <linux/mod_devicetable.h> |
5cebaac6 MR |
20 | #include <linux/module.h> |
21 | #include <linux/mutex.h> | |
69d2a734 | 22 | #include <linux/pm_runtime.h> |
8866cfbf | 23 | #include <linux/nvmem-provider.h> |
ae9e196d | 24 | #include <linux/regmap.h> |
5cebaac6 MR |
25 | #include <linux/sched.h> |
26 | #include <linux/slab.h> | |
27 | #include <linux/videodev2.h> | |
28 | #include <media/v4l2-common.h> | |
29 | #include <media/v4l2-device.h> | |
30 | #include <media/v4l2-event.h> | |
31 | #include <media/v4l2-fh.h> | |
32 | #include <media/v4l2-ioctl.h> | |
33 | #include <media/videobuf2-v4l2.h> | |
34 | #include <media/videobuf2-vmalloc.h> | |
35 | ||
36 | #define VIDEO_I2C_DRIVER "video-i2c" | |
37 | ||
35fd92b2 MCB |
38 | /* Power control register */ |
39 | #define AMG88XX_REG_PCTL 0x00 | |
40 | #define AMG88XX_PCTL_NORMAL 0x00 | |
41 | #define AMG88XX_PCTL_SLEEP 0x10 | |
42 | ||
43 | /* Reset register */ | |
44 | #define AMG88XX_REG_RST 0x01 | |
45 | #define AMG88XX_RST_FLAG 0x30 | |
46 | #define AMG88XX_RST_INIT 0x3f | |
47 | ||
48 | /* Frame rate register */ | |
49 | #define AMG88XX_REG_FPSC 0x02 | |
50 | #define AMG88XX_FPSC_1FPS BIT(0) | |
51 | ||
52 | /* Thermistor register */ | |
53 | #define AMG88XX_REG_TTHL 0x0e | |
54 | ||
55 | /* Temperature register */ | |
56 | #define AMG88XX_REG_T01L 0x80 | |
57 | ||
f0de79f6 MCB |
58 | /* RAM */ |
59 | #define MLX90640_RAM_START_ADDR 0x0400 | |
60 | ||
61 | /* EEPROM */ | |
62 | #define MLX90640_EEPROM_START_ADDR 0x2400 | |
63 | ||
35fd92b2 MCB |
64 | /* Control register */ |
65 | #define MLX90640_REG_CTL1 0x800d | |
786dc07b | 66 | #define MLX90640_REG_CTL1_MASK GENMASK(9, 7) |
35fd92b2 MCB |
67 | #define MLX90640_REG_CTL1_MASK_SHIFT 7 |
68 | ||
5cebaac6 MR |
69 | struct video_i2c_chip; |
70 | ||
71 | struct video_i2c_buffer { | |
72 | struct vb2_v4l2_buffer vb; | |
73 | struct list_head list; | |
74 | }; | |
75 | ||
76 | struct video_i2c_data { | |
ae9e196d | 77 | struct regmap *regmap; |
5cebaac6 MR |
78 | const struct video_i2c_chip *chip; |
79 | struct mutex lock; | |
80 | spinlock_t slock; | |
81 | unsigned int sequence; | |
82 | struct mutex queue_lock; | |
83 | ||
84 | struct v4l2_device v4l2_dev; | |
85 | struct video_device vdev; | |
86 | struct vb2_queue vb_vidq; | |
87 | ||
88 | struct task_struct *kthread_vid_cap; | |
89 | struct list_head vid_cap_active; | |
56281021 AM |
90 | |
91 | struct v4l2_fract frame_interval; | |
5cebaac6 MR |
92 | }; |
93 | ||
1b3d5f2a | 94 | static const struct v4l2_fmtdesc amg88xx_format = { |
5cebaac6 MR |
95 | .pixelformat = V4L2_PIX_FMT_Y12, |
96 | }; | |
97 | ||
1b3d5f2a | 98 | static const struct v4l2_frmsize_discrete amg88xx_size = { |
5cebaac6 MR |
99 | .width = 8, |
100 | .height = 8, | |
101 | }; | |
102 | ||
8866cfbf MR |
103 | static const struct v4l2_fmtdesc mlx90640_format = { |
104 | .pixelformat = V4L2_PIX_FMT_Y16_BE, | |
105 | }; | |
106 | ||
107 | static const struct v4l2_frmsize_discrete mlx90640_size = { | |
108 | .width = 32, | |
109 | .height = 26, /* 24 lines of pixel data + 2 lines of processing data */ | |
110 | }; | |
111 | ||
ae9e196d AM |
112 | static const struct regmap_config amg88xx_regmap_config = { |
113 | .reg_bits = 8, | |
114 | .val_bits = 8, | |
115 | .max_register = 0xff | |
116 | }; | |
117 | ||
8866cfbf MR |
118 | static const struct regmap_config mlx90640_regmap_config = { |
119 | .reg_bits = 16, | |
120 | .val_bits = 16, | |
121 | }; | |
122 | ||
5cebaac6 MR |
123 | struct video_i2c_chip { |
124 | /* video dimensions */ | |
125 | const struct v4l2_fmtdesc *format; | |
126 | const struct v4l2_frmsize_discrete *size; | |
127 | ||
56281021 AM |
128 | /* available frame intervals */ |
129 | const struct v4l2_fract *frame_intervals; | |
130 | unsigned int num_frame_intervals; | |
5cebaac6 MR |
131 | |
132 | /* pixel buffer size */ | |
133 | unsigned int buffer_size; | |
134 | ||
135 | /* pixel size in bits */ | |
136 | unsigned int bpp; | |
137 | ||
ae9e196d | 138 | const struct regmap_config *regmap_config; |
8866cfbf | 139 | struct nvmem_config *nvmem_config; |
ae9e196d | 140 | |
56281021 AM |
141 | /* setup function */ |
142 | int (*setup)(struct video_i2c_data *data); | |
143 | ||
5cebaac6 MR |
144 | /* xfer function */ |
145 | int (*xfer)(struct video_i2c_data *data, char *buf); | |
acbea679 | 146 | |
69d2a734 AM |
147 | /* power control function */ |
148 | int (*set_power)(struct video_i2c_data *data, bool on); | |
149 | ||
acbea679 MR |
150 | /* hwmon init function */ |
151 | int (*hwmon_init)(struct video_i2c_data *data); | |
5cebaac6 MR |
152 | }; |
153 | ||
8866cfbf MR |
154 | static int mlx90640_nvram_read(void *priv, unsigned int offset, void *val, |
155 | size_t bytes) | |
156 | { | |
157 | struct video_i2c_data *data = priv; | |
158 | ||
f0de79f6 | 159 | return regmap_bulk_read(data->regmap, MLX90640_EEPROM_START_ADDR + offset, val, bytes); |
8866cfbf MR |
160 | } |
161 | ||
162 | static struct nvmem_config mlx90640_nvram_config = { | |
163 | .name = "mlx90640_nvram", | |
164 | .word_size = 2, | |
165 | .stride = 1, | |
166 | .size = 1664, | |
167 | .reg_read = mlx90640_nvram_read, | |
168 | }; | |
169 | ||
ae9e196d AM |
170 | static int amg88xx_xfer(struct video_i2c_data *data, char *buf) |
171 | { | |
172 | return regmap_bulk_read(data->regmap, AMG88XX_REG_T01L, buf, | |
173 | data->chip->buffer_size); | |
5cebaac6 MR |
174 | } |
175 | ||
8866cfbf MR |
176 | static int mlx90640_xfer(struct video_i2c_data *data, char *buf) |
177 | { | |
f0de79f6 | 178 | return regmap_bulk_read(data->regmap, MLX90640_RAM_START_ADDR, buf, |
8866cfbf MR |
179 | data->chip->buffer_size); |
180 | } | |
181 | ||
56281021 AM |
182 | static int amg88xx_setup(struct video_i2c_data *data) |
183 | { | |
184 | unsigned int mask = AMG88XX_FPSC_1FPS; | |
185 | unsigned int val; | |
186 | ||
187 | if (data->frame_interval.numerator == data->frame_interval.denominator) | |
188 | val = mask; | |
189 | else | |
190 | val = 0; | |
191 | ||
192 | return regmap_update_bits(data->regmap, AMG88XX_REG_FPSC, mask, val); | |
193 | } | |
194 | ||
8866cfbf MR |
195 | static int mlx90640_setup(struct video_i2c_data *data) |
196 | { | |
197 | unsigned int n, idx; | |
198 | ||
199 | for (n = 0; n < data->chip->num_frame_intervals - 1; n++) { | |
94954bb7 AM |
200 | if (V4L2_FRACT_COMPARE(data->frame_interval, ==, |
201 | data->chip->frame_intervals[n])) | |
8866cfbf MR |
202 | break; |
203 | } | |
204 | ||
205 | idx = data->chip->num_frame_intervals - n - 1; | |
206 | ||
207 | return regmap_update_bits(data->regmap, MLX90640_REG_CTL1, | |
208 | MLX90640_REG_CTL1_MASK, | |
209 | idx << MLX90640_REG_CTL1_MASK_SHIFT); | |
210 | } | |
211 | ||
69d2a734 AM |
212 | static int amg88xx_set_power_on(struct video_i2c_data *data) |
213 | { | |
214 | int ret; | |
215 | ||
216 | ret = regmap_write(data->regmap, AMG88XX_REG_PCTL, AMG88XX_PCTL_NORMAL); | |
217 | if (ret) | |
218 | return ret; | |
219 | ||
220 | msleep(50); | |
221 | ||
222 | ret = regmap_write(data->regmap, AMG88XX_REG_RST, AMG88XX_RST_INIT); | |
223 | if (ret) | |
224 | return ret; | |
225 | ||
226 | usleep_range(2000, 3000); | |
227 | ||
228 | ret = regmap_write(data->regmap, AMG88XX_REG_RST, AMG88XX_RST_FLAG); | |
229 | if (ret) | |
230 | return ret; | |
231 | ||
232 | /* | |
233 | * Wait two frames before reading thermistor and temperature registers | |
234 | */ | |
235 | msleep(200); | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | static int amg88xx_set_power_off(struct video_i2c_data *data) | |
241 | { | |
242 | int ret; | |
243 | ||
244 | ret = regmap_write(data->regmap, AMG88XX_REG_PCTL, AMG88XX_PCTL_SLEEP); | |
245 | if (ret) | |
246 | return ret; | |
247 | /* | |
248 | * Wait for a while to avoid resuming normal mode immediately after | |
249 | * entering sleep mode, otherwise the device occasionally goes wrong | |
250 | * (thermistor and temperature registers are not updated at all) | |
251 | */ | |
252 | msleep(100); | |
253 | ||
254 | return 0; | |
255 | } | |
256 | ||
257 | static int amg88xx_set_power(struct video_i2c_data *data, bool on) | |
258 | { | |
259 | if (on) | |
260 | return amg88xx_set_power_on(data); | |
261 | ||
262 | return amg88xx_set_power_off(data); | |
263 | } | |
264 | ||
64d4fc99 | 265 | #if IS_REACHABLE(CONFIG_HWMON) |
acbea679 MR |
266 | |
267 | static const u32 amg88xx_temp_config[] = { | |
268 | HWMON_T_INPUT, | |
269 | 0 | |
270 | }; | |
271 | ||
272 | static const struct hwmon_channel_info amg88xx_temp = { | |
273 | .type = hwmon_temp, | |
274 | .config = amg88xx_temp_config, | |
275 | }; | |
276 | ||
cd78824d | 277 | static const struct hwmon_channel_info * const amg88xx_info[] = { |
acbea679 MR |
278 | &amg88xx_temp, |
279 | NULL | |
280 | }; | |
281 | ||
282 | static umode_t amg88xx_is_visible(const void *drvdata, | |
283 | enum hwmon_sensor_types type, | |
284 | u32 attr, int channel) | |
285 | { | |
286 | return 0444; | |
287 | } | |
288 | ||
289 | static int amg88xx_read(struct device *dev, enum hwmon_sensor_types type, | |
290 | u32 attr, int channel, long *val) | |
291 | { | |
292 | struct video_i2c_data *data = dev_get_drvdata(dev); | |
ae9e196d AM |
293 | __le16 buf; |
294 | int tmp; | |
acbea679 | 295 | |
a959a7bf MCC |
296 | tmp = pm_runtime_resume_and_get(regmap_get_device(data->regmap)); |
297 | if (tmp < 0) | |
69d2a734 | 298 | return tmp; |
69d2a734 | 299 | |
ae9e196d | 300 | tmp = regmap_bulk_read(data->regmap, AMG88XX_REG_TTHL, &buf, 2); |
69d2a734 AM |
301 | pm_runtime_mark_last_busy(regmap_get_device(data->regmap)); |
302 | pm_runtime_put_autosuspend(regmap_get_device(data->regmap)); | |
ae9e196d | 303 | if (tmp) |
acbea679 MR |
304 | return tmp; |
305 | ||
ae9e196d AM |
306 | tmp = le16_to_cpu(buf); |
307 | ||
acbea679 MR |
308 | /* |
309 | * Check for sign bit, this isn't a two's complement value but an | |
310 | * absolute temperature that needs to be inverted in the case of being | |
311 | * negative. | |
312 | */ | |
313 | if (tmp & BIT(11)) | |
314 | tmp = -(tmp & 0x7ff); | |
315 | ||
316 | *val = (tmp * 625) / 10; | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
321 | static const struct hwmon_ops amg88xx_hwmon_ops = { | |
322 | .is_visible = amg88xx_is_visible, | |
323 | .read = amg88xx_read, | |
324 | }; | |
325 | ||
326 | static const struct hwmon_chip_info amg88xx_chip_info = { | |
327 | .ops = &amg88xx_hwmon_ops, | |
328 | .info = amg88xx_info, | |
329 | }; | |
330 | ||
331 | static int amg88xx_hwmon_init(struct video_i2c_data *data) | |
332 | { | |
ae9e196d AM |
333 | struct device *dev = regmap_get_device(data->regmap); |
334 | void *hwmon = devm_hwmon_device_register_with_info(dev, "amg88xx", data, | |
335 | &amg88xx_chip_info, NULL); | |
acbea679 | 336 | |
17f330ce | 337 | return PTR_ERR_OR_ZERO(hwmon); |
acbea679 MR |
338 | } |
339 | #else | |
340 | #define amg88xx_hwmon_init NULL | |
341 | #endif | |
342 | ||
8866cfbf MR |
343 | enum { |
344 | AMG88XX, | |
345 | MLX90640, | |
346 | }; | |
5cebaac6 | 347 | |
56281021 AM |
348 | static const struct v4l2_fract amg88xx_frame_intervals[] = { |
349 | { 1, 10 }, | |
350 | { 1, 1 }, | |
351 | }; | |
352 | ||
8866cfbf MR |
353 | static const struct v4l2_fract mlx90640_frame_intervals[] = { |
354 | { 1, 64 }, | |
355 | { 1, 32 }, | |
356 | { 1, 16 }, | |
357 | { 1, 8 }, | |
358 | { 1, 4 }, | |
359 | { 1, 2 }, | |
360 | { 1, 1 }, | |
361 | { 2, 1 }, | |
362 | }; | |
363 | ||
5cebaac6 MR |
364 | static const struct video_i2c_chip video_i2c_chip[] = { |
365 | [AMG88XX] = { | |
366 | .size = &amg88xx_size, | |
367 | .format = &amg88xx_format, | |
56281021 AM |
368 | .frame_intervals = amg88xx_frame_intervals, |
369 | .num_frame_intervals = ARRAY_SIZE(amg88xx_frame_intervals), | |
5cebaac6 MR |
370 | .buffer_size = 128, |
371 | .bpp = 16, | |
ae9e196d | 372 | .regmap_config = &amg88xx_regmap_config, |
56281021 | 373 | .setup = &amg88xx_setup, |
5cebaac6 | 374 | .xfer = &amg88xx_xfer, |
69d2a734 | 375 | .set_power = amg88xx_set_power, |
acbea679 | 376 | .hwmon_init = amg88xx_hwmon_init, |
5cebaac6 | 377 | }, |
8866cfbf MR |
378 | [MLX90640] = { |
379 | .size = &mlx90640_size, | |
380 | .format = &mlx90640_format, | |
381 | .frame_intervals = mlx90640_frame_intervals, | |
382 | .num_frame_intervals = ARRAY_SIZE(mlx90640_frame_intervals), | |
383 | .buffer_size = 1664, | |
384 | .bpp = 16, | |
385 | .regmap_config = &mlx90640_regmap_config, | |
386 | .nvmem_config = &mlx90640_nvram_config, | |
387 | .setup = mlx90640_setup, | |
388 | .xfer = mlx90640_xfer, | |
389 | }, | |
5cebaac6 MR |
390 | }; |
391 | ||
392 | static const struct v4l2_file_operations video_i2c_fops = { | |
393 | .owner = THIS_MODULE, | |
394 | .open = v4l2_fh_open, | |
395 | .release = vb2_fop_release, | |
396 | .poll = vb2_fop_poll, | |
397 | .read = vb2_fop_read, | |
398 | .mmap = vb2_fop_mmap, | |
399 | .unlocked_ioctl = video_ioctl2, | |
400 | }; | |
401 | ||
402 | static int queue_setup(struct vb2_queue *vq, | |
403 | unsigned int *nbuffers, unsigned int *nplanes, | |
404 | unsigned int sizes[], struct device *alloc_devs[]) | |
405 | { | |
406 | struct video_i2c_data *data = vb2_get_drv_priv(vq); | |
407 | unsigned int size = data->chip->buffer_size; | |
da53f4e6 | 408 | unsigned int q_num_bufs = vb2_get_num_buffers(vq); |
5cebaac6 | 409 | |
da53f4e6 BG |
410 | if (q_num_bufs + *nbuffers < 2) |
411 | *nbuffers = 2 - q_num_bufs; | |
5cebaac6 MR |
412 | |
413 | if (*nplanes) | |
414 | return sizes[0] < size ? -EINVAL : 0; | |
415 | ||
416 | *nplanes = 1; | |
417 | sizes[0] = size; | |
418 | ||
419 | return 0; | |
420 | } | |
421 | ||
422 | static int buffer_prepare(struct vb2_buffer *vb) | |
423 | { | |
424 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | |
425 | struct video_i2c_data *data = vb2_get_drv_priv(vb->vb2_queue); | |
426 | unsigned int size = data->chip->buffer_size; | |
427 | ||
428 | if (vb2_plane_size(vb, 0) < size) | |
429 | return -EINVAL; | |
430 | ||
431 | vbuf->field = V4L2_FIELD_NONE; | |
432 | vb2_set_plane_payload(vb, 0, size); | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | static void buffer_queue(struct vb2_buffer *vb) | |
438 | { | |
439 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); | |
440 | struct video_i2c_data *data = vb2_get_drv_priv(vb->vb2_queue); | |
441 | struct video_i2c_buffer *buf = | |
442 | container_of(vbuf, struct video_i2c_buffer, vb); | |
443 | ||
444 | spin_lock(&data->slock); | |
445 | list_add_tail(&buf->list, &data->vid_cap_active); | |
446 | spin_unlock(&data->slock); | |
447 | } | |
448 | ||
449 | static int video_i2c_thread_vid_cap(void *priv) | |
450 | { | |
451 | struct video_i2c_data *data = priv; | |
439b87fc SP |
452 | u32 delay = mult_frac(1000000UL, data->frame_interval.numerator, |
453 | data->frame_interval.denominator); | |
454 | s64 end_us = ktime_to_us(ktime_get()); | |
5cebaac6 MR |
455 | |
456 | set_freezable(); | |
457 | ||
458 | do { | |
5cebaac6 | 459 | struct video_i2c_buffer *vid_cap_buf = NULL; |
439b87fc | 460 | s64 current_us; |
5cebaac6 MR |
461 | int schedule_delay; |
462 | ||
463 | try_to_freeze(); | |
464 | ||
465 | spin_lock(&data->slock); | |
466 | ||
467 | if (!list_empty(&data->vid_cap_active)) { | |
468 | vid_cap_buf = list_last_entry(&data->vid_cap_active, | |
469 | struct video_i2c_buffer, list); | |
470 | list_del(&vid_cap_buf->list); | |
471 | } | |
472 | ||
473 | spin_unlock(&data->slock); | |
474 | ||
475 | if (vid_cap_buf) { | |
476 | struct vb2_buffer *vb2_buf = &vid_cap_buf->vb.vb2_buf; | |
477 | void *vbuf = vb2_plane_vaddr(vb2_buf, 0); | |
478 | int ret; | |
479 | ||
480 | ret = data->chip->xfer(data, vbuf); | |
481 | vb2_buf->timestamp = ktime_get_ns(); | |
482 | vid_cap_buf->vb.sequence = data->sequence++; | |
483 | vb2_buffer_done(vb2_buf, ret ? | |
484 | VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); | |
485 | } | |
486 | ||
439b87fc SP |
487 | end_us += delay; |
488 | current_us = ktime_to_us(ktime_get()); | |
489 | if (current_us < end_us) { | |
490 | schedule_delay = end_us - current_us; | |
491 | usleep_range(schedule_delay * 3 / 4, schedule_delay); | |
492 | } else { | |
493 | end_us = current_us; | |
494 | } | |
5cebaac6 MR |
495 | } while (!kthread_should_stop()); |
496 | ||
497 | return 0; | |
498 | } | |
499 | ||
500 | static void video_i2c_del_list(struct vb2_queue *vq, enum vb2_buffer_state state) | |
501 | { | |
502 | struct video_i2c_data *data = vb2_get_drv_priv(vq); | |
503 | struct video_i2c_buffer *buf, *tmp; | |
504 | ||
505 | spin_lock(&data->slock); | |
506 | ||
507 | list_for_each_entry_safe(buf, tmp, &data->vid_cap_active, list) { | |
508 | list_del(&buf->list); | |
509 | vb2_buffer_done(&buf->vb.vb2_buf, state); | |
510 | } | |
511 | ||
512 | spin_unlock(&data->slock); | |
513 | } | |
514 | ||
515 | static int start_streaming(struct vb2_queue *vq, unsigned int count) | |
516 | { | |
517 | struct video_i2c_data *data = vb2_get_drv_priv(vq); | |
69d2a734 | 518 | struct device *dev = regmap_get_device(data->regmap); |
56281021 | 519 | int ret; |
5cebaac6 MR |
520 | |
521 | if (data->kthread_vid_cap) | |
522 | return 0; | |
523 | ||
a959a7bf MCC |
524 | ret = pm_runtime_resume_and_get(dev); |
525 | if (ret < 0) | |
69d2a734 | 526 | goto error_del_list; |
69d2a734 | 527 | |
56281021 AM |
528 | ret = data->chip->setup(data); |
529 | if (ret) | |
69d2a734 | 530 | goto error_rpm_put; |
56281021 | 531 | |
5cebaac6 MR |
532 | data->sequence = 0; |
533 | data->kthread_vid_cap = kthread_run(video_i2c_thread_vid_cap, data, | |
534 | "%s-vid-cap", data->v4l2_dev.name); | |
56281021 AM |
535 | ret = PTR_ERR_OR_ZERO(data->kthread_vid_cap); |
536 | if (!ret) | |
5cebaac6 MR |
537 | return 0; |
538 | ||
69d2a734 AM |
539 | error_rpm_put: |
540 | pm_runtime_mark_last_busy(dev); | |
541 | pm_runtime_put_autosuspend(dev); | |
56281021 | 542 | error_del_list: |
5cebaac6 MR |
543 | video_i2c_del_list(vq, VB2_BUF_STATE_QUEUED); |
544 | ||
56281021 | 545 | return ret; |
5cebaac6 MR |
546 | } |
547 | ||
548 | static void stop_streaming(struct vb2_queue *vq) | |
549 | { | |
550 | struct video_i2c_data *data = vb2_get_drv_priv(vq); | |
551 | ||
552 | if (data->kthread_vid_cap == NULL) | |
553 | return; | |
554 | ||
555 | kthread_stop(data->kthread_vid_cap); | |
556 | data->kthread_vid_cap = NULL; | |
69d2a734 AM |
557 | pm_runtime_mark_last_busy(regmap_get_device(data->regmap)); |
558 | pm_runtime_put_autosuspend(regmap_get_device(data->regmap)); | |
5cebaac6 MR |
559 | |
560 | video_i2c_del_list(vq, VB2_BUF_STATE_ERROR); | |
561 | } | |
562 | ||
c7f7da2a | 563 | static const struct vb2_ops video_i2c_video_qops = { |
5cebaac6 MR |
564 | .queue_setup = queue_setup, |
565 | .buf_prepare = buffer_prepare, | |
566 | .buf_queue = buffer_queue, | |
567 | .start_streaming = start_streaming, | |
568 | .stop_streaming = stop_streaming, | |
569 | .wait_prepare = vb2_ops_wait_prepare, | |
570 | .wait_finish = vb2_ops_wait_finish, | |
571 | }; | |
572 | ||
573 | static int video_i2c_querycap(struct file *file, void *priv, | |
574 | struct v4l2_capability *vcap) | |
575 | { | |
576 | struct video_i2c_data *data = video_drvdata(file); | |
ae9e196d AM |
577 | struct device *dev = regmap_get_device(data->regmap); |
578 | struct i2c_client *client = to_i2c_client(dev); | |
5cebaac6 | 579 | |
c0decac1 MCC |
580 | strscpy(vcap->driver, data->v4l2_dev.name, sizeof(vcap->driver)); |
581 | strscpy(vcap->card, data->vdev.name, sizeof(vcap->card)); | |
5cebaac6 MR |
582 | |
583 | sprintf(vcap->bus_info, "I2C:%d-%d", client->adapter->nr, client->addr); | |
584 | ||
585 | return 0; | |
586 | } | |
587 | ||
588 | static int video_i2c_g_input(struct file *file, void *fh, unsigned int *inp) | |
589 | { | |
590 | *inp = 0; | |
591 | ||
592 | return 0; | |
593 | } | |
594 | ||
595 | static int video_i2c_s_input(struct file *file, void *fh, unsigned int inp) | |
596 | { | |
597 | return (inp > 0) ? -EINVAL : 0; | |
598 | } | |
599 | ||
600 | static int video_i2c_enum_input(struct file *file, void *fh, | |
601 | struct v4l2_input *vin) | |
602 | { | |
603 | if (vin->index > 0) | |
604 | return -EINVAL; | |
605 | ||
c0decac1 | 606 | strscpy(vin->name, "Camera", sizeof(vin->name)); |
5cebaac6 MR |
607 | |
608 | vin->type = V4L2_INPUT_TYPE_CAMERA; | |
609 | ||
610 | return 0; | |
611 | } | |
612 | ||
613 | static int video_i2c_enum_fmt_vid_cap(struct file *file, void *fh, | |
614 | struct v4l2_fmtdesc *fmt) | |
615 | { | |
616 | struct video_i2c_data *data = video_drvdata(file); | |
617 | enum v4l2_buf_type type = fmt->type; | |
618 | ||
619 | if (fmt->index > 0) | |
620 | return -EINVAL; | |
621 | ||
622 | *fmt = *data->chip->format; | |
623 | fmt->type = type; | |
624 | ||
625 | return 0; | |
626 | } | |
627 | ||
628 | static int video_i2c_enum_framesizes(struct file *file, void *fh, | |
629 | struct v4l2_frmsizeenum *fsize) | |
630 | { | |
631 | const struct video_i2c_data *data = video_drvdata(file); | |
632 | const struct v4l2_frmsize_discrete *size = data->chip->size; | |
633 | ||
634 | /* currently only one frame size is allowed */ | |
635 | if (fsize->index > 0) | |
636 | return -EINVAL; | |
637 | ||
638 | if (fsize->pixel_format != data->chip->format->pixelformat) | |
639 | return -EINVAL; | |
640 | ||
641 | fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; | |
642 | fsize->discrete.width = size->width; | |
643 | fsize->discrete.height = size->height; | |
644 | ||
645 | return 0; | |
646 | } | |
647 | ||
648 | static int video_i2c_enum_frameintervals(struct file *file, void *priv, | |
649 | struct v4l2_frmivalenum *fe) | |
650 | { | |
651 | const struct video_i2c_data *data = video_drvdata(file); | |
652 | const struct v4l2_frmsize_discrete *size = data->chip->size; | |
653 | ||
56281021 | 654 | if (fe->index >= data->chip->num_frame_intervals) |
5cebaac6 MR |
655 | return -EINVAL; |
656 | ||
657 | if (fe->width != size->width || fe->height != size->height) | |
658 | return -EINVAL; | |
659 | ||
660 | fe->type = V4L2_FRMIVAL_TYPE_DISCRETE; | |
56281021 | 661 | fe->discrete = data->chip->frame_intervals[fe->index]; |
5cebaac6 MR |
662 | |
663 | return 0; | |
664 | } | |
665 | ||
666 | static int video_i2c_try_fmt_vid_cap(struct file *file, void *fh, | |
667 | struct v4l2_format *fmt) | |
668 | { | |
669 | const struct video_i2c_data *data = video_drvdata(file); | |
670 | const struct v4l2_frmsize_discrete *size = data->chip->size; | |
671 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | |
672 | unsigned int bpp = data->chip->bpp / 8; | |
673 | ||
674 | pix->width = size->width; | |
675 | pix->height = size->height; | |
676 | pix->pixelformat = data->chip->format->pixelformat; | |
677 | pix->field = V4L2_FIELD_NONE; | |
678 | pix->bytesperline = pix->width * bpp; | |
679 | pix->sizeimage = pix->bytesperline * pix->height; | |
680 | pix->colorspace = V4L2_COLORSPACE_RAW; | |
681 | ||
682 | return 0; | |
683 | } | |
684 | ||
685 | static int video_i2c_s_fmt_vid_cap(struct file *file, void *fh, | |
686 | struct v4l2_format *fmt) | |
687 | { | |
688 | struct video_i2c_data *data = video_drvdata(file); | |
689 | ||
690 | if (vb2_is_busy(&data->vb_vidq)) | |
691 | return -EBUSY; | |
692 | ||
693 | return video_i2c_try_fmt_vid_cap(file, fh, fmt); | |
694 | } | |
695 | ||
696 | static int video_i2c_g_parm(struct file *filp, void *priv, | |
697 | struct v4l2_streamparm *parm) | |
698 | { | |
699 | struct video_i2c_data *data = video_drvdata(filp); | |
700 | ||
701 | if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
702 | return -EINVAL; | |
703 | ||
704 | parm->parm.capture.readbuffers = 1; | |
705 | parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; | |
56281021 | 706 | parm->parm.capture.timeperframe = data->frame_interval; |
5cebaac6 MR |
707 | |
708 | return 0; | |
709 | } | |
710 | ||
56281021 AM |
711 | static int video_i2c_s_parm(struct file *filp, void *priv, |
712 | struct v4l2_streamparm *parm) | |
713 | { | |
714 | struct video_i2c_data *data = video_drvdata(filp); | |
715 | int i; | |
716 | ||
717 | for (i = 0; i < data->chip->num_frame_intervals - 1; i++) { | |
718 | if (V4L2_FRACT_COMPARE(parm->parm.capture.timeperframe, <=, | |
719 | data->chip->frame_intervals[i])) | |
720 | break; | |
721 | } | |
722 | data->frame_interval = data->chip->frame_intervals[i]; | |
723 | ||
724 | return video_i2c_g_parm(filp, priv, parm); | |
725 | } | |
726 | ||
5cebaac6 MR |
727 | static const struct v4l2_ioctl_ops video_i2c_ioctl_ops = { |
728 | .vidioc_querycap = video_i2c_querycap, | |
729 | .vidioc_g_input = video_i2c_g_input, | |
730 | .vidioc_s_input = video_i2c_s_input, | |
731 | .vidioc_enum_input = video_i2c_enum_input, | |
732 | .vidioc_enum_fmt_vid_cap = video_i2c_enum_fmt_vid_cap, | |
733 | .vidioc_enum_framesizes = video_i2c_enum_framesizes, | |
734 | .vidioc_enum_frameintervals = video_i2c_enum_frameintervals, | |
735 | .vidioc_g_fmt_vid_cap = video_i2c_try_fmt_vid_cap, | |
736 | .vidioc_s_fmt_vid_cap = video_i2c_s_fmt_vid_cap, | |
737 | .vidioc_g_parm = video_i2c_g_parm, | |
56281021 | 738 | .vidioc_s_parm = video_i2c_s_parm, |
5cebaac6 MR |
739 | .vidioc_try_fmt_vid_cap = video_i2c_try_fmt_vid_cap, |
740 | .vidioc_reqbufs = vb2_ioctl_reqbufs, | |
741 | .vidioc_create_bufs = vb2_ioctl_create_bufs, | |
742 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, | |
743 | .vidioc_querybuf = vb2_ioctl_querybuf, | |
744 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
745 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
746 | .vidioc_streamon = vb2_ioctl_streamon, | |
747 | .vidioc_streamoff = vb2_ioctl_streamoff, | |
748 | }; | |
749 | ||
750 | static void video_i2c_release(struct video_device *vdev) | |
751 | { | |
c764da98 AM |
752 | struct video_i2c_data *data = video_get_drvdata(vdev); |
753 | ||
754 | v4l2_device_unregister(&data->v4l2_dev); | |
755 | mutex_destroy(&data->lock); | |
756 | mutex_destroy(&data->queue_lock); | |
ae9e196d | 757 | regmap_exit(data->regmap); |
c764da98 | 758 | kfree(data); |
5cebaac6 MR |
759 | } |
760 | ||
95d82b0a | 761 | static int video_i2c_probe(struct i2c_client *client) |
5cebaac6 MR |
762 | { |
763 | struct video_i2c_data *data; | |
764 | struct v4l2_device *v4l2_dev; | |
765 | struct vb2_queue *queue; | |
766 | int ret = -ENODEV; | |
767 | ||
768 | data = kzalloc(sizeof(*data), GFP_KERNEL); | |
769 | if (!data) | |
770 | return -ENOMEM; | |
771 | ||
d1560d57 BD |
772 | data->chip = i2c_get_match_data(client); |
773 | if (!data->chip) | |
5cebaac6 MR |
774 | goto error_free_device; |
775 | ||
ae9e196d AM |
776 | data->regmap = regmap_init_i2c(client, data->chip->regmap_config); |
777 | if (IS_ERR(data->regmap)) { | |
778 | ret = PTR_ERR(data->regmap); | |
779 | goto error_free_device; | |
780 | } | |
781 | ||
5cebaac6 | 782 | v4l2_dev = &data->v4l2_dev; |
c0decac1 | 783 | strscpy(v4l2_dev->name, VIDEO_I2C_DRIVER, sizeof(v4l2_dev->name)); |
5cebaac6 MR |
784 | |
785 | ret = v4l2_device_register(&client->dev, v4l2_dev); | |
786 | if (ret < 0) | |
ae9e196d | 787 | goto error_regmap_exit; |
5cebaac6 MR |
788 | |
789 | mutex_init(&data->lock); | |
790 | mutex_init(&data->queue_lock); | |
791 | ||
792 | queue = &data->vb_vidq; | |
793 | queue->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
794 | queue->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR | VB2_READ; | |
795 | queue->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
796 | queue->drv_priv = data; | |
797 | queue->buf_struct_size = sizeof(struct video_i2c_buffer); | |
80c2b40a | 798 | queue->min_queued_buffers = 1; |
5cebaac6 MR |
799 | queue->ops = &video_i2c_video_qops; |
800 | queue->mem_ops = &vb2_vmalloc_memops; | |
801 | ||
802 | ret = vb2_queue_init(queue); | |
803 | if (ret < 0) | |
804 | goto error_unregister_device; | |
805 | ||
806 | data->vdev.queue = queue; | |
807 | data->vdev.queue->lock = &data->queue_lock; | |
808 | ||
809 | snprintf(data->vdev.name, sizeof(data->vdev.name), | |
810 | "I2C %d-%d Transport Video", | |
811 | client->adapter->nr, client->addr); | |
812 | ||
813 | data->vdev.v4l2_dev = v4l2_dev; | |
814 | data->vdev.fops = &video_i2c_fops; | |
815 | data->vdev.lock = &data->lock; | |
816 | data->vdev.ioctl_ops = &video_i2c_ioctl_ops; | |
817 | data->vdev.release = video_i2c_release; | |
818 | data->vdev.device_caps = V4L2_CAP_VIDEO_CAPTURE | | |
819 | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; | |
820 | ||
821 | spin_lock_init(&data->slock); | |
822 | INIT_LIST_HEAD(&data->vid_cap_active); | |
823 | ||
56281021 AM |
824 | data->frame_interval = data->chip->frame_intervals[0]; |
825 | ||
5cebaac6 MR |
826 | video_set_drvdata(&data->vdev, data); |
827 | i2c_set_clientdata(client, data); | |
828 | ||
ac11da47 MR |
829 | if (data->chip->set_power) { |
830 | ret = data->chip->set_power(data, true); | |
831 | if (ret) | |
832 | goto error_unregister_device; | |
833 | } | |
69d2a734 AM |
834 | |
835 | pm_runtime_get_noresume(&client->dev); | |
836 | pm_runtime_set_active(&client->dev); | |
837 | pm_runtime_enable(&client->dev); | |
838 | pm_runtime_set_autosuspend_delay(&client->dev, 2000); | |
839 | pm_runtime_use_autosuspend(&client->dev); | |
840 | ||
acbea679 MR |
841 | if (data->chip->hwmon_init) { |
842 | ret = data->chip->hwmon_init(data); | |
843 | if (ret < 0) { | |
844 | dev_warn(&client->dev, | |
845 | "failed to register hwmon device\n"); | |
846 | } | |
847 | } | |
848 | ||
8866cfbf MR |
849 | if (data->chip->nvmem_config) { |
850 | struct nvmem_config *config = data->chip->nvmem_config; | |
851 | struct nvmem_device *device; | |
852 | ||
853 | config->priv = data; | |
854 | config->dev = &client->dev; | |
855 | ||
856 | device = devm_nvmem_register(&client->dev, config); | |
857 | ||
858 | if (IS_ERR(device)) { | |
859 | dev_warn(&client->dev, | |
860 | "failed to register nvmem device\n"); | |
861 | } | |
862 | } | |
863 | ||
6347953e | 864 | ret = video_register_device(&data->vdev, VFL_TYPE_VIDEO, -1); |
5cebaac6 | 865 | if (ret < 0) |
69d2a734 AM |
866 | goto error_pm_disable; |
867 | ||
868 | pm_runtime_mark_last_busy(&client->dev); | |
869 | pm_runtime_put_autosuspend(&client->dev); | |
5cebaac6 MR |
870 | |
871 | return 0; | |
872 | ||
69d2a734 AM |
873 | error_pm_disable: |
874 | pm_runtime_disable(&client->dev); | |
875 | pm_runtime_set_suspended(&client->dev); | |
876 | pm_runtime_put_noidle(&client->dev); | |
ac11da47 MR |
877 | |
878 | if (data->chip->set_power) | |
879 | data->chip->set_power(data, false); | |
69d2a734 | 880 | |
5cebaac6 MR |
881 | error_unregister_device: |
882 | v4l2_device_unregister(v4l2_dev); | |
883 | mutex_destroy(&data->lock); | |
884 | mutex_destroy(&data->queue_lock); | |
885 | ||
ae9e196d AM |
886 | error_regmap_exit: |
887 | regmap_exit(data->regmap); | |
888 | ||
5cebaac6 MR |
889 | error_free_device: |
890 | kfree(data); | |
891 | ||
892 | return ret; | |
893 | } | |
894 | ||
ed5c2f5f | 895 | static void video_i2c_remove(struct i2c_client *client) |
5cebaac6 MR |
896 | { |
897 | struct video_i2c_data *data = i2c_get_clientdata(client); | |
898 | ||
69d2a734 AM |
899 | pm_runtime_get_sync(&client->dev); |
900 | pm_runtime_disable(&client->dev); | |
901 | pm_runtime_set_suspended(&client->dev); | |
902 | pm_runtime_put_noidle(&client->dev); | |
ac11da47 MR |
903 | |
904 | if (data->chip->set_power) | |
905 | data->chip->set_power(data, false); | |
69d2a734 | 906 | |
5cebaac6 | 907 | video_unregister_device(&data->vdev); |
5cebaac6 MR |
908 | } |
909 | ||
69d2a734 AM |
910 | #ifdef CONFIG_PM |
911 | ||
912 | static int video_i2c_pm_runtime_suspend(struct device *dev) | |
913 | { | |
914 | struct video_i2c_data *data = i2c_get_clientdata(to_i2c_client(dev)); | |
915 | ||
ac11da47 MR |
916 | if (!data->chip->set_power) |
917 | return 0; | |
918 | ||
69d2a734 AM |
919 | return data->chip->set_power(data, false); |
920 | } | |
921 | ||
922 | static int video_i2c_pm_runtime_resume(struct device *dev) | |
923 | { | |
924 | struct video_i2c_data *data = i2c_get_clientdata(to_i2c_client(dev)); | |
925 | ||
ac11da47 MR |
926 | if (!data->chip->set_power) |
927 | return 0; | |
928 | ||
69d2a734 AM |
929 | return data->chip->set_power(data, true); |
930 | } | |
931 | ||
932 | #endif | |
933 | ||
934 | static const struct dev_pm_ops video_i2c_pm_ops = { | |
935 | SET_RUNTIME_PM_OPS(video_i2c_pm_runtime_suspend, | |
936 | video_i2c_pm_runtime_resume, NULL) | |
937 | }; | |
938 | ||
5cebaac6 | 939 | static const struct i2c_device_id video_i2c_id_table[] = { |
d1560d57 BD |
940 | { "amg88xx", (kernel_ulong_t)&video_i2c_chip[AMG88XX] }, |
941 | { "mlx90640", (kernel_ulong_t)&video_i2c_chip[MLX90640] }, | |
5cebaac6 MR |
942 | {} |
943 | }; | |
944 | MODULE_DEVICE_TABLE(i2c, video_i2c_id_table); | |
945 | ||
946 | static const struct of_device_id video_i2c_of_match[] = { | |
947 | { .compatible = "panasonic,amg88xx", .data = &video_i2c_chip[AMG88XX] }, | |
8866cfbf | 948 | { .compatible = "melexis,mlx90640", .data = &video_i2c_chip[MLX90640] }, |
5cebaac6 MR |
949 | {} |
950 | }; | |
951 | MODULE_DEVICE_TABLE(of, video_i2c_of_match); | |
952 | ||
953 | static struct i2c_driver video_i2c_driver = { | |
954 | .driver = { | |
955 | .name = VIDEO_I2C_DRIVER, | |
956 | .of_match_table = video_i2c_of_match, | |
69d2a734 | 957 | .pm = &video_i2c_pm_ops, |
5cebaac6 | 958 | }, |
aaeb31c0 | 959 | .probe = video_i2c_probe, |
5cebaac6 MR |
960 | .remove = video_i2c_remove, |
961 | .id_table = video_i2c_id_table, | |
962 | }; | |
963 | ||
964 | module_i2c_driver(video_i2c_driver); | |
965 | ||
966 | MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>"); | |
967 | MODULE_DESCRIPTION("I2C transport video support"); | |
968 | MODULE_LICENSE("GPL v2"); |