[linux-2.6-block.git] / drivers / media / i2c / ths7303.c

/*
 * ths7303/53- THS7303/53 Video Amplifier driver
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates.
 *
 * Author: Chaithrika U S <chaithrika@ti.com>
 *
 * Contributors:
 *     Hans Verkuil <hans.verkuil@cisco.com>
 *     Lad, Prabhakar <prabhakar.lad@ti.com>
 *     Martin Bugge <marbugge@cisco.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/slab.h>

#include <media/ths7303.h>
#include <media/v4l2-device.h>

#define THS7303_CHANNEL_1	1
#define THS7303_CHANNEL_2	2
#define THS7303_CHANNEL_3	3

struct ths7303_state {
	struct v4l2_subdev		sd;
	const struct ths7303_platform_data *pdata;
	struct v4l2_bt_timings		bt;
	int std_id;
	int stream_on;
};

enum ths7303_filter_mode {
	THS7303_FILTER_MODE_480I_576I,
	THS7303_FILTER_MODE_480P_576P,
	THS7303_FILTER_MODE_720P_1080I,
	THS7303_FILTER_MODE_1080P,
	THS7303_FILTER_MODE_DISABLE
};

MODULE_DESCRIPTION("TI THS7303 video amplifier driver");
MODULE_AUTHOR("Chaithrika U S");
MODULE_LICENSE("GPL");

static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Debug level 0-1");

static inline struct ths7303_state *to_state(struct v4l2_subdev *sd)
{
	return container_of(sd, struct ths7303_state, sd);
}

static int ths7303_read(struct v4l2_subdev *sd, u8 reg)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	return i2c_smbus_read_byte_data(client, reg);
}

static int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	int ret;
	int i;

	for (i = 0; i < 3; i++) {
		ret = i2c_smbus_write_byte_data(client, reg, val);
		if (ret == 0)
			return 0;
	}
	return ret;
}

/* following function is used to set ths7303 */
static int ths7303_setval(struct v4l2_subdev *sd,
			  enum ths7303_filter_mode mode)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	struct ths7303_state *state = to_state(sd);
	const struct ths7303_platform_data *pdata = state->pdata;
	u8 val, sel = 0;
	int err, disable = 0;

	if (!client)
		return -EINVAL;

	switch (mode) {
	case THS7303_FILTER_MODE_1080P:
		sel = 0x3;	/*1080p and SXGA/UXGA */
		break;
	case THS7303_FILTER_MODE_720P_1080I:
		sel = 0x2;	/*720p, 1080i and SVGA/XGA */
		break;
	case THS7303_FILTER_MODE_480P_576P:
		sel = 0x1;	/* EDTV 480p/576p and VGA */
		break;
	case THS7303_FILTER_MODE_480I_576I:
		sel = 0x0;	/* SDTV, S-Video, 480i/576i */
		break;
	default:
		/* disable all channels */
		disable = 1;
	}

	val = (sel << 6) | (sel << 3);
	if (!disable)
		val |= (pdata->ch_1 & 0x27);
	err = ths7303_write(sd, THS7303_CHANNEL_1, val);
	if (err)
		goto out;

	val = (sel << 6) | (sel << 3);
	if (!disable)
		val |= (pdata->ch_2 & 0x27);
	err = ths7303_write(sd, THS7303_CHANNEL_2, val);
	if (err)
		goto out;

	val = (sel << 6) | (sel << 3);
	if (!disable)
		val |= (pdata->ch_3 & 0x27);
	err = ths7303_write(sd, THS7303_CHANNEL_3, val);
	if (err)
		goto out;

	return 0;
out:
	pr_info("write byte data failed\n");
	return err;
}

static int ths7303_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
{
	struct ths7303_state *state = to_state(sd);

	if (norm & (V4L2_STD_ALL & ~V4L2_STD_SECAM)) {
		state->std_id = 1;
		state->bt.pixelclock = 0;
		return ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I);
	}

	return ths7303_setval(sd, THS7303_FILTER_MODE_DISABLE);
}

static int ths7303_config(struct v4l2_subdev *sd)
{
	struct ths7303_state *state = to_state(sd);
	int res;

	if (!state->stream_on) {
		ths7303_write(sd, THS7303_CHANNEL_1,
			      (ths7303_read(sd, THS7303_CHANNEL_1) & 0xf8) |
			      0x00);
		ths7303_write(sd, THS7303_CHANNEL_2,
			      (ths7303_read(sd, THS7303_CHANNEL_2) & 0xf8) |
			      0x00);
		ths7303_write(sd, THS7303_CHANNEL_3,
			      (ths7303_read(sd, THS7303_CHANNEL_3) & 0xf8) |
			      0x00);
		return 0;
	}

	if (state->bt.pixelclock > 120000000)
		res = ths7303_setval(sd, THS7303_FILTER_MODE_1080P);
	else if (state->bt.pixelclock > 70000000)
		res = ths7303_setval(sd, THS7303_FILTER_MODE_720P_1080I);
	else if (state->bt.pixelclock > 20000000)
		res = ths7303_setval(sd, THS7303_FILTER_MODE_480P_576P);
	else if (state->std_id)
		res = ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I);
	else
		/* disable all channels */
		res = ths7303_setval(sd, THS7303_FILTER_MODE_DISABLE);

	return res;

}

static int ths7303_s_stream(struct v4l2_subdev *sd, int enable)
{
	struct ths7303_state *state = to_state(sd);

	state->stream_on = enable;

	return ths7303_config(sd);
}

/* for setting filter for HD output */
static int ths7303_s_dv_timings(struct v4l2_subdev *sd,
			       struct v4l2_dv_timings *dv_timings)
{
	struct ths7303_state *state = to_state(sd);

	if (!dv_timings || dv_timings->type != V4L2_DV_BT_656_1120)
		return -EINVAL;

	state->bt = dv_timings->bt;
	state->std_id = 0;

	return ths7303_config(sd);
}

static const struct v4l2_subdev_video_ops ths7303_video_ops = {
	.s_stream	= ths7303_s_stream,
	.s_std_output	= ths7303_s_std_output,
	.s_dv_timings   = ths7303_s_dv_timings,
};

#ifdef CONFIG_VIDEO_ADV_DEBUG

static int ths7303_g_register(struct v4l2_subdev *sd,
			      struct v4l2_dbg_register *reg)
{
	reg->size = 1;
	reg->val = ths7303_read(sd, reg->reg);
	return 0;
}

static int ths7303_s_register(struct v4l2_subdev *sd,
			      const struct v4l2_dbg_register *reg)
{
	ths7303_write(sd, reg->reg, reg->val);
	return 0;
}
#endif

static const char * const stc_lpf_sel_txt[4] = {
	"500-kHz Filter",
	"2.5-MHz Filter",
	"5-MHz Filter",
	"5-MHz Filter",
};

static const char * const in_mux_sel_txt[2] = {
	"Input A Select",
	"Input B Select",
};

static const char * const lpf_freq_sel_txt[4] = {
	"9-MHz LPF",
	"16-MHz LPF",
	"35-MHz LPF",
	"Bypass LPF",
};

static const char * const in_bias_sel_dis_cont_txt[8] = {
	"Disable Channel",
	"Mute Function - No Output",
	"DC Bias Select",
	"DC Bias + 250 mV Offset Select",
	"AC Bias Select",
	"Sync Tip Clamp with low bias",
	"Sync Tip Clamp with mid bias",
	"Sync Tip Clamp with high bias",
};

static void ths7303_log_channel_status(struct v4l2_subdev *sd, u8 reg)
{
	u8 val = ths7303_read(sd, reg);

	if ((val & 0x7) == 0) {
		v4l2_info(sd, "Channel %d Off\n", reg);
		return;
	}

	v4l2_info(sd, "Channel %d On\n", reg);
	v4l2_info(sd, "  value 0x%x\n", val);
	v4l2_info(sd, "  %s\n", stc_lpf_sel_txt[(val >> 6) & 0x3]);
	v4l2_info(sd, "  %s\n", in_mux_sel_txt[(val >> 5) & 0x1]);
	v4l2_info(sd, "  %s\n", lpf_freq_sel_txt[(val >> 3) & 0x3]);
	v4l2_info(sd, "  %s\n", in_bias_sel_dis_cont_txt[(val >> 0) & 0x7]);
}

static int ths7303_log_status(struct v4l2_subdev *sd)
{
	struct ths7303_state *state = to_state(sd);

	v4l2_info(sd, "stream %s\n", state->stream_on ? "On" : "Off");

	if (state->bt.pixelclock) {
		struct v4l2_bt_timings *bt = bt = &state->bt;
		u32 frame_width, frame_height;

		frame_width = V4L2_DV_BT_FRAME_WIDTH(bt);
		frame_height = V4L2_DV_BT_FRAME_HEIGHT(bt);
		v4l2_info(sd,
			  "timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n",
			  bt->width, bt->height, bt->interlaced ? "i" : "p",
			  (frame_height * frame_width) > 0 ?
			  (int)bt->pixelclock /
			  (frame_height * frame_width) : 0,
			  frame_width, frame_height,
			  (int)bt->pixelclock, bt->polarities);
	} else {
		v4l2_info(sd, "no timings set\n");
	}

	ths7303_log_channel_status(sd, THS7303_CHANNEL_1);
	ths7303_log_channel_status(sd, THS7303_CHANNEL_2);
	ths7303_log_channel_status(sd, THS7303_CHANNEL_3);

	return 0;
}

static const struct v4l2_subdev_core_ops ths7303_core_ops = {
	.log_status = ths7303_log_status,
#ifdef CONFIG_VIDEO_ADV_DEBUG
	.g_register = ths7303_g_register,
	.s_register = ths7303_s_register,
#endif
};

static const struct v4l2_subdev_ops ths7303_ops = {
	.core	= &ths7303_core_ops,
	.video 	= &ths7303_video_ops,
};

static int ths7303_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	struct ths7303_platform_data *pdata = client->dev.platform_data;
	struct ths7303_state *state;
	struct v4l2_subdev *sd;

	if (pdata == NULL) {
		dev_err(&client->dev, "No platform data\n");
		return -EINVAL;
	}

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
		return -ENODEV;

	v4l_info(client, "chip found @ 0x%x (%s)\n",
			client->addr << 1, client->adapter->name);

	state = devm_kzalloc(&client->dev, sizeof(struct ths7303_state),
			     GFP_KERNEL);
	if (!state)
		return -ENOMEM;

	state->pdata = pdata;
	sd = &state->sd;
	v4l2_i2c_subdev_init(sd, client, &ths7303_ops);

	/* set to default 480I_576I filter mode */
	if (ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I) < 0) {
		v4l_err(client, "Setting to 480I_576I filter mode failed!\n");
		return -EINVAL;
	}

	return 0;
}

static int ths7303_remove(struct i2c_client *client)
{
	struct v4l2_subdev *sd = i2c_get_clientdata(client);

	v4l2_device_unregister_subdev(sd);

	return 0;
}

static const struct i2c_device_id ths7303_id[] = {
	{"ths7303", 0},
	{"ths7353", 0},
	{},
};

MODULE_DEVICE_TABLE(i2c, ths7303_id);

static struct i2c_driver ths7303_driver = {
	.driver = {
		.owner	= THIS_MODULE,
		.name	= "ths73x3",
	},
	.probe		= ths7303_probe,
	.remove		= ths7303_remove,
	.id_table	= ths7303_id,
};

module_i2c_driver(ths7303_driver);
Commit	Line	Data
40199c50	1	/*
88da0183	2	* ths7303/53- THS7303/53 Video Amplifier driver
40199c50 C	3	*
40199c50 C	4	* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
88da0183 LP	5	* Copyright 2013 Cisco Systems, Inc. and/or its affiliates.
	6	*
	7	* Author: Chaithrika U S <chaithrika@ti.com>
	8	*
	9	* Contributors:
	10	* Hans Verkuil <hans.verkuil@cisco.com>
	11	* Lad, Prabhakar <prabhakar.lad@ti.com>
	12	* Martin Bugge <marbugge@cisco.com>
40199c50 C	13	*
	14	* This program is free software; you can redistribute it and/or
	15	* modify it under the terms of the GNU General Public License as
	16	* published by the Free Software Foundation version 2.
	17	*
	18	* This program is distributed .as is. WITHOUT ANY WARRANTY of any
	19	* kind, whether express or implied; without even the implied warranty
	20	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*/
	23
40199c50	24	#include <linux/i2c.h>
40199c50	25	#include <linux/module.h>
88da0183	26	#include <linux/slab.h>
40199c50	27
88da0183	28	#include <media/ths7303.h>
88da0183	29	#include <media/v4l2-device.h>
40199c50	30
ad7dcb33 MH	31	#define THS7303_CHANNEL_1 1
	32	#define THS7303_CHANNEL_2 2
	33	#define THS7303_CHANNEL_3 3
	34
88da0183 LP	35	struct ths7303_state {
88da0183 LP	36	struct v4l2_subdev sd;
dd8c393b	37	const struct ths7303_platform_data *pdata;
88da0183 LP	38	struct v4l2_bt_timings bt;
	39	int std_id;
	40	int stream_on;
88da0183 LP	41	};
88da0183 LP	42
ad7dcb33 MH	43	enum ths7303_filter_mode {
	44	THS7303_FILTER_MODE_480I_576I,
	45	THS7303_FILTER_MODE_480P_576P,
	46	THS7303_FILTER_MODE_720P_1080I,
	47	THS7303_FILTER_MODE_1080P,
	48	THS7303_FILTER_MODE_DISABLE
	49	};
	50
40199c50 C	51	MODULE_DESCRIPTION("TI THS7303 video amplifier driver");
	52	MODULE_AUTHOR("Chaithrika U S");
	53	MODULE_LICENSE("GPL");
	54
	55	static int debug;
	56	module_param(debug, int, 0644);
	57	MODULE_PARM_DESC(debug, "Debug level 0-1");
	58
88da0183 LP	59	static inline struct ths7303_state to_state(struct v4l2_subdev sd)
	60	{
	61	return container_of(sd, struct ths7303_state, sd);
	62	}
	63
	64	static int ths7303_read(struct v4l2_subdev *sd, u8 reg)
	65	{
	66	struct i2c_client *client = v4l2_get_subdevdata(sd);
	67
	68	return i2c_smbus_read_byte_data(client, reg);
	69	}
	70
	71	static int ths7303_write(struct v4l2_subdev *sd, u8 reg, u8 val)
	72	{
	73	struct i2c_client *client = v4l2_get_subdevdata(sd);
	74	int ret;
	75	int i;
	76
	77	for (i = 0; i < 3; i++) {
	78	ret = i2c_smbus_write_byte_data(client, reg, val);
	79	if (ret == 0)
	80	return 0;
	81	}
	82	return ret;
	83	}
	84
40199c50	85	/* following function is used to set ths7303 */
06eb891e RR	86	static int ths7303_setval(struct v4l2_subdev *sd,
06eb891e RR	87	enum ths7303_filter_mode mode)
40199c50	88	{
ad7dcb33	89	struct i2c_client *client = v4l2_get_subdevdata(sd);
88da0183	90	struct ths7303_state *state = to_state(sd);
dd8c393b	91	const struct ths7303_platform_data *pdata = state->pdata;
88da0183 LP	92	u8 val, sel = 0;
88da0183 LP	93	int err, disable = 0;
40199c50	94
ad7dcb33 MH	95	if (!client)
	96	return -EINVAL;
	97
	98	switch (mode) {
	99	case THS7303_FILTER_MODE_1080P:
88da0183	100	sel = 0x3; /1080p and SXGA/UXGA /
ad7dcb33 MH	101	break;
ad7dcb33 MH	102	case THS7303_FILTER_MODE_720P_1080I:
88da0183	103	sel = 0x2; /720p, 1080i and SVGA/XGA /
ad7dcb33 MH	104	break;
ad7dcb33 MH	105	case THS7303_FILTER_MODE_480P_576P:
88da0183	106	sel = 0x1; /* EDTV 480p/576p and VGA */
ad7dcb33 MH	107	break;
ad7dcb33 MH	108	case THS7303_FILTER_MODE_480I_576I:
88da0183	109	sel = 0x0; /* SDTV, S-Video, 480i/576i */
ad7dcb33	110	break;
ad7dcb33 MH	111	default:
	112	/* disable all channels */
	113	disable = 1;
40199c50	114	}
88da0183 LP	115
88da0183 LP	116	val = (sel << 6) \| (sel << 3);
ad7dcb33	117	if (!disable)
88da0183 LP	118	val \|= (pdata->ch_1 & 0x27);
88da0183 LP	119	err = ths7303_write(sd, THS7303_CHANNEL_1, val);
ad7dcb33 MH	120	if (err)
ad7dcb33 MH	121	goto out;
40199c50	122
88da0183	123	val = (sel << 6) \| (sel << 3);
ad7dcb33	124	if (!disable)
88da0183 LP	125	val \|= (pdata->ch_2 & 0x27);
88da0183 LP	126	err = ths7303_write(sd, THS7303_CHANNEL_2, val);
40199c50	127	if (err)
ad7dcb33	128	goto out;
40199c50	129
88da0183 LP	130	val = (sel << 6) \| (sel << 3);
	131	if (!disable)
	132	val \|= (pdata->ch_3 & 0x27);
	133	err = ths7303_write(sd, THS7303_CHANNEL_3, val);
ad7dcb33 MH	134	if (err)
ad7dcb33 MH	135	goto out;
88da0183 LP	136
88da0183 LP	137	return 0;
ad7dcb33 MH	138	out:
ad7dcb33 MH	139	pr_info("write byte data failed\n");
40199c50 C	140	return err;
	141	}
	142
	143	static int ths7303_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
	144	{
88da0183 LP	145	struct ths7303_state *state = to_state(sd);
	146
	147	if (norm & (V4L2_STD_ALL & ~V4L2_STD_SECAM)) {
	148	state->std_id = 1;
	149	state->bt.pixelclock = 0;
ad7dcb33	150	return ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I);
88da0183 LP	151	}
	152
	153	return ths7303_setval(sd, THS7303_FILTER_MODE_DISABLE);
ad7dcb33 MH	154	}
ad7dcb33 MH	155
88da0183	156	static int ths7303_config(struct v4l2_subdev *sd)
ad7dcb33	157	{
88da0183 LP	158	struct ths7303_state *state = to_state(sd);
	159	int res;
	160
	161	if (!state->stream_on) {
	162	ths7303_write(sd, THS7303_CHANNEL_1,
	163	(ths7303_read(sd, THS7303_CHANNEL_1) & 0xf8) \|
	164	0x00);
	165	ths7303_write(sd, THS7303_CHANNEL_2,
	166	(ths7303_read(sd, THS7303_CHANNEL_2) & 0xf8) \|
	167	0x00);
	168	ths7303_write(sd, THS7303_CHANNEL_3,
	169	(ths7303_read(sd, THS7303_CHANNEL_3) & 0xf8) \|
	170	0x00);
	171	return 0;
	172	}
ad7dcb33	173
88da0183	174	if (state->bt.pixelclock > 120000000)
ad7dcb33	175	res = ths7303_setval(sd, THS7303_FILTER_MODE_1080P);
88da0183	176	else if (state->bt.pixelclock > 70000000)
ad7dcb33	177	res = ths7303_setval(sd, THS7303_FILTER_MODE_720P_1080I);
88da0183	178	else if (state->bt.pixelclock > 20000000)
ad7dcb33	179	res = ths7303_setval(sd, THS7303_FILTER_MODE_480P_576P);
88da0183 LP	180	else if (state->std_id)
88da0183 LP	181	res = ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I);
ad7dcb33 MH	182	else
	183	/* disable all channels */
	184	res = ths7303_setval(sd, THS7303_FILTER_MODE_DISABLE);
	185
	186	return res;
88da0183 LP	187
	188	}
	189
	190	static int ths7303_s_stream(struct v4l2_subdev *sd, int enable)
	191	{
	192	struct ths7303_state *state = to_state(sd);
	193
	194	state->stream_on = enable;
	195
	196	return ths7303_config(sd);
	197	}
	198
	199	/* for setting filter for HD output */
	200	static int ths7303_s_dv_timings(struct v4l2_subdev *sd,
	201	struct v4l2_dv_timings *dv_timings)
	202	{
	203	struct ths7303_state *state = to_state(sd);
	204
	205	if (!dv_timings \|\| dv_timings->type != V4L2_DV_BT_656_1120)
	206	return -EINVAL;
	207
	208	state->bt = dv_timings->bt;
	209	state->std_id = 0;
	210
	211	return ths7303_config(sd);
40199c50 C	212	}
40199c50 C	213
40199c50	214	static const struct v4l2_subdev_video_ops ths7303_video_ops = {
88da0183	215	.s_stream = ths7303_s_stream,
40199c50	216	.s_std_output = ths7303_s_std_output,
88da0183	217	.s_dv_timings = ths7303_s_dv_timings,
40199c50 C	218	};
40199c50 C	219
88da0183 LP	220	#ifdef CONFIG_VIDEO_ADV_DEBUG
	221
	222	static int ths7303_g_register(struct v4l2_subdev *sd,
	223	struct v4l2_dbg_register *reg)
	224	{
88da0183 LP	225	reg->size = 1;
	226	reg->val = ths7303_read(sd, reg->reg);
	227	return 0;
	228	}
	229
	230	static int ths7303_s_register(struct v4l2_subdev *sd,
977ba3b1	231	const struct v4l2_dbg_register *reg)
88da0183	232	{
88da0183 LP	233	ths7303_write(sd, reg->reg, reg->val);
	234	return 0;
	235	}
	236	#endif
	237
	238	static const char * const stc_lpf_sel_txt[4] = {
	239	"500-kHz Filter",
	240	"2.5-MHz Filter",
	241	"5-MHz Filter",
	242	"5-MHz Filter",
	243	};
	244
	245	static const char * const in_mux_sel_txt[2] = {
	246	"Input A Select",
	247	"Input B Select",
	248	};
	249
	250	static const char * const lpf_freq_sel_txt[4] = {
	251	"9-MHz LPF",
	252	"16-MHz LPF",
	253	"35-MHz LPF",
	254	"Bypass LPF",
	255	};
	256
	257	static const char * const in_bias_sel_dis_cont_txt[8] = {
	258	"Disable Channel",
	259	"Mute Function - No Output",
	260	"DC Bias Select",
	261	"DC Bias + 250 mV Offset Select",
	262	"AC Bias Select",
	263	"Sync Tip Clamp with low bias",
	264	"Sync Tip Clamp with mid bias",
	265	"Sync Tip Clamp with high bias",
	266	};
	267
	268	static void ths7303_log_channel_status(struct v4l2_subdev *sd, u8 reg)
	269	{
	270	u8 val = ths7303_read(sd, reg);
	271
	272	if ((val & 0x7) == 0) {
	273	v4l2_info(sd, "Channel %d Off\n", reg);
	274	return;
	275	}
	276
	277	v4l2_info(sd, "Channel %d On\n", reg);
	278	v4l2_info(sd, " value 0x%x\n", val);
	279	v4l2_info(sd, " %s\n", stc_lpf_sel_txt[(val >> 6) & 0x3]);
	280	v4l2_info(sd, " %s\n", in_mux_sel_txt[(val >> 5) & 0x1]);
	281	v4l2_info(sd, " %s\n", lpf_freq_sel_txt[(val >> 3) & 0x3]);
	282	v4l2_info(sd, " %s\n", in_bias_sel_dis_cont_txt[(val >> 0) & 0x7]);
	283	}
	284
	285	static int ths7303_log_status(struct v4l2_subdev *sd)
	286	{
	287	struct ths7303_state *state = to_state(sd);
	288
	289	v4l2_info(sd, "stream %s\n", state->stream_on ? "On" : "Off");
	290
	291	if (state->bt.pixelclock) {
	292	struct v4l2_bt_timings *bt = bt = &state->bt;
	293	u32 frame_width, frame_height;
	294
eacf8f9a HV	295	frame_width = V4L2_DV_BT_FRAME_WIDTH(bt);
eacf8f9a HV	296	frame_height = V4L2_DV_BT_FRAME_HEIGHT(bt);
88da0183 LP	297	v4l2_info(sd,
	298	"timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n",
	299	bt->width, bt->height, bt->interlaced ? "i" : "p",
	300	(frame_height * frame_width) > 0 ?
	301	(int)bt->pixelclock /
	302	(frame_height * frame_width) : 0,
	303	frame_width, frame_height,
	304	(int)bt->pixelclock, bt->polarities);
	305	} else {
	306	v4l2_info(sd, "no timings set\n");
	307	}
	308
	309	ths7303_log_channel_status(sd, THS7303_CHANNEL_1);
	310	ths7303_log_channel_status(sd, THS7303_CHANNEL_2);
	311	ths7303_log_channel_status(sd, THS7303_CHANNEL_3);
	312
	313	return 0;
	314	}
	315
40199c50	316	static const struct v4l2_subdev_core_ops ths7303_core_ops = {
88da0183 LP	317	.log_status = ths7303_log_status,
	318	#ifdef CONFIG_VIDEO_ADV_DEBUG
	319	.g_register = ths7303_g_register,
	320	.s_register = ths7303_s_register,
	321	#endif
40199c50 C	322	};
	323
	324	static const struct v4l2_subdev_ops ths7303_ops = {
	325	.core = &ths7303_core_ops,
	326	.video = &ths7303_video_ops,
	327	};
	328
	329	static int ths7303_probe(struct i2c_client *client,
	330	const struct i2c_device_id *id)
	331	{
88da0183 LP	332	struct ths7303_platform_data *pdata = client->dev.platform_data;
88da0183 LP	333	struct ths7303_state *state;
40199c50	334	struct v4l2_subdev *sd;
40199c50	335
dd8c393b LP	336	if (pdata == NULL) {
	337	dev_err(&client->dev, "No platform data\n");
	338	return -EINVAL;
	339	}
	340
40199c50 C	341	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
	342	return -ENODEV;
	343
	344	v4l_info(client, "chip found @ 0x%x (%s)\n",
	345	client->addr << 1, client->adapter->name);
	346
88da0183 LP	347	state = devm_kzalloc(&client->dev, sizeof(struct ths7303_state),
	348	GFP_KERNEL);
	349	if (!state)
40199c50 C	350	return -ENOMEM;
40199c50 C	351
dd8c393b	352	state->pdata = pdata;
88da0183	353	sd = &state->sd;
40199c50 C	354	v4l2_i2c_subdev_init(sd, client, &ths7303_ops);
40199c50 C	355
8524ce55 LP	356	/* set to default 480I_576I filter mode */
	357	if (ths7303_setval(sd, THS7303_FILTER_MODE_480I_576I) < 0) {
	358	v4l_err(client, "Setting to 480I_576I filter mode failed!\n");
	359	return -EINVAL;
88da0183 LP	360	}
	361
	362	return 0;
40199c50 C	363	}
	364
	365	static int ths7303_remove(struct i2c_client *client)
	366	{
	367	struct v4l2_subdev *sd = i2c_get_clientdata(client);
	368
	369	v4l2_device_unregister_subdev(sd);
40199c50 C	370
	371	return 0;
	372	}
	373
	374	static const struct i2c_device_id ths7303_id[] = {
e1277110 HV	375	{"ths7303", 0},
e1277110 HV	376	{"ths7353", 0},
40199c50 C	377	{},
	378	};
	379
	380	MODULE_DEVICE_TABLE(i2c, ths7303_id);
	381
	382	static struct i2c_driver ths7303_driver = {
	383	.driver = {
	384	.owner = THIS_MODULE,
88da0183	385	.name = "ths73x3",
40199c50 C	386	},
	387	.probe = ths7303_probe,
	388	.remove = ths7303_remove,
	389	.id_table = ths7303_id,
	390	};
	391
c6e8d86f	392	module_i2c_driver(ths7303_driver);