projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| ccfc97bd | 1 | /* |
| cb7a01ac | 2 | * drivers/media/i2c/smiapp/smiapp-reg.h |
| ccfc97bd SA |
3 | * |
| 4 | * Generic driver for SMIA/SMIA++ compliant camera modules | |
| 5 | * | |
| 6 | * Copyright (C) 2011--2012 Nokia Corporation | |
| 8c5dff90 | 7 | * Contact: Sakari Ailus <sakari.ailus@iki.fi> |
| ccfc97bd SA |
8 | * |
| 9 | * This program is free software; you can redistribute it and/or | |
| 10 | * modify it under the terms of the GNU General Public License | |
| 11 | * version 2 as published by the Free Software Foundation. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, but | |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 16 | * General Public License for more details. | |
| ccfc97bd SA |
17 | */ |
| 18 | ||
| 19 | #ifndef __SMIAPP_REG_H_ | |
| 20 | #define __SMIAPP_REG_H_ | |
| 21 | ||
| 22 | #include "smiapp-reg-defs.h" | |
| 23 | ||
| 24 | /* Bits for above register */ | |
| 25 | #define SMIAPP_IMAGE_ORIENTATION_HFLIP (1 << 0) | |
| 26 | #define SMIAPP_IMAGE_ORIENTATION_VFLIP (1 << 1) | |
| 27 | ||
| 28 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_EN (1 << 0) | |
| 29 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_RD_EN (0 << 1) | |
| 30 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_WR_EN (1 << 1) | |
| 31 | #define SMIAPP_DATA_TRANSFER_IF_1_CTRL_ERR_CLEAR (1 << 2) | |
| 32 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_RD_READY (1 << 0) | |
| 33 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_WR_READY (1 << 1) | |
| 34 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EDATA (1 << 2) | |
| 35 | #define SMIAPP_DATA_TRANSFER_IF_1_STATUS_EUSAGE (1 << 3) | |
| 36 | ||
| 37 | #define SMIAPP_SOFTWARE_RESET (1 << 0) | |
| 38 | ||
| 39 | #define SMIAPP_FLASH_MODE_CAPABILITY_SINGLE_STROBE (1 << 0) | |
| 40 | #define SMIAPP_FLASH_MODE_CAPABILITY_MULTIPLE_STROBE (1 << 1) | |
| 41 | ||
| 42 | #define SMIAPP_DPHY_CTRL_AUTOMATIC 0 | |
| 43 | /* DPHY control based on REQUESTED_LINK_BIT_RATE_MBPS */ | |
| 44 | #define SMIAPP_DPHY_CTRL_UI 1 | |
| 45 | #define SMIAPP_DPHY_CTRL_REGISTER 2 | |
| 46 | ||
| 47 | #define SMIAPP_COMPRESSION_MODE_SIMPLE_PREDICTOR 1 | |
| 48 | #define SMIAPP_COMPRESSION_MODE_ADVANCED_PREDICTOR 2 | |
| 49 | ||
| 50 | #define SMIAPP_MODE_SELECT_SOFTWARE_STANDBY 0 | |
| 51 | #define SMIAPP_MODE_SELECT_STREAMING 1 | |
| 52 | ||
| 53 | #define SMIAPP_SCALING_MODE_NONE 0 | |
| 54 | #define SMIAPP_SCALING_MODE_HORIZONTAL 1 | |
| 55 | #define SMIAPP_SCALING_MODE_BOTH 2 | |
| 56 | ||
| 57 | #define SMIAPP_SCALING_CAPABILITY_NONE 0 | |
| 58 | #define SMIAPP_SCALING_CAPABILITY_HORIZONTAL 1 | |
| 59 | #define SMIAPP_SCALING_CAPABILITY_BOTH 2 /* horizontal/both */ | |
| 60 | ||
| 61 | /* digital crop right before scaler */ | |
| 62 | #define SMIAPP_DIGITAL_CROP_CAPABILITY_NONE 0 | |
| 63 | #define SMIAPP_DIGITAL_CROP_CAPABILITY_INPUT_CROP 1 | |
| 64 | ||
| 65 | #define SMIAPP_BINNING_CAPABILITY_NO 0 | |
| 66 | #define SMIAPP_BINNING_CAPABILITY_YES 1 | |
| 67 | ||
| 68 | /* Maximum number of binning subtypes */ | |
| 69 | #define SMIAPP_BINNING_SUBTYPES 253 | |
| 70 | ||
| 71 | #define SMIAPP_PIXEL_ORDER_GRBG 0 | |
| 72 | #define SMIAPP_PIXEL_ORDER_RGGB 1 | |
| 73 | #define SMIAPP_PIXEL_ORDER_BGGR 2 | |
| 74 | #define SMIAPP_PIXEL_ORDER_GBRG 3 | |
| 75 | ||
| 76 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL 1 | |
| 77 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED 2 | |
| 78 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_NORMAL_N 8 | |
| 79 | #define SMIAPP_DATA_FORMAT_MODEL_TYPE_EXTENDED_N 16 | |
| 80 | ||
| 81 | #define SMIAPP_FRAME_FORMAT_MODEL_TYPE_2BYTE 0x01 | |
| 82 | #define SMIAPP_FRAME_FORMAT_MODEL_TYPE_4BYTE 0x02 | |
| 83 | #define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NROWS_MASK 0x0f | |
| 84 | #define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_MASK 0xf0 | |
| 85 | #define SMIAPP_FRAME_FORMAT_MODEL_SUBTYPE_NCOLS_SHIFT 4 | |
| 86 | ||
| 87 | #define SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_MASK 0xf000 | |
| 88 | #define SMIAPP_FRAME_FORMAT_DESC_2_PIXELCODE_SHIFT 12 | |
| 89 | #define SMIAPP_FRAME_FORMAT_DESC_2_PIXELS_MASK 0x0fff | |
| 90 | ||
| 91 | #define SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_MASK 0xf0000000 | |
| 92 | #define SMIAPP_FRAME_FORMAT_DESC_4_PIXELCODE_SHIFT 28 | |
| 93 | #define SMIAPP_FRAME_FORMAT_DESC_4_PIXELS_MASK 0x0000ffff | |
| 94 | ||
| 95 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_EMBEDDED 1 | |
| 96 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DUMMY 2 | |
| 97 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_BLACK 3 | |
| 98 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_DARK 4 | |
| 99 | #define SMIAPP_FRAME_FORMAT_DESC_PIXELCODE_VISIBLE 5 | |
| 100 | ||
| 101 | #define SMIAPP_FAST_STANDBY_CTRL_COMPLETE_FRAMES 0 | |
| 102 | #define SMIAPP_FAST_STANDBY_CTRL_IMMEDIATE 1 | |
| 103 | ||
| 104 | /* Scaling N factor */ | |
| 105 | #define SMIAPP_SCALE_N 16 | |
| 106 | ||
| 107 | /* Image statistics registers */ | |
| 108 | /* Registers 0x2000 to 0x2fff are reserved for future | |
| 109 | * use for statistics features. | |
| 110 | */ | |
| 111 | ||
| 112 | /* Manufacturer Specific Registers: 0x3000 to 0x3fff | |
| 113 | * The manufacturer specifies these as a black box. | |
| 114 | */ | |
| 115 | ||
| 116 | #endif /* __SMIAPP_REG_H_ */ |