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9cae9722 TT |
1 | /* |
2 | * Driver for the OV5645 camera sensor. | |
3 | * | |
4 | * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved. | |
5 | * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved. | |
6 | * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved. | |
7 | * | |
8 | * Based on: | |
9 | * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org: | |
10 | * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/ | |
11 | * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41 | |
12 | * - the OV5640 driver posted on linux-media: | |
13 | * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html | |
14 | */ | |
15 | ||
16 | /* | |
17 | * This program is free software; you can redistribute it and/or modify | |
18 | * it under the terms of the GNU General Public License as published by | |
19 | * the Free Software Foundation; either version 2 of the License, or | |
20 | * (at your option) any later version. | |
21 | ||
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | */ | |
27 | ||
28 | #include <linux/bitops.h> | |
29 | #include <linux/clk.h> | |
30 | #include <linux/delay.h> | |
31 | #include <linux/device.h> | |
32 | #include <linux/gpio/consumer.h> | |
33 | #include <linux/i2c.h> | |
34 | #include <linux/init.h> | |
35 | #include <linux/module.h> | |
36 | #include <linux/of.h> | |
37 | #include <linux/of_graph.h> | |
38 | #include <linux/regulator/consumer.h> | |
39 | #include <linux/slab.h> | |
40 | #include <linux/types.h> | |
41 | #include <media/v4l2-ctrls.h> | |
859969b3 | 42 | #include <media/v4l2-fwnode.h> |
9cae9722 TT |
43 | #include <media/v4l2-subdev.h> |
44 | ||
45 | #define OV5645_VOLTAGE_ANALOG 2800000 | |
46 | #define OV5645_VOLTAGE_DIGITAL_CORE 1500000 | |
47 | #define OV5645_VOLTAGE_DIGITAL_IO 1800000 | |
48 | ||
49 | #define OV5645_SYSTEM_CTRL0 0x3008 | |
50 | #define OV5645_SYSTEM_CTRL0_START 0x02 | |
51 | #define OV5645_SYSTEM_CTRL0_STOP 0x42 | |
52 | #define OV5645_CHIP_ID_HIGH 0x300a | |
53 | #define OV5645_CHIP_ID_HIGH_BYTE 0x56 | |
54 | #define OV5645_CHIP_ID_LOW 0x300b | |
55 | #define OV5645_CHIP_ID_LOW_BYTE 0x45 | |
56 | #define OV5645_AWB_MANUAL_CONTROL 0x3406 | |
57 | #define OV5645_AWB_MANUAL_ENABLE BIT(0) | |
58 | #define OV5645_AEC_PK_MANUAL 0x3503 | |
59 | #define OV5645_AEC_MANUAL_ENABLE BIT(0) | |
60 | #define OV5645_AGC_MANUAL_ENABLE BIT(1) | |
61 | #define OV5645_TIMING_TC_REG20 0x3820 | |
62 | #define OV5645_SENSOR_VFLIP BIT(1) | |
63 | #define OV5645_ISP_VFLIP BIT(2) | |
64 | #define OV5645_TIMING_TC_REG21 0x3821 | |
65 | #define OV5645_SENSOR_MIRROR BIT(1) | |
66 | #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d | |
67 | #define OV5645_TEST_PATTERN_MASK 0x3 | |
68 | #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK) | |
69 | #define OV5645_TEST_PATTERN_ENABLE BIT(7) | |
70 | #define OV5645_SDE_SAT_U 0x5583 | |
71 | #define OV5645_SDE_SAT_V 0x5584 | |
72 | ||
73 | struct reg_value { | |
74 | u16 reg; | |
75 | u8 val; | |
76 | }; | |
77 | ||
78 | struct ov5645_mode_info { | |
79 | u32 width; | |
80 | u32 height; | |
81 | const struct reg_value *data; | |
82 | u32 data_size; | |
1c2177fd | 83 | u32 pixel_clock; |
e72e6cbe | 84 | u32 link_freq; |
9cae9722 TT |
85 | }; |
86 | ||
87 | struct ov5645 { | |
88 | struct i2c_client *i2c_client; | |
89 | struct device *dev; | |
90 | struct v4l2_subdev sd; | |
91 | struct media_pad pad; | |
859969b3 | 92 | struct v4l2_fwnode_endpoint ep; |
9cae9722 TT |
93 | struct v4l2_mbus_framefmt fmt; |
94 | struct v4l2_rect crop; | |
95 | struct clk *xclk; | |
96 | ||
97 | struct regulator *io_regulator; | |
98 | struct regulator *core_regulator; | |
99 | struct regulator *analog_regulator; | |
100 | ||
101 | const struct ov5645_mode_info *current_mode; | |
102 | ||
103 | struct v4l2_ctrl_handler ctrls; | |
1c2177fd | 104 | struct v4l2_ctrl *pixel_clock; |
e72e6cbe | 105 | struct v4l2_ctrl *link_freq; |
9cae9722 TT |
106 | |
107 | /* Cached register values */ | |
108 | u8 aec_pk_manual; | |
109 | u8 timing_tc_reg20; | |
110 | u8 timing_tc_reg21; | |
111 | ||
112 | struct mutex power_lock; /* lock to protect power state */ | |
113 | int power_count; | |
114 | ||
115 | struct gpio_desc *enable_gpio; | |
116 | struct gpio_desc *rst_gpio; | |
117 | }; | |
118 | ||
119 | static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd) | |
120 | { | |
121 | return container_of(sd, struct ov5645, sd); | |
122 | } | |
123 | ||
124 | static const struct reg_value ov5645_global_init_setting[] = { | |
125 | { 0x3103, 0x11 }, | |
126 | { 0x3008, 0x82 }, | |
127 | { 0x3008, 0x42 }, | |
128 | { 0x3103, 0x03 }, | |
129 | { 0x3503, 0x07 }, | |
130 | { 0x3002, 0x1c }, | |
131 | { 0x3006, 0xc3 }, | |
132 | { 0x300e, 0x45 }, | |
133 | { 0x3017, 0x00 }, | |
134 | { 0x3018, 0x00 }, | |
135 | { 0x302e, 0x0b }, | |
136 | { 0x3037, 0x13 }, | |
137 | { 0x3108, 0x01 }, | |
138 | { 0x3611, 0x06 }, | |
139 | { 0x3500, 0x00 }, | |
140 | { 0x3501, 0x01 }, | |
141 | { 0x3502, 0x00 }, | |
142 | { 0x350a, 0x00 }, | |
143 | { 0x350b, 0x3f }, | |
144 | { 0x3620, 0x33 }, | |
145 | { 0x3621, 0xe0 }, | |
146 | { 0x3622, 0x01 }, | |
147 | { 0x3630, 0x2e }, | |
148 | { 0x3631, 0x00 }, | |
149 | { 0x3632, 0x32 }, | |
150 | { 0x3633, 0x52 }, | |
151 | { 0x3634, 0x70 }, | |
152 | { 0x3635, 0x13 }, | |
153 | { 0x3636, 0x03 }, | |
154 | { 0x3703, 0x5a }, | |
155 | { 0x3704, 0xa0 }, | |
156 | { 0x3705, 0x1a }, | |
157 | { 0x3709, 0x12 }, | |
158 | { 0x370b, 0x61 }, | |
159 | { 0x370f, 0x10 }, | |
160 | { 0x3715, 0x78 }, | |
161 | { 0x3717, 0x01 }, | |
162 | { 0x371b, 0x20 }, | |
163 | { 0x3731, 0x12 }, | |
164 | { 0x3901, 0x0a }, | |
165 | { 0x3905, 0x02 }, | |
166 | { 0x3906, 0x10 }, | |
167 | { 0x3719, 0x86 }, | |
168 | { 0x3810, 0x00 }, | |
169 | { 0x3811, 0x10 }, | |
170 | { 0x3812, 0x00 }, | |
171 | { 0x3821, 0x01 }, | |
172 | { 0x3824, 0x01 }, | |
173 | { 0x3826, 0x03 }, | |
174 | { 0x3828, 0x08 }, | |
175 | { 0x3a19, 0xf8 }, | |
176 | { 0x3c01, 0x34 }, | |
177 | { 0x3c04, 0x28 }, | |
178 | { 0x3c05, 0x98 }, | |
179 | { 0x3c07, 0x07 }, | |
180 | { 0x3c09, 0xc2 }, | |
181 | { 0x3c0a, 0x9c }, | |
182 | { 0x3c0b, 0x40 }, | |
183 | { 0x3c01, 0x34 }, | |
184 | { 0x4001, 0x02 }, | |
185 | { 0x4514, 0x00 }, | |
186 | { 0x4520, 0xb0 }, | |
187 | { 0x460b, 0x37 }, | |
188 | { 0x460c, 0x20 }, | |
189 | { 0x4818, 0x01 }, | |
190 | { 0x481d, 0xf0 }, | |
191 | { 0x481f, 0x50 }, | |
192 | { 0x4823, 0x70 }, | |
193 | { 0x4831, 0x14 }, | |
194 | { 0x5000, 0xa7 }, | |
195 | { 0x5001, 0x83 }, | |
196 | { 0x501d, 0x00 }, | |
197 | { 0x501f, 0x00 }, | |
198 | { 0x503d, 0x00 }, | |
199 | { 0x505c, 0x30 }, | |
200 | { 0x5181, 0x59 }, | |
201 | { 0x5183, 0x00 }, | |
202 | { 0x5191, 0xf0 }, | |
203 | { 0x5192, 0x03 }, | |
204 | { 0x5684, 0x10 }, | |
205 | { 0x5685, 0xa0 }, | |
206 | { 0x5686, 0x0c }, | |
207 | { 0x5687, 0x78 }, | |
208 | { 0x5a00, 0x08 }, | |
209 | { 0x5a21, 0x00 }, | |
210 | { 0x5a24, 0x00 }, | |
211 | { 0x3008, 0x02 }, | |
212 | { 0x3503, 0x00 }, | |
213 | { 0x5180, 0xff }, | |
214 | { 0x5181, 0xf2 }, | |
215 | { 0x5182, 0x00 }, | |
216 | { 0x5183, 0x14 }, | |
217 | { 0x5184, 0x25 }, | |
218 | { 0x5185, 0x24 }, | |
219 | { 0x5186, 0x09 }, | |
220 | { 0x5187, 0x09 }, | |
221 | { 0x5188, 0x0a }, | |
222 | { 0x5189, 0x75 }, | |
223 | { 0x518a, 0x52 }, | |
224 | { 0x518b, 0xea }, | |
225 | { 0x518c, 0xa8 }, | |
226 | { 0x518d, 0x42 }, | |
227 | { 0x518e, 0x38 }, | |
228 | { 0x518f, 0x56 }, | |
229 | { 0x5190, 0x42 }, | |
230 | { 0x5191, 0xf8 }, | |
231 | { 0x5192, 0x04 }, | |
232 | { 0x5193, 0x70 }, | |
233 | { 0x5194, 0xf0 }, | |
234 | { 0x5195, 0xf0 }, | |
235 | { 0x5196, 0x03 }, | |
236 | { 0x5197, 0x01 }, | |
237 | { 0x5198, 0x04 }, | |
238 | { 0x5199, 0x12 }, | |
239 | { 0x519a, 0x04 }, | |
240 | { 0x519b, 0x00 }, | |
241 | { 0x519c, 0x06 }, | |
242 | { 0x519d, 0x82 }, | |
243 | { 0x519e, 0x38 }, | |
244 | { 0x5381, 0x1e }, | |
245 | { 0x5382, 0x5b }, | |
246 | { 0x5383, 0x08 }, | |
247 | { 0x5384, 0x0a }, | |
248 | { 0x5385, 0x7e }, | |
249 | { 0x5386, 0x88 }, | |
250 | { 0x5387, 0x7c }, | |
251 | { 0x5388, 0x6c }, | |
252 | { 0x5389, 0x10 }, | |
253 | { 0x538a, 0x01 }, | |
254 | { 0x538b, 0x98 }, | |
255 | { 0x5300, 0x08 }, | |
256 | { 0x5301, 0x30 }, | |
257 | { 0x5302, 0x10 }, | |
258 | { 0x5303, 0x00 }, | |
259 | { 0x5304, 0x08 }, | |
260 | { 0x5305, 0x30 }, | |
261 | { 0x5306, 0x08 }, | |
262 | { 0x5307, 0x16 }, | |
263 | { 0x5309, 0x08 }, | |
264 | { 0x530a, 0x30 }, | |
265 | { 0x530b, 0x04 }, | |
266 | { 0x530c, 0x06 }, | |
267 | { 0x5480, 0x01 }, | |
268 | { 0x5481, 0x08 }, | |
269 | { 0x5482, 0x14 }, | |
270 | { 0x5483, 0x28 }, | |
271 | { 0x5484, 0x51 }, | |
272 | { 0x5485, 0x65 }, | |
273 | { 0x5486, 0x71 }, | |
274 | { 0x5487, 0x7d }, | |
275 | { 0x5488, 0x87 }, | |
276 | { 0x5489, 0x91 }, | |
277 | { 0x548a, 0x9a }, | |
278 | { 0x548b, 0xaa }, | |
279 | { 0x548c, 0xb8 }, | |
280 | { 0x548d, 0xcd }, | |
281 | { 0x548e, 0xdd }, | |
282 | { 0x548f, 0xea }, | |
283 | { 0x5490, 0x1d }, | |
284 | { 0x5580, 0x02 }, | |
285 | { 0x5583, 0x40 }, | |
286 | { 0x5584, 0x10 }, | |
287 | { 0x5589, 0x10 }, | |
288 | { 0x558a, 0x00 }, | |
289 | { 0x558b, 0xf8 }, | |
290 | { 0x5800, 0x3f }, | |
291 | { 0x5801, 0x16 }, | |
292 | { 0x5802, 0x0e }, | |
293 | { 0x5803, 0x0d }, | |
294 | { 0x5804, 0x17 }, | |
295 | { 0x5805, 0x3f }, | |
296 | { 0x5806, 0x0b }, | |
297 | { 0x5807, 0x06 }, | |
298 | { 0x5808, 0x04 }, | |
299 | { 0x5809, 0x04 }, | |
300 | { 0x580a, 0x06 }, | |
301 | { 0x580b, 0x0b }, | |
302 | { 0x580c, 0x09 }, | |
303 | { 0x580d, 0x03 }, | |
304 | { 0x580e, 0x00 }, | |
305 | { 0x580f, 0x00 }, | |
306 | { 0x5810, 0x03 }, | |
307 | { 0x5811, 0x08 }, | |
308 | { 0x5812, 0x0a }, | |
309 | { 0x5813, 0x03 }, | |
310 | { 0x5814, 0x00 }, | |
311 | { 0x5815, 0x00 }, | |
312 | { 0x5816, 0x04 }, | |
313 | { 0x5817, 0x09 }, | |
314 | { 0x5818, 0x0f }, | |
315 | { 0x5819, 0x08 }, | |
316 | { 0x581a, 0x06 }, | |
317 | { 0x581b, 0x06 }, | |
318 | { 0x581c, 0x08 }, | |
319 | { 0x581d, 0x0c }, | |
320 | { 0x581e, 0x3f }, | |
321 | { 0x581f, 0x1e }, | |
322 | { 0x5820, 0x12 }, | |
323 | { 0x5821, 0x13 }, | |
324 | { 0x5822, 0x21 }, | |
325 | { 0x5823, 0x3f }, | |
326 | { 0x5824, 0x68 }, | |
327 | { 0x5825, 0x28 }, | |
328 | { 0x5826, 0x2c }, | |
329 | { 0x5827, 0x28 }, | |
330 | { 0x5828, 0x08 }, | |
331 | { 0x5829, 0x48 }, | |
332 | { 0x582a, 0x64 }, | |
333 | { 0x582b, 0x62 }, | |
334 | { 0x582c, 0x64 }, | |
335 | { 0x582d, 0x28 }, | |
336 | { 0x582e, 0x46 }, | |
337 | { 0x582f, 0x62 }, | |
338 | { 0x5830, 0x60 }, | |
339 | { 0x5831, 0x62 }, | |
340 | { 0x5832, 0x26 }, | |
341 | { 0x5833, 0x48 }, | |
342 | { 0x5834, 0x66 }, | |
343 | { 0x5835, 0x44 }, | |
344 | { 0x5836, 0x64 }, | |
345 | { 0x5837, 0x28 }, | |
346 | { 0x5838, 0x66 }, | |
347 | { 0x5839, 0x48 }, | |
348 | { 0x583a, 0x2c }, | |
349 | { 0x583b, 0x28 }, | |
350 | { 0x583c, 0x26 }, | |
351 | { 0x583d, 0xae }, | |
352 | { 0x5025, 0x00 }, | |
353 | { 0x3a0f, 0x30 }, | |
354 | { 0x3a10, 0x28 }, | |
355 | { 0x3a1b, 0x30 }, | |
356 | { 0x3a1e, 0x26 }, | |
357 | { 0x3a11, 0x60 }, | |
358 | { 0x3a1f, 0x14 }, | |
359 | { 0x0601, 0x02 }, | |
360 | { 0x3008, 0x42 }, | |
361 | { 0x3008, 0x02 } | |
362 | }; | |
363 | ||
364 | static const struct reg_value ov5645_setting_sxga[] = { | |
365 | { 0x3612, 0xa9 }, | |
366 | { 0x3614, 0x50 }, | |
367 | { 0x3618, 0x00 }, | |
368 | { 0x3034, 0x18 }, | |
369 | { 0x3035, 0x21 }, | |
370 | { 0x3036, 0x70 }, | |
371 | { 0x3600, 0x09 }, | |
372 | { 0x3601, 0x43 }, | |
373 | { 0x3708, 0x66 }, | |
374 | { 0x370c, 0xc3 }, | |
375 | { 0x3800, 0x00 }, | |
376 | { 0x3801, 0x00 }, | |
377 | { 0x3802, 0x00 }, | |
378 | { 0x3803, 0x06 }, | |
379 | { 0x3804, 0x0a }, | |
380 | { 0x3805, 0x3f }, | |
381 | { 0x3806, 0x07 }, | |
382 | { 0x3807, 0x9d }, | |
383 | { 0x3808, 0x05 }, | |
384 | { 0x3809, 0x00 }, | |
385 | { 0x380a, 0x03 }, | |
386 | { 0x380b, 0xc0 }, | |
387 | { 0x380c, 0x07 }, | |
388 | { 0x380d, 0x68 }, | |
389 | { 0x380e, 0x03 }, | |
390 | { 0x380f, 0xd8 }, | |
391 | { 0x3813, 0x06 }, | |
392 | { 0x3814, 0x31 }, | |
393 | { 0x3815, 0x31 }, | |
394 | { 0x3820, 0x47 }, | |
395 | { 0x3a02, 0x03 }, | |
396 | { 0x3a03, 0xd8 }, | |
397 | { 0x3a08, 0x01 }, | |
398 | { 0x3a09, 0xf8 }, | |
399 | { 0x3a0a, 0x01 }, | |
400 | { 0x3a0b, 0xa4 }, | |
401 | { 0x3a0e, 0x02 }, | |
402 | { 0x3a0d, 0x02 }, | |
403 | { 0x3a14, 0x03 }, | |
404 | { 0x3a15, 0xd8 }, | |
405 | { 0x3a18, 0x00 }, | |
406 | { 0x4004, 0x02 }, | |
407 | { 0x4005, 0x18 }, | |
408 | { 0x4300, 0x32 }, | |
409 | { 0x4202, 0x00 } | |
410 | }; | |
411 | ||
412 | static const struct reg_value ov5645_setting_1080p[] = { | |
413 | { 0x3612, 0xab }, | |
414 | { 0x3614, 0x50 }, | |
415 | { 0x3618, 0x04 }, | |
416 | { 0x3034, 0x18 }, | |
417 | { 0x3035, 0x11 }, | |
418 | { 0x3036, 0x54 }, | |
419 | { 0x3600, 0x08 }, | |
420 | { 0x3601, 0x33 }, | |
421 | { 0x3708, 0x63 }, | |
422 | { 0x370c, 0xc0 }, | |
423 | { 0x3800, 0x01 }, | |
424 | { 0x3801, 0x50 }, | |
425 | { 0x3802, 0x01 }, | |
426 | { 0x3803, 0xb2 }, | |
427 | { 0x3804, 0x08 }, | |
428 | { 0x3805, 0xef }, | |
429 | { 0x3806, 0x05 }, | |
430 | { 0x3807, 0xf1 }, | |
431 | { 0x3808, 0x07 }, | |
432 | { 0x3809, 0x80 }, | |
433 | { 0x380a, 0x04 }, | |
434 | { 0x380b, 0x38 }, | |
435 | { 0x380c, 0x09 }, | |
436 | { 0x380d, 0xc4 }, | |
437 | { 0x380e, 0x04 }, | |
438 | { 0x380f, 0x60 }, | |
439 | { 0x3813, 0x04 }, | |
440 | { 0x3814, 0x11 }, | |
441 | { 0x3815, 0x11 }, | |
442 | { 0x3820, 0x47 }, | |
443 | { 0x4514, 0x88 }, | |
444 | { 0x3a02, 0x04 }, | |
445 | { 0x3a03, 0x60 }, | |
446 | { 0x3a08, 0x01 }, | |
447 | { 0x3a09, 0x50 }, | |
448 | { 0x3a0a, 0x01 }, | |
449 | { 0x3a0b, 0x18 }, | |
450 | { 0x3a0e, 0x03 }, | |
451 | { 0x3a0d, 0x04 }, | |
452 | { 0x3a14, 0x04 }, | |
453 | { 0x3a15, 0x60 }, | |
454 | { 0x3a18, 0x00 }, | |
455 | { 0x4004, 0x06 }, | |
456 | { 0x4005, 0x18 }, | |
457 | { 0x4300, 0x32 }, | |
458 | { 0x4202, 0x00 }, | |
459 | { 0x4837, 0x0b } | |
460 | }; | |
461 | ||
462 | static const struct reg_value ov5645_setting_full[] = { | |
463 | { 0x3612, 0xab }, | |
464 | { 0x3614, 0x50 }, | |
465 | { 0x3618, 0x04 }, | |
466 | { 0x3034, 0x18 }, | |
467 | { 0x3035, 0x11 }, | |
468 | { 0x3036, 0x54 }, | |
469 | { 0x3600, 0x08 }, | |
470 | { 0x3601, 0x33 }, | |
471 | { 0x3708, 0x63 }, | |
472 | { 0x370c, 0xc0 }, | |
473 | { 0x3800, 0x00 }, | |
474 | { 0x3801, 0x00 }, | |
475 | { 0x3802, 0x00 }, | |
476 | { 0x3803, 0x00 }, | |
477 | { 0x3804, 0x0a }, | |
478 | { 0x3805, 0x3f }, | |
479 | { 0x3806, 0x07 }, | |
480 | { 0x3807, 0x9f }, | |
481 | { 0x3808, 0x0a }, | |
482 | { 0x3809, 0x20 }, | |
483 | { 0x380a, 0x07 }, | |
484 | { 0x380b, 0x98 }, | |
485 | { 0x380c, 0x0b }, | |
486 | { 0x380d, 0x1c }, | |
487 | { 0x380e, 0x07 }, | |
488 | { 0x380f, 0xb0 }, | |
489 | { 0x3813, 0x06 }, | |
490 | { 0x3814, 0x11 }, | |
491 | { 0x3815, 0x11 }, | |
492 | { 0x3820, 0x47 }, | |
493 | { 0x4514, 0x88 }, | |
494 | { 0x3a02, 0x07 }, | |
495 | { 0x3a03, 0xb0 }, | |
496 | { 0x3a08, 0x01 }, | |
497 | { 0x3a09, 0x27 }, | |
498 | { 0x3a0a, 0x00 }, | |
499 | { 0x3a0b, 0xf6 }, | |
500 | { 0x3a0e, 0x06 }, | |
501 | { 0x3a0d, 0x08 }, | |
502 | { 0x3a14, 0x07 }, | |
503 | { 0x3a15, 0xb0 }, | |
504 | { 0x3a18, 0x01 }, | |
505 | { 0x4004, 0x06 }, | |
506 | { 0x4005, 0x18 }, | |
507 | { 0x4300, 0x32 }, | |
508 | { 0x4837, 0x0b }, | |
509 | { 0x4202, 0x00 } | |
510 | }; | |
511 | ||
e72e6cbe | 512 | static const s64 link_freq[] = { |
4adb0a04 TT |
513 | 224000000, |
514 | 336000000 | |
e72e6cbe TT |
515 | }; |
516 | ||
9cae9722 TT |
517 | static const struct ov5645_mode_info ov5645_mode_info_data[] = { |
518 | { | |
519 | .width = 1280, | |
520 | .height = 960, | |
521 | .data = ov5645_setting_sxga, | |
1c2177fd | 522 | .data_size = ARRAY_SIZE(ov5645_setting_sxga), |
4adb0a04 | 523 | .pixel_clock = 112000000, |
e72e6cbe | 524 | .link_freq = 0 /* an index in link_freq[] */ |
9cae9722 TT |
525 | }, |
526 | { | |
527 | .width = 1920, | |
528 | .height = 1080, | |
529 | .data = ov5645_setting_1080p, | |
1c2177fd | 530 | .data_size = ARRAY_SIZE(ov5645_setting_1080p), |
4adb0a04 | 531 | .pixel_clock = 168000000, |
e72e6cbe | 532 | .link_freq = 1 /* an index in link_freq[] */ |
9cae9722 TT |
533 | }, |
534 | { | |
535 | .width = 2592, | |
536 | .height = 1944, | |
537 | .data = ov5645_setting_full, | |
1c2177fd | 538 | .data_size = ARRAY_SIZE(ov5645_setting_full), |
4adb0a04 | 539 | .pixel_clock = 168000000, |
e72e6cbe | 540 | .link_freq = 1 /* an index in link_freq[] */ |
9cae9722 TT |
541 | }, |
542 | }; | |
543 | ||
544 | static int ov5645_regulators_enable(struct ov5645 *ov5645) | |
545 | { | |
546 | int ret; | |
547 | ||
548 | ret = regulator_enable(ov5645->io_regulator); | |
549 | if (ret < 0) { | |
550 | dev_err(ov5645->dev, "set io voltage failed\n"); | |
551 | return ret; | |
552 | } | |
553 | ||
554 | ret = regulator_enable(ov5645->analog_regulator); | |
555 | if (ret) { | |
556 | dev_err(ov5645->dev, "set analog voltage failed\n"); | |
557 | goto err_disable_io; | |
558 | } | |
559 | ||
560 | ret = regulator_enable(ov5645->core_regulator); | |
561 | if (ret) { | |
562 | dev_err(ov5645->dev, "set core voltage failed\n"); | |
563 | goto err_disable_analog; | |
564 | } | |
565 | ||
566 | return 0; | |
567 | ||
568 | err_disable_analog: | |
569 | regulator_disable(ov5645->analog_regulator); | |
570 | err_disable_io: | |
571 | regulator_disable(ov5645->io_regulator); | |
572 | ||
573 | return ret; | |
574 | } | |
575 | ||
576 | static void ov5645_regulators_disable(struct ov5645 *ov5645) | |
577 | { | |
578 | int ret; | |
579 | ||
580 | ret = regulator_disable(ov5645->core_regulator); | |
581 | if (ret < 0) | |
582 | dev_err(ov5645->dev, "core regulator disable failed\n"); | |
583 | ||
584 | ret = regulator_disable(ov5645->analog_regulator); | |
585 | if (ret < 0) | |
586 | dev_err(ov5645->dev, "analog regulator disable failed\n"); | |
587 | ||
588 | ret = regulator_disable(ov5645->io_regulator); | |
589 | if (ret < 0) | |
590 | dev_err(ov5645->dev, "io regulator disable failed\n"); | |
591 | } | |
592 | ||
593 | static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val) | |
594 | { | |
595 | u8 regbuf[3]; | |
596 | int ret; | |
597 | ||
598 | regbuf[0] = reg >> 8; | |
599 | regbuf[1] = reg & 0xff; | |
600 | regbuf[2] = val; | |
601 | ||
602 | ret = i2c_master_send(ov5645->i2c_client, regbuf, 3); | |
70648780 | 603 | if (ret < 0) { |
9cae9722 TT |
604 | dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n", |
605 | __func__, ret, reg, val); | |
70648780 TT |
606 | return ret; |
607 | } | |
9cae9722 | 608 | |
70648780 | 609 | return 0; |
9cae9722 TT |
610 | } |
611 | ||
612 | static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val) | |
613 | { | |
614 | u8 regbuf[2]; | |
615 | int ret; | |
616 | ||
617 | regbuf[0] = reg >> 8; | |
618 | regbuf[1] = reg & 0xff; | |
619 | ||
620 | ret = i2c_master_send(ov5645->i2c_client, regbuf, 2); | |
621 | if (ret < 0) { | |
622 | dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n", | |
623 | __func__, ret, reg); | |
624 | return ret; | |
625 | } | |
626 | ||
627 | ret = i2c_master_recv(ov5645->i2c_client, val, 1); | |
628 | if (ret < 0) { | |
629 | dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n", | |
630 | __func__, ret, reg); | |
631 | return ret; | |
632 | } | |
633 | ||
634 | return 0; | |
635 | } | |
636 | ||
637 | static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode) | |
638 | { | |
639 | u8 val = ov5645->aec_pk_manual; | |
640 | int ret; | |
641 | ||
642 | if (mode == V4L2_EXPOSURE_AUTO) | |
643 | val &= ~OV5645_AEC_MANUAL_ENABLE; | |
644 | else /* V4L2_EXPOSURE_MANUAL */ | |
645 | val |= OV5645_AEC_MANUAL_ENABLE; | |
646 | ||
647 | ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val); | |
648 | if (!ret) | |
649 | ov5645->aec_pk_manual = val; | |
650 | ||
651 | return ret; | |
652 | } | |
653 | ||
654 | static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable) | |
655 | { | |
656 | u8 val = ov5645->aec_pk_manual; | |
657 | int ret; | |
658 | ||
659 | if (enable) | |
660 | val &= ~OV5645_AGC_MANUAL_ENABLE; | |
661 | else | |
662 | val |= OV5645_AGC_MANUAL_ENABLE; | |
663 | ||
664 | ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val); | |
665 | if (!ret) | |
666 | ov5645->aec_pk_manual = val; | |
667 | ||
668 | return ret; | |
669 | } | |
670 | ||
671 | static int ov5645_set_register_array(struct ov5645 *ov5645, | |
672 | const struct reg_value *settings, | |
673 | unsigned int num_settings) | |
674 | { | |
675 | unsigned int i; | |
676 | int ret; | |
677 | ||
678 | for (i = 0; i < num_settings; ++i, ++settings) { | |
679 | ret = ov5645_write_reg(ov5645, settings->reg, settings->val); | |
680 | if (ret < 0) | |
681 | return ret; | |
682 | } | |
683 | ||
684 | return 0; | |
685 | } | |
686 | ||
687 | static int ov5645_set_power_on(struct ov5645 *ov5645) | |
688 | { | |
689 | int ret; | |
690 | ||
691 | ret = ov5645_regulators_enable(ov5645); | |
692 | if (ret < 0) { | |
693 | return ret; | |
694 | } | |
695 | ||
696 | ret = clk_prepare_enable(ov5645->xclk); | |
697 | if (ret < 0) { | |
698 | dev_err(ov5645->dev, "clk prepare enable failed\n"); | |
699 | ov5645_regulators_disable(ov5645); | |
700 | return ret; | |
701 | } | |
702 | ||
703 | usleep_range(5000, 15000); | |
704 | gpiod_set_value_cansleep(ov5645->enable_gpio, 1); | |
705 | ||
706 | usleep_range(1000, 2000); | |
707 | gpiod_set_value_cansleep(ov5645->rst_gpio, 0); | |
708 | ||
709 | msleep(20); | |
710 | ||
711 | return 0; | |
712 | } | |
713 | ||
714 | static void ov5645_set_power_off(struct ov5645 *ov5645) | |
715 | { | |
716 | gpiod_set_value_cansleep(ov5645->rst_gpio, 1); | |
717 | gpiod_set_value_cansleep(ov5645->enable_gpio, 0); | |
718 | clk_disable_unprepare(ov5645->xclk); | |
719 | ov5645_regulators_disable(ov5645); | |
720 | } | |
721 | ||
722 | static int ov5645_s_power(struct v4l2_subdev *sd, int on) | |
723 | { | |
724 | struct ov5645 *ov5645 = to_ov5645(sd); | |
725 | int ret = 0; | |
726 | ||
727 | mutex_lock(&ov5645->power_lock); | |
728 | ||
729 | /* If the power count is modified from 0 to != 0 or from != 0 to 0, | |
730 | * update the power state. | |
731 | */ | |
732 | if (ov5645->power_count == !on) { | |
733 | if (on) { | |
734 | ret = ov5645_set_power_on(ov5645); | |
735 | if (ret < 0) | |
736 | goto exit; | |
737 | ||
738 | ret = ov5645_set_register_array(ov5645, | |
739 | ov5645_global_init_setting, | |
740 | ARRAY_SIZE(ov5645_global_init_setting)); | |
741 | if (ret < 0) { | |
742 | dev_err(ov5645->dev, | |
743 | "could not set init registers\n"); | |
744 | ov5645_set_power_off(ov5645); | |
745 | goto exit; | |
746 | } | |
747 | ||
748 | ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, | |
749 | OV5645_SYSTEM_CTRL0_STOP); | |
750 | if (ret < 0) { | |
751 | ov5645_set_power_off(ov5645); | |
752 | goto exit; | |
753 | } | |
754 | } else { | |
755 | ov5645_set_power_off(ov5645); | |
756 | } | |
757 | } | |
758 | ||
759 | /* Update the power count. */ | |
760 | ov5645->power_count += on ? 1 : -1; | |
761 | WARN_ON(ov5645->power_count < 0); | |
762 | ||
763 | exit: | |
764 | mutex_unlock(&ov5645->power_lock); | |
765 | ||
766 | return ret; | |
767 | } | |
768 | ||
769 | static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value) | |
770 | { | |
771 | u32 reg_value = (value * 0x10) + 0x40; | |
772 | int ret; | |
773 | ||
774 | ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value); | |
775 | if (ret < 0) | |
776 | return ret; | |
777 | ||
778 | return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value); | |
779 | } | |
780 | ||
781 | static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value) | |
782 | { | |
783 | u8 val = ov5645->timing_tc_reg21; | |
784 | int ret; | |
785 | ||
786 | if (value == 0) | |
787 | val &= ~(OV5645_SENSOR_MIRROR); | |
788 | else | |
789 | val |= (OV5645_SENSOR_MIRROR); | |
790 | ||
791 | ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val); | |
792 | if (!ret) | |
793 | ov5645->timing_tc_reg21 = val; | |
794 | ||
795 | return ret; | |
796 | } | |
797 | ||
798 | static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value) | |
799 | { | |
800 | u8 val = ov5645->timing_tc_reg20; | |
801 | int ret; | |
802 | ||
803 | if (value == 0) | |
804 | val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP); | |
805 | else | |
806 | val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP); | |
807 | ||
808 | ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val); | |
809 | if (!ret) | |
810 | ov5645->timing_tc_reg20 = val; | |
811 | ||
812 | return ret; | |
813 | } | |
814 | ||
815 | static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value) | |
816 | { | |
817 | u8 val = 0; | |
818 | ||
819 | if (value) { | |
820 | val = OV5645_SET_TEST_PATTERN(value - 1); | |
821 | val |= OV5645_TEST_PATTERN_ENABLE; | |
822 | } | |
823 | ||
824 | return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val); | |
825 | } | |
826 | ||
827 | static const char * const ov5645_test_pattern_menu[] = { | |
828 | "Disabled", | |
829 | "Vertical Color Bars", | |
830 | "Pseudo-Random Data", | |
831 | "Color Square", | |
832 | "Black Image", | |
833 | }; | |
834 | ||
835 | static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto) | |
836 | { | |
837 | u8 val = 0; | |
838 | ||
839 | if (!enable_auto) | |
840 | val = OV5645_AWB_MANUAL_ENABLE; | |
841 | ||
842 | return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val); | |
843 | } | |
844 | ||
845 | static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl) | |
846 | { | |
847 | struct ov5645 *ov5645 = container_of(ctrl->handler, | |
848 | struct ov5645, ctrls); | |
849 | int ret; | |
850 | ||
851 | mutex_lock(&ov5645->power_lock); | |
852 | if (!ov5645->power_count) { | |
853 | mutex_unlock(&ov5645->power_lock); | |
854 | return 0; | |
855 | } | |
856 | ||
857 | switch (ctrl->id) { | |
858 | case V4L2_CID_SATURATION: | |
859 | ret = ov5645_set_saturation(ov5645, ctrl->val); | |
860 | break; | |
861 | case V4L2_CID_AUTO_WHITE_BALANCE: | |
862 | ret = ov5645_set_awb(ov5645, ctrl->val); | |
863 | break; | |
864 | case V4L2_CID_AUTOGAIN: | |
865 | ret = ov5645_set_agc_mode(ov5645, ctrl->val); | |
866 | break; | |
867 | case V4L2_CID_EXPOSURE_AUTO: | |
868 | ret = ov5645_set_aec_mode(ov5645, ctrl->val); | |
869 | break; | |
870 | case V4L2_CID_TEST_PATTERN: | |
871 | ret = ov5645_set_test_pattern(ov5645, ctrl->val); | |
872 | break; | |
873 | case V4L2_CID_HFLIP: | |
874 | ret = ov5645_set_hflip(ov5645, ctrl->val); | |
875 | break; | |
876 | case V4L2_CID_VFLIP: | |
877 | ret = ov5645_set_vflip(ov5645, ctrl->val); | |
878 | break; | |
879 | default: | |
880 | ret = -EINVAL; | |
881 | break; | |
882 | } | |
883 | ||
884 | mutex_unlock(&ov5645->power_lock); | |
885 | ||
886 | return ret; | |
887 | } | |
888 | ||
d148b85e | 889 | static const struct v4l2_ctrl_ops ov5645_ctrl_ops = { |
9cae9722 TT |
890 | .s_ctrl = ov5645_s_ctrl, |
891 | }; | |
892 | ||
893 | static int ov5645_enum_mbus_code(struct v4l2_subdev *sd, | |
894 | struct v4l2_subdev_pad_config *cfg, | |
895 | struct v4l2_subdev_mbus_code_enum *code) | |
896 | { | |
897 | if (code->index > 0) | |
898 | return -EINVAL; | |
899 | ||
900 | code->code = MEDIA_BUS_FMT_UYVY8_2X8; | |
901 | ||
902 | return 0; | |
903 | } | |
904 | ||
905 | static int ov5645_enum_frame_size(struct v4l2_subdev *subdev, | |
906 | struct v4l2_subdev_pad_config *cfg, | |
907 | struct v4l2_subdev_frame_size_enum *fse) | |
908 | { | |
909 | if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8) | |
910 | return -EINVAL; | |
911 | ||
912 | if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data)) | |
913 | return -EINVAL; | |
914 | ||
915 | fse->min_width = ov5645_mode_info_data[fse->index].width; | |
916 | fse->max_width = ov5645_mode_info_data[fse->index].width; | |
917 | fse->min_height = ov5645_mode_info_data[fse->index].height; | |
918 | fse->max_height = ov5645_mode_info_data[fse->index].height; | |
919 | ||
920 | return 0; | |
921 | } | |
922 | ||
923 | static struct v4l2_mbus_framefmt * | |
924 | __ov5645_get_pad_format(struct ov5645 *ov5645, | |
925 | struct v4l2_subdev_pad_config *cfg, | |
926 | unsigned int pad, | |
927 | enum v4l2_subdev_format_whence which) | |
928 | { | |
929 | switch (which) { | |
930 | case V4L2_SUBDEV_FORMAT_TRY: | |
931 | return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad); | |
932 | case V4L2_SUBDEV_FORMAT_ACTIVE: | |
933 | return &ov5645->fmt; | |
934 | default: | |
935 | return NULL; | |
936 | } | |
937 | } | |
938 | ||
939 | static int ov5645_get_format(struct v4l2_subdev *sd, | |
940 | struct v4l2_subdev_pad_config *cfg, | |
941 | struct v4l2_subdev_format *format) | |
942 | { | |
943 | struct ov5645 *ov5645 = to_ov5645(sd); | |
944 | ||
945 | format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad, | |
946 | format->which); | |
947 | return 0; | |
948 | } | |
949 | ||
950 | static struct v4l2_rect * | |
951 | __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg, | |
952 | unsigned int pad, enum v4l2_subdev_format_whence which) | |
953 | { | |
954 | switch (which) { | |
955 | case V4L2_SUBDEV_FORMAT_TRY: | |
956 | return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad); | |
957 | case V4L2_SUBDEV_FORMAT_ACTIVE: | |
958 | return &ov5645->crop; | |
959 | default: | |
960 | return NULL; | |
961 | } | |
962 | } | |
963 | ||
9cae9722 TT |
964 | static int ov5645_set_format(struct v4l2_subdev *sd, |
965 | struct v4l2_subdev_pad_config *cfg, | |
966 | struct v4l2_subdev_format *format) | |
967 | { | |
968 | struct ov5645 *ov5645 = to_ov5645(sd); | |
969 | struct v4l2_mbus_framefmt *__format; | |
970 | struct v4l2_rect *__crop; | |
971 | const struct ov5645_mode_info *new_mode; | |
1c2177fd | 972 | int ret; |
9cae9722 TT |
973 | |
974 | __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad, | |
975 | format->which); | |
976 | ||
5b81c53c TT |
977 | new_mode = v4l2_find_nearest_size(ov5645_mode_info_data, |
978 | ARRAY_SIZE(ov5645_mode_info_data), | |
979 | width, height, | |
980 | format->format.width, format->format.height); | |
981 | ||
9cae9722 TT |
982 | __crop->width = new_mode->width; |
983 | __crop->height = new_mode->height; | |
984 | ||
1c2177fd TT |
985 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { |
986 | ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock, | |
987 | new_mode->pixel_clock); | |
988 | if (ret < 0) | |
989 | return ret; | |
990 | ||
e72e6cbe TT |
991 | ret = v4l2_ctrl_s_ctrl(ov5645->link_freq, |
992 | new_mode->link_freq); | |
993 | if (ret < 0) | |
994 | return ret; | |
995 | ||
9cae9722 | 996 | ov5645->current_mode = new_mode; |
1c2177fd | 997 | } |
9cae9722 TT |
998 | |
999 | __format = __ov5645_get_pad_format(ov5645, cfg, format->pad, | |
1000 | format->which); | |
1001 | __format->width = __crop->width; | |
1002 | __format->height = __crop->height; | |
1003 | __format->code = MEDIA_BUS_FMT_UYVY8_2X8; | |
1004 | __format->field = V4L2_FIELD_NONE; | |
1005 | __format->colorspace = V4L2_COLORSPACE_SRGB; | |
1006 | ||
1007 | format->format = *__format; | |
1008 | ||
1009 | return 0; | |
1010 | } | |
1011 | ||
1012 | static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev, | |
1013 | struct v4l2_subdev_pad_config *cfg) | |
1014 | { | |
1015 | struct v4l2_subdev_format fmt = { 0 }; | |
1016 | ||
1017 | fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; | |
1018 | fmt.format.width = 1920; | |
1019 | fmt.format.height = 1080; | |
1020 | ||
1021 | ov5645_set_format(subdev, cfg, &fmt); | |
1022 | ||
1023 | return 0; | |
1024 | } | |
1025 | ||
1026 | static int ov5645_get_selection(struct v4l2_subdev *sd, | |
1027 | struct v4l2_subdev_pad_config *cfg, | |
1028 | struct v4l2_subdev_selection *sel) | |
1029 | { | |
1030 | struct ov5645 *ov5645 = to_ov5645(sd); | |
1031 | ||
1032 | if (sel->target != V4L2_SEL_TGT_CROP) | |
1033 | return -EINVAL; | |
1034 | ||
1035 | sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad, | |
1036 | sel->which); | |
1037 | return 0; | |
1038 | } | |
1039 | ||
1040 | static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable) | |
1041 | { | |
1042 | struct ov5645 *ov5645 = to_ov5645(subdev); | |
1043 | int ret; | |
1044 | ||
1045 | if (enable) { | |
1046 | ret = ov5645_set_register_array(ov5645, | |
1047 | ov5645->current_mode->data, | |
1048 | ov5645->current_mode->data_size); | |
1049 | if (ret < 0) { | |
1050 | dev_err(ov5645->dev, "could not set mode %dx%d\n", | |
1051 | ov5645->current_mode->width, | |
1052 | ov5645->current_mode->height); | |
1053 | return ret; | |
1054 | } | |
1055 | ret = v4l2_ctrl_handler_setup(&ov5645->ctrls); | |
1056 | if (ret < 0) { | |
1057 | dev_err(ov5645->dev, "could not sync v4l2 controls\n"); | |
1058 | return ret; | |
1059 | } | |
1060 | ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, | |
1061 | OV5645_SYSTEM_CTRL0_START); | |
1062 | if (ret < 0) | |
1063 | return ret; | |
1064 | } else { | |
1065 | ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0, | |
1066 | OV5645_SYSTEM_CTRL0_STOP); | |
1067 | if (ret < 0) | |
1068 | return ret; | |
1069 | } | |
1070 | ||
1071 | return 0; | |
1072 | } | |
1073 | ||
1074 | static const struct v4l2_subdev_core_ops ov5645_core_ops = { | |
1075 | .s_power = ov5645_s_power, | |
1076 | }; | |
1077 | ||
1078 | static const struct v4l2_subdev_video_ops ov5645_video_ops = { | |
1079 | .s_stream = ov5645_s_stream, | |
1080 | }; | |
1081 | ||
1082 | static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = { | |
1083 | .init_cfg = ov5645_entity_init_cfg, | |
1084 | .enum_mbus_code = ov5645_enum_mbus_code, | |
1085 | .enum_frame_size = ov5645_enum_frame_size, | |
1086 | .get_fmt = ov5645_get_format, | |
1087 | .set_fmt = ov5645_set_format, | |
1088 | .get_selection = ov5645_get_selection, | |
1089 | }; | |
1090 | ||
1091 | static const struct v4l2_subdev_ops ov5645_subdev_ops = { | |
1092 | .core = &ov5645_core_ops, | |
1093 | .video = &ov5645_video_ops, | |
1094 | .pad = &ov5645_subdev_pad_ops, | |
1095 | }; | |
1096 | ||
1097 | static int ov5645_probe(struct i2c_client *client, | |
1098 | const struct i2c_device_id *id) | |
1099 | { | |
1100 | struct device *dev = &client->dev; | |
1101 | struct device_node *endpoint; | |
1102 | struct ov5645 *ov5645; | |
1103 | u8 chip_id_high, chip_id_low; | |
1104 | u32 xclk_freq; | |
1105 | int ret; | |
1106 | ||
1107 | ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL); | |
1108 | if (!ov5645) | |
1109 | return -ENOMEM; | |
1110 | ||
1111 | ov5645->i2c_client = client; | |
1112 | ov5645->dev = dev; | |
1113 | ||
1114 | endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); | |
1115 | if (!endpoint) { | |
1116 | dev_err(dev, "endpoint node not found\n"); | |
1117 | return -EINVAL; | |
1118 | } | |
1119 | ||
859969b3 SA |
1120 | ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), |
1121 | &ov5645->ep); | |
06fe9323 AM |
1122 | |
1123 | of_node_put(endpoint); | |
1124 | ||
9cae9722 TT |
1125 | if (ret < 0) { |
1126 | dev_err(dev, "parsing endpoint node failed\n"); | |
1127 | return ret; | |
1128 | } | |
1129 | ||
2d95e7ed | 1130 | if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) { |
9cae9722 TT |
1131 | dev_err(dev, "invalid bus type, must be CSI2\n"); |
1132 | return -EINVAL; | |
1133 | } | |
1134 | ||
1135 | /* get system clock (xclk) */ | |
1136 | ov5645->xclk = devm_clk_get(dev, "xclk"); | |
1137 | if (IS_ERR(ov5645->xclk)) { | |
1138 | dev_err(dev, "could not get xclk"); | |
1139 | return PTR_ERR(ov5645->xclk); | |
1140 | } | |
1141 | ||
1142 | ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq); | |
1143 | if (ret) { | |
1144 | dev_err(dev, "could not get xclk frequency\n"); | |
1145 | return ret; | |
1146 | } | |
1147 | ||
4adb0a04 TT |
1148 | /* external clock must be 24MHz, allow 1% tolerance */ |
1149 | if (xclk_freq < 23760000 || xclk_freq > 24240000) { | |
9cae9722 TT |
1150 | dev_err(dev, "external clock frequency %u is not supported\n", |
1151 | xclk_freq); | |
1152 | return -EINVAL; | |
1153 | } | |
1154 | ||
1155 | ret = clk_set_rate(ov5645->xclk, xclk_freq); | |
1156 | if (ret) { | |
1157 | dev_err(dev, "could not set xclk frequency\n"); | |
1158 | return ret; | |
1159 | } | |
1160 | ||
1161 | ov5645->io_regulator = devm_regulator_get(dev, "vdddo"); | |
1162 | if (IS_ERR(ov5645->io_regulator)) { | |
1163 | dev_err(dev, "cannot get io regulator\n"); | |
1164 | return PTR_ERR(ov5645->io_regulator); | |
1165 | } | |
1166 | ||
1167 | ret = regulator_set_voltage(ov5645->io_regulator, | |
1168 | OV5645_VOLTAGE_DIGITAL_IO, | |
1169 | OV5645_VOLTAGE_DIGITAL_IO); | |
1170 | if (ret < 0) { | |
1171 | dev_err(dev, "cannot set io voltage\n"); | |
1172 | return ret; | |
1173 | } | |
1174 | ||
1175 | ov5645->core_regulator = devm_regulator_get(dev, "vddd"); | |
1176 | if (IS_ERR(ov5645->core_regulator)) { | |
1177 | dev_err(dev, "cannot get core regulator\n"); | |
1178 | return PTR_ERR(ov5645->core_regulator); | |
1179 | } | |
1180 | ||
1181 | ret = regulator_set_voltage(ov5645->core_regulator, | |
1182 | OV5645_VOLTAGE_DIGITAL_CORE, | |
1183 | OV5645_VOLTAGE_DIGITAL_CORE); | |
1184 | if (ret < 0) { | |
1185 | dev_err(dev, "cannot set core voltage\n"); | |
1186 | return ret; | |
1187 | } | |
1188 | ||
1189 | ov5645->analog_regulator = devm_regulator_get(dev, "vdda"); | |
1190 | if (IS_ERR(ov5645->analog_regulator)) { | |
1191 | dev_err(dev, "cannot get analog regulator\n"); | |
1192 | return PTR_ERR(ov5645->analog_regulator); | |
1193 | } | |
1194 | ||
1195 | ret = regulator_set_voltage(ov5645->analog_regulator, | |
1196 | OV5645_VOLTAGE_ANALOG, | |
1197 | OV5645_VOLTAGE_ANALOG); | |
1198 | if (ret < 0) { | |
1199 | dev_err(dev, "cannot set analog voltage\n"); | |
1200 | return ret; | |
1201 | } | |
1202 | ||
1203 | ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH); | |
1204 | if (IS_ERR(ov5645->enable_gpio)) { | |
1205 | dev_err(dev, "cannot get enable gpio\n"); | |
1206 | return PTR_ERR(ov5645->enable_gpio); | |
1207 | } | |
1208 | ||
1209 | ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); | |
1210 | if (IS_ERR(ov5645->rst_gpio)) { | |
1211 | dev_err(dev, "cannot get reset gpio\n"); | |
1212 | return PTR_ERR(ov5645->rst_gpio); | |
1213 | } | |
1214 | ||
1215 | mutex_init(&ov5645->power_lock); | |
1216 | ||
e72e6cbe | 1217 | v4l2_ctrl_handler_init(&ov5645->ctrls, 9); |
9cae9722 TT |
1218 | v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, |
1219 | V4L2_CID_SATURATION, -4, 4, 1, 0); | |
1220 | v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, | |
1221 | V4L2_CID_HFLIP, 0, 1, 1, 0); | |
1222 | v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, | |
1223 | V4L2_CID_VFLIP, 0, 1, 1, 0); | |
1224 | v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, | |
1225 | V4L2_CID_AUTOGAIN, 0, 1, 1, 1); | |
1226 | v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops, | |
1227 | V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); | |
1228 | v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops, | |
1229 | V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, | |
1230 | 0, V4L2_EXPOSURE_AUTO); | |
1231 | v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops, | |
1232 | V4L2_CID_TEST_PATTERN, | |
1233 | ARRAY_SIZE(ov5645_test_pattern_menu) - 1, | |
1234 | 0, 0, ov5645_test_pattern_menu); | |
1c2177fd TT |
1235 | ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls, |
1236 | &ov5645_ctrl_ops, | |
1237 | V4L2_CID_PIXEL_RATE, | |
1238 | 1, INT_MAX, 1, 1); | |
e72e6cbe TT |
1239 | ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls, |
1240 | &ov5645_ctrl_ops, | |
1241 | V4L2_CID_LINK_FREQ, | |
1242 | ARRAY_SIZE(link_freq) - 1, | |
1243 | 0, link_freq); | |
1244 | if (ov5645->link_freq) | |
1245 | ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; | |
9cae9722 TT |
1246 | |
1247 | ov5645->sd.ctrl_handler = &ov5645->ctrls; | |
1248 | ||
1249 | if (ov5645->ctrls.error) { | |
1250 | dev_err(dev, "%s: control initialization error %d\n", | |
1251 | __func__, ov5645->ctrls.error); | |
1252 | ret = ov5645->ctrls.error; | |
1253 | goto free_ctrl; | |
1254 | } | |
1255 | ||
1256 | v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops); | |
1257 | ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; | |
1258 | ov5645->pad.flags = MEDIA_PAD_FL_SOURCE; | |
1259 | ov5645->sd.dev = &client->dev; | |
f7b51859 | 1260 | ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; |
9cae9722 TT |
1261 | |
1262 | ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad); | |
1263 | if (ret < 0) { | |
1264 | dev_err(dev, "could not register media entity\n"); | |
1265 | goto free_ctrl; | |
1266 | } | |
1267 | ||
1268 | ret = ov5645_s_power(&ov5645->sd, true); | |
1269 | if (ret < 0) { | |
1270 | dev_err(dev, "could not power up OV5645\n"); | |
1271 | goto free_entity; | |
1272 | } | |
1273 | ||
1274 | ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high); | |
1275 | if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) { | |
1276 | dev_err(dev, "could not read ID high\n"); | |
1277 | ret = -ENODEV; | |
1278 | goto power_down; | |
1279 | } | |
1280 | ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low); | |
1281 | if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) { | |
1282 | dev_err(dev, "could not read ID low\n"); | |
1283 | ret = -ENODEV; | |
1284 | goto power_down; | |
1285 | } | |
1286 | ||
1287 | dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr); | |
1288 | ||
1289 | ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL, | |
1290 | &ov5645->aec_pk_manual); | |
1291 | if (ret < 0) { | |
1292 | dev_err(dev, "could not read AEC/AGC mode\n"); | |
1293 | ret = -ENODEV; | |
1294 | goto power_down; | |
1295 | } | |
1296 | ||
1297 | ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20, | |
1298 | &ov5645->timing_tc_reg20); | |
1299 | if (ret < 0) { | |
1300 | dev_err(dev, "could not read vflip value\n"); | |
1301 | ret = -ENODEV; | |
1302 | goto power_down; | |
1303 | } | |
1304 | ||
1305 | ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21, | |
1306 | &ov5645->timing_tc_reg21); | |
1307 | if (ret < 0) { | |
1308 | dev_err(dev, "could not read hflip value\n"); | |
1309 | ret = -ENODEV; | |
1310 | goto power_down; | |
1311 | } | |
1312 | ||
1313 | ov5645_s_power(&ov5645->sd, false); | |
1314 | ||
1315 | ret = v4l2_async_register_subdev(&ov5645->sd); | |
1316 | if (ret < 0) { | |
1317 | dev_err(dev, "could not register v4l2 device\n"); | |
1318 | goto free_entity; | |
1319 | } | |
1320 | ||
1321 | ov5645_entity_init_cfg(&ov5645->sd, NULL); | |
1322 | ||
1323 | return 0; | |
1324 | ||
1325 | power_down: | |
1326 | ov5645_s_power(&ov5645->sd, false); | |
1327 | free_entity: | |
1328 | media_entity_cleanup(&ov5645->sd.entity); | |
1329 | free_ctrl: | |
1330 | v4l2_ctrl_handler_free(&ov5645->ctrls); | |
1331 | mutex_destroy(&ov5645->power_lock); | |
1332 | ||
1333 | return ret; | |
1334 | } | |
1335 | ||
1336 | static int ov5645_remove(struct i2c_client *client) | |
1337 | { | |
1338 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
1339 | struct ov5645 *ov5645 = to_ov5645(sd); | |
1340 | ||
1341 | v4l2_async_unregister_subdev(&ov5645->sd); | |
1342 | media_entity_cleanup(&ov5645->sd.entity); | |
1343 | v4l2_ctrl_handler_free(&ov5645->ctrls); | |
1344 | mutex_destroy(&ov5645->power_lock); | |
1345 | ||
1346 | return 0; | |
1347 | } | |
1348 | ||
1349 | static const struct i2c_device_id ov5645_id[] = { | |
1350 | { "ov5645", 0 }, | |
1351 | {} | |
1352 | }; | |
1353 | MODULE_DEVICE_TABLE(i2c, ov5645_id); | |
1354 | ||
1355 | static const struct of_device_id ov5645_of_match[] = { | |
1356 | { .compatible = "ovti,ov5645" }, | |
1357 | { /* sentinel */ } | |
1358 | }; | |
1359 | MODULE_DEVICE_TABLE(of, ov5645_of_match); | |
1360 | ||
1361 | static struct i2c_driver ov5645_i2c_driver = { | |
1362 | .driver = { | |
1363 | .of_match_table = of_match_ptr(ov5645_of_match), | |
1364 | .name = "ov5645", | |
1365 | }, | |
1366 | .probe = ov5645_probe, | |
1367 | .remove = ov5645_remove, | |
1368 | .id_table = ov5645_id, | |
1369 | }; | |
1370 | ||
1371 | module_i2c_driver(ov5645_i2c_driver); | |
1372 | ||
1373 | MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver"); | |
1374 | MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>"); | |
1375 | MODULE_LICENSE("GPL v2"); |