projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
media: ov5640: correct comments for default VGA to avoid confusion
[linux-2.6-block.git] / drivers / media / i2c / ov5640.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
19a81c14
SL		 2/*
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
19a81c14
SL		 5 */
6
7#include <linux/clk.h>
8#include <linux/clk-provider.h>
9#include <linux/clkdev.h>
10#include <linux/ctype.h>
11#include <linux/delay.h>
12#include <linux/device.h>
41d8d7f5 13#include <linux/gpio/consumer.h>
19a81c14
SL		 14#include <linux/i2c.h>
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/of_device.h>
85644a9b 18#include <linux/pm_runtime.h>
41d8d7f5 19#include <linux/regulator/consumer.h>
19a81c14
SL		 20#include <linux/slab.h>
21#include <linux/types.h>
19a81c14
SL		 22#include <media/v4l2-async.h>
23#include <media/v4l2-ctrls.h>
24#include <media/v4l2-device.h>
2d18fbc5 25#include <media/v4l2-event.h>
19a81c14
SL		 26#include <media/v4l2-fwnode.h>
27#include <media/v4l2-subdev.h>
28
29/* min/typical/max system clock (xclk) frequencies */
30#define OV5640_XCLK_MIN 6000000
41cb1c73 31#define OV5640_XCLK_MAX 54000000
19a81c14 32
5113d5b3
JM		 33#define OV5640_NATIVE_WIDTH 2624
34#define OV5640_NATIVE_HEIGHT 1964
35#define OV5640_PIXEL_ARRAY_TOP 14
36#define OV5640_PIXEL_ARRAY_LEFT 16
37#define OV5640_PIXEL_ARRAY_WIDTH 2592
38#define OV5640_PIXEL_ARRAY_HEIGHT 1944
39
bce93b82
JM		 40/* FIXME: not documented. */
41#define OV5640_MIN_VBLANK 24
42#define OV5640_MAX_VTS 3375
43
19a81c14
SL		 44#define OV5640_DEFAULT_SLAVE_ID 0x3c
45
3c28588f
JM		 46#define OV5640_LINK_RATE_MAX 490000000U
47
d47c4126
HF		 48#define OV5640_REG_SYS_RESET02 0x3002
49#define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
f22996db 50#define OV5640_REG_SYS_CTRL0 0x3008
3b987d70
LP		 51#define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
52#define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
decea0a9 53#define OV5640_REG_SYS_CTRL0_SW_RST 0x82
19a81c14 54#define OV5640_REG_CHIP_ID 0x300a
f22996db
HF		 55#define OV5640_REG_IO_MIPI_CTRL00 0x300e
56#define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
57#define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
19a81c14 58#define OV5640_REG_PAD_OUTPUT00 0x3019
f22996db 59#define OV5640_REG_SYSTEM_CONTROL1 0x302e
19a81c14
SL		 60#define OV5640_REG_SC_PLL_CTRL0 0x3034
61#define OV5640_REG_SC_PLL_CTRL1 0x3035
62#define OV5640_REG_SC_PLL_CTRL2 0x3036
63#define OV5640_REG_SC_PLL_CTRL3 0x3037
64#define OV5640_REG_SLAVE_ID 0x3100
f22996db 65#define OV5640_REG_SCCB_SYS_CTRL1 0x3103
19a81c14
SL		 66#define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
67#define OV5640_REG_AWB_R_GAIN 0x3400
68#define OV5640_REG_AWB_G_GAIN 0x3402
69#define OV5640_REG_AWB_B_GAIN 0x3404
70#define OV5640_REG_AWB_MANUAL_CTRL 0x3406
71#define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
72#define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
73#define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
74#define OV5640_REG_AEC_PK_MANUAL 0x3503
75#define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
76#define OV5640_REG_AEC_PK_VTS 0x350c
3145efcd
JM		 77#define OV5640_REG_TIMING_HS 0x3800
78#define OV5640_REG_TIMING_VS 0x3802
79#define OV5640_REG_TIMING_HW 0x3804
80#define OV5640_REG_TIMING_VH 0x3806
86633417
MR		 81#define OV5640_REG_TIMING_DVPHO 0x3808
82#define OV5640_REG_TIMING_DVPVO 0x380a
19a81c14
SL		 83#define OV5640_REG_TIMING_HTS 0x380c
84#define OV5640_REG_TIMING_VTS 0x380e
3145efcd
JM		 85#define OV5640_REG_TIMING_HOFFS 0x3810
86#define OV5640_REG_TIMING_VOFFS 0x3812
ce85705a 87#define OV5640_REG_TIMING_TC_REG20 0x3820
19a81c14
SL		 88#define OV5640_REG_TIMING_TC_REG21 0x3821
89#define OV5640_REG_AEC_CTRL00 0x3a00
90#define OV5640_REG_AEC_B50_STEP 0x3a08
91#define OV5640_REG_AEC_B60_STEP 0x3a0a
92#define OV5640_REG_AEC_CTRL0D 0x3a0d
93#define OV5640_REG_AEC_CTRL0E 0x3a0e
94#define OV5640_REG_AEC_CTRL0F 0x3a0f
95#define OV5640_REG_AEC_CTRL10 0x3a10
96#define OV5640_REG_AEC_CTRL11 0x3a11
97#define OV5640_REG_AEC_CTRL1B 0x3a1b
98#define OV5640_REG_AEC_CTRL1E 0x3a1e
99#define OV5640_REG_AEC_CTRL1F 0x3a1f
100#define OV5640_REG_HZ5060_CTRL00 0x3c00
101#define OV5640_REG_HZ5060_CTRL01 0x3c01
102#define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
103#define OV5640_REG_FRAME_CTRL01 0x4202
e3ee691d 104#define OV5640_REG_FORMAT_CONTROL00 0x4300
7cb013b1
CYT		 105#define OV5640_REG_VFIFO_HSIZE 0x4602
106#define OV5640_REG_VFIFO_VSIZE 0x4604
2b5c18f9 107#define OV5640_REG_JPG_MODE_SELECT 0x4713
4039b037 108#define OV5640_REG_CCIR656_CTRL00 0x4730
f22996db 109#define OV5640_REG_POLARITY_CTRL00 0x4740
19a81c14
SL		 110#define OV5640_REG_MIPI_CTRL00 0x4800
111#define OV5640_REG_DEBUG_MODE 0x4814
6c957ed7 112#define OV5640_REG_PCLK_PERIOD 0x4837
e3ee691d 113#define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
19a81c14
SL		 114#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
115#define OV5640_REG_SDE_CTRL0 0x5580
116#define OV5640_REG_SDE_CTRL1 0x5581
117#define OV5640_REG_SDE_CTRL3 0x5583
118#define OV5640_REG_SDE_CTRL4 0x5584
119#define OV5640_REG_SDE_CTRL5 0x5585
120#define OV5640_REG_AVG_READOUT 0x56a1
121
122enum ov5640_mode_id {
32ea5e05
HF		 123 OV5640_MODE_QQVGA_160_120 = 0,
124 OV5640_MODE_QCIF_176_144,
19a81c14
SL		 125 OV5640_MODE_QVGA_320_240,
126 OV5640_MODE_VGA_640_480,
127 OV5640_MODE_NTSC_720_480,
128 OV5640_MODE_PAL_720_576,
129 OV5640_MODE_XGA_1024_768,
130 OV5640_MODE_720P_1280_720,
131 OV5640_MODE_1080P_1920_1080,
132 OV5640_MODE_QSXGA_2592_1944,
133 OV5640_NUM_MODES,
134};
135
136enum ov5640_frame_rate {
137 OV5640_15_FPS = 0,
138 OV5640_30_FPS,
e823fb16 139 OV5640_60_FPS,
19a81c14
SL		 140 OV5640_NUM_FRAMERATES,
141};
142
22845bf2
JM		 143enum ov5640_pixel_rate_id {
144 OV5640_PIXEL_RATE_168M,
145 OV5640_PIXEL_RATE_148M,
146 OV5640_PIXEL_RATE_124M,
147 OV5640_PIXEL_RATE_96M,
148 OV5640_PIXEL_RATE_48M,
149 OV5640_NUM_PIXEL_RATES,
150};
151
152/*
153 * The chip manual suggests 24/48/96/192 MHz pixel clocks.
154 *
155 * 192MHz exceeds the sysclk limits; use 168MHz as maximum pixel rate for
156 * full resolution mode @15 FPS.
157 */
158static const u32 ov5640_pixel_rates[] = {
159 [OV5640_PIXEL_RATE_168M] = 168000000,
160 [OV5640_PIXEL_RATE_148M] = 148000000,
161 [OV5640_PIXEL_RATE_124M] = 124000000,
162 [OV5640_PIXEL_RATE_96M] = 96000000,
163 [OV5640_PIXEL_RATE_48M] = 48000000,
164};
165
7a3b8d4b
JM		 166/*
167 * MIPI CSI-2 link frequencies.
168 *
169 * Derived from the above defined pixel rate for bpp = (8, 16, 24) and
170 * data_lanes = (1, 2)
171 *
172 * link_freq = (pixel_rate * bpp) / (2 * data_lanes)
173 */
174static const s64 ov5640_csi2_link_freqs[] = {
175 992000000, 888000000, 768000000, 744000000, 672000000, 672000000,
176 592000000, 592000000, 576000000, 576000000, 496000000, 496000000,
177 384000000, 384000000, 384000000, 336000000, 296000000, 288000000,
178 248000000, 192000000, 192000000, 192000000, 96000000,
179};
180
181/* Link freq for default mode: UYVY 16 bpp, 2 data lanes. */
182#define OV5640_DEFAULT_LINK_FREQ 13
183
b7ed3abd
LP		 184enum ov5640_format_mux {
185 OV5640_FMT_MUX_YUV422 = 0,
186 OV5640_FMT_MUX_RGB,
187 OV5640_FMT_MUX_DITHER,
188 OV5640_FMT_MUX_RAW_DPC,
189 OV5640_FMT_MUX_SNR_RAW,
190 OV5640_FMT_MUX_RAW_CIP,
191};
192
a89f14bb 193struct ov5640_pixfmt {
e3ee691d
HF		 194 u32 code;
195 u32 colorspace;
2d7671f6 196 u8 bpp;
935fbc94
JM		 197 u8 ctrl00;
198 enum ov5640_format_mux mux;
a89f14bb
JM		 199};
200
201static const struct ov5640_pixfmt ov5640_dvp_formats[] = {
2d7671f6 202 {
935fbc94
JM		 203 /* YUV422, YUYV */
204 .code = MEDIA_BUS_FMT_JPEG_1X8,
205 .colorspace = V4L2_COLORSPACE_JPEG,
206 .bpp = 16,
207 .ctrl00 = 0x30,
208 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 209 }, {
935fbc94
JM		 210 /* YUV422, UYVY */
211 .code = MEDIA_BUS_FMT_UYVY8_2X8,
212 .colorspace = V4L2_COLORSPACE_SRGB,
213 .bpp = 16,
214 .ctrl00 = 0x3f,
215 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 216 }, {
935fbc94
JM		 217 /* YUV422, YUYV */
218 .code = MEDIA_BUS_FMT_YUYV8_2X8,
219 .colorspace = V4L2_COLORSPACE_SRGB,
220 .bpp = 16,
221 .ctrl00 = 0x30,
222 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 223 }, {
935fbc94
JM		 224 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
225 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
226 .colorspace = V4L2_COLORSPACE_SRGB,
227 .bpp = 16,
228 .ctrl00 = 0x6f,
229 .mux = OV5640_FMT_MUX_RGB,
2d7671f6 230 }, {
935fbc94
JM		 231 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
232 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
233 .colorspace = V4L2_COLORSPACE_SRGB,
234 .bpp = 16,
235 .ctrl00 = 0x61,
236 .mux = OV5640_FMT_MUX_RGB,
2d7671f6 237 }, {
935fbc94
JM		 238 /* Raw, BGBG... / GRGR... */
239 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
240 .colorspace = V4L2_COLORSPACE_SRGB,
241 .bpp = 8,
242 .ctrl00 = 0x00,
243 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb 244 }, {
935fbc94
JM		 245 /* Raw bayer, GBGB... / RGRG... */
246 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
247 .colorspace = V4L2_COLORSPACE_SRGB,
248 .bpp = 8,
249 .ctrl00 = 0x01,
250 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb 251 }, {
935fbc94
JM		 252 /* Raw bayer, GRGR... / BGBG... */
253 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
254 .colorspace = V4L2_COLORSPACE_SRGB,
255 .bpp = 8,
256 .ctrl00 = 0x02,
257 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb 258 }, {
935fbc94
JM		 259 /* Raw bayer, RGRG... / GBGB... */
260 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
261 .colorspace = V4L2_COLORSPACE_SRGB,
262 .bpp = 8,
263 .ctrl00 = 0x03,
264 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb
JM		 265 },
266 { /* sentinel */ }
267};
268
269static const struct ov5640_pixfmt ov5640_csi2_formats[] = {
270 {
935fbc94
JM		 271 /* YUV422, YUYV */
272 .code = MEDIA_BUS_FMT_JPEG_1X8,
273 .colorspace = V4L2_COLORSPACE_JPEG,
274 .bpp = 16,
275 .ctrl00 = 0x30,
276 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 277 }, {
935fbc94
JM		 278 /* YUV422, UYVY */
279 .code = MEDIA_BUS_FMT_UYVY8_1X16,
280 .colorspace = V4L2_COLORSPACE_SRGB,
281 .bpp = 16,
282 .ctrl00 = 0x3f,
283 .mux = OV5640_FMT_MUX_YUV422,
a89f14bb 284 }, {
935fbc94
JM		 285 /* YUV422, YUYV */
286 .code = MEDIA_BUS_FMT_YUYV8_1X16,
287 .colorspace = V4L2_COLORSPACE_SRGB,
288 .bpp = 16,
289 .ctrl00 = 0x30,
290 .mux = OV5640_FMT_MUX_YUV422,
0a43fcd7 291 }, {
935fbc94
JM		 292 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
293 .code = MEDIA_BUS_FMT_RGB565_1X16,
294 .colorspace = V4L2_COLORSPACE_SRGB,
295 .bpp = 16,
296 .ctrl00 = 0x6f,
297 .mux = OV5640_FMT_MUX_RGB,
6ac98b41 298 }, {
935fbc94
JM		 299 /* BGR888: RGB */
300 .code = MEDIA_BUS_FMT_BGR888_1X24,
301 .colorspace = V4L2_COLORSPACE_SRGB,
302 .bpp = 24,
303 .ctrl00 = 0x23,
304 .mux = OV5640_FMT_MUX_RGB,
2d7671f6 305 }, {
935fbc94
JM		 306 /* Raw, BGBG... / GRGR... */
307 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
308 .colorspace = V4L2_COLORSPACE_SRGB,
309 .bpp = 8,
310 .ctrl00 = 0x00,
311 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 312 }, {
935fbc94
JM		 313 /* Raw bayer, GBGB... / RGRG... */
314 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
315 .colorspace = V4L2_COLORSPACE_SRGB,
316 .bpp = 8,
317 .ctrl00 = 0x01,
318 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 319 }, {
935fbc94
JM		 320 /* Raw bayer, GRGR... / BGBG... */
321 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
322 .colorspace = V4L2_COLORSPACE_SRGB,
323 .bpp = 8,
324 .ctrl00 = 0x02,
325 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 326 }, {
935fbc94
JM		 327 /* Raw bayer, RGRG... / GBGB... */
328 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
329 .colorspace = V4L2_COLORSPACE_SRGB,
330 .bpp = 8,
331 .ctrl00 = 0x03,
332 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 333 },
a89f14bb 334 { /* sentinel */ }
e3ee691d
HF		 335};
336
19a81c14
SL		 337/*
338 * FIXME: remove this when a subdev API becomes available
339 * to set the MIPI CSI-2 virtual channel.
340 */
341static unsigned int virtual_channel;
8670d70a 342module_param(virtual_channel, uint, 0444);
19a81c14
SL		 343MODULE_PARM_DESC(virtual_channel,
344 "MIPI CSI-2 virtual channel (0..3), default 0");
345
346static const int ov5640_framerates[] = {
347 [OV5640_15_FPS] = 15,
348 [OV5640_30_FPS] = 30,
e823fb16 349 [OV5640_60_FPS] = 60,
19a81c14
SL		 350};
351
352/* regulator supplies */
353static const char * const ov5640_supply_name[] = {
41d8d7f5 354 "DOVDD", /* Digital I/O (1.8V) supply */
19a81c14 355 "AVDD", /* Analog (2.8V) supply */
24c8ac89 356 "DVDD", /* Digital Core (1.5V) supply */
19a81c14
SL		 357};
358
359#define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
360
361/*
362 * Image size under 1280 * 960 are SUBSAMPLING
363 * Image size upper 1280 * 960 are SCALING
364 */
365enum ov5640_downsize_mode {
366 SUBSAMPLING,
367 SCALING,
368};
369
370struct reg_value {
371 u16 reg_addr;
372 u8 val;
373 u8 mask;
374 u32 delay_ms;
375};
376
5113d5b3 377struct ov5640_timings {
3145efcd
JM		 378 /* Analog crop rectangle. */
379 struct v4l2_rect analog_crop;
380 /* Visibile crop: from analog crop top-left corner. */
381 struct v4l2_rect crop;
5113d5b3 382 /* Total pixels per line: width + fixed hblank. */
476dec01 383 u32 htot;
5113d5b3 384 /* Default vertical blanking: frame height = height + vblank. */
3145efcd 385 u32 vblank_def;
5113d5b3
JM		 386};
387
388struct ov5640_mode_info {
389 enum ov5640_mode_id id;
390 enum ov5640_downsize_mode dn_mode;
391 enum ov5640_pixel_rate_id pixel_rate;
392
393 unsigned int width;
394 unsigned int height;
395
396 struct ov5640_timings dvp_timings;
397 struct ov5640_timings csi2_timings;
398
19a81c14
SL		 399 const struct reg_value *reg_data;
400 u32 reg_data_size;
5113d5b3
JM		 401
402 /* Used by s_frame_interval only. */
5554c80e 403 u32 max_fps;
19f2e3e6 404 u32 def_fps;
19a81c14
SL		 405};
406
407struct ov5640_ctrls {
408 struct v4l2_ctrl_handler handler;
cc196e48 409 struct v4l2_ctrl *pixel_rate;
7a3b8d4b 410 struct v4l2_ctrl *link_freq;
32979f67 411 struct v4l2_ctrl *hblank;
bce93b82 412 struct v4l2_ctrl *vblank;
19a81c14
SL		 413 struct {
414 struct v4l2_ctrl *auto_exp;
415 struct v4l2_ctrl *exposure;
416 };
417 struct {
418 struct v4l2_ctrl *auto_wb;
419 struct v4l2_ctrl *blue_balance;
420 struct v4l2_ctrl *red_balance;
421 };
422 struct {
423 struct v4l2_ctrl *auto_gain;
424 struct v4l2_ctrl *gain;
425 };
426 struct v4l2_ctrl *brightness;
1068feca 427 struct v4l2_ctrl *light_freq;
19a81c14
SL		 428 struct v4l2_ctrl *saturation;
429 struct v4l2_ctrl *contrast;
430 struct v4l2_ctrl *hue;
431 struct v4l2_ctrl *test_pattern;
ce85705a
HF		 432 struct v4l2_ctrl *hflip;
433 struct v4l2_ctrl *vflip;
19a81c14
SL		 434};
435
436struct ov5640_dev {
437 struct i2c_client *i2c_client;
438 struct v4l2_subdev sd;
439 struct media_pad pad;
440 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
441 struct clk *xclk; /* system clock to OV5640 */
442 u32 xclk_freq;
443
444 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
445 struct gpio_desc *reset_gpio;
446 struct gpio_desc *pwdn_gpio;
c3f3ba3e 447 bool upside_down;
19a81c14
SL		 448
449 /* lock to protect all members below */
450 struct mutex lock;
451
19a81c14 452 struct v4l2_mbus_framefmt fmt;
fb98e29f 453 bool pending_fmt_change;
19a81c14
SL		 454
455 const struct ov5640_mode_info *current_mode;
985cdcb0 456 const struct ov5640_mode_info *last_mode;
19a81c14
SL		 457 enum ov5640_frame_rate current_fr;
458 struct v4l2_fract frame_interval;
3c28588f 459 s64 current_link_freq;
19a81c14
SL		 460
461 struct ov5640_ctrls ctrls;
462
463 u32 prev_sysclk, prev_hts;
464 u32 ae_low, ae_high, ae_target;
465
466 bool pending_mode_change;
467 bool streaming;
468};
469
470static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
471{
472 return container_of(sd, struct ov5640_dev, sd);
473}
474
475static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
476{
477 return &container_of(ctrl->handler, struct ov5640_dev,
478 ctrls.handler)->sd;
479}
480
8e823f5c
JM		 481static inline bool ov5640_is_csi2(const struct ov5640_dev *sensor)
482{
483 return sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY;
484}
485
a89f14bb
JM		 486static inline const struct ov5640_pixfmt *
487ov5640_formats(struct ov5640_dev *sensor)
488{
489 return ov5640_is_csi2(sensor) ? ov5640_csi2_formats
490 : ov5640_dvp_formats;
491}
492
493static const struct ov5640_pixfmt *
494ov5640_code_to_pixfmt(struct ov5640_dev *sensor, u32 code)
495{
496 const struct ov5640_pixfmt *formats = ov5640_formats(sensor);
497 unsigned int i;
498
499 for (i = 0; formats[i].code; ++i) {
500 if (formats[i].code == code)
501 return &formats[i];
502 }
503
504 return &formats[0];
505}
506
507static u32 ov5640_code_to_bpp(struct ov5640_dev *sensor, u32 code)
508{
509 const struct ov5640_pixfmt *format = ov5640_code_to_pixfmt(sensor,
510 code);
511
512 return format->bpp;
513}
514
19a81c14
SL		 515/*
516 * FIXME: all of these register tables are likely filled with
517 * entries that set the register to their power-on default values,
518 * and which are otherwise not touched by this driver. Those entries
519 * should be identified and removed to speed register load time
520 * over i2c.
521 */
fb98e29f 522/* YUV422 UYVY VGA@30fps */
90b0f355 523
68453b02
G		 524static const struct v4l2_mbus_framefmt ov5640_csi2_default_fmt = {
525 .code = MEDIA_BUS_FMT_UYVY8_1X16,
526 .width = 640,
527 .height = 480,
528 .colorspace = V4L2_COLORSPACE_SRGB,
529 .ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB),
530 .quantization = V4L2_QUANTIZATION_FULL_RANGE,
531 .xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB),
532 .field = V4L2_FIELD_NONE,
533};
534
535static const struct v4l2_mbus_framefmt ov5640_dvp_default_fmt = {
90b0f355
JM		 536 .code = MEDIA_BUS_FMT_UYVY8_2X8,
537 .width = 640,
538 .height = 480,
539 .colorspace = V4L2_COLORSPACE_SRGB,
540 .ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB),
541 .quantization = V4L2_QUANTIZATION_FULL_RANGE,
542 .xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB),
543 .field = V4L2_FIELD_NONE,
544};
545
e4359019 546static const struct reg_value ov5640_init_setting[] = {
decea0a9 547 {0x3103, 0x11, 0, 0},
576f5d4b 548 {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
19a81c14
SL		 549 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
550 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
551 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
552 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
553 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
554 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
555 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
556 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
557 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
558 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
559 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
560 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
561 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
3145efcd 562 {0x3815, 0x31, 0, 0},
19a81c14
SL		 563 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
564 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
565 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
566 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
567 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
568 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
569 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
aa4bb8b8 570 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
2b5c18f9 571 {0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
19a81c14 572 {0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
aa4bb8b8 573 {0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
19a81c14
SL		 574 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
575 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
576 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
577 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
578 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
579 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
580 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
581 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
582 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
583 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
584 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
585 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
586 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
587 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
588 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
589 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
590 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
591 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
592 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
593 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
594 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
595 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
596 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
597 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
598 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
599 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
600 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
601 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
602 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
603 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
604 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
605 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
606 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
607 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
608 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
609 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
610 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
611 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
612 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
613 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
614 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
615 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
616 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
617 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
618 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
619 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
620 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
621 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
622 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
623 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
624};
625
db15c195 626static const struct reg_value ov5640_setting_low_res[] = {
c14d107e 627 {0x3c07, 0x08, 0, 0},
19a81c14 628 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 629 {0x3814, 0x31, 0, 0},
3145efcd 630 {0x3815, 0x31, 0, 0},
19a81c14
SL		 631 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
632 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
633 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
634 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
635 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
2b5c18f9 636 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
e15197bd 637 {0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},
19a81c14
SL		 638};
639
086c25f8 640static const struct reg_value ov5640_setting_720P_1280_720[] = {
c14d107e 641 {0x3c07, 0x07, 0, 0},
19a81c14 642 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 643 {0x3814, 0x31, 0, 0},
3145efcd 644 {0x3815, 0x31, 0, 0},
19a81c14
SL		 645 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
646 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
647 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
648 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
649 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
2b5c18f9 650 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
19a81c14
SL		 651 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
652 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
653};
654
086c25f8 655static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
c14d107e 656 {0x3c07, 0x08, 0, 0},
19a81c14 657 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 658 {0x3814, 0x11, 0, 0},
3145efcd 659 {0x3815, 0x11, 0, 0},
19a81c14
SL		 660 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
661 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
662 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
663 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
664 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
2b5c18f9 665 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
19a81c14 666 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
c14d107e
MR		 667 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
668 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
19a81c14 669 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
476dec01 670 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
19a81c14
SL		 671 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
672 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
673 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
2b5c18f9 674 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
19a81c14 675 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
92b9096c 676 {0x4005, 0x1a, 0, 0},
19a81c14
SL		 677};
678
086c25f8 679static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
c14d107e 680 {0x3c07, 0x08, 0, 0},
19a81c14 681 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 682 {0x3814, 0x11, 0, 0},
3145efcd 683 {0x3815, 0x11, 0, 0},
19a81c14
SL		 684 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
685 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
686 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
687 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
688 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
2b5c18f9 689 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
19a81c14
SL		 690 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
691 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
692};
693
5113d5b3 694static const struct ov5640_mode_info ov5640_mode_data[OV5640_NUM_MODES] = {
8409d017
JM		 695 {
696 /* 160x120 */
3145efcd
JM		 697 .id = OV5640_MODE_QQVGA_160_120,
698 .dn_mode = SUBSAMPLING,
699 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 700 .width = 160,
701 .height = 120,
702 .dvp_timings = {
703 .analog_crop = {
704 .left = 0,
705 .top = 4,
706 .width = 2624,
707 .height = 1944,
708 },
709 .crop = {
710 .left = 16,
711 .top = 6,
712 .width = 160,
713 .height = 120,
714 },
715 .htot = 1896,
716 .vblank_def = 864,
3145efcd 717 },
5113d5b3
JM		 718 .csi2_timings = {
719 /* Feed the full valid pixel array to the ISP. */
720 .analog_crop = {
721 .left = OV5640_PIXEL_ARRAY_LEFT,
722 .top = OV5640_PIXEL_ARRAY_TOP,
723 .width = OV5640_PIXEL_ARRAY_WIDTH,
724 .height = OV5640_PIXEL_ARRAY_HEIGHT,
725 },
726 /* Maintain a minimum processing margin. */
727 .crop = {
728 .left = 2,
729 .top = 4,
730 .width = 160,
731 .height = 120,
732 },
961bed9f
JM		 733 .htot = 1600,
734 .vblank_def = 878,
3145efcd 735 },
db15c195
JM		 736 .reg_data = ov5640_setting_low_res,
737 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 738 .max_fps = OV5640_30_FPS,
739 .def_fps = OV5640_30_FPS
8409d017
JM		 740 }, {
741 /* 176x144 */
3145efcd
JM		 742 .id = OV5640_MODE_QCIF_176_144,
743 .dn_mode = SUBSAMPLING,
744 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 745 .width = 176,
746 .height = 144,
747 .dvp_timings = {
748 .analog_crop = {
749 .left = 0,
750 .top = 4,
751 .width = 2624,
752 .height = 1944,
753 },
754 .crop = {
755 .left = 16,
756 .top = 6,
757 .width = 176,
758 .height = 144,
759 },
760 .htot = 1896,
761 .vblank_def = 840,
3145efcd 762 },
5113d5b3
JM		 763 .csi2_timings = {
764 /* Feed the full valid pixel array to the ISP. */
765 .analog_crop = {
766 .left = OV5640_PIXEL_ARRAY_LEFT,
767 .top = OV5640_PIXEL_ARRAY_TOP,
768 .width = OV5640_PIXEL_ARRAY_WIDTH,
769 .height = OV5640_PIXEL_ARRAY_HEIGHT,
770 },
771 /* Maintain a minimum processing margin. */
772 .crop = {
773 .left = 2,
774 .top = 4,
775 .width = 176,
776 .height = 144,
777 },
961bed9f
JM		 778 .htot = 1600,
779 .vblank_def = 854,
3145efcd 780 },
db15c195
JM		 781 .reg_data = ov5640_setting_low_res,
782 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 783 .max_fps = OV5640_30_FPS,
784 .def_fps = OV5640_30_FPS
8409d017
JM		 785 }, {
786 /* 320x240 */
3145efcd
JM		 787 .id = OV5640_MODE_QVGA_320_240,
788 .dn_mode = SUBSAMPLING,
5113d5b3
JM		 789 .width = 320,
790 .height = 240,
3145efcd 791 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 792 .dvp_timings = {
793 .analog_crop = {
794 .left = 0,
795 .top = 4,
796 .width = 2624,
797 .height = 1944,
798 },
799 .crop = {
800 .left = 16,
801 .top = 6,
802 .width = 320,
803 .height = 240,
804 },
805 .htot = 1896,
806 .vblank_def = 744,
3145efcd 807 },
5113d5b3
JM		 808 .csi2_timings = {
809 /* Feed the full valid pixel array to the ISP. */
810 .analog_crop = {
811 .left = OV5640_PIXEL_ARRAY_LEFT,
812 .top = OV5640_PIXEL_ARRAY_TOP,
813 .width = OV5640_PIXEL_ARRAY_WIDTH,
814 .height = OV5640_PIXEL_ARRAY_HEIGHT,
815 },
816 /* Maintain a minimum processing margin. */
817 .crop = {
818 .left = 2,
819 .top = 4,
820 .width = 320,
821 .height = 240,
822 },
961bed9f
JM		 823 .htot = 1600,
824 .vblank_def = 760,
3145efcd 825 },
db15c195
JM		 826 .reg_data = ov5640_setting_low_res,
827 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 828 .max_fps = OV5640_30_FPS,
829 .def_fps = OV5640_30_FPS
8409d017
JM		 830 }, {
831 /* 640x480 */
3145efcd
JM		 832 .id = OV5640_MODE_VGA_640_480,
833 .dn_mode = SUBSAMPLING,
834 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 835 .width = 640,
836 .height = 480,
837 .dvp_timings = {
838 .analog_crop = {
839 .left = 0,
840 .top = 4,
841 .width = 2624,
842 .height = 1944,
843 },
844 .crop = {
845 .left = 16,
846 .top = 6,
847 .width = 640,
848 .height = 480,
849 },
850 .htot = 1896,
851 .vblank_def = 600,
3145efcd 852 },
5113d5b3
JM		 853 .csi2_timings = {
854 /* Feed the full valid pixel array to the ISP. */
855 .analog_crop = {
856 .left = OV5640_PIXEL_ARRAY_LEFT,
857 .top = OV5640_PIXEL_ARRAY_TOP,
858 .width = OV5640_PIXEL_ARRAY_WIDTH,
859 .height = OV5640_PIXEL_ARRAY_HEIGHT,
860 },
861 /* Maintain a minimum processing margin. */
862 .crop = {
863 .left = 2,
864 .top = 4,
865 .width = 640,
866 .height = 480,
867 },
961bed9f
JM		 868 .htot = 1600,
869 .vblank_def = 520,
3145efcd 870 },
db15c195
JM		 871 .reg_data = ov5640_setting_low_res,
872 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 873 .max_fps = OV5640_60_FPS,
874 .def_fps = OV5640_30_FPS
8409d017
JM		 875 }, {
876 /* 720x480 */
3145efcd
JM		 877 .id = OV5640_MODE_NTSC_720_480,
878 .dn_mode = SUBSAMPLING,
5113d5b3
JM		 879 .width = 720,
880 .height = 480,
3145efcd 881 .pixel_rate = OV5640_PIXEL_RATE_96M,
5113d5b3
JM		 882 .dvp_timings = {
883 .analog_crop = {
884 .left = 0,
885 .top = 4,
886 .width = 2624,
887 .height = 1944,
888 },
889 .crop = {
890 .left = 56,
891 .top = 60,
892 .width = 720,
893 .height = 480,
894 },
895 .htot = 1896,
896 .vblank_def = 504,
3145efcd 897 },
5113d5b3
JM		 898 .csi2_timings = {
899 /* Feed the full valid pixel array to the ISP. */
900 .analog_crop = {
901 .left = OV5640_PIXEL_ARRAY_LEFT,
902 .top = OV5640_PIXEL_ARRAY_TOP,
903 .width = OV5640_PIXEL_ARRAY_WIDTH,
904 .height = OV5640_PIXEL_ARRAY_HEIGHT,
905 },
906 .crop = {
907 .left = 56,
908 .top = 60,
909 .width = 720,
910 .height = 480,
911 },
912 .htot = 1896,
961bed9f 913 .vblank_def = 1206,
3145efcd 914 },
db15c195
JM		 915 .reg_data = ov5640_setting_low_res,
916 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 917 .max_fps = OV5640_30_FPS,
918 .def_fps = OV5640_30_FPS
8409d017
JM		 919 }, {
920 /* 720x576 */
3145efcd
JM		 921 .id = OV5640_MODE_PAL_720_576,
922 .dn_mode = SUBSAMPLING,
5113d5b3
JM		 923 .width = 720,
924 .height = 576,
3145efcd 925 .pixel_rate = OV5640_PIXEL_RATE_96M,
5113d5b3
JM		 926 .dvp_timings = {
927 .analog_crop = {
928 .left = 0,
929 .top = 4,
930 .width = 2624,
931 .height = 1944,
932 },
933 .crop = {
934 .left = 56,
935 .top = 6,
936 .width = 720,
937 .height = 576,
938 },
939 .htot = 1896,
940 .vblank_def = 408,
3145efcd 941 },
5113d5b3
JM		 942 .csi2_timings = {
943 /* Feed the full valid pixel array to the ISP. */
944 .analog_crop = {
945 .left = OV5640_PIXEL_ARRAY_LEFT,
946 .top = OV5640_PIXEL_ARRAY_TOP,
947 .width = OV5640_PIXEL_ARRAY_WIDTH,
948 .height = OV5640_PIXEL_ARRAY_HEIGHT,
949 },
950 .crop = {
951 .left = 56,
952 .top = 6,
953 .width = 720,
954 .height = 576,
955 },
956 .htot = 1896,
961bed9f 957 .vblank_def = 1110,
3145efcd 958 },
db15c195
JM		 959 .reg_data = ov5640_setting_low_res,
960 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 961 .max_fps = OV5640_30_FPS,
962 .def_fps = OV5640_30_FPS
8409d017
JM		 963 }, {
964 /* 1024x768 */
3145efcd
JM		 965 .id = OV5640_MODE_XGA_1024_768,
966 .dn_mode = SUBSAMPLING,
967 .pixel_rate = OV5640_PIXEL_RATE_96M,
5113d5b3
JM		 968 .width = 1024,
969 .height = 768,
970 .dvp_timings = {
971 .analog_crop = {
972 .left = 0,
973 .top = 4,
974 .width = 2624,
975 .height = 1944,
976 },
977 .crop = {
978 .left = 16,
979 .top = 6,
980 .width = 1024,
981 .height = 768,
982 },
983 .htot = 1896,
984 .vblank_def = 312,
3145efcd 985 },
5113d5b3
JM		 986 .csi2_timings = {
987 .analog_crop = {
988 .left = 0,
989 .top = 4,
990 .width = OV5640_NATIVE_WIDTH,
991 .height = OV5640_PIXEL_ARRAY_HEIGHT,
992 },
993 .crop = {
994 .left = 16,
995 .top = 6,
996 .width = 1024,
997 .height = 768,
998 },
999 .htot = 1896,
961bed9f 1000 .vblank_def = 918,
3145efcd 1001 },
db15c195
JM		 1002 .reg_data = ov5640_setting_low_res,
1003 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 1004 .max_fps = OV5640_30_FPS,
1005 .def_fps = OV5640_30_FPS
8409d017
JM		 1006 }, {
1007 /* 1280x720 */
3145efcd
JM		 1008 .id = OV5640_MODE_720P_1280_720,
1009 .dn_mode = SUBSAMPLING,
1010 .pixel_rate = OV5640_PIXEL_RATE_124M,
5113d5b3
JM		 1011 .width = 1280,
1012 .height = 720,
1013 .dvp_timings = {
1014 .analog_crop = {
1015 .left = 0,
1016 .top = 250,
1017 .width = 2624,
1018 .height = 1456,
1019 },
1020 .crop = {
1021 .left = 16,
1022 .top = 4,
1023 .width = 1280,
1024 .height = 720,
1025 },
1026 .htot = 1892,
1027 .vblank_def = 20,
3145efcd 1028 },
5113d5b3
JM		 1029 .csi2_timings = {
1030 .analog_crop = {
1031 .left = 0,
1032 .top = 250,
1033 .width = 2624,
1034 .height = 1456,
1035 },
1036 .crop = {
1037 .left = 16,
1038 .top = 4,
1039 .width = 1280,
1040 .height = 720,
1041 },
961bed9f
JM		 1042 .htot = 1600,
1043 .vblank_def = 560,
3145efcd 1044 },
3145efcd
JM		 1045 .reg_data = ov5640_setting_720P_1280_720,
1046 .reg_data_size = ARRAY_SIZE(ov5640_setting_720P_1280_720),
19f2e3e6
HF		 1047 .max_fps = OV5640_30_FPS,
1048 .def_fps = OV5640_30_FPS
8409d017
JM		 1049 }, {
1050 /* 1920x1080 */
3145efcd
JM		 1051 .id = OV5640_MODE_1080P_1920_1080,
1052 .dn_mode = SCALING,
1053 .pixel_rate = OV5640_PIXEL_RATE_148M,
5113d5b3
JM		 1054 .width = 1920,
1055 .height = 1080,
1056 .dvp_timings = {
1057 .analog_crop = {
1058 .left = 336,
1059 .top = 434,
1060 .width = 1952,
1061 .height = 1088,
1062 },
1063 .crop = {
1064 .left = 16,
1065 .top = 4,
1066 .width = 1920,
1067 .height = 1080,
1068 },
1069 .htot = 2500,
1070 .vblank_def = 40,
3145efcd 1071 },
5113d5b3
JM		 1072 .csi2_timings = {
1073 /* Crop the full valid pixel array in the center. */
1074 .analog_crop = {
1075 .left = 336,
1076 .top = 434,
1077 .width = 1952,
1078 .height = 1088,
1079 },
1080 /* Maintain a larger processing margins. */
1081 .crop = {
1082 .left = 16,
1083 .top = 4,
1084 .width = 1920,
1085 .height = 1080,
1086 },
961bed9f
JM		 1087 .htot = 2234,
1088 .vblank_def = 24,
3145efcd 1089 },
3145efcd
JM		 1090 .reg_data = ov5640_setting_1080P_1920_1080,
1091 .reg_data_size = ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
19f2e3e6
HF		 1092 .max_fps = OV5640_30_FPS,
1093 .def_fps = OV5640_30_FPS
8409d017
JM		 1094 }, {
1095 /* 2592x1944 */
3145efcd
JM		 1096 .id = OV5640_MODE_QSXGA_2592_1944,
1097 .dn_mode = SCALING,
1098 .pixel_rate = OV5640_PIXEL_RATE_168M,
5113d5b3
JM		 1099 .width = OV5640_PIXEL_ARRAY_WIDTH,
1100 .height = OV5640_PIXEL_ARRAY_HEIGHT,
1101 .dvp_timings = {
1102 .analog_crop = {
1103 .left = 0,
1104 .top = 0,
1105 .width = 2624,
1106 .height = 1952,
1107 },
1108 .crop = {
1109 .left = 16,
1110 .top = 4,
1111 .width = 2592,
1112 .height = 1944,
1113 },
1114 .htot = 2844,
1115 .vblank_def = 24,
3145efcd 1116 },
5113d5b3
JM		 1117 .csi2_timings = {
1118 /* Give more processing margin to full resolution. */
1119 .analog_crop = {
1120 .left = 0,
1121 .top = 0,
1122 .width = OV5640_NATIVE_WIDTH,
1123 .height = 1952,
1124 },
1125 .crop = {
1126 .left = 16,
1127 .top = 4,
1128 .width = 2592,
1129 .height = 1944,
1130 },
1131 .htot = 2844,
1132 .vblank_def = 24,
3145efcd 1133 },
3145efcd
JM		 1134 .reg_data = ov5640_setting_QSXGA_2592_1944,
1135 .reg_data_size = ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
19f2e3e6
HF		 1136 .max_fps = OV5640_15_FPS,
1137 .def_fps = OV5640_15_FPS
8409d017 1138 },
19a81c14
SL		 1139};
1140
2de6bb97
JM		 1141static const struct ov5640_timings *
1142ov5640_timings(const struct ov5640_dev *sensor,
1143 const struct ov5640_mode_info *mode)
1144{
1145 if (ov5640_is_csi2(sensor))
1146 return &mode->csi2_timings;
1147
1148 return &mode->dvp_timings;
1149}
1150
19a81c14
SL		 1151static int ov5640_init_slave_id(struct ov5640_dev *sensor)
1152{
1153 struct i2c_client *client = sensor->i2c_client;
1154 struct i2c_msg msg;
1155 u8 buf[3];
1156 int ret;
1157
1158 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
1159 return 0;
1160
1161 buf[0] = OV5640_REG_SLAVE_ID >> 8;
1162 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
1163 buf[2] = client->addr << 1;
1164
1165 msg.addr = OV5640_DEFAULT_SLAVE_ID;
1166 msg.flags = 0;
1167 msg.buf = buf;
1168 msg.len = sizeof(buf);
1169
1170 ret = i2c_transfer(client->adapter, &msg, 1);
1171 if (ret < 0) {
1172 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
1173 return ret;
1174 }
1175
1176 return 0;
1177}
1178
1179static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
1180{
1181 struct i2c_client *client = sensor->i2c_client;
1182 struct i2c_msg msg;
1183 u8 buf[3];
1184 int ret;
1185
1186 buf[0] = reg >> 8;
1187 buf[1] = reg & 0xff;
1188 buf[2] = val;
1189
1190 msg.addr = client->addr;
1191 msg.flags = client->flags;
1192 msg.buf = buf;
1193 msg.len = sizeof(buf);
1194
1195 ret = i2c_transfer(client->adapter, &msg, 1);
1196 if (ret < 0) {
3924c623 1197 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
19a81c14
SL		 1198 __func__, reg, val);
1199 return ret;
1200 }
1201
1202 return 0;
1203}
1204
1205static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
1206{
1207 struct i2c_client *client = sensor->i2c_client;
1208 struct i2c_msg msg[2];
1209 u8 buf[2];
1210 int ret;
1211
1212 buf[0] = reg >> 8;
1213 buf[1] = reg & 0xff;
1214
1215 msg[0].addr = client->addr;
1216 msg[0].flags = client->flags;
1217 msg[0].buf = buf;
1218 msg[0].len = sizeof(buf);
1219
1220 msg[1].addr = client->addr;
1221 msg[1].flags = client->flags | I2C_M_RD;
1222 msg[1].buf = buf;
1223 msg[1].len = 1;
1224
1225 ret = i2c_transfer(client->adapter, msg, 2);
3924c623
HF		 1226 if (ret < 0) {
1227 dev_err(&client->dev, "%s: error: reg=%x\n",
1228 __func__, reg);
19a81c14 1229 return ret;
3924c623 1230 }
19a81c14
SL		 1231
1232 *val = buf[0];
1233 return 0;
1234}
1235
1236static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
1237{
1238 u8 hi, lo;
1239 int ret;
1240
1241 ret = ov5640_read_reg(sensor, reg, &hi);
1242 if (ret)
1243 return ret;
41d8d7f5 1244 ret = ov5640_read_reg(sensor, reg + 1, &lo);
19a81c14
SL		 1245 if (ret)
1246 return ret;
1247
1248 *val = ((u16)hi << 8) | (u16)lo;
1249 return 0;
1250}
1251
1252static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
1253{
1254 int ret;
1255
1256 ret = ov5640_write_reg(sensor, reg, val >> 8);
1257 if (ret)
1258 return ret;
1259
1260 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
1261}
1262
1263static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
1264 u8 mask, u8 val)
1265{
1266 u8 readval;
1267 int ret;
1268
1269 ret = ov5640_read_reg(sensor, reg, &readval);
1270 if (ret)
1271 return ret;
1272
1273 readval &= ~mask;
1274 val &= mask;
1275 val |= readval;
1276
1277 return ov5640_write_reg(sensor, reg, val);
1278}
1279
aa288248
MR		 1280/*
1281 * After trying the various combinations, reading various
f8a7647d 1282 * documentations spread around the net, and from the various
aa288248
MR		 1283 * feedback, the clock tree is probably as follows:
1284 *
1285 * +--------------+
1286 * | Ext. Clock |
1287 * +-+------------+
1288 * | +----------+
1289 * +->| PLL1 | - reg 0x3036, for the multiplier
1290 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
1291 * | +--------------+
1292 * +->| System Clock | - reg 0x3035, bits 4-7
1293 * +-+------------+
1294 * | +--------------+
1295 * +->| MIPI Divider | - reg 0x3035, bits 0-3
1296 * | +-+------------+
1297 * | +----------------> MIPI SCLK
1298 * | + +-----+
1299 * | +->| / 2 |-------> MIPI BIT CLK
1300 * | +-----+
1301 * | +--------------+
1302 * +->| PLL Root Div | - reg 0x3037, bit 4
1303 * +-+------------+
1304 * | +---------+
4c85f628 1305 * +->| Bit Div | - reg 0x3034, bits 0-3
aa288248
MR		 1306 * +-+-------+
1307 * | +-------------+
1308 * +->| SCLK Div | - reg 0x3108, bits 0-1
1309 * | +-+-----------+
1310 * | +---------------> SCLK
1311 * | +-------------+
1312 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
1313 * | +-+-----------+
1314 * | +---------------> SCLK 2X
1315 * | +-------------+
1316 * +->| PCLK Div | - reg 0x3108, bits 4-5
1317 * ++------------+
1318 * + +-----------+
1319 * +->| P_DIV | - reg 0x3035, bits 0-3
1320 * +-----+-----+
1321 * +------------> PCLK
1322 *
6c957ed7 1323 * There seems to be also constraints:
aa288248
MR		 1324 * - the PLL pre-divider output rate should be in the 4-27MHz range
1325 * - the PLL multiplier output rate should be in the 500-1000MHz range
1326 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
aa288248
MR		 1327 */
1328
1329/*
1330 * This is supposed to be ranging from 1 to 8, but the value is always
1331 * set to 3 in the vendor kernels.
1332 */
1333#define OV5640_PLL_PREDIV 3
1334
1335#define OV5640_PLL_MULT_MIN 4
1336#define OV5640_PLL_MULT_MAX 252
1337
1338/*
1339 * This is supposed to be ranging from 1 to 16, but the value is
1340 * always set to either 1 or 2 in the vendor kernels.
1341 */
1342#define OV5640_SYSDIV_MIN 1
1343#define OV5640_SYSDIV_MAX 16
1344
aa288248
MR		 1345/*
1346 * This is supposed to be ranging from 1 to 2, but the value is always
1347 * set to 2 in the vendor kernels.
1348 */
1349#define OV5640_PLL_ROOT_DIV 2
1350#define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
1351
1352/*
1353 * We only supports 8-bit formats at the moment
1354 */
1355#define OV5640_BIT_DIV 2
1356#define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
1357
1358/*
1359 * This is supposed to be ranging from 1 to 8, but the value is always
1360 * set to 2 in the vendor kernels.
1361 */
1362#define OV5640_SCLK_ROOT_DIV 2
1363
1364/*
1365 * This is hardcoded so that the consistency is maintained between SCLK and
1366 * SCLK 2x.
1367 */
1368#define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
1369
1370/*
1371 * This is supposed to be ranging from 1 to 8, but the value is always
1372 * set to 1 in the vendor kernels.
1373 */
1374#define OV5640_PCLK_ROOT_DIV 1
1375#define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
1376
1377static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
1378 u8 pll_prediv, u8 pll_mult,
1379 u8 sysdiv)
1380{
1381 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
1382
1383 /* PLL1 output cannot exceed 1GHz. */
1384 if (sysclk / 1000000 > 1000)
1385 return 0;
1386
1387 return sysclk / sysdiv;
1388}
1389
1390static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
1391 unsigned long rate,
1392 u8 *pll_prediv, u8 *pll_mult,
1393 u8 *sysdiv)
1394{
1395 unsigned long best = ~0;
1396 u8 best_sysdiv = 1, best_mult = 1;
1397 u8 _sysdiv, _pll_mult;
1398
1399 for (_sysdiv = OV5640_SYSDIV_MIN;
1400 _sysdiv <= OV5640_SYSDIV_MAX;
1401 _sysdiv++) {
1402 for (_pll_mult = OV5640_PLL_MULT_MIN;
1403 _pll_mult <= OV5640_PLL_MULT_MAX;
1404 _pll_mult++) {
1405 unsigned long _rate;
1406
1407 /*
1408 * The PLL multiplier cannot be odd if above
1409 * 127.
1410 */
1411 if (_pll_mult > 127 && (_pll_mult % 2))
1412 continue;
1413
1414 _rate = ov5640_compute_sys_clk(sensor,
1415 OV5640_PLL_PREDIV,
1416 _pll_mult, _sysdiv);
1417
1418 /*
1419 * We have reached the maximum allowed PLL1 output,
1420 * increase sysdiv.
1421 */
2e3df204 1422 if (!_rate)
aa288248
MR		 1423 break;
1424
1425 /*
1426 * Prefer rates above the expected clock rate than
1427 * below, even if that means being less precise.
1428 */
1429 if (_rate < rate)
1430 continue;
1431
1432 if (abs(rate - _rate) < abs(rate - best)) {
1433 best = _rate;
1434 best_sysdiv = _sysdiv;
1435 best_mult = _pll_mult;
1436 }
1437
1438 if (_rate == rate)
1439 goto out;
1440 }
1441 }
1442
1443out:
1444 *sysdiv = best_sysdiv;
1445 *pll_prediv = OV5640_PLL_PREDIV;
1446 *pll_mult = best_mult;
1447
1448 return best;
1449}
1450
1451/*
1452 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
1453 * for the MIPI CSI-2 output.
aa288248 1454 */
6c957ed7 1455static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor)
aa288248 1456{
6c957ed7 1457 u8 bit_div, mipi_div, pclk_div, sclk_div, sclk2x_div, root_div;
aa288248 1458 u8 prediv, mult, sysdiv;
6c957ed7
JM		 1459 unsigned long link_freq;
1460 unsigned long sysclk;
1461 u8 pclk_period;
1462 u32 sample_rate;
1463 u32 num_lanes;
aa288248
MR		 1464 int ret;
1465
6c957ed7
JM		 1466 /* Use the link freq computed at ov5640_update_pixel_rate() time. */
1467 link_freq = sensor->current_link_freq;
1468
aa288248 1469 /*
6c957ed7
JM		 1470 * - mipi_div - Additional divider for the MIPI lane clock.
1471 *
1472 * Higher link frequencies would make sysclk > 1GHz.
1473 * Keep the sysclk low and do not divide in the MIPI domain.
aa288248 1474 */
6c957ed7
JM		 1475 if (link_freq > OV5640_LINK_RATE_MAX)
1476 mipi_div = 1;
aa288248 1477 else
6c957ed7 1478 mipi_div = 2;
aa288248 1479
6c957ed7
JM		 1480 sysclk = link_freq * mipi_div;
1481 ov5640_calc_sys_clk(sensor, sysclk, &prediv, &mult, &sysdiv);
aa288248 1482
6c957ed7
JM		 1483 /*
1484 * Adjust PLL parameters to maintain the MIPI_SCLK-to-PCLK ratio.
1485 *
1486 * - root_div = 2 (fixed)
1487 * - bit_div : MIPI 8-bit = 2; MIPI 10-bit = 2.5
1488 * - pclk_div = 1 (fixed)
1489 * - p_div = (2 lanes ? mipi_div : 2 * mipi_div)
1490 *
1491 * This results in the following MIPI_SCLK depending on the number
1492 * of lanes:
1493 *
1494 * - 2 lanes: MIPI_SCLK = (4 or 5) * PCLK
1495 * - 1 lanes: MIPI_SCLK = (8 or 10) * PCLK
1496 */
1497 root_div = OV5640_PLL_CTRL3_PLL_ROOT_DIV_2;
1498 bit_div = OV5640_PLL_CTRL0_MIPI_MODE_8BIT;
1499 pclk_div = ilog2(OV5640_PCLK_ROOT_DIV);
aa288248 1500
6c957ed7
JM		 1501 /*
1502 * Scaler clock:
1503 * - YUV: PCLK >= 2 * SCLK
1504 * - RAW or JPEG: PCLK >= SCLK
1505 * - sclk2x_div = sclk_div / 2
1506 */
1507 sclk_div = ilog2(OV5640_SCLK_ROOT_DIV);
1508 sclk2x_div = ilog2(OV5640_SCLK2X_ROOT_DIV);
1509
1510 /*
1511 * Set the pixel clock period expressed in ns with 1-bit decimal
1512 * (0x01=0.5ns).
1513 *
1514 * The register is very briefly documented. In the OV5645 datasheet it
1515 * is described as (2 * pclk period), and from testing it seems the
1516 * actual definition is 2 * 8-bit sample period.
1517 *
1518 * 2 * sample_period = (mipi_clk * 2 * num_lanes / bpp) * (bpp / 8) / 2
1519 */
1520 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
1521 sample_rate = (link_freq * mipi_div * num_lanes * 2) / 16;
1522 pclk_period = 2000000000UL / sample_rate;
1523
1524 /* Program the clock tree registers. */
1525 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 0x0f, bit_div);
1526 if (ret)
1527 return ret;
1528
1529 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 0xff,
1530 (sysdiv << 4) | mipi_div);
aa288248
MR		 1531 if (ret)
1532 return ret;
1533
1534 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
1535 if (ret)
1536 return ret;
1537
6c957ed7
JM		 1538 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 0x1f,
1539 root_div | prediv);
1540 if (ret)
1541 return ret;
1542
1543 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1544 (pclk_div << 4) | (sclk2x_div << 2) | sclk_div);
aa288248
MR		 1545 if (ret)
1546 return ret;
1547
6c957ed7
JM		 1548 return ov5640_write_reg(sensor, OV5640_REG_PCLK_PERIOD, pclk_period);
1549}
1550
1551static u32 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1552{
3145efcd 1553 const struct ov5640_mode_info *mode = sensor->current_mode;
5113d5b3 1554 const struct ov5640_timings *timings = &mode->dvp_timings;
6c957ed7
JM		 1555 u32 rate;
1556
5113d5b3 1557 rate = timings->htot * (timings->crop.height + timings->vblank_def);
6c957ed7
JM		 1558 rate *= ov5640_framerates[sensor->current_fr];
1559
1560 return rate;
aa288248
MR		 1561}
1562
1563static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1564 unsigned long rate,
1565 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1566 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1567{
1568 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1569 OV5640_PCLK_ROOT_DIV;
1570
1571 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1572 sysdiv);
1573 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1574 *bit_div = OV5640_BIT_DIV;
1575 *pclk_div = OV5640_PCLK_ROOT_DIV;
1576
1577 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1578}
1579
6c957ed7 1580static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor)
aa288248
MR		 1581{
1582 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
6c957ed7 1583 u32 rate;
aa288248
MR		 1584 int ret;
1585
6c957ed7 1586 rate = ov5640_calc_pixel_rate(sensor);
a89f14bb 1587 rate *= ov5640_code_to_bpp(sensor, sensor->fmt.code);
6c957ed7
JM		 1588 rate /= sensor->ep.bus.parallel.bus_width;
1589
aa288248
MR		 1590 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1591 &bit_div, &pclk_div);
1592
1593 if (bit_div == 2)
1594 bit_div = 8;
1595
1596 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1597 0x0f, bit_div);
1598 if (ret)
1599 return ret;
1600
1601 /*
1602 * We need to set sysdiv according to the clock, and to clear
1603 * the MIPI divider.
1604 */
1605 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1606 0xff, sysdiv << 4);
1607 if (ret)
1608 return ret;
1609
1610 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1611 0xff, mult);
1612 if (ret)
1613 return ret;
1614
1615 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1616 0x1f, prediv | ((pll_rdiv - 1) << 4));
1617 if (ret)
1618 return ret;
1619
1620 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1621 (ilog2(pclk_div) << 4));
1622}
1623
7cb013b1
CYT		 1624/* set JPEG framing sizes */
1625static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1626 const struct ov5640_mode_info *mode)
1627{
1628 int ret;
1629
2b5c18f9
CYT		 1630 /*
1631 * compression mode 3 timing
1632 *
1633 * Data is transmitted with programmable width (VFIFO_HSIZE).
1634 * No padding done. Last line may have less data. Varying
1635 * number of lines per frame, depending on amount of data.
1636 */
1637 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1638 if (ret < 0)
1639 return ret;
1640
5113d5b3 1641 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->width);
7cb013b1
CYT		 1642 if (ret < 0)
1643 return ret;
1644
5113d5b3 1645 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->height);
7cb013b1
CYT		 1646}
1647
19a81c14 1648/* download ov5640 settings to sensor through i2c */
bad1774e
JM		 1649static int ov5640_set_timings(struct ov5640_dev *sensor,
1650 const struct ov5640_mode_info *mode)
1651{
5113d5b3
JM		 1652 const struct ov5640_timings *timings;
1653 const struct v4l2_rect *analog_crop;
1654 const struct v4l2_rect *crop;
bad1774e
JM		 1655 int ret;
1656
7cb013b1
CYT		 1657 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1658 ret = ov5640_set_jpeg_timings(sensor, mode);
1659 if (ret < 0)
1660 return ret;
1661 }
1662
2de6bb97 1663 timings = ov5640_timings(sensor, mode);
5113d5b3
JM		 1664 analog_crop = &timings->analog_crop;
1665 crop = &timings->crop;
1666
3145efcd
JM		 1667 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HS,
1668 analog_crop->left);
bad1774e
JM		 1669 if (ret < 0)
1670 return ret;
1671
3145efcd
JM		 1672 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VS,
1673 analog_crop->top);
1674 if (ret < 0)
1675 return ret;
1676
1677 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HW,
1678 analog_crop->left + analog_crop->width - 1);
1679 if (ret < 0)
1680 return ret;
1681
1682 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VH,
1683 analog_crop->top + analog_crop->height - 1);
1684 if (ret < 0)
1685 return ret;
1686
1687 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HOFFS, crop->left);
1688 if (ret < 0)
1689 return ret;
1690
1691 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VOFFS, crop->top);
1692 if (ret < 0)
1693 return ret;
1694
5113d5b3 1695 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->width);
3145efcd
JM		 1696 if (ret < 0)
1697 return ret;
1698
5113d5b3 1699 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->height);
bad1774e
JM		 1700 if (ret < 0)
1701 return ret;
1702
5113d5b3 1703 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, timings->htot);
bad1774e
JM		 1704 if (ret < 0)
1705 return ret;
1706
3145efcd 1707 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS,
5113d5b3 1708 mode->height + timings->vblank_def);
3145efcd
JM		 1709 if (ret < 0)
1710 return ret;
1711
1712 return 0;
bad1774e
JM		 1713}
1714
e4359019
JM		 1715static void ov5640_load_regs(struct ov5640_dev *sensor,
1716 const struct reg_value *regs, unsigned int regnum)
19a81c14 1717{
19a81c14
SL		 1718 unsigned int i;
1719 u32 delay_ms;
1720 u16 reg_addr;
1721 u8 mask, val;
1722 int ret = 0;
1723
e4359019 1724 for (i = 0; i < regnum; ++i, ++regs) {
19a81c14
SL		 1725 delay_ms = regs->delay_ms;
1726 reg_addr = regs->reg_addr;
1727 val = regs->val;
1728 mask = regs->mask;
1729
3b987d70
LP		 1730 /* remain in power down mode for DVP */
1731 if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1732 val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
8e823f5c 1733 !ov5640_is_csi2(sensor))
3b987d70
LP		 1734 continue;
1735
19a81c14
SL		 1736 if (mask)
1737 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1738 else
1739 ret = ov5640_write_reg(sensor, reg_addr, val);
1740 if (ret)
1741 break;
1742
1743 if (delay_ms)
41d8d7f5 1744 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
19a81c14 1745 }
19a81c14
SL		 1746}
1747
dc29a1c1
HF		 1748static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1749{
1750 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1751 BIT(0), on ? 0 : BIT(0));
1752}
1753
19a81c14
SL		 1754/* read exposure, in number of line periods */
1755static int ov5640_get_exposure(struct ov5640_dev *sensor)
1756{
1757 int exp, ret;
1758 u8 temp;
1759
1760 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1761 if (ret)
1762 return ret;
1763 exp = ((int)temp & 0x0f) << 16;
1764 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1765 if (ret)
1766 return ret;
1767 exp |= ((int)temp << 8);
1768 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1769 if (ret)
1770 return ret;
1771 exp |= (int)temp;
1772
1773 return exp >> 4;
1774}
1775
1776/* write exposure, given number of line periods */
1777static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1778{
1779 int ret;
1780
1781 exposure <<= 4;
1782
1783 ret = ov5640_write_reg(sensor,
1784 OV5640_REG_AEC_PK_EXPOSURE_LO,
1785 exposure & 0xff);
1786 if (ret)
1787 return ret;
1788 ret = ov5640_write_reg(sensor,
1789 OV5640_REG_AEC_PK_EXPOSURE_MED,
1790 (exposure >> 8) & 0xff);
1791 if (ret)
1792 return ret;
1793 return ov5640_write_reg(sensor,
1794 OV5640_REG_AEC_PK_EXPOSURE_HI,
1795 (exposure >> 16) & 0x0f);
1796}
1797
1798static int ov5640_get_gain(struct ov5640_dev *sensor)
1799{
1800 u16 gain;
1801 int ret;
1802
1803 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1804 if (ret)
1805 return ret;
1806
1807 return gain & 0x3ff;
1808}
1809
3cca8ef5
HF		 1810static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1811{
1812 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1813 (u16)gain & 0x3ff);
1814}
1815
1816static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1817{
1818 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1819 BIT(1), on ? 0 : BIT(1));
1820}
1821
f22996db
HF		 1822static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1823{
3b987d70
LP		 1824 return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1825 OV5640_REG_SYS_CTRL0_SW_PWUP :
1826 OV5640_REG_SYS_CTRL0_SW_PWDN);
f22996db
HF		 1827}
1828
1829static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
19a81c14
SL		 1830{
1831 int ret;
1832
aa4bb8b8
JM		 1833 /*
1834 * Enable/disable the MIPI interface
1835 *
1836 * 0x300e = on ? 0x45 : 0x40
1837 *
1838 * FIXME: the sensor manual (version 2.03) reports
1839 * [7:5] = 000 : 1 data lane mode
1840 * [7:5] = 001 : 2 data lanes mode
1841 * But this settings do not work, while the following ones
1842 * have been validated for 2 data lanes mode.
1843 *
1844 * [7:5] = 010 : 2 data lanes mode
1845 * [4] = 0 : Power up MIPI HS Tx
1846 * [3] = 0 : Power up MIPI LS Rx
1847 * [2] = 1/0 : MIPI interface enable/disable
1848 * [1:0] = 01/00: FIXME: 'debug'
1849 */
1850 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1851 on ? 0x45 : 0x40);
19a81c14
SL		 1852 if (ret)
1853 return ret;
1854
1855 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1856 on ? 0x00 : 0x0f);
1857}
1858
1859static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1860{
1861 /* calculate sysclk */
1862 u32 xvclk = sensor->xclk_freq / 10000;
1863 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1864 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1865 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1866 u8 temp1, temp2;
1867 int ret;
1868
1869 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1870 if (ret)
1871 return ret;
1872 temp2 = temp1 & 0x0f;
1873 if (temp2 == 8 || temp2 == 10)
1874 bit_div2x = temp2 / 2;
1875
1876 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1877 if (ret)
1878 return ret;
1879 sysdiv = temp1 >> 4;
1880 if (sysdiv == 0)
1881 sysdiv = 16;
1882
1883 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1884 if (ret)
1885 return ret;
1886 multiplier = temp1;
1887
1888 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1889 if (ret)
1890 return ret;
1891 prediv = temp1 & 0x0f;
1892 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1893
1894 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1895 if (ret)
1896 return ret;
1897 temp2 = temp1 & 0x03;
1898 sclk_rdiv = sclk_rdiv_map[temp2];
1899
1900 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1901 return -EINVAL;
1902
1903 VCO = xvclk * multiplier / prediv;
1904
1905 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1906
1907 return sysclk;
1908}
1909
1910static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1911{
1912 /* read HTS from register settings */
1913 u8 mode;
1914 int ret;
1915
1916 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1917 if (ret)
1918 return ret;
1919 mode &= 0xfb;
1920 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1921}
1922
1923static int ov5640_get_hts(struct ov5640_dev *sensor)
1924{
1925 /* read HTS from register settings */
1926 u16 hts;
1927 int ret;
1928
1929 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1930 if (ret)
1931 return ret;
1932 return hts;
1933}
1934
1935static int ov5640_get_vts(struct ov5640_dev *sensor)
1936{
1937 u16 vts;
1938 int ret;
1939
1940 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1941 if (ret)
1942 return ret;
1943 return vts;
1944}
1945
1946static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1947{
1948 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1949}
1950
1951static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1952{
1953 /* get banding filter value */
1954 int ret, light_freq = 0;
1955 u8 temp, temp1;
1956
1957 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1958 if (ret)
1959 return ret;
1960
1961 if (temp & 0x80) {
1962 /* manual */
1963 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1964 &temp1);
1965 if (ret)
1966 return ret;
1967 if (temp1 & 0x04) {
1968 /* 50Hz */
1969 light_freq = 50;
1970 } else {
1971 /* 60Hz */
1972 light_freq = 60;
1973 }
1974 } else {
1975 /* auto */
1976 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1977 &temp1);
1978 if (ret)
1979 return ret;
1980
1981 if (temp1 & 0x01) {
1982 /* 50Hz */
1983 light_freq = 50;
1984 } else {
1985 /* 60Hz */
1986 }
1987 }
1988
1989 return light_freq;
1990}
1991
1992static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1993{
1994 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1995 int ret;
1996
1997 /* read preview PCLK */
1998 ret = ov5640_get_sysclk(sensor);
1999 if (ret < 0)
2000 return ret;
2001 if (ret == 0)
2002 return -EINVAL;
2003 sensor->prev_sysclk = ret;
2004 /* read preview HTS */
2005 ret = ov5640_get_hts(sensor);
2006 if (ret < 0)
2007 return ret;
2008 if (ret == 0)
2009 return -EINVAL;
2010 sensor->prev_hts = ret;
2011
2012 /* read preview VTS */
2013 ret = ov5640_get_vts(sensor);
2014 if (ret < 0)
2015 return ret;
2016 prev_vts = ret;
2017
19a81c14
SL		 2018 /* calculate banding filter */
2019 /* 60Hz */
2020 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
2021 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
2022 if (ret)
2023 return ret;
2024 if (!band_step60)
2025 return -EINVAL;
2026 max_band60 = (int)((prev_vts - 4) / band_step60);
2027 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
2028 if (ret)
2029 return ret;
2030
2031 /* 50Hz */
2032 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
2033 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
2034 if (ret)
2035 return ret;
2036 if (!band_step50)
2037 return -EINVAL;
2038 max_band50 = (int)((prev_vts - 4) / band_step50);
2039 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
2040}
2041
2042static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
2043{
2044 /* stable in high */
2045 u32 fast_high, fast_low;
2046 int ret;
2047
2048 sensor->ae_low = target * 23 / 25; /* 0.92 */
2049 sensor->ae_high = target * 27 / 25; /* 1.08 */
2050
2051 fast_high = sensor->ae_high << 1;
2052 if (fast_high > 255)
2053 fast_high = 255;
2054
2055 fast_low = sensor->ae_low >> 1;
2056
2057 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
2058 if (ret)
2059 return ret;
2060 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
2061 if (ret)
2062 return ret;
2063 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
2064 if (ret)
2065 return ret;
2066 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
2067 if (ret)
2068 return ret;
2069 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
2070 if (ret)
2071 return ret;
2072 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
2073}
2074
c2c3f42d 2075static int ov5640_get_binning(struct ov5640_dev *sensor)
19a81c14
SL		 2076{
2077 u8 temp;
2078 int ret;
2079
2080 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
2081 if (ret)
2082 return ret;
c2c3f42d
HF		 2083
2084 return temp & BIT(0);
19a81c14
SL		 2085}
2086
ce85705a
HF		 2087static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
2088{
2089 int ret;
2090
2091 /*
2092 * TIMING TC REG21:
2093 * - [0]: Horizontal binning enable
2094 */
2095 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2096 BIT(0), enable ? BIT(0) : 0);
2097 if (ret)
2098 return ret;
2099 /*
2100 * TIMING TC REG20:
2101 * - [0]: Undocumented, but hardcoded init sequences
2102 * are always setting REG21/REG20 bit 0 to same value...
2103 */
2104 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2105 BIT(0), enable ? BIT(0) : 0);
2106}
2107
19a81c14
SL		 2108static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
2109{
8670d70a 2110 struct i2c_client *client = sensor->i2c_client;
19a81c14
SL		 2111 u8 temp, channel = virtual_channel;
2112 int ret;
2113
8670d70a
HF		 2114 if (channel > 3) {
2115 dev_err(&client->dev,
2116 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
2117 __func__, channel);
19a81c14 2118 return -EINVAL;
8670d70a 2119 }
19a81c14
SL		 2120
2121 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
2122 if (ret)
2123 return ret;
2124 temp &= ~(3 << 6);
2125 temp |= (channel << 6);
2126 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
2127}
2128
2129static const struct ov5640_mode_info *
b6ae5022 2130ov5640_find_mode(struct ov5640_dev *sensor, int width, int height, bool nearest)
19a81c14 2131{
3c4a7372 2132 const struct ov5640_mode_info *mode;
19a81c14 2133
086c25f8
MR		 2134 mode = v4l2_find_nearest_size(ov5640_mode_data,
2135 ARRAY_SIZE(ov5640_mode_data),
5113d5b3 2136 width, height, width, height);
19a81c14 2137
3c4a7372 2138 if (!mode ||
3145efcd 2139 (!nearest &&
5113d5b3 2140 (mode->width != width || mode->height != height)))
3c4a7372 2141 return NULL;
19a81c14
SL		 2142
2143 return mode;
2144}
2145
2146/*
2147 * sensor changes between scaling and subsampling, go through
2148 * exposure calculation
2149 */
41d8d7f5
HF		 2150static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
2151 const struct ov5640_mode_info *mode)
19a81c14
SL		 2152{
2153 u32 prev_shutter, prev_gain16;
2154 u32 cap_shutter, cap_gain16;
2155 u32 cap_sysclk, cap_hts, cap_vts;
2156 u32 light_freq, cap_bandfilt, cap_maxband;
2157 u32 cap_gain16_shutter;
2158 u8 average;
2159 int ret;
2160
41d8d7f5 2161 if (!mode->reg_data)
19a81c14
SL		 2162 return -EINVAL;
2163
2164 /* read preview shutter */
2165 ret = ov5640_get_exposure(sensor);
2166 if (ret < 0)
2167 return ret;
2168 prev_shutter = ret;
c2c3f42d 2169 ret = ov5640_get_binning(sensor);
19a81c14
SL		 2170 if (ret < 0)
2171 return ret;
2172 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
2173 mode->id != OV5640_MODE_1080P_1920_1080)
2174 prev_shutter *= 2;
2175
2176 /* read preview gain */
2177 ret = ov5640_get_gain(sensor);
2178 if (ret < 0)
2179 return ret;
2180 prev_gain16 = ret;
2181
2182 /* get average */
2183 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
2184 if (ret)
2185 return ret;
2186
2187 /* turn off night mode for capture */
2188 ret = ov5640_set_night_mode(sensor);
2189 if (ret < 0)
2190 return ret;
2191
2192 /* Write capture setting */
e4359019
JM		 2193 ov5640_load_regs(sensor, mode->reg_data, mode->reg_data_size);
2194 ret = ov5640_set_timings(sensor, mode);
19a81c14
SL		 2195 if (ret < 0)
2196 return ret;
2197
2198 /* read capture VTS */
2199 ret = ov5640_get_vts(sensor);
2200 if (ret < 0)
2201 return ret;
2202 cap_vts = ret;
2203 ret = ov5640_get_hts(sensor);
2204 if (ret < 0)
2205 return ret;
2206 if (ret == 0)
2207 return -EINVAL;
2208 cap_hts = ret;
2209
2210 ret = ov5640_get_sysclk(sensor);
2211 if (ret < 0)
2212 return ret;
2213 if (ret == 0)
2214 return -EINVAL;
2215 cap_sysclk = ret;
2216
2217 /* calculate capture banding filter */
2218 ret = ov5640_get_light_freq(sensor);
2219 if (ret < 0)
2220 return ret;
2221 light_freq = ret;
2222
2223 if (light_freq == 60) {
2224 /* 60Hz */
2225 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
2226 } else {
2227 /* 50Hz */
2228 cap_bandfilt = cap_sysclk * 100 / cap_hts;
2229 }
2230
2231 if (!sensor->prev_sysclk) {
2232 ret = ov5640_get_sysclk(sensor);
2233 if (ret < 0)
2234 return ret;
2235 if (ret == 0)
2236 return -EINVAL;
2237 sensor->prev_sysclk = ret;
2238 }
2239
2240 if (!cap_bandfilt)
2241 return -EINVAL;
2242
2243 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
2244
2245 /* calculate capture shutter/gain16 */
2246 if (average > sensor->ae_low && average < sensor->ae_high) {
2247 /* in stable range */
2248 cap_gain16_shutter =
2249 prev_gain16 * prev_shutter *
2250 cap_sysclk / sensor->prev_sysclk *
2251 sensor->prev_hts / cap_hts *
2252 sensor->ae_target / average;
2253 } else {
2254 cap_gain16_shutter =
2255 prev_gain16 * prev_shutter *
2256 cap_sysclk / sensor->prev_sysclk *
2257 sensor->prev_hts / cap_hts;
2258 }
2259
2260 /* gain to shutter */
2261 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
2262 /* shutter < 1/100 */
2263 cap_shutter = cap_gain16_shutter / 16;
2264 if (cap_shutter < 1)
2265 cap_shutter = 1;
2266
2267 cap_gain16 = cap_gain16_shutter / cap_shutter;
2268 if (cap_gain16 < 16)
2269 cap_gain16 = 16;
2270 } else {
2271 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
2272 /* exposure reach max */
2273 cap_shutter = cap_bandfilt * cap_maxband;
2274 if (!cap_shutter)
2275 return -EINVAL;
2276
2277 cap_gain16 = cap_gain16_shutter / cap_shutter;
2278 } else {
2279 /* 1/100 < (cap_shutter = n/100) =< max */
2280 cap_shutter =
2281 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
2282 * cap_bandfilt;
2283 if (!cap_shutter)
2284 return -EINVAL;
2285
2286 cap_gain16 = cap_gain16_shutter / cap_shutter;
2287 }
2288 }
2289
2290 /* set capture gain */
3cca8ef5 2291 ret = ov5640_set_gain(sensor, cap_gain16);
19a81c14
SL		 2292 if (ret)
2293 return ret;
2294
2295 /* write capture shutter */
2296 if (cap_shutter > (cap_vts - 4)) {
2297 cap_vts = cap_shutter + 4;
2298 ret = ov5640_set_vts(sensor, cap_vts);
2299 if (ret < 0)
2300 return ret;
2301 }
2302
2303 /* set exposure */
3cca8ef5 2304 return ov5640_set_exposure(sensor, cap_shutter);
19a81c14
SL		 2305}
2306
2307/*
2308 * if sensor changes inside scaling or subsampling
2309 * change mode directly
2310 */
2311static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
3cca8ef5 2312 const struct ov5640_mode_info *mode)
19a81c14 2313{
41d8d7f5 2314 if (!mode->reg_data)
19a81c14
SL		 2315 return -EINVAL;
2316
2317 /* Write capture setting */
e4359019
JM		 2318 ov5640_load_regs(sensor, mode->reg_data, mode->reg_data_size);
2319 return ov5640_set_timings(sensor, mode);
19a81c14
SL		 2320}
2321
985cdcb0 2322static int ov5640_set_mode(struct ov5640_dev *sensor)
19a81c14
SL		 2323{
2324 const struct ov5640_mode_info *mode = sensor->current_mode;
985cdcb0 2325 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
19a81c14 2326 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
3cca8ef5 2327 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
dc29a1c1 2328 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
19a81c14
SL		 2329 int ret;
2330
2331 dn_mode = mode->dn_mode;
2332 orig_dn_mode = orig_mode->dn_mode;
2333
2334 /* auto gain and exposure must be turned off when changing modes */
3cca8ef5
HF		 2335 if (auto_gain) {
2336 ret = ov5640_set_autogain(sensor, false);
2337 if (ret)
2338 return ret;
2339 }
bf4a4b51 2340
3cca8ef5
HF		 2341 if (auto_exp) {
2342 ret = ov5640_set_autoexposure(sensor, false);
2343 if (ret)
2344 goto restore_auto_gain;
2345 }
19a81c14 2346
6c957ed7
JM		 2347 if (ov5640_is_csi2(sensor))
2348 ret = ov5640_set_mipi_pclk(sensor);
2349 else
2350 ret = ov5640_set_dvp_pclk(sensor);
aa288248
MR		 2351 if (ret < 0)
2352 return 0;
2353
19a81c14
SL		 2354 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
2355 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
2356 /*
2357 * change between subsampling and scaling
3cca8ef5 2358 * go through exposure calculation
19a81c14
SL		 2359 */
2360 ret = ov5640_set_mode_exposure_calc(sensor, mode);
2361 } else {
2362 /*
2363 * change inside subsampling or scaling
2364 * download firmware directly
2365 */
3cca8ef5 2366 ret = ov5640_set_mode_direct(sensor, mode);
19a81c14 2367 }
19a81c14 2368 if (ret < 0)
3cca8ef5
HF		 2369 goto restore_auto_exp_gain;
2370
2371 /* restore auto gain and exposure */
2372 if (auto_gain)
2373 ov5640_set_autogain(sensor, true);
2374 if (auto_exp)
2375 ov5640_set_autoexposure(sensor, true);
19a81c14 2376
ce85705a
HF		 2377 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
2378 if (ret < 0)
2379 return ret;
19a81c14
SL		 2380 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
2381 if (ret < 0)
2382 return ret;
2383 ret = ov5640_get_light_freq(sensor);
2384 if (ret < 0)
2385 return ret;
2386 ret = ov5640_set_bandingfilter(sensor);
2387 if (ret < 0)
2388 return ret;
2389 ret = ov5640_set_virtual_channel(sensor);
2390 if (ret < 0)
2391 return ret;
2392
2393 sensor->pending_mode_change = false;
985cdcb0 2394 sensor->last_mode = mode;
19a81c14
SL		 2395
2396 return 0;
3cca8ef5
HF		 2397
2398restore_auto_exp_gain:
2399 if (auto_exp)
2400 ov5640_set_autoexposure(sensor, true);
2401restore_auto_gain:
2402 if (auto_gain)
2403 ov5640_set_autogain(sensor, true);
2404
2405 return ret;
19a81c14
SL		 2406}
2407
19ad26f9
AM		 2408static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2409 struct v4l2_mbus_framefmt *format);
2410
19a81c14
SL		 2411/* restore the last set video mode after chip power-on */
2412static int ov5640_restore_mode(struct ov5640_dev *sensor)
2413{
2414 int ret;
2415
2416 /* first load the initial register values */
e4359019
JM		 2417 ov5640_load_regs(sensor, ov5640_init_setting,
2418 ARRAY_SIZE(ov5640_init_setting));
19a81c14 2419
8f57c2f8 2420 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
7851fe7a
MR		 2421 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
2422 ilog2(OV5640_SCLK_ROOT_DIV));
8f57c2f8
MR		 2423 if (ret)
2424 return ret;
2425
19a81c14 2426 /* now restore the last capture mode */
985cdcb0 2427 ret = ov5640_set_mode(sensor);
19ad26f9
AM		 2428 if (ret < 0)
2429 return ret;
2430
2431 return ov5640_set_framefmt(sensor, &sensor->fmt);
19a81c14
SL		 2432}
2433
2434static void ov5640_power(struct ov5640_dev *sensor, bool enable)
2435{
1fddc5da 2436 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
19a81c14
SL		 2437}
2438
d7ff6913
JL		 2439/*
2440 * From section 2.7 power up sequence:
2441 * t0 + t1 + t2 >= 5ms Delay from DOVDD stable to PWDN pull down
2442 * t3 >= 1ms Delay from PWDN pull down to RESETB pull up
2443 * t4 >= 20ms Delay from RESETB pull up to SCCB (i2c) stable
2444 *
2445 * Some modules don't expose RESETB/PWDN pins directly, instead providing a
2446 * "PWUP" GPIO which is wired through appropriate delays and inverters to the
2447 * pins.
2448 *
2449 * In such cases, this gpio should be mapped to pwdn_gpio in the driver, and we
2450 * should still toggle the pwdn_gpio below with the appropriate delays, while
2451 * the calls to reset_gpio will be ignored.
2452 */
2453static void ov5640_powerup_sequence(struct ov5640_dev *sensor)
19a81c14 2454{
decea0a9
JL		 2455 if (sensor->pwdn_gpio) {
2456 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
19a81c14 2457
decea0a9
JL		 2458 /* camera power cycle */
2459 ov5640_power(sensor, false);
2460 usleep_range(5000, 10000);
2461 ov5640_power(sensor, true);
2462 usleep_range(5000, 10000);
19a81c14 2463
decea0a9
JL		 2464 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
2465 usleep_range(1000, 2000);
19a81c14 2466
decea0a9
JL		 2467 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
2468 } else {
2469 /* software reset */
2470 ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0,
2471 OV5640_REG_SYS_CTRL0_SW_RST);
2472 }
1d4c41f3 2473 usleep_range(20000, 25000);
decea0a9
JL		 2474
2475 /*
2476 * software standby: allows registers programming;
2477 * exit at restore_mode() for CSI, s_stream(1) for DVP
2478 */
2479 ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0,
2480 OV5640_REG_SYS_CTRL0_SW_PWDN);
19a81c14
SL		 2481}
2482
0f7acb52 2483static int ov5640_set_power_on(struct ov5640_dev *sensor)
19a81c14 2484{
0f7acb52
HF		 2485 struct i2c_client *client = sensor->i2c_client;
2486 int ret;
19a81c14 2487
0f7acb52
HF		 2488 ret = clk_prepare_enable(sensor->xclk);
2489 if (ret) {
2490 dev_err(&client->dev, "%s: failed to enable clock\n",
2491 __func__);
2492 return ret;
2493 }
19a81c14 2494
0f7acb52
HF		 2495 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
2496 sensor->supplies);
2497 if (ret) {
2498 dev_err(&client->dev, "%s: failed to enable regulators\n",
2499 __func__);
2500 goto xclk_off;
2501 }
2502
d7ff6913 2503 ov5640_powerup_sequence(sensor);
0f7acb52
HF		 2504
2505 ret = ov5640_init_slave_id(sensor);
2506 if (ret)
2507 goto power_off;
2508
2509 return 0;
2510
2511power_off:
2512 ov5640_power(sensor, false);
2513 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2514xclk_off:
2515 clk_disable_unprepare(sensor->xclk);
2516 return ret;
2517}
2518
2519static void ov5640_set_power_off(struct ov5640_dev *sensor)
2520{
2521 ov5640_power(sensor, false);
2522 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2523 clk_disable_unprepare(sensor->xclk);
2524}
19a81c14 2525
b1751ae6
LP		 2526static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
2527{
2528 int ret;
2529
2530 if (!on) {
2531 /* Reset MIPI bus settings to their default values. */
2532 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2533 ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
2534 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
2535 return 0;
2536 }
2537
2538 /*
2539 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
2540 *
2541 * 0x300e = 0x40
2542 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
2543 * "ov5640_set_stream_mipi()")
2544 * [4] = 0 : Power up MIPI HS Tx
2545 * [3] = 0 : Power up MIPI LS Rx
2546 * [2] = 0 : MIPI interface disabled
2547 */
2548 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
2549 if (ret)
2550 return ret;
2551
2552 /*
2553 * Gate clock and set LP11 in 'no packets mode' (idle)
2554 *
2555 * 0x4800 = 0x24
2556 * [5] = 1 : Gate clock when 'no packets'
2557 * [2] = 1 : MIPI bus in LP11 when 'no packets'
2558 */
2559 ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
2560 if (ret)
2561 return ret;
2562
2563 /*
2564 * Set data lanes and clock in LP11 when 'sleeping'
2565 *
2566 * 0x3019 = 0x70
2567 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2568 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2569 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2570 */
2571 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
2572 if (ret)
2573 return ret;
2574
2575 /* Give lanes some time to coax into LP11 state. */
2576 usleep_range(500, 1000);
2577
2578 return 0;
2579}
2580
576f5d4b
LP		 2581static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
2582{
311a6408 2583 unsigned int flags = sensor->ep.bus.parallel.flags;
68579b32
HF		 2584 bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
2585 u8 polarities = 0;
576f5d4b
LP		 2586 int ret;
2587
2588 if (!on) {
2589 /* Reset settings to their default values. */
68579b32 2590 ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
311a6408
LP		 2591 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2592 ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
576f5d4b
LP		 2593 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
2594 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
2595 return 0;
2596 }
2597
311a6408
LP		 2598 /*
2599 * Note about parallel port configuration.
2600 *
2601 * When configured in parallel mode, the OV5640 will
2602 * output 10 bits data on DVP data lines [9:0].
2603 * If only 8 bits data are wanted, the 8 bits data lines
2604 * of the camera interface must be physically connected
2605 * on the DVP data lines [9:2].
2606 *
2607 * Control lines polarity can be configured through
2608 * devicetree endpoint control lines properties.
2609 * If no endpoint control lines properties are set,
2610 * polarity will be as below:
2611 * - VSYNC: active high
2612 * - HREF: active low
2613 * - PCLK: active low
68579b32
HF		 2614 *
2615 * VSYNC & HREF are not configured if BT656 bus mode is selected
311a6408 2616 */
68579b32
HF		 2617
2618 /*
2619 * BT656 embedded synchronization configuration
2620 *
2621 * CCIR656 CTRL00
2622 * - [7]: SYNC code selection (0: auto generate sync code,
2623 * 1: sync code from regs 0x4732-0x4735)
2624 * - [6]: f value in CCIR656 SYNC code when fixed f value
2625 * - [5]: Fixed f value
2626 * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200,
2627 * 01: data from regs 0x4736-0x4738, 10: always keep 0)
2628 * - [1]: Clip data disable
2629 * - [0]: CCIR656 mode enable
2630 *
2631 * Default CCIR656 SAV/EAV mode with default codes
2632 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
2633 * - CCIR656 mode enable
2634 * - auto generation of sync codes
2635 * - blank toggle data 1'h040/1'h200
2636 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
2637 */
2638 ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
2639 bt656 ? 0x01 : 0x00);
2640 if (ret)
2641 return ret;
2642
311a6408
LP		 2643 /*
2644 * configure parallel port control lines polarity
2645 *
2646 * POLARITY CTRL0
2647 * - [5]: PCLK polarity (0: active low, 1: active high)
2648 * - [1]: HREF polarity (0: active low, 1: active high)
2649 * - [0]: VSYNC polarity (mismatch here between
2650 * datasheet and hardware, 0 is active high
2651 * and 1 is active low...)
2652 */
68579b32 2653 if (!bt656) {
4039b037 2654 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
68579b32 2655 polarities |= BIT(1);
4039b037 2656 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
68579b32 2657 polarities |= BIT(0);
4039b037 2658 }
68579b32
HF		 2659 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2660 polarities |= BIT(5);
2661
2662 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
2663 if (ret)
2664 return ret;
311a6408
LP		 2665
2666 /*
68579b32 2667 * powerdown MIPI TX/RX PHY & enable DVP
311a6408
LP		 2668 *
2669 * MIPI CONTROL 00
68579b32
HF		 2670 * [4] = 1 : Power down MIPI HS Tx
2671 * [3] = 1 : Power down MIPI LS Rx
2672 * [2] = 0 : DVP enable (MIPI disable)
311a6408
LP		 2673 */
2674 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2675 if (ret)
2676 return ret;
2677
576f5d4b
LP		 2678 /*
2679 * enable VSYNC/HREF/PCLK DVP control lines
2680 * & D[9:6] DVP data lines
2681 *
2682 * PAD OUTPUT ENABLE 01
2683 * - 6: VSYNC output enable
2684 * - 5: HREF output enable
2685 * - 4: PCLK output enable
2686 * - [3:0]: D[9:6] output enable
2687 */
4039b037 2688 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
68579b32 2689 bt656 ? 0x1f : 0x7f);
576f5d4b
LP		 2690 if (ret)
2691 return ret;
2692
2693 /*
2694 * enable D[5:0] DVP data lines
2695 *
2696 * PAD OUTPUT ENABLE 02
2697 * - [7:2]: D[5:0] output enable
2698 */
2699 return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2700}
2701
0f7acb52
HF		 2702static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2703{
2704 int ret = 0;
19a81c14 2705
0f7acb52
HF		 2706 if (on) {
2707 ret = ov5640_set_power_on(sensor);
19a81c14 2708 if (ret)
0f7acb52 2709 return ret;
19a81c14
SL		 2710
2711 ret = ov5640_restore_mode(sensor);
2712 if (ret)
2713 goto power_off;
b1751ae6 2714 }
19a81c14 2715
576f5d4b 2716 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
b1751ae6 2717 ret = ov5640_set_power_mipi(sensor, on);
576f5d4b
LP		 2718 else
2719 ret = ov5640_set_power_dvp(sensor, on);
2720 if (ret)
2721 goto power_off;
aa4bb8b8 2722
b1751ae6 2723 if (!on)
aa4bb8b8 2724 ov5640_set_power_off(sensor);
19a81c14 2725
aa4bb8b8
JM		 2726 return 0;
2727
19a81c14 2728power_off:
0f7acb52 2729 ov5640_set_power_off(sensor);
19a81c14
SL		 2730 return ret;
2731}
2732
85644a9b 2733static int ov5640_sensor_suspend(struct device *dev)
19a81c14 2734{
85644a9b
PE		 2735 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2736 struct ov5640_dev *ov5640 = to_ov5640_dev(sd);
19a81c14 2737
85644a9b
PE		 2738 return ov5640_set_power(ov5640, false);
2739}
19a81c14 2740
85644a9b
PE		 2741static int ov5640_sensor_resume(struct device *dev)
2742{
2743 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2744 struct ov5640_dev *ov5640 = to_ov5640_dev(sd);
19a81c14 2745
85644a9b 2746 return ov5640_set_power(ov5640, true);
19a81c14
SL		 2747}
2748
85644a9b
PE		 2749/* --------------- Subdev Operations --------------- */
2750
19a81c14
SL		 2751static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2752 struct v4l2_fract *fi,
f33b56d3 2753 const struct ov5640_mode_info *mode_info)
19a81c14 2754{
f33b56d3 2755 const struct ov5640_mode_info *mode = mode_info;
6530a5eb 2756 enum ov5640_frame_rate rate = OV5640_15_FPS;
f6cc192f
MR		 2757 int minfps, maxfps, best_fps, fps;
2758 int i;
19a81c14
SL		 2759
2760 minfps = ov5640_framerates[OV5640_15_FPS];
f33b56d3 2761 maxfps = ov5640_framerates[mode->max_fps];
19a81c14
SL		 2762
2763 if (fi->numerator == 0) {
2764 fi->denominator = maxfps;
2765 fi->numerator = 1;
f33b56d3 2766 rate = mode->max_fps;
e823fb16 2767 goto find_mode;
19a81c14
SL		 2768 }
2769
f6cc192f
MR		 2770 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2771 minfps, maxfps);
19a81c14 2772
f6cc192f
MR		 2773 best_fps = minfps;
2774 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2775 int curr_fps = ov5640_framerates[i];
19a81c14 2776
f6cc192f
MR		 2777 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2778 best_fps = curr_fps;
2779 rate = i;
2780 }
2781 }
2782
2783 fi->numerator = 1;
2784 fi->denominator = best_fps;
19a81c14 2785
e823fb16 2786find_mode:
f33b56d3 2787 mode = ov5640_find_mode(sensor, mode->width, mode->height, false);
5a3ad937 2788 return mode ? rate : -EINVAL;
19a81c14
SL		 2789}
2790
2791static int ov5640_get_fmt(struct v4l2_subdev *sd,
0d346d2a 2792 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 2793 struct v4l2_subdev_format *format)
2794{
2795 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2796 struct v4l2_mbus_framefmt *fmt;
2797
2798 if (format->pad != 0)
2799 return -EINVAL;
2800
2801 mutex_lock(&sensor->lock);
2802
2803 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
0d346d2a 2804 fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state,
19a81c14
SL		 2805 format->pad);
2806 else
2807 fmt = &sensor->fmt;
2808
2809 format->format = *fmt;
2810
2811 mutex_unlock(&sensor->lock);
2812
2813 return 0;
2814}
2815
2816static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2817 struct v4l2_mbus_framefmt *fmt,
2818 enum ov5640_frame_rate fr,
2819 const struct ov5640_mode_info **new_mode)
2820{
2821 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2822 const struct ov5640_mode_info *mode;
a89f14bb
JM		 2823 const struct ov5640_pixfmt *pixfmt;
2824 unsigned int bpp;
19a81c14 2825
b6ae5022 2826 mode = ov5640_find_mode(sensor, fmt->width, fmt->height, true);
19a81c14
SL		 2827 if (!mode)
2828 return -EINVAL;
dd81b8ff 2829
a89f14bb
JM		 2830 pixfmt = ov5640_code_to_pixfmt(sensor, fmt->code);
2831 bpp = pixfmt->bpp;
2832
dd81b8ff
JM		 2833 /*
2834 * Adjust mode according to bpp:
2835 * - 8bpp modes work for resolution >= 1280x720
2836 * - 24bpp modes work resolution < 1280x720
2837 */
2838 if (bpp == 8 && mode->width < 1280)
2839 mode = &ov5640_mode_data[OV5640_MODE_720P_1280_720];
2840 else if (bpp == 24 && mode->width > 1024)
2841 mode = &ov5640_mode_data[OV5640_MODE_XGA_1024_768];
2842
5113d5b3
JM		 2843 fmt->width = mode->width;
2844 fmt->height = mode->height;
19a81c14
SL		 2845
2846 if (new_mode)
2847 *new_mode = mode;
e3ee691d 2848
a89f14bb
JM		 2849 fmt->code = pixfmt->code;
2850 fmt->colorspace = pixfmt->colorspace;
e6441fde
HF		 2851 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2852 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2853 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
e3ee691d 2854
19a81c14
SL		 2855 return 0;
2856}
2857
3c28588f
JM		 2858static int ov5640_update_pixel_rate(struct ov5640_dev *sensor)
2859{
2860 const struct ov5640_mode_info *mode = sensor->current_mode;
2861 enum ov5640_pixel_rate_id pixel_rate_id = mode->pixel_rate;
2862 struct v4l2_mbus_framefmt *fmt = &sensor->fmt;
32979f67 2863 const struct ov5640_timings *timings;
bce93b82 2864 s32 exposure_val, exposure_max;
32979f67 2865 unsigned int hblank;
3c28588f
JM		 2866 unsigned int i = 0;
2867 u32 pixel_rate;
2868 s64 link_freq;
2869 u32 num_lanes;
19f2e3e6 2870 u32 vblank;
3c28588f
JM		 2871 u32 bpp;
2872
2873 /*
2874 * Update the pixel rate control value.
2875 *
2876 * For DVP mode, maintain the pixel rate calculation using fixed FPS.
2877 */
2878 if (!ov5640_is_csi2(sensor)) {
2879 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2880 ov5640_calc_pixel_rate(sensor));
2881
2882 return 0;
2883 }
2884
2885 /*
2886 * The MIPI CSI-2 link frequency should comply with the CSI-2
2887 * specification and be lower than 1GHz.
2888 *
2889 * Start from the suggested pixel_rate for the current mode and
2890 * progressively slow it down if it exceeds 1GHz.
2891 */
2892 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
a89f14bb 2893 bpp = ov5640_code_to_bpp(sensor, fmt->code);
3c28588f
JM		 2894 do {
2895 pixel_rate = ov5640_pixel_rates[pixel_rate_id];
2896 link_freq = pixel_rate * bpp / (2 * num_lanes);
2897 } while (link_freq >= 1000000000U &&
2898 ++pixel_rate_id < OV5640_NUM_PIXEL_RATES);
2899
2900 sensor->current_link_freq = link_freq;
2901
2902 /*
2903 * Higher link rates require the clock tree to be programmed with
2904 * 'mipi_div' = 1; this has the effect of halving the actual output
2905 * pixel rate in the MIPI domain.
2906 *
2907 * Adjust the pixel rate and link frequency control value to report it
2908 * correctly to userspace.
2909 */
2910 if (link_freq > OV5640_LINK_RATE_MAX) {
2911 pixel_rate /= 2;
2912 link_freq /= 2;
2913 }
2914
2915 for (i = 0; i < ARRAY_SIZE(ov5640_csi2_link_freqs); ++i) {
2916 if (ov5640_csi2_link_freqs[i] == link_freq)
2917 break;
2918 }
2919 WARN_ON(i == ARRAY_SIZE(ov5640_csi2_link_freqs));
2920
2921 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, pixel_rate);
2922 __v4l2_ctrl_s_ctrl(sensor->ctrls.link_freq, i);
2923
32979f67
JM		 2924 timings = ov5640_timings(sensor, mode);
2925 hblank = timings->htot - mode->width;
2926 __v4l2_ctrl_modify_range(sensor->ctrls.hblank,
2927 hblank, hblank, 1, hblank);
2928
19f2e3e6
HF		 2929 vblank = timings->vblank_def;
2930
2931 if (sensor->current_fr != mode->def_fps) {
2932 /*
2933 * Compute the vertical blanking according to the framerate
2934 * configured with s_frame_interval.
2935 */
2936 int fie_num = sensor->frame_interval.numerator;
2937 int fie_denom = sensor->frame_interval.denominator;
2938
2939 vblank = ((fie_num * pixel_rate / fie_denom) / timings->htot) -
2940 mode->height;
2941 }
2942
bce93b82 2943 __v4l2_ctrl_modify_range(sensor->ctrls.vblank, OV5640_MIN_VBLANK,
19f2e3e6
HF		 2944 OV5640_MAX_VTS - mode->height, 1, vblank);
2945 __v4l2_ctrl_s_ctrl(sensor->ctrls.vblank, vblank);
bce93b82 2946
19f2e3e6 2947 exposure_max = timings->crop.height + vblank - 4;
bce93b82
JM		 2948 exposure_val = clamp_t(s32, sensor->ctrls.exposure->val,
2949 sensor->ctrls.exposure->minimum,
2950 exposure_max);
19f2e3e6 2951
bce93b82
JM		 2952 __v4l2_ctrl_modify_range(sensor->ctrls.exposure,
2953 sensor->ctrls.exposure->minimum,
2954 exposure_max, 1, exposure_val);
2955
3c28588f
JM		 2956 return 0;
2957}
2958
19a81c14 2959static int ov5640_set_fmt(struct v4l2_subdev *sd,
0d346d2a 2960 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 2961 struct v4l2_subdev_format *format)
2962{
2963 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2964 const struct ov5640_mode_info *new_mode;
e6441fde 2965 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
19a81c14
SL		 2966 int ret;
2967
2968 if (format->pad != 0)
2969 return -EINVAL;
2970
2971 mutex_lock(&sensor->lock);
2972
2973 if (sensor->streaming) {
2974 ret = -EBUSY;
2975 goto out;
2976 }
2977
e6441fde 2978 ret = ov5640_try_fmt_internal(sd, mbus_fmt,
19a81c14
SL		 2979 sensor->current_fr, &new_mode);
2980 if (ret)
2981 goto out;
2982
e738f5dd
MR		 2983 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
2984 *v4l2_subdev_get_try_format(sd, sd_state, 0) = *mbus_fmt;
2985 goto out;
2986 }
19a81c14 2987
6949d864 2988 if (new_mode != sensor->current_mode) {
19f2e3e6 2989 sensor->current_fr = new_mode->def_fps;
6949d864 2990 sensor->current_mode = new_mode;
6949d864
HF		 2991 sensor->pending_mode_change = true;
2992 }
07115449 2993 if (mbus_fmt->code != sensor->fmt.code)
fb98e29f 2994 sensor->pending_fmt_change = true;
07115449 2995
e738f5dd
MR		 2996 /* update format even if code is unchanged, resolution might change */
2997 sensor->fmt = *mbus_fmt;
2998
3c28588f
JM		 2999 ov5640_update_pixel_rate(sensor);
3000
19a81c14
SL		 3001out:
3002 mutex_unlock(&sensor->lock);
3003 return ret;
3004}
3005
66ed85eb
JM		 3006static int ov5640_get_selection(struct v4l2_subdev *sd,
3007 struct v4l2_subdev_state *sd_state,
3008 struct v4l2_subdev_selection *sel)
3009{
3010 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3011 const struct ov5640_mode_info *mode = sensor->current_mode;
3012 const struct ov5640_timings *timings;
3013
3014 switch (sel->target) {
3015 case V4L2_SEL_TGT_CROP: {
3016 mutex_lock(&sensor->lock);
3017 timings = ov5640_timings(sensor, mode);
3018 sel->r = timings->analog_crop;
3019 mutex_unlock(&sensor->lock);
3020
3021 return 0;
3022 }
3023
3024 case V4L2_SEL_TGT_NATIVE_SIZE:
3025 case V4L2_SEL_TGT_CROP_BOUNDS:
3026 sel->r.top = 0;
3027 sel->r.left = 0;
3028 sel->r.width = OV5640_NATIVE_WIDTH;
3029 sel->r.height = OV5640_NATIVE_HEIGHT;
3030
3031 return 0;
3032
3033 case V4L2_SEL_TGT_CROP_DEFAULT:
3034 sel->r.top = OV5640_PIXEL_ARRAY_TOP;
3035 sel->r.left = OV5640_PIXEL_ARRAY_LEFT;
3036 sel->r.width = OV5640_PIXEL_ARRAY_WIDTH;
3037 sel->r.height = OV5640_PIXEL_ARRAY_HEIGHT;
3038
3039 return 0;
3040 }
3041
3042 return -EINVAL;
3043}
3044
e3ee691d
HF		 3045static int ov5640_set_framefmt(struct ov5640_dev *sensor,
3046 struct v4l2_mbus_framefmt *format)
3047{
935fbc94
JM		 3048 bool is_jpeg = format->code == MEDIA_BUS_FMT_JPEG_1X8;
3049 const struct ov5640_pixfmt *pixfmt;
e3ee691d 3050 int ret = 0;
e3ee691d 3051
935fbc94 3052 pixfmt = ov5640_code_to_pixfmt(sensor, format->code);
e3ee691d
HF		 3053
3054 /* FORMAT CONTROL00: YUV and RGB formatting */
935fbc94
JM		 3055 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00,
3056 pixfmt->ctrl00);
e3ee691d
HF		 3057 if (ret)
3058 return ret;
3059
3060 /* FORMAT MUX CONTROL: ISP YUV or RGB */
935fbc94
JM		 3061 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL,
3062 pixfmt->mux);
d47c4126
HF		 3063 if (ret)
3064 return ret;
3065
3066 /*
3067 * TIMING TC REG21:
3068 * - [5]: JPEG enable
3069 */
3070 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
3071 BIT(5), is_jpeg ? BIT(5) : 0);
3072 if (ret)
3073 return ret;
3074
3075 /*
3076 * SYSTEM RESET02:
3077 * - [4]: Reset JFIFO
3078 * - [3]: Reset SFIFO
3079 * - [2]: Reset JPEG
3080 */
3081 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
3082 BIT(4) | BIT(3) | BIT(2),
3083 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
3084 if (ret)
3085 return ret;
3086
3087 /*
3088 * CLOCK ENABLE02:
3089 * - [5]: Enable JPEG 2x clock
3090 * - [3]: Enable JPEG clock
3091 */
3092 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
3093 BIT(5) | BIT(3),
3094 is_jpeg ? (BIT(5) | BIT(3)) : 0);
e3ee691d 3095}
19a81c14
SL		 3096
3097/*
3098 * Sensor Controls.
3099 */
3100
3101static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
3102{
3103 int ret;
3104
3105 if (value) {
3106 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
3107 BIT(0), BIT(0));
3108 if (ret)
3109 return ret;
3110 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
3111 } else {
3112 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
3113 }
3114
3115 return ret;
3116}
3117
3118static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
3119{
3120 int ret;
3121
3122 if (value) {
3123 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
3124 BIT(2), BIT(2));
3125 if (ret)
3126 return ret;
3127 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
3128 value & 0xff);
3129 } else {
3130 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
3131 }
3132
3133 return ret;
3134}
3135
3136static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
3137{
3138 int ret;
3139
3140 if (value) {
3141 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
3142 BIT(1), BIT(1));
3143 if (ret)
3144 return ret;
3145 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
3146 value & 0xff);
3147 if (ret)
3148 return ret;
3149 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
3150 value & 0xff);
3151 } else {
3152 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
3153 }
3154
3155 return ret;
3156}
3157
3158static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
3159{
3160 int ret;
3161
3162 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
3163 BIT(0), awb ? 0 : 1);
3164 if (ret)
3165 return ret;
3166
3167 if (!awb) {
3168 u16 red = (u16)sensor->ctrls.red_balance->val;
3169 u16 blue = (u16)sensor->ctrls.blue_balance->val;
3170
3171 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
3172 if (ret)
3173 return ret;
3174 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
3175 }
3176
3177 return ret;
3178}
3179
3cca8ef5
HF		 3180static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
3181 enum v4l2_exposure_auto_type auto_exposure)
19a81c14
SL		 3182{
3183 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3cca8ef5 3184 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
19a81c14
SL		 3185 int ret = 0;
3186
3187 if (ctrls->auto_exp->is_new) {
3cca8ef5 3188 ret = ov5640_set_autoexposure(sensor, auto_exp);
19a81c14
SL		 3189 if (ret)
3190 return ret;
3191 }
3192
3cca8ef5 3193 if (!auto_exp && ctrls->exposure->is_new) {
19a81c14
SL		 3194 u16 max_exp;
3195
3196 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
3197 &max_exp);
3198 if (ret)
3199 return ret;
3200 ret = ov5640_get_vts(sensor);
3201 if (ret < 0)
3202 return ret;
3203 max_exp += ret;
6146fde3 3204 ret = 0;
19a81c14
SL		 3205
3206 if (ctrls->exposure->val < max_exp)
3207 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
3208 }
3209
3210 return ret;
3211}
3212
3cca8ef5 3213static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
19a81c14
SL		 3214{
3215 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3216 int ret = 0;
3217
3218 if (ctrls->auto_gain->is_new) {
3cca8ef5 3219 ret = ov5640_set_autogain(sensor, auto_gain);
19a81c14
SL		 3220 if (ret)
3221 return ret;
3222 }
3223
3cca8ef5
HF		 3224 if (!auto_gain && ctrls->gain->is_new)
3225 ret = ov5640_set_gain(sensor, ctrls->gain->val);
19a81c14
SL		 3226
3227 return ret;
3228}
3229
9f6d7bac
CYT		 3230static const char * const test_pattern_menu[] = {
3231 "Disabled",
3232 "Color bars",
bddc5cdf
CYT		 3233 "Color bars w/ rolling bar",
3234 "Color squares",
3235 "Color squares w/ rolling bar",
9f6d7bac
CYT		 3236};
3237
a0c29afb
CYT		 3238#define OV5640_TEST_ENABLE BIT(7)
3239#define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
3240#define OV5640_TEST_TRANSPARENT BIT(5)
3241#define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
3242#define OV5640_TEST_BAR_STANDARD (0 << 2)
3243#define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
3244#define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
3245#define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
3246#define OV5640_TEST_BAR (0 << 0)
3247#define OV5640_TEST_RANDOM (1 << 0)
3248#define OV5640_TEST_SQUARE (2 << 0)
3249#define OV5640_TEST_BLACK (3 << 0)
3250
3251static const u8 test_pattern_val[] = {
3252 0,
2aff1fc3 3253 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
a0c29afb 3254 OV5640_TEST_BAR,
bddc5cdf
CYT		 3255 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
3256 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
3257 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
3258 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
a0c29afb
CYT		 3259};
3260
19a81c14
SL		 3261static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
3262{
a0c29afb
CYT		 3263 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
3264 test_pattern_val[value]);
19a81c14
SL		 3265}
3266
1068feca
MJ		 3267static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
3268{
3269 int ret;
3270
3271 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
3272 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
3273 0 : BIT(7));
3274 if (ret)
3275 return ret;
3276
3277 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
3278 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
3279 BIT(2) : 0);
3280}
3281
ce85705a
HF		 3282static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
3283{
3284 /*
c3f3ba3e
HF		 3285 * If sensor is mounted upside down, mirror logic is inversed.
3286 *
ce85705a
HF		 3287 * Sensor is a BSI (Back Side Illuminated) one,
3288 * so image captured is physically mirrored.
3289 * This is why mirror logic is inversed in
3290 * order to cancel this mirror effect.
3291 */
3292
3293 /*
3294 * TIMING TC REG21:
3295 * - [2]: ISP mirror
3296 * - [1]: Sensor mirror
3297 */
3298 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
3299 BIT(2) | BIT(1),
c3f3ba3e
HF		 3300 (!(value ^ sensor->upside_down)) ?
3301 (BIT(2) | BIT(1)) : 0);
ce85705a
HF		 3302}
3303
3304static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
3305{
c3f3ba3e
HF		 3306 /* If sensor is mounted upside down, flip logic is inversed */
3307
ce85705a
HF		 3308 /*
3309 * TIMING TC REG20:
3310 * - [2]: ISP vflip
3311 * - [1]: Sensor vflip
3312 */
3313 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
3314 BIT(2) | BIT(1),
c3f3ba3e
HF		 3315 (value ^ sensor->upside_down) ?
3316 (BIT(2) | BIT(1)) : 0);
ce85705a
HF		 3317}
3318
bce93b82
JM		 3319static int ov5640_set_ctrl_vblank(struct ov5640_dev *sensor, int value)
3320{
3321 const struct ov5640_mode_info *mode = sensor->current_mode;
3322
3323 /* Update the VTOT timing register value. */
3324 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS,
3325 mode->height + value);
3326}
3327
19a81c14
SL		 3328static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
3329{
3330 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
3331 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3332 int val;
3333
3334 /* v4l2_ctrl_lock() locks our own mutex */
3335
85644a9b
PE		 3336 if (!pm_runtime_get_if_in_use(&sensor->i2c_client->dev))
3337 return 0;
3338
19a81c14
SL		 3339 switch (ctrl->id) {
3340 case V4L2_CID_AUTOGAIN:
19a81c14
SL		 3341 val = ov5640_get_gain(sensor);
3342 if (val < 0)
3343 return val;
3344 sensor->ctrls.gain->val = val;
3345 break;
3346 case V4L2_CID_EXPOSURE_AUTO:
19a81c14
SL		 3347 val = ov5640_get_exposure(sensor);
3348 if (val < 0)
3349 return val;
3350 sensor->ctrls.exposure->val = val;
3351 break;
3352 }
3353
e13064a3 3354 pm_runtime_mark_last_busy(&sensor->i2c_client->dev);
85644a9b
PE		 3355 pm_runtime_put_autosuspend(&sensor->i2c_client->dev);
3356
19a81c14
SL		 3357 return 0;
3358}
3359
3360static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
3361{
3362 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
3363 struct ov5640_dev *sensor = to_ov5640_dev(sd);
bce93b82
JM		 3364 const struct ov5640_mode_info *mode = sensor->current_mode;
3365 const struct ov5640_timings *timings;
3366 unsigned int exp_max;
19a81c14
SL		 3367 int ret;
3368
3369 /* v4l2_ctrl_lock() locks our own mutex */
3370
bce93b82
JM		 3371 switch (ctrl->id) {
3372 case V4L2_CID_VBLANK:
3373 /* Update the exposure range to the newly programmed vblank. */
3374 timings = ov5640_timings(sensor, mode);
3375 exp_max = mode->height + ctrl->val - 4;
3376 __v4l2_ctrl_modify_range(sensor->ctrls.exposure,
3377 sensor->ctrls.exposure->minimum,
3378 exp_max, sensor->ctrls.exposure->step,
3379 timings->vblank_def);
3380 break;
3381 }
3382
19a81c14
SL		 3383 /*
3384 * If the device is not powered up by the host driver do
3385 * not apply any controls to H/W at this time. Instead
85644a9b 3386 * the controls will be restored at start streaming time.
19a81c14 3387 */
85644a9b 3388 if (!pm_runtime_get_if_in_use(&sensor->i2c_client->dev))
19a81c14
SL		 3389 return 0;
3390
3391 switch (ctrl->id) {
3392 case V4L2_CID_AUTOGAIN:
3393 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
3394 break;
3395 case V4L2_CID_EXPOSURE_AUTO:
3396 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
3397 break;
3398 case V4L2_CID_AUTO_WHITE_BALANCE:
3399 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
3400 break;
3401 case V4L2_CID_HUE:
3402 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
3403 break;
3404 case V4L2_CID_CONTRAST:
3405 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
3406 break;
3407 case V4L2_CID_SATURATION:
3408 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
3409 break;
3410 case V4L2_CID_TEST_PATTERN:
3411 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
3412 break;
1068feca
MJ		 3413 case V4L2_CID_POWER_LINE_FREQUENCY:
3414 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
3415 break;
ce85705a
HF		 3416 case V4L2_CID_HFLIP:
3417 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
3418 break;
3419 case V4L2_CID_VFLIP:
3420 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
3421 break;
bce93b82
JM		 3422 case V4L2_CID_VBLANK:
3423 ret = ov5640_set_ctrl_vblank(sensor, ctrl->val);
3424 break;
19a81c14
SL		 3425 default:
3426 ret = -EINVAL;
3427 break;
3428 }
3429
e13064a3 3430 pm_runtime_mark_last_busy(&sensor->i2c_client->dev);
85644a9b
PE		 3431 pm_runtime_put_autosuspend(&sensor->i2c_client->dev);
3432
19a81c14
SL		 3433 return ret;
3434}
3435
3436static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
3437 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
3438 .s_ctrl = ov5640_s_ctrl,
3439};
3440
19a81c14
SL		 3441static int ov5640_init_controls(struct ov5640_dev *sensor)
3442{
22845bf2 3443 const struct ov5640_mode_info *mode = sensor->current_mode;
19a81c14
SL		 3444 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
3445 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3446 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
1066fc1c 3447 struct v4l2_fwnode_device_properties props;
32979f67 3448 const struct ov5640_timings *timings;
bce93b82 3449 unsigned int max_vblank;
32979f67 3450 unsigned int hblank;
19a81c14
SL		 3451 int ret;
3452
3453 v4l2_ctrl_handler_init(hdl, 32);
3454
3455 /* we can use our own mutex for the ctrl lock */
3456 hdl->lock = &sensor->lock;
3457
cc196e48
BP		 3458 /* Clock related controls */
3459 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
22845bf2
JM		 3460 ov5640_pixel_rates[OV5640_NUM_PIXEL_RATES - 1],
3461 ov5640_pixel_rates[0], 1,
3462 ov5640_pixel_rates[mode->pixel_rate]);
cc196e48 3463
7a3b8d4b
JM		 3464 ctrls->link_freq = v4l2_ctrl_new_int_menu(hdl, ops,
3465 V4L2_CID_LINK_FREQ,
3466 ARRAY_SIZE(ov5640_csi2_link_freqs) - 1,
3467 OV5640_DEFAULT_LINK_FREQ,
3468 ov5640_csi2_link_freqs);
3469
32979f67
JM		 3470 timings = ov5640_timings(sensor, mode);
3471 hblank = timings->htot - mode->width;
3472 ctrls->hblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, hblank,
3473 hblank, 1, hblank);
3474
bce93b82
JM		 3475 max_vblank = OV5640_MAX_VTS - mode->height;
3476 ctrls->vblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VBLANK,
3477 OV5640_MIN_VBLANK, max_vblank,
3478 1, timings->vblank_def);
3479
19a81c14
SL		 3480 /* Auto/manual white balance */
3481 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
3482 V4L2_CID_AUTO_WHITE_BALANCE,
3483 0, 1, 1, 1);
3484 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
3485 0, 4095, 1, 0);
3486 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
3487 0, 4095, 1, 0);
3488 /* Auto/manual exposure */
3489 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
3490 V4L2_CID_EXPOSURE_AUTO,
3491 V4L2_EXPOSURE_MANUAL, 0,
3492 V4L2_EXPOSURE_AUTO);
3493 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
3494 0, 65535, 1, 0);
3495 /* Auto/manual gain */
3496 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
3497 0, 1, 1, 1);
afa48057 3498 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN,
19a81c14
SL		 3499 0, 1023, 1, 0);
3500
3501 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
3502 0, 255, 1, 64);
3503 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
3504 0, 359, 1, 0);
3505 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
3506 0, 255, 1, 0);
3507 ctrls->test_pattern =
3508 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
3509 ARRAY_SIZE(test_pattern_menu) - 1,
3510 0, 0, test_pattern_menu);
ce85705a
HF		 3511 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
3512 0, 1, 1, 0);
3513 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
3514 0, 1, 1, 0);
19a81c14 3515
1068feca
MJ		 3516 ctrls->light_freq =
3517 v4l2_ctrl_new_std_menu(hdl, ops,
3518 V4L2_CID_POWER_LINE_FREQUENCY,
3519 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
3520 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
3521
19a81c14
SL		 3522 if (hdl->error) {
3523 ret = hdl->error;
3524 goto free_ctrls;
3525 }
3526
1066fc1c
JM		 3527 ret = v4l2_fwnode_device_parse(&sensor->i2c_client->dev, &props);
3528 if (ret)
3529 goto free_ctrls;
3530
3531 if (props.rotation == 180)
3532 sensor->upside_down = true;
3533
3534 ret = v4l2_ctrl_new_fwnode_properties(hdl, ops, &props);
3535 if (ret)
3536 goto free_ctrls;
3537
cc196e48 3538 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
7a3b8d4b 3539 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
32979f67 3540 ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
19a81c14
SL		 3541 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
3542 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
3543
3544 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
3545 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
3546 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
3547
3548 sensor->sd.ctrl_handler = hdl;
3549 return 0;
3550
3551free_ctrls:
3552 v4l2_ctrl_handler_free(hdl);
3553 return ret;
3554}
3555
3556static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
0d346d2a 3557 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 3558 struct v4l2_subdev_frame_size_enum *fse)
3559{
a89f14bb
JM		 3560 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3561 u32 bpp = ov5640_code_to_bpp(sensor, fse->code);
7dcb3a2f
JM		 3562 unsigned int index = fse->index;
3563
19a81c14
SL		 3564 if (fse->pad != 0)
3565 return -EINVAL;
7dcb3a2f
JM		 3566 if (!bpp)
3567 return -EINVAL;
3568
3569 /* Only low-resolution modes are supported for 24bpp formats. */
3570 if (bpp == 24 && index >= OV5640_MODE_720P_1280_720)
3571 return -EINVAL;
3572
3573 /* FIXME: Low resolution modes don't work in 8bpp formats. */
3574 if (bpp == 8)
3575 index += OV5640_MODE_720P_1280_720;
3576
3577 if (index >= OV5640_NUM_MODES)
19a81c14
SL		 3578 return -EINVAL;
3579
7dcb3a2f 3580 fse->min_width = ov5640_mode_data[index].width;
41d8d7f5 3581 fse->max_width = fse->min_width;
7dcb3a2f 3582 fse->min_height = ov5640_mode_data[index].height;
41d8d7f5 3583 fse->max_height = fse->min_height;
19a81c14
SL		 3584
3585 return 0;
3586}
3587
3588static int ov5640_enum_frame_interval(
3589 struct v4l2_subdev *sd,
0d346d2a 3590 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 3591 struct v4l2_subdev_frame_interval_enum *fie)
3592{
3593 struct ov5640_dev *sensor = to_ov5640_dev(sd);
f33b56d3 3594 const struct ov5640_mode_info *mode;
19a81c14
SL		 3595 struct v4l2_fract tpf;
3596 int ret;
3597
3598 if (fie->pad != 0)
3599 return -EINVAL;
3600 if (fie->index >= OV5640_NUM_FRAMERATES)
3601 return -EINVAL;
3602
f33b56d3
G		 3603 mode = ov5640_find_mode(sensor, fie->width, fie->height, false);
3604 if (!mode)
3605 return -EINVAL;
3606
19a81c14
SL		 3607 tpf.numerator = 1;
3608 tpf.denominator = ov5640_framerates[fie->index];
3609
f33b56d3 3610 ret = ov5640_try_frame_interval(sensor, &tpf, mode);
19a81c14
SL		 3611 if (ret < 0)
3612 return -EINVAL;
3613
3614 fie->interval = tpf;
3615 return 0;
3616}
3617
3618static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
3619 struct v4l2_subdev_frame_interval *fi)
3620{
3621 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3622
3623 mutex_lock(&sensor->lock);
3624 fi->interval = sensor->frame_interval;
3625 mutex_unlock(&sensor->lock);
3626
3627 return 0;
3628}
3629
3630static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
3631 struct v4l2_subdev_frame_interval *fi)
3632{
3633 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3634 const struct ov5640_mode_info *mode;
3635 int frame_rate, ret = 0;
3636
3637 if (fi->pad != 0)
3638 return -EINVAL;
3639
3640 mutex_lock(&sensor->lock);
3641
3642 if (sensor->streaming) {
3643 ret = -EBUSY;
3644 goto out;
3645 }
3646
3647 mode = sensor->current_mode;
3648
f33b56d3 3649 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval, mode);
e823fb16
MR		 3650 if (frame_rate < 0) {
3651 /* Always return a valid frame interval value */
3652 fi->interval = sensor->frame_interval;
3653 goto out;
3654 }
19a81c14 3655
b6ae5022 3656 mode = ov5640_find_mode(sensor, mode->width, mode->height, true);
3c4a7372
HF		 3657 if (!mode) {
3658 ret = -EINVAL;
3659 goto out;
3660 }
3661
b6ae5022
JM		 3662 if (ov5640_framerates[frame_rate] > ov5640_framerates[mode->max_fps]) {
3663 ret = -EINVAL;
3664 goto out;
3665 }
3666
0929983e
HF		 3667 if (mode != sensor->current_mode ||
3668 frame_rate != sensor->current_fr) {
3669 sensor->current_fr = frame_rate;
3670 sensor->frame_interval = fi->interval;
6949d864
HF		 3671 sensor->current_mode = mode;
3672 sensor->pending_mode_change = true;
cc196e48 3673
19f2e3e6 3674 ov5640_update_pixel_rate(sensor);
6949d864 3675 }
19a81c14
SL		 3676out:
3677 mutex_unlock(&sensor->lock);
3678 return ret;
3679}
3680
3681static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
0d346d2a 3682 struct v4l2_subdev_state *sd_state,
41d8d7f5 3683 struct v4l2_subdev_mbus_code_enum *code)
19a81c14 3684{
a89f14bb
JM		 3685 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3686 const struct ov5640_pixfmt *formats;
3687 unsigned int num_formats;
3688
3689 if (ov5640_is_csi2(sensor)) {
3690 formats = ov5640_csi2_formats;
3691 num_formats = ARRAY_SIZE(ov5640_csi2_formats) - 1;
3692 } else {
3693 formats = ov5640_dvp_formats;
3694 num_formats = ARRAY_SIZE(ov5640_dvp_formats) - 1;
3695 }
3696
3697 if (code->index >= num_formats)
19a81c14
SL		 3698 return -EINVAL;
3699
a89f14bb
JM		 3700 code->code = formats[code->index].code;
3701
19a81c14
SL		 3702 return 0;
3703}
3704
3705static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
3706{
3707 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3708 int ret = 0;
3709
85644a9b
PE		 3710 if (enable) {
3711 ret = pm_runtime_resume_and_get(&sensor->i2c_client->dev);
3712 if (ret < 0)
3713 return ret;
3714
3715 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
3716 if (ret) {
3717 pm_runtime_put(&sensor->i2c_client->dev);
3718 return ret;
3719 }
3720 }
3721
19a81c14
SL		 3722 mutex_lock(&sensor->lock);
3723
3724 if (sensor->streaming == !enable) {
3725 if (enable && sensor->pending_mode_change) {
985cdcb0 3726 ret = ov5640_set_mode(sensor);
19a81c14
SL		 3727 if (ret)
3728 goto out;
fb98e29f 3729 }
e3ee691d 3730
fb98e29f 3731 if (enable && sensor->pending_fmt_change) {
e3ee691d
HF		 3732 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
3733 if (ret)
3734 goto out;
fb98e29f 3735 sensor->pending_fmt_change = false;
19a81c14
SL		 3736 }
3737
8e823f5c 3738 if (ov5640_is_csi2(sensor))
f22996db
HF		 3739 ret = ov5640_set_stream_mipi(sensor, enable);
3740 else
3741 ret = ov5640_set_stream_dvp(sensor, enable);
3742
19a81c14
SL		 3743 if (!ret)
3744 sensor->streaming = enable;
3745 }
85644a9b 3746
19a81c14
SL		 3747out:
3748 mutex_unlock(&sensor->lock);
85644a9b 3749
e13064a3
AS		 3750 if (!enable || ret) {
3751 pm_runtime_mark_last_busy(&sensor->i2c_client->dev);
85644a9b 3752 pm_runtime_put_autosuspend(&sensor->i2c_client->dev);
e13064a3 3753 }
85644a9b 3754
19a81c14
SL		 3755 return ret;
3756}
3757
90b0f355
JM		 3758static int ov5640_init_cfg(struct v4l2_subdev *sd,
3759 struct v4l2_subdev_state *state)
3760{
68453b02 3761 struct ov5640_dev *sensor = to_ov5640_dev(sd);
90b0f355
JM		 3762 struct v4l2_mbus_framefmt *fmt =
3763 v4l2_subdev_get_try_format(sd, state, 0);
66ed85eb 3764 struct v4l2_rect *crop = v4l2_subdev_get_try_crop(sd, state, 0);
90b0f355 3765
68453b02
G		 3766 *fmt = ov5640_is_csi2(sensor) ? ov5640_csi2_default_fmt :
3767 ov5640_dvp_default_fmt;
90b0f355 3768
66ed85eb
JM		 3769 crop->left = OV5640_PIXEL_ARRAY_LEFT;
3770 crop->top = OV5640_PIXEL_ARRAY_TOP;
3771 crop->width = OV5640_PIXEL_ARRAY_WIDTH;
3772 crop->height = OV5640_PIXEL_ARRAY_HEIGHT;
3773
90b0f355
JM		 3774 return 0;
3775}
3776
19a81c14 3777static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2d18fbc5
AM		 3778 .log_status = v4l2_ctrl_subdev_log_status,
3779 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
3780 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
19a81c14
SL		 3781};
3782
3783static const struct v4l2_subdev_video_ops ov5640_video_ops = {
3784 .g_frame_interval = ov5640_g_frame_interval,
3785 .s_frame_interval = ov5640_s_frame_interval,
3786 .s_stream = ov5640_s_stream,
3787};
3788
3789static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
90b0f355 3790 .init_cfg = ov5640_init_cfg,
19a81c14
SL		 3791 .enum_mbus_code = ov5640_enum_mbus_code,
3792 .get_fmt = ov5640_get_fmt,
3793 .set_fmt = ov5640_set_fmt,
66ed85eb 3794 .get_selection = ov5640_get_selection,
19a81c14
SL		 3795 .enum_frame_size = ov5640_enum_frame_size,
3796 .enum_frame_interval = ov5640_enum_frame_interval,
3797};
3798
3799static const struct v4l2_subdev_ops ov5640_subdev_ops = {
3800 .core = &ov5640_core_ops,
3801 .video = &ov5640_video_ops,
3802 .pad = &ov5640_pad_ops,
3803};
3804
3805static int ov5640_get_regulators(struct ov5640_dev *sensor)
3806{
3807 int i;
3808
3809 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
3810 sensor->supplies[i].supply = ov5640_supply_name[i];
3811
3812 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
3813 OV5640_NUM_SUPPLIES,
3814 sensor->supplies);
3815}
3816
0f7acb52
HF		 3817static int ov5640_check_chip_id(struct ov5640_dev *sensor)
3818{
3819 struct i2c_client *client = sensor->i2c_client;
3820 int ret = 0;
3821 u16 chip_id;
3822
0f7acb52
HF		 3823 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
3824 if (ret) {
3825 dev_err(&client->dev, "%s: failed to read chip identifier\n",
3826 __func__);
85644a9b 3827 return ret;
0f7acb52
HF		 3828 }
3829
3830 if (chip_id != 0x5640) {
3831 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
3832 __func__, chip_id);
85644a9b 3833 return -ENXIO;
0f7acb52
HF		 3834 }
3835
85644a9b 3836 return 0;
0f7acb52
HF		 3837}
3838
e6714993 3839static int ov5640_probe(struct i2c_client *client)
19a81c14
SL		 3840{
3841 struct device *dev = &client->dev;
3842 struct fwnode_handle *endpoint;
3843 struct ov5640_dev *sensor;
3844 int ret;
3845
3846 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3847 if (!sensor)
3848 return -ENOMEM;
3849
3850 sensor->i2c_client = client;
fb98e29f
HF		 3851
3852 /*
3853 * default init sequence initialize sensor to
afe25fbc 3854 * YUV422 UYVY VGA(30FPS in parallel mode, 60 in MIPI CSI-2 mode)
fb98e29f 3855 */
19a81c14
SL		 3856 sensor->frame_interval.numerator = 1;
3857 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3858 sensor->current_fr = OV5640_30_FPS;
3859 sensor->current_mode =
086c25f8 3860 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
985cdcb0 3861 sensor->last_mode = sensor->current_mode;
d7b41196
G		 3862 sensor->current_link_freq =
3863 ov5640_csi2_link_freqs[OV5640_DEFAULT_LINK_FREQ];
19a81c14
SL		 3864
3865 sensor->ae_target = 52;
3866
ce96bcf5
SA		 3867 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3868 NULL);
19a81c14
SL		 3869 if (!endpoint) {
3870 dev_err(dev, "endpoint node not found\n");
3871 return -EINVAL;
3872 }
3873
3874 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3875 fwnode_handle_put(endpoint);
3876 if (ret) {
3877 dev_err(dev, "Could not parse endpoint\n");
3878 return ret;
3879 }
3880
2c61e48d
LP		 3881 if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3882 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3883 sensor->ep.bus_type != V4L2_MBUS_BT656) {
3884 dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3885 return -EINVAL;
3886 }
3887
68453b02
G		 3888 sensor->fmt = ov5640_is_csi2(sensor) ? ov5640_csi2_default_fmt :
3889 ov5640_dvp_default_fmt;
3890
19a81c14
SL		 3891 /* get system clock (xclk) */
3892 sensor->xclk = devm_clk_get(dev, "xclk");
3893 if (IS_ERR(sensor->xclk)) {
3894 dev_err(dev, "failed to get xclk\n");
3895 return PTR_ERR(sensor->xclk);
3896 }
3897
3898 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3899 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3900 sensor->xclk_freq > OV5640_XCLK_MAX) {
3901 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3902 sensor->xclk_freq);
3903 return -EINVAL;
3904 }
3905
3906 /* request optional power down pin */
3907 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3908 GPIOD_OUT_HIGH);
8791a102
FE		 3909 if (IS_ERR(sensor->pwdn_gpio))
3910 return PTR_ERR(sensor->pwdn_gpio);
3911
19a81c14
SL		 3912 /* request optional reset pin */
3913 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3914 GPIOD_OUT_HIGH);
8791a102
FE		 3915 if (IS_ERR(sensor->reset_gpio))
3916 return PTR_ERR(sensor->reset_gpio);
19a81c14
SL		 3917
3918 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3919
2d18fbc5
AM		 3920 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3921 V4L2_SUBDEV_FL_HAS_EVENTS;
19a81c14
SL		 3922 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3923 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3924 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3925 if (ret)
3926 return ret;
3927
3928 ret = ov5640_get_regulators(sensor);
3929 if (ret)
85644a9b 3930 goto entity_cleanup;
19a81c14
SL		 3931
3932 mutex_init(&sensor->lock);
3933
85644a9b 3934 ret = ov5640_init_controls(sensor);
0f7acb52
HF		 3935 if (ret)
3936 goto entity_cleanup;
3937
85644a9b
PE		 3938 ret = ov5640_sensor_resume(dev);
3939 if (ret) {
3940 dev_err(dev, "failed to power on\n");
19a81c14 3941 goto entity_cleanup;
85644a9b
PE		 3942 }
3943
3944 pm_runtime_set_active(dev);
3945 pm_runtime_get_noresume(dev);
3946 pm_runtime_enable(dev);
3947
3948 ret = ov5640_check_chip_id(sensor);
3949 if (ret)
3950 goto err_pm_runtime;
19a81c14 3951
15786f7b 3952 ret = v4l2_async_register_subdev_sensor(&sensor->sd);
19a81c14 3953 if (ret)
85644a9b
PE		 3954 goto err_pm_runtime;
3955
3956 pm_runtime_set_autosuspend_delay(dev, 1000);
3957 pm_runtime_use_autosuspend(dev);
e13064a3 3958 pm_runtime_mark_last_busy(dev);
85644a9b 3959 pm_runtime_put_autosuspend(dev);
19a81c14
SL		 3960
3961 return 0;
3962
85644a9b
PE		 3963err_pm_runtime:
3964 pm_runtime_put_noidle(dev);
3965 pm_runtime_disable(dev);
19a81c14 3966 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
85644a9b 3967 ov5640_sensor_suspend(dev);
19a81c14 3968entity_cleanup:
19a81c14 3969 media_entity_cleanup(&sensor->sd.entity);
bfcba38d 3970 mutex_destroy(&sensor->lock);
19a81c14
SL		 3971 return ret;
3972}
3973
ed5c2f5f 3974static void ov5640_remove(struct i2c_client *client)
19a81c14
SL		 3975{
3976 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3977 struct ov5640_dev *sensor = to_ov5640_dev(sd);
85644a9b
PE		 3978 struct device *dev = &client->dev;
3979
3980 pm_runtime_disable(dev);
3981 if (!pm_runtime_status_suspended(dev))
3982 ov5640_sensor_suspend(dev);
3983 pm_runtime_set_suspended(dev);
19a81c14
SL		 3984
3985 v4l2_async_unregister_subdev(&sensor->sd);
19a81c14
SL		 3986 media_entity_cleanup(&sensor->sd.entity);
3987 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
bfcba38d 3988 mutex_destroy(&sensor->lock);
19a81c14
SL		 3989}
3990
85644a9b
PE		 3991static const struct dev_pm_ops ov5640_pm_ops = {
3992 SET_RUNTIME_PM_OPS(ov5640_sensor_suspend, ov5640_sensor_resume, NULL)
3993};
3994
19a81c14
SL		 3995static const struct i2c_device_id ov5640_id[] = {
3996 {"ov5640", 0},
3997 {},
3998};
3999MODULE_DEVICE_TABLE(i2c, ov5640_id);
4000
4001static const struct of_device_id ov5640_dt_ids[] = {
4002 { .compatible = "ovti,ov5640" },
4003 { /* sentinel */ }
4004};
4005MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
4006
4007static struct i2c_driver ov5640_i2c_driver = {
4008 .driver = {
4009 .name = "ov5640",
4010 .of_match_table = ov5640_dt_ids,
85644a9b 4011 .pm = &ov5640_pm_ops,
19a81c14
SL		 4012 },
4013 .id_table = ov5640_id,
aaeb31c0 4014 .probe = ov5640_probe,
19a81c14
SL		 4015 .remove = ov5640_remove,
4016};
4017
4018module_i2c_driver(ov5640_i2c_driver);
4019
4020MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
4021MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)