projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
media: Explicitly include correct DT includes
[linux-2.6-block.git] / drivers / media / i2c / ov5640.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
19a81c14
SL		 2/*
3 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4 * Copyright (C) 2014-2017 Mentor Graphics Inc.
19a81c14
SL		 5 */
6
7#include <linux/clk.h>
8#include <linux/clk-provider.h>
9#include <linux/clkdev.h>
10#include <linux/ctype.h>
11#include <linux/delay.h>
12#include <linux/device.h>
41d8d7f5 13#include <linux/gpio/consumer.h>
19a81c14
SL		 14#include <linux/i2c.h>
15#include <linux/init.h>
7c7e33b7 16#include <linux/mod_devicetable.h>
19a81c14 17#include <linux/module.h>
85644a9b 18#include <linux/pm_runtime.h>
41d8d7f5 19#include <linux/regulator/consumer.h>
19a81c14
SL		 20#include <linux/slab.h>
21#include <linux/types.h>
19a81c14
SL		 22#include <media/v4l2-async.h>
23#include <media/v4l2-ctrls.h>
24#include <media/v4l2-device.h>
2d18fbc5 25#include <media/v4l2-event.h>
19a81c14
SL		 26#include <media/v4l2-fwnode.h>
27#include <media/v4l2-subdev.h>
28
29/* min/typical/max system clock (xclk) frequencies */
30#define OV5640_XCLK_MIN 6000000
41cb1c73 31#define OV5640_XCLK_MAX 54000000
19a81c14 32
5113d5b3
JM		 33#define OV5640_NATIVE_WIDTH 2624
34#define OV5640_NATIVE_HEIGHT 1964
35#define OV5640_PIXEL_ARRAY_TOP 14
36#define OV5640_PIXEL_ARRAY_LEFT 16
37#define OV5640_PIXEL_ARRAY_WIDTH 2592
38#define OV5640_PIXEL_ARRAY_HEIGHT 1944
39
bce93b82
JM		 40/* FIXME: not documented. */
41#define OV5640_MIN_VBLANK 24
42#define OV5640_MAX_VTS 3375
43
19a81c14
SL		 44#define OV5640_DEFAULT_SLAVE_ID 0x3c
45
3c28588f
JM		 46#define OV5640_LINK_RATE_MAX 490000000U
47
d47c4126
HF		 48#define OV5640_REG_SYS_RESET02 0x3002
49#define OV5640_REG_SYS_CLOCK_ENABLE02 0x3006
f22996db 50#define OV5640_REG_SYS_CTRL0 0x3008
3b987d70
LP		 51#define OV5640_REG_SYS_CTRL0_SW_PWDN 0x42
52#define OV5640_REG_SYS_CTRL0_SW_PWUP 0x02
decea0a9 53#define OV5640_REG_SYS_CTRL0_SW_RST 0x82
19a81c14 54#define OV5640_REG_CHIP_ID 0x300a
f22996db
HF		 55#define OV5640_REG_IO_MIPI_CTRL00 0x300e
56#define OV5640_REG_PAD_OUTPUT_ENABLE01 0x3017
57#define OV5640_REG_PAD_OUTPUT_ENABLE02 0x3018
19a81c14 58#define OV5640_REG_PAD_OUTPUT00 0x3019
f22996db 59#define OV5640_REG_SYSTEM_CONTROL1 0x302e
19a81c14
SL		 60#define OV5640_REG_SC_PLL_CTRL0 0x3034
61#define OV5640_REG_SC_PLL_CTRL1 0x3035
62#define OV5640_REG_SC_PLL_CTRL2 0x3036
63#define OV5640_REG_SC_PLL_CTRL3 0x3037
64#define OV5640_REG_SLAVE_ID 0x3100
f22996db 65#define OV5640_REG_SCCB_SYS_CTRL1 0x3103
19a81c14
SL		 66#define OV5640_REG_SYS_ROOT_DIVIDER 0x3108
67#define OV5640_REG_AWB_R_GAIN 0x3400
68#define OV5640_REG_AWB_G_GAIN 0x3402
69#define OV5640_REG_AWB_B_GAIN 0x3404
70#define OV5640_REG_AWB_MANUAL_CTRL 0x3406
71#define OV5640_REG_AEC_PK_EXPOSURE_HI 0x3500
72#define OV5640_REG_AEC_PK_EXPOSURE_MED 0x3501
73#define OV5640_REG_AEC_PK_EXPOSURE_LO 0x3502
74#define OV5640_REG_AEC_PK_MANUAL 0x3503
75#define OV5640_REG_AEC_PK_REAL_GAIN 0x350a
76#define OV5640_REG_AEC_PK_VTS 0x350c
3145efcd
JM		 77#define OV5640_REG_TIMING_HS 0x3800
78#define OV5640_REG_TIMING_VS 0x3802
79#define OV5640_REG_TIMING_HW 0x3804
80#define OV5640_REG_TIMING_VH 0x3806
86633417
MR		 81#define OV5640_REG_TIMING_DVPHO 0x3808
82#define OV5640_REG_TIMING_DVPVO 0x380a
19a81c14
SL		 83#define OV5640_REG_TIMING_HTS 0x380c
84#define OV5640_REG_TIMING_VTS 0x380e
3145efcd
JM		 85#define OV5640_REG_TIMING_HOFFS 0x3810
86#define OV5640_REG_TIMING_VOFFS 0x3812
ce85705a 87#define OV5640_REG_TIMING_TC_REG20 0x3820
19a81c14
SL		 88#define OV5640_REG_TIMING_TC_REG21 0x3821
89#define OV5640_REG_AEC_CTRL00 0x3a00
90#define OV5640_REG_AEC_B50_STEP 0x3a08
91#define OV5640_REG_AEC_B60_STEP 0x3a0a
92#define OV5640_REG_AEC_CTRL0D 0x3a0d
93#define OV5640_REG_AEC_CTRL0E 0x3a0e
94#define OV5640_REG_AEC_CTRL0F 0x3a0f
95#define OV5640_REG_AEC_CTRL10 0x3a10
96#define OV5640_REG_AEC_CTRL11 0x3a11
97#define OV5640_REG_AEC_CTRL1B 0x3a1b
98#define OV5640_REG_AEC_CTRL1E 0x3a1e
99#define OV5640_REG_AEC_CTRL1F 0x3a1f
100#define OV5640_REG_HZ5060_CTRL00 0x3c00
101#define OV5640_REG_HZ5060_CTRL01 0x3c01
102#define OV5640_REG_SIGMADELTA_CTRL0C 0x3c0c
103#define OV5640_REG_FRAME_CTRL01 0x4202
e3ee691d 104#define OV5640_REG_FORMAT_CONTROL00 0x4300
7cb013b1
CYT		 105#define OV5640_REG_VFIFO_HSIZE 0x4602
106#define OV5640_REG_VFIFO_VSIZE 0x4604
2b5c18f9 107#define OV5640_REG_JPG_MODE_SELECT 0x4713
4039b037 108#define OV5640_REG_CCIR656_CTRL00 0x4730
f22996db 109#define OV5640_REG_POLARITY_CTRL00 0x4740
19a81c14
SL		 110#define OV5640_REG_MIPI_CTRL00 0x4800
111#define OV5640_REG_DEBUG_MODE 0x4814
6c957ed7 112#define OV5640_REG_PCLK_PERIOD 0x4837
e3ee691d 113#define OV5640_REG_ISP_FORMAT_MUX_CTRL 0x501f
19a81c14
SL		 114#define OV5640_REG_PRE_ISP_TEST_SET1 0x503d
115#define OV5640_REG_SDE_CTRL0 0x5580
116#define OV5640_REG_SDE_CTRL1 0x5581
117#define OV5640_REG_SDE_CTRL3 0x5583
118#define OV5640_REG_SDE_CTRL4 0x5584
119#define OV5640_REG_SDE_CTRL5 0x5585
120#define OV5640_REG_AVG_READOUT 0x56a1
121
122enum ov5640_mode_id {
32ea5e05
HF		 123 OV5640_MODE_QQVGA_160_120 = 0,
124 OV5640_MODE_QCIF_176_144,
19a81c14
SL		 125 OV5640_MODE_QVGA_320_240,
126 OV5640_MODE_VGA_640_480,
127 OV5640_MODE_NTSC_720_480,
128 OV5640_MODE_PAL_720_576,
129 OV5640_MODE_XGA_1024_768,
130 OV5640_MODE_720P_1280_720,
131 OV5640_MODE_1080P_1920_1080,
132 OV5640_MODE_QSXGA_2592_1944,
133 OV5640_NUM_MODES,
134};
135
136enum ov5640_frame_rate {
137 OV5640_15_FPS = 0,
138 OV5640_30_FPS,
e823fb16 139 OV5640_60_FPS,
19a81c14
SL		 140 OV5640_NUM_FRAMERATES,
141};
142
22845bf2
JM		 143enum ov5640_pixel_rate_id {
144 OV5640_PIXEL_RATE_168M,
145 OV5640_PIXEL_RATE_148M,
146 OV5640_PIXEL_RATE_124M,
147 OV5640_PIXEL_RATE_96M,
148 OV5640_PIXEL_RATE_48M,
149 OV5640_NUM_PIXEL_RATES,
150};
151
152/*
153 * The chip manual suggests 24/48/96/192 MHz pixel clocks.
154 *
155 * 192MHz exceeds the sysclk limits; use 168MHz as maximum pixel rate for
156 * full resolution mode @15 FPS.
157 */
158static const u32 ov5640_pixel_rates[] = {
159 [OV5640_PIXEL_RATE_168M] = 168000000,
160 [OV5640_PIXEL_RATE_148M] = 148000000,
161 [OV5640_PIXEL_RATE_124M] = 124000000,
162 [OV5640_PIXEL_RATE_96M] = 96000000,
163 [OV5640_PIXEL_RATE_48M] = 48000000,
164};
165
7a3b8d4b
JM		 166/*
167 * MIPI CSI-2 link frequencies.
168 *
169 * Derived from the above defined pixel rate for bpp = (8, 16, 24) and
170 * data_lanes = (1, 2)
171 *
172 * link_freq = (pixel_rate * bpp) / (2 * data_lanes)
173 */
174static const s64 ov5640_csi2_link_freqs[] = {
175 992000000, 888000000, 768000000, 744000000, 672000000, 672000000,
176 592000000, 592000000, 576000000, 576000000, 496000000, 496000000,
177 384000000, 384000000, 384000000, 336000000, 296000000, 288000000,
178 248000000, 192000000, 192000000, 192000000, 96000000,
179};
180
181/* Link freq for default mode: UYVY 16 bpp, 2 data lanes. */
182#define OV5640_DEFAULT_LINK_FREQ 13
183
b7ed3abd
LP		 184enum ov5640_format_mux {
185 OV5640_FMT_MUX_YUV422 = 0,
186 OV5640_FMT_MUX_RGB,
187 OV5640_FMT_MUX_DITHER,
188 OV5640_FMT_MUX_RAW_DPC,
189 OV5640_FMT_MUX_SNR_RAW,
190 OV5640_FMT_MUX_RAW_CIP,
191};
192
a89f14bb 193struct ov5640_pixfmt {
e3ee691d
HF		 194 u32 code;
195 u32 colorspace;
2d7671f6 196 u8 bpp;
935fbc94
JM		 197 u8 ctrl00;
198 enum ov5640_format_mux mux;
a89f14bb
JM		 199};
200
201static const struct ov5640_pixfmt ov5640_dvp_formats[] = {
2d7671f6 202 {
935fbc94
JM		 203 /* YUV422, YUYV */
204 .code = MEDIA_BUS_FMT_JPEG_1X8,
205 .colorspace = V4L2_COLORSPACE_JPEG,
206 .bpp = 16,
207 .ctrl00 = 0x30,
208 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 209 }, {
935fbc94
JM		 210 /* YUV422, UYVY */
211 .code = MEDIA_BUS_FMT_UYVY8_2X8,
212 .colorspace = V4L2_COLORSPACE_SRGB,
213 .bpp = 16,
214 .ctrl00 = 0x3f,
215 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 216 }, {
935fbc94
JM		 217 /* YUV422, YUYV */
218 .code = MEDIA_BUS_FMT_YUYV8_2X8,
219 .colorspace = V4L2_COLORSPACE_SRGB,
220 .bpp = 16,
221 .ctrl00 = 0x30,
222 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 223 }, {
935fbc94
JM		 224 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
225 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
226 .colorspace = V4L2_COLORSPACE_SRGB,
227 .bpp = 16,
228 .ctrl00 = 0x6f,
229 .mux = OV5640_FMT_MUX_RGB,
2d7671f6 230 }, {
935fbc94
JM		 231 /* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
232 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
233 .colorspace = V4L2_COLORSPACE_SRGB,
234 .bpp = 16,
235 .ctrl00 = 0x61,
236 .mux = OV5640_FMT_MUX_RGB,
2d7671f6 237 }, {
935fbc94
JM		 238 /* Raw, BGBG... / GRGR... */
239 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
240 .colorspace = V4L2_COLORSPACE_SRGB,
241 .bpp = 8,
242 .ctrl00 = 0x00,
243 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb 244 }, {
935fbc94
JM		 245 /* Raw bayer, GBGB... / RGRG... */
246 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
247 .colorspace = V4L2_COLORSPACE_SRGB,
248 .bpp = 8,
249 .ctrl00 = 0x01,
250 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb 251 }, {
935fbc94
JM		 252 /* Raw bayer, GRGR... / BGBG... */
253 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
254 .colorspace = V4L2_COLORSPACE_SRGB,
255 .bpp = 8,
256 .ctrl00 = 0x02,
257 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb 258 }, {
935fbc94
JM		 259 /* Raw bayer, RGRG... / GBGB... */
260 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
261 .colorspace = V4L2_COLORSPACE_SRGB,
262 .bpp = 8,
263 .ctrl00 = 0x03,
264 .mux = OV5640_FMT_MUX_RAW_DPC,
a89f14bb
JM		 265 },
266 { /* sentinel */ }
267};
268
269static const struct ov5640_pixfmt ov5640_csi2_formats[] = {
270 {
935fbc94
JM		 271 /* YUV422, YUYV */
272 .code = MEDIA_BUS_FMT_JPEG_1X8,
273 .colorspace = V4L2_COLORSPACE_JPEG,
274 .bpp = 16,
275 .ctrl00 = 0x30,
276 .mux = OV5640_FMT_MUX_YUV422,
2d7671f6 277 }, {
935fbc94
JM		 278 /* YUV422, UYVY */
279 .code = MEDIA_BUS_FMT_UYVY8_1X16,
280 .colorspace = V4L2_COLORSPACE_SRGB,
281 .bpp = 16,
282 .ctrl00 = 0x3f,
283 .mux = OV5640_FMT_MUX_YUV422,
a89f14bb 284 }, {
935fbc94
JM		 285 /* YUV422, YUYV */
286 .code = MEDIA_BUS_FMT_YUYV8_1X16,
287 .colorspace = V4L2_COLORSPACE_SRGB,
288 .bpp = 16,
289 .ctrl00 = 0x30,
290 .mux = OV5640_FMT_MUX_YUV422,
0a43fcd7 291 }, {
935fbc94
JM		 292 /* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
293 .code = MEDIA_BUS_FMT_RGB565_1X16,
294 .colorspace = V4L2_COLORSPACE_SRGB,
295 .bpp = 16,
296 .ctrl00 = 0x6f,
297 .mux = OV5640_FMT_MUX_RGB,
6ac98b41 298 }, {
935fbc94
JM		 299 /* BGR888: RGB */
300 .code = MEDIA_BUS_FMT_BGR888_1X24,
301 .colorspace = V4L2_COLORSPACE_SRGB,
302 .bpp = 24,
303 .ctrl00 = 0x23,
304 .mux = OV5640_FMT_MUX_RGB,
2d7671f6 305 }, {
935fbc94
JM		 306 /* Raw, BGBG... / GRGR... */
307 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
308 .colorspace = V4L2_COLORSPACE_SRGB,
309 .bpp = 8,
310 .ctrl00 = 0x00,
311 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 312 }, {
935fbc94
JM		 313 /* Raw bayer, GBGB... / RGRG... */
314 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
315 .colorspace = V4L2_COLORSPACE_SRGB,
316 .bpp = 8,
317 .ctrl00 = 0x01,
318 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 319 }, {
935fbc94
JM		 320 /* Raw bayer, GRGR... / BGBG... */
321 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
322 .colorspace = V4L2_COLORSPACE_SRGB,
323 .bpp = 8,
324 .ctrl00 = 0x02,
325 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 326 }, {
935fbc94
JM		 327 /* Raw bayer, RGRG... / GBGB... */
328 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
329 .colorspace = V4L2_COLORSPACE_SRGB,
330 .bpp = 8,
331 .ctrl00 = 0x03,
332 .mux = OV5640_FMT_MUX_RAW_DPC,
2d7671f6 333 },
a89f14bb 334 { /* sentinel */ }
e3ee691d
HF		 335};
336
19a81c14
SL		 337/*
338 * FIXME: remove this when a subdev API becomes available
339 * to set the MIPI CSI-2 virtual channel.
340 */
341static unsigned int virtual_channel;
8670d70a 342module_param(virtual_channel, uint, 0444);
19a81c14
SL		 343MODULE_PARM_DESC(virtual_channel,
344 "MIPI CSI-2 virtual channel (0..3), default 0");
345
346static const int ov5640_framerates[] = {
347 [OV5640_15_FPS] = 15,
348 [OV5640_30_FPS] = 30,
e823fb16 349 [OV5640_60_FPS] = 60,
19a81c14
SL		 350};
351
352/* regulator supplies */
353static const char * const ov5640_supply_name[] = {
41d8d7f5 354 "DOVDD", /* Digital I/O (1.8V) supply */
19a81c14 355 "AVDD", /* Analog (2.8V) supply */
24c8ac89 356 "DVDD", /* Digital Core (1.5V) supply */
19a81c14
SL		 357};
358
359#define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
360
361/*
362 * Image size under 1280 * 960 are SUBSAMPLING
363 * Image size upper 1280 * 960 are SCALING
364 */
365enum ov5640_downsize_mode {
366 SUBSAMPLING,
367 SCALING,
368};
369
370struct reg_value {
371 u16 reg_addr;
372 u8 val;
373 u8 mask;
374 u32 delay_ms;
375};
376
5113d5b3 377struct ov5640_timings {
3145efcd
JM		 378 /* Analog crop rectangle. */
379 struct v4l2_rect analog_crop;
380 /* Visibile crop: from analog crop top-left corner. */
381 struct v4l2_rect crop;
5113d5b3 382 /* Total pixels per line: width + fixed hblank. */
476dec01 383 u32 htot;
5113d5b3 384 /* Default vertical blanking: frame height = height + vblank. */
3145efcd 385 u32 vblank_def;
5113d5b3
JM		 386};
387
388struct ov5640_mode_info {
389 enum ov5640_mode_id id;
390 enum ov5640_downsize_mode dn_mode;
391 enum ov5640_pixel_rate_id pixel_rate;
392
393 unsigned int width;
394 unsigned int height;
395
396 struct ov5640_timings dvp_timings;
397 struct ov5640_timings csi2_timings;
398
19a81c14
SL		 399 const struct reg_value *reg_data;
400 u32 reg_data_size;
5113d5b3
JM		 401
402 /* Used by s_frame_interval only. */
5554c80e 403 u32 max_fps;
19f2e3e6 404 u32 def_fps;
19a81c14
SL		 405};
406
407struct ov5640_ctrls {
408 struct v4l2_ctrl_handler handler;
cc196e48 409 struct v4l2_ctrl *pixel_rate;
7a3b8d4b 410 struct v4l2_ctrl *link_freq;
32979f67 411 struct v4l2_ctrl *hblank;
bce93b82 412 struct v4l2_ctrl *vblank;
19a81c14
SL		 413 struct {
414 struct v4l2_ctrl *auto_exp;
415 struct v4l2_ctrl *exposure;
416 };
417 struct {
418 struct v4l2_ctrl *auto_wb;
419 struct v4l2_ctrl *blue_balance;
420 struct v4l2_ctrl *red_balance;
421 };
422 struct {
423 struct v4l2_ctrl *auto_gain;
424 struct v4l2_ctrl *gain;
425 };
426 struct v4l2_ctrl *brightness;
1068feca 427 struct v4l2_ctrl *light_freq;
19a81c14
SL		 428 struct v4l2_ctrl *saturation;
429 struct v4l2_ctrl *contrast;
430 struct v4l2_ctrl *hue;
431 struct v4l2_ctrl *test_pattern;
ce85705a
HF		 432 struct v4l2_ctrl *hflip;
433 struct v4l2_ctrl *vflip;
19a81c14
SL		 434};
435
436struct ov5640_dev {
437 struct i2c_client *i2c_client;
438 struct v4l2_subdev sd;
439 struct media_pad pad;
440 struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
441 struct clk *xclk; /* system clock to OV5640 */
442 u32 xclk_freq;
443
444 struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
445 struct gpio_desc *reset_gpio;
446 struct gpio_desc *pwdn_gpio;
c3f3ba3e 447 bool upside_down;
19a81c14
SL		 448
449 /* lock to protect all members below */
450 struct mutex lock;
451
19a81c14 452 struct v4l2_mbus_framefmt fmt;
fb98e29f 453 bool pending_fmt_change;
19a81c14
SL		 454
455 const struct ov5640_mode_info *current_mode;
985cdcb0 456 const struct ov5640_mode_info *last_mode;
19a81c14
SL		 457 enum ov5640_frame_rate current_fr;
458 struct v4l2_fract frame_interval;
3c28588f 459 s64 current_link_freq;
19a81c14
SL		 460
461 struct ov5640_ctrls ctrls;
462
463 u32 prev_sysclk, prev_hts;
464 u32 ae_low, ae_high, ae_target;
465
466 bool pending_mode_change;
467 bool streaming;
468};
469
470static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
471{
472 return container_of(sd, struct ov5640_dev, sd);
473}
474
475static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
476{
477 return &container_of(ctrl->handler, struct ov5640_dev,
478 ctrls.handler)->sd;
479}
480
8e823f5c
JM		 481static inline bool ov5640_is_csi2(const struct ov5640_dev *sensor)
482{
483 return sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY;
484}
485
a89f14bb
JM		 486static inline const struct ov5640_pixfmt *
487ov5640_formats(struct ov5640_dev *sensor)
488{
489 return ov5640_is_csi2(sensor) ? ov5640_csi2_formats
490 : ov5640_dvp_formats;
491}
492
493static const struct ov5640_pixfmt *
494ov5640_code_to_pixfmt(struct ov5640_dev *sensor, u32 code)
495{
496 const struct ov5640_pixfmt *formats = ov5640_formats(sensor);
497 unsigned int i;
498
499 for (i = 0; formats[i].code; ++i) {
500 if (formats[i].code == code)
501 return &formats[i];
502 }
503
504 return &formats[0];
505}
506
507static u32 ov5640_code_to_bpp(struct ov5640_dev *sensor, u32 code)
508{
509 const struct ov5640_pixfmt *format = ov5640_code_to_pixfmt(sensor,
510 code);
511
512 return format->bpp;
513}
514
19a81c14
SL		 515/*
516 * FIXME: all of these register tables are likely filled with
517 * entries that set the register to their power-on default values,
518 * and which are otherwise not touched by this driver. Those entries
519 * should be identified and removed to speed register load time
520 * over i2c.
521 */
fb98e29f 522/* YUV422 UYVY VGA@30fps */
90b0f355 523
68453b02
G		 524static const struct v4l2_mbus_framefmt ov5640_csi2_default_fmt = {
525 .code = MEDIA_BUS_FMT_UYVY8_1X16,
526 .width = 640,
527 .height = 480,
528 .colorspace = V4L2_COLORSPACE_SRGB,
529 .ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB),
530 .quantization = V4L2_QUANTIZATION_FULL_RANGE,
531 .xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB),
532 .field = V4L2_FIELD_NONE,
533};
534
535static const struct v4l2_mbus_framefmt ov5640_dvp_default_fmt = {
90b0f355
JM		 536 .code = MEDIA_BUS_FMT_UYVY8_2X8,
537 .width = 640,
538 .height = 480,
539 .colorspace = V4L2_COLORSPACE_SRGB,
540 .ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB),
541 .quantization = V4L2_QUANTIZATION_FULL_RANGE,
542 .xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB),
543 .field = V4L2_FIELD_NONE,
544};
545
e4359019 546static const struct reg_value ov5640_init_setting[] = {
decea0a9 547 {0x3103, 0x11, 0, 0},
576f5d4b 548 {0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
19a81c14
SL		 549 {0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
550 {0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
551 {0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
552 {0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
553 {0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
554 {0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
555 {0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
556 {0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
557 {0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
558 {0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
559 {0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
560 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
561 {0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
3145efcd 562 {0x3815, 0x31, 0, 0},
19a81c14
SL		 563 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
564 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
565 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
566 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
567 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
568 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
569 {0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
aa4bb8b8 570 {0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
a828002f 571 {0x501f, 0x00, 0, 0}, {0x440e, 0x00, 0, 0}, {0x4837, 0x0a, 0, 0},
19a81c14
SL		 572 {0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
573 {0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
574 {0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
575 {0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
576 {0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
577 {0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
578 {0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
579 {0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
580 {0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
581 {0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
582 {0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
583 {0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
584 {0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
585 {0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
586 {0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
587 {0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
588 {0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
589 {0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
590 {0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
591 {0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
592 {0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
593 {0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
594 {0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
595 {0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
596 {0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
597 {0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
598 {0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
599 {0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
600 {0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
601 {0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
602 {0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
603 {0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
604 {0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
605 {0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
606 {0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
607 {0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
608 {0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
609 {0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
610 {0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
611 {0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
612 {0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
613 {0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
614 {0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
615 {0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
616 {0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
617 {0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
618 {0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
619 {0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
620 {0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
621 {0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
622};
623
db15c195 624static const struct reg_value ov5640_setting_low_res[] = {
c14d107e 625 {0x3c07, 0x08, 0, 0},
19a81c14 626 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 627 {0x3814, 0x31, 0, 0},
3145efcd 628 {0x3815, 0x31, 0, 0},
19a81c14
SL		 629 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
630 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
631 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
632 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
633 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
2b5c18f9 634 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
a828002f
G		 635 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
636 {0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
19a81c14
SL		 637};
638
086c25f8 639static const struct reg_value ov5640_setting_720P_1280_720[] = {
c14d107e 640 {0x3c07, 0x07, 0, 0},
19a81c14 641 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 642 {0x3814, 0x31, 0, 0},
3145efcd 643 {0x3815, 0x31, 0, 0},
19a81c14
SL		 644 {0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
645 {0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
646 {0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
647 {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
648 {0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
2b5c18f9 649 {0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
19a81c14
SL		 650 {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
651 {0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
652};
653
086c25f8 654static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
c14d107e 655 {0x3c07, 0x08, 0, 0},
19a81c14 656 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 657 {0x3814, 0x11, 0, 0},
3145efcd 658 {0x3815, 0x11, 0, 0},
19a81c14
SL		 659 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
660 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
661 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
662 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
663 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
2b5c18f9 664 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
19a81c14 665 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
c14d107e
MR		 666 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
667 {0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
19a81c14 668 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
476dec01 669 {0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
19a81c14
SL		 670 {0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
671 {0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
672 {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
2b5c18f9 673 {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
19a81c14 674 {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
92b9096c 675 {0x4005, 0x1a, 0, 0},
19a81c14
SL		 676};
677
086c25f8 678static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
c14d107e 679 {0x3c07, 0x08, 0, 0},
19a81c14 680 {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
ce85705a 681 {0x3814, 0x11, 0, 0},
3145efcd 682 {0x3815, 0x11, 0, 0},
19a81c14
SL		 683 {0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
684 {0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
685 {0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
686 {0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
687 {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
2b5c18f9 688 {0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
19a81c14
SL		 689 {0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
690 {0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
691};
692
5113d5b3 693static const struct ov5640_mode_info ov5640_mode_data[OV5640_NUM_MODES] = {
8409d017
JM		 694 {
695 /* 160x120 */
3145efcd
JM		 696 .id = OV5640_MODE_QQVGA_160_120,
697 .dn_mode = SUBSAMPLING,
698 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 699 .width = 160,
700 .height = 120,
701 .dvp_timings = {
702 .analog_crop = {
703 .left = 0,
704 .top = 4,
705 .width = 2624,
706 .height = 1944,
707 },
708 .crop = {
709 .left = 16,
710 .top = 6,
711 .width = 160,
712 .height = 120,
713 },
714 .htot = 1896,
715 .vblank_def = 864,
3145efcd 716 },
5113d5b3
JM		 717 .csi2_timings = {
718 /* Feed the full valid pixel array to the ISP. */
719 .analog_crop = {
720 .left = OV5640_PIXEL_ARRAY_LEFT,
721 .top = OV5640_PIXEL_ARRAY_TOP,
722 .width = OV5640_PIXEL_ARRAY_WIDTH,
723 .height = OV5640_PIXEL_ARRAY_HEIGHT,
724 },
725 /* Maintain a minimum processing margin. */
726 .crop = {
727 .left = 2,
728 .top = 4,
729 .width = 160,
730 .height = 120,
731 },
961bed9f
JM		 732 .htot = 1600,
733 .vblank_def = 878,
3145efcd 734 },
db15c195
JM		 735 .reg_data = ov5640_setting_low_res,
736 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 737 .max_fps = OV5640_30_FPS,
738 .def_fps = OV5640_30_FPS
8409d017
JM		 739 }, {
740 /* 176x144 */
3145efcd
JM		 741 .id = OV5640_MODE_QCIF_176_144,
742 .dn_mode = SUBSAMPLING,
743 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 744 .width = 176,
745 .height = 144,
746 .dvp_timings = {
747 .analog_crop = {
748 .left = 0,
749 .top = 4,
750 .width = 2624,
751 .height = 1944,
752 },
753 .crop = {
754 .left = 16,
755 .top = 6,
756 .width = 176,
757 .height = 144,
758 },
759 .htot = 1896,
760 .vblank_def = 840,
3145efcd 761 },
5113d5b3
JM		 762 .csi2_timings = {
763 /* Feed the full valid pixel array to the ISP. */
764 .analog_crop = {
765 .left = OV5640_PIXEL_ARRAY_LEFT,
766 .top = OV5640_PIXEL_ARRAY_TOP,
767 .width = OV5640_PIXEL_ARRAY_WIDTH,
768 .height = OV5640_PIXEL_ARRAY_HEIGHT,
769 },
770 /* Maintain a minimum processing margin. */
771 .crop = {
772 .left = 2,
773 .top = 4,
774 .width = 176,
775 .height = 144,
776 },
961bed9f
JM		 777 .htot = 1600,
778 .vblank_def = 854,
3145efcd 779 },
db15c195
JM		 780 .reg_data = ov5640_setting_low_res,
781 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 782 .max_fps = OV5640_30_FPS,
783 .def_fps = OV5640_30_FPS
8409d017
JM		 784 }, {
785 /* 320x240 */
3145efcd
JM		 786 .id = OV5640_MODE_QVGA_320_240,
787 .dn_mode = SUBSAMPLING,
5113d5b3
JM		 788 .width = 320,
789 .height = 240,
3145efcd 790 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 791 .dvp_timings = {
792 .analog_crop = {
793 .left = 0,
794 .top = 4,
795 .width = 2624,
796 .height = 1944,
797 },
798 .crop = {
799 .left = 16,
800 .top = 6,
801 .width = 320,
802 .height = 240,
803 },
804 .htot = 1896,
805 .vblank_def = 744,
3145efcd 806 },
5113d5b3
JM		 807 .csi2_timings = {
808 /* Feed the full valid pixel array to the ISP. */
809 .analog_crop = {
810 .left = OV5640_PIXEL_ARRAY_LEFT,
811 .top = OV5640_PIXEL_ARRAY_TOP,
812 .width = OV5640_PIXEL_ARRAY_WIDTH,
813 .height = OV5640_PIXEL_ARRAY_HEIGHT,
814 },
815 /* Maintain a minimum processing margin. */
816 .crop = {
817 .left = 2,
818 .top = 4,
819 .width = 320,
820 .height = 240,
821 },
961bed9f
JM		 822 .htot = 1600,
823 .vblank_def = 760,
3145efcd 824 },
db15c195
JM		 825 .reg_data = ov5640_setting_low_res,
826 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 827 .max_fps = OV5640_30_FPS,
828 .def_fps = OV5640_30_FPS
8409d017
JM		 829 }, {
830 /* 640x480 */
3145efcd
JM		 831 .id = OV5640_MODE_VGA_640_480,
832 .dn_mode = SUBSAMPLING,
833 .pixel_rate = OV5640_PIXEL_RATE_48M,
5113d5b3
JM		 834 .width = 640,
835 .height = 480,
836 .dvp_timings = {
837 .analog_crop = {
838 .left = 0,
839 .top = 4,
840 .width = 2624,
841 .height = 1944,
842 },
843 .crop = {
844 .left = 16,
845 .top = 6,
846 .width = 640,
847 .height = 480,
848 },
849 .htot = 1896,
850 .vblank_def = 600,
3145efcd 851 },
5113d5b3
JM		 852 .csi2_timings = {
853 /* Feed the full valid pixel array to the ISP. */
854 .analog_crop = {
855 .left = OV5640_PIXEL_ARRAY_LEFT,
856 .top = OV5640_PIXEL_ARRAY_TOP,
857 .width = OV5640_PIXEL_ARRAY_WIDTH,
858 .height = OV5640_PIXEL_ARRAY_HEIGHT,
859 },
860 /* Maintain a minimum processing margin. */
861 .crop = {
862 .left = 2,
863 .top = 4,
864 .width = 640,
865 .height = 480,
866 },
961bed9f
JM		 867 .htot = 1600,
868 .vblank_def = 520,
3145efcd 869 },
db15c195
JM		 870 .reg_data = ov5640_setting_low_res,
871 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 872 .max_fps = OV5640_60_FPS,
873 .def_fps = OV5640_30_FPS
8409d017
JM		 874 }, {
875 /* 720x480 */
3145efcd
JM		 876 .id = OV5640_MODE_NTSC_720_480,
877 .dn_mode = SUBSAMPLING,
5113d5b3
JM		 878 .width = 720,
879 .height = 480,
3145efcd 880 .pixel_rate = OV5640_PIXEL_RATE_96M,
5113d5b3
JM		 881 .dvp_timings = {
882 .analog_crop = {
883 .left = 0,
884 .top = 4,
885 .width = 2624,
886 .height = 1944,
887 },
888 .crop = {
889 .left = 56,
890 .top = 60,
891 .width = 720,
892 .height = 480,
893 },
894 .htot = 1896,
895 .vblank_def = 504,
3145efcd 896 },
5113d5b3
JM		 897 .csi2_timings = {
898 /* Feed the full valid pixel array to the ISP. */
899 .analog_crop = {
900 .left = OV5640_PIXEL_ARRAY_LEFT,
901 .top = OV5640_PIXEL_ARRAY_TOP,
902 .width = OV5640_PIXEL_ARRAY_WIDTH,
903 .height = OV5640_PIXEL_ARRAY_HEIGHT,
904 },
905 .crop = {
906 .left = 56,
907 .top = 60,
908 .width = 720,
909 .height = 480,
910 },
911 .htot = 1896,
961bed9f 912 .vblank_def = 1206,
3145efcd 913 },
db15c195
JM		 914 .reg_data = ov5640_setting_low_res,
915 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 916 .max_fps = OV5640_30_FPS,
917 .def_fps = OV5640_30_FPS
8409d017
JM		 918 }, {
919 /* 720x576 */
3145efcd
JM		 920 .id = OV5640_MODE_PAL_720_576,
921 .dn_mode = SUBSAMPLING,
5113d5b3
JM		 922 .width = 720,
923 .height = 576,
3145efcd 924 .pixel_rate = OV5640_PIXEL_RATE_96M,
5113d5b3
JM		 925 .dvp_timings = {
926 .analog_crop = {
927 .left = 0,
928 .top = 4,
929 .width = 2624,
930 .height = 1944,
931 },
932 .crop = {
933 .left = 56,
934 .top = 6,
935 .width = 720,
936 .height = 576,
937 },
938 .htot = 1896,
939 .vblank_def = 408,
3145efcd 940 },
5113d5b3
JM		 941 .csi2_timings = {
942 /* Feed the full valid pixel array to the ISP. */
943 .analog_crop = {
944 .left = OV5640_PIXEL_ARRAY_LEFT,
945 .top = OV5640_PIXEL_ARRAY_TOP,
946 .width = OV5640_PIXEL_ARRAY_WIDTH,
947 .height = OV5640_PIXEL_ARRAY_HEIGHT,
948 },
949 .crop = {
950 .left = 56,
951 .top = 6,
952 .width = 720,
953 .height = 576,
954 },
955 .htot = 1896,
961bed9f 956 .vblank_def = 1110,
3145efcd 957 },
db15c195
JM		 958 .reg_data = ov5640_setting_low_res,
959 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 960 .max_fps = OV5640_30_FPS,
961 .def_fps = OV5640_30_FPS
8409d017
JM		 962 }, {
963 /* 1024x768 */
3145efcd
JM		 964 .id = OV5640_MODE_XGA_1024_768,
965 .dn_mode = SUBSAMPLING,
966 .pixel_rate = OV5640_PIXEL_RATE_96M,
5113d5b3
JM		 967 .width = 1024,
968 .height = 768,
969 .dvp_timings = {
970 .analog_crop = {
971 .left = 0,
972 .top = 4,
973 .width = 2624,
974 .height = 1944,
975 },
976 .crop = {
977 .left = 16,
978 .top = 6,
979 .width = 1024,
980 .height = 768,
981 },
982 .htot = 1896,
983 .vblank_def = 312,
3145efcd 984 },
5113d5b3
JM		 985 .csi2_timings = {
986 .analog_crop = {
987 .left = 0,
988 .top = 4,
989 .width = OV5640_NATIVE_WIDTH,
990 .height = OV5640_PIXEL_ARRAY_HEIGHT,
991 },
992 .crop = {
993 .left = 16,
994 .top = 6,
995 .width = 1024,
996 .height = 768,
997 },
998 .htot = 1896,
961bed9f 999 .vblank_def = 918,
3145efcd 1000 },
db15c195
JM		 1001 .reg_data = ov5640_setting_low_res,
1002 .reg_data_size = ARRAY_SIZE(ov5640_setting_low_res),
19f2e3e6
HF		 1003 .max_fps = OV5640_30_FPS,
1004 .def_fps = OV5640_30_FPS
8409d017
JM		 1005 }, {
1006 /* 1280x720 */
3145efcd
JM		 1007 .id = OV5640_MODE_720P_1280_720,
1008 .dn_mode = SUBSAMPLING,
1009 .pixel_rate = OV5640_PIXEL_RATE_124M,
5113d5b3
JM		 1010 .width = 1280,
1011 .height = 720,
1012 .dvp_timings = {
1013 .analog_crop = {
1014 .left = 0,
1015 .top = 250,
1016 .width = 2624,
1017 .height = 1456,
1018 },
1019 .crop = {
1020 .left = 16,
1021 .top = 4,
1022 .width = 1280,
1023 .height = 720,
1024 },
1025 .htot = 1892,
1026 .vblank_def = 20,
3145efcd 1027 },
5113d5b3
JM		 1028 .csi2_timings = {
1029 .analog_crop = {
1030 .left = 0,
1031 .top = 250,
1032 .width = 2624,
1033 .height = 1456,
1034 },
1035 .crop = {
1036 .left = 16,
1037 .top = 4,
1038 .width = 1280,
1039 .height = 720,
1040 },
961bed9f
JM		 1041 .htot = 1600,
1042 .vblank_def = 560,
3145efcd 1043 },
3145efcd
JM		 1044 .reg_data = ov5640_setting_720P_1280_720,
1045 .reg_data_size = ARRAY_SIZE(ov5640_setting_720P_1280_720),
19f2e3e6
HF		 1046 .max_fps = OV5640_30_FPS,
1047 .def_fps = OV5640_30_FPS
8409d017
JM		 1048 }, {
1049 /* 1920x1080 */
3145efcd
JM		 1050 .id = OV5640_MODE_1080P_1920_1080,
1051 .dn_mode = SCALING,
1052 .pixel_rate = OV5640_PIXEL_RATE_148M,
5113d5b3
JM		 1053 .width = 1920,
1054 .height = 1080,
1055 .dvp_timings = {
1056 .analog_crop = {
1057 .left = 336,
1058 .top = 434,
1059 .width = 1952,
1060 .height = 1088,
1061 },
1062 .crop = {
1063 .left = 16,
1064 .top = 4,
1065 .width = 1920,
1066 .height = 1080,
1067 },
1068 .htot = 2500,
1069 .vblank_def = 40,
3145efcd 1070 },
5113d5b3
JM		 1071 .csi2_timings = {
1072 /* Crop the full valid pixel array in the center. */
1073 .analog_crop = {
1074 .left = 336,
1075 .top = 434,
1076 .width = 1952,
1077 .height = 1088,
1078 },
1079 /* Maintain a larger processing margins. */
1080 .crop = {
1081 .left = 16,
1082 .top = 4,
1083 .width = 1920,
1084 .height = 1080,
1085 },
961bed9f
JM		 1086 .htot = 2234,
1087 .vblank_def = 24,
3145efcd 1088 },
3145efcd
JM		 1089 .reg_data = ov5640_setting_1080P_1920_1080,
1090 .reg_data_size = ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
19f2e3e6
HF		 1091 .max_fps = OV5640_30_FPS,
1092 .def_fps = OV5640_30_FPS
8409d017
JM		 1093 }, {
1094 /* 2592x1944 */
3145efcd
JM		 1095 .id = OV5640_MODE_QSXGA_2592_1944,
1096 .dn_mode = SCALING,
1097 .pixel_rate = OV5640_PIXEL_RATE_168M,
5113d5b3
JM		 1098 .width = OV5640_PIXEL_ARRAY_WIDTH,
1099 .height = OV5640_PIXEL_ARRAY_HEIGHT,
1100 .dvp_timings = {
1101 .analog_crop = {
1102 .left = 0,
1103 .top = 0,
1104 .width = 2624,
1105 .height = 1952,
1106 },
1107 .crop = {
1108 .left = 16,
1109 .top = 4,
1110 .width = 2592,
1111 .height = 1944,
1112 },
1113 .htot = 2844,
1114 .vblank_def = 24,
3145efcd 1115 },
5113d5b3
JM		 1116 .csi2_timings = {
1117 /* Give more processing margin to full resolution. */
1118 .analog_crop = {
1119 .left = 0,
1120 .top = 0,
1121 .width = OV5640_NATIVE_WIDTH,
1122 .height = 1952,
1123 },
1124 .crop = {
1125 .left = 16,
1126 .top = 4,
1127 .width = 2592,
1128 .height = 1944,
1129 },
1130 .htot = 2844,
1131 .vblank_def = 24,
3145efcd 1132 },
3145efcd
JM		 1133 .reg_data = ov5640_setting_QSXGA_2592_1944,
1134 .reg_data_size = ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
19f2e3e6
HF		 1135 .max_fps = OV5640_15_FPS,
1136 .def_fps = OV5640_15_FPS
8409d017 1137 },
19a81c14
SL		 1138};
1139
2de6bb97
JM		 1140static const struct ov5640_timings *
1141ov5640_timings(const struct ov5640_dev *sensor,
1142 const struct ov5640_mode_info *mode)
1143{
1144 if (ov5640_is_csi2(sensor))
1145 return &mode->csi2_timings;
1146
1147 return &mode->dvp_timings;
1148}
1149
19a81c14
SL		 1150static int ov5640_init_slave_id(struct ov5640_dev *sensor)
1151{
1152 struct i2c_client *client = sensor->i2c_client;
1153 struct i2c_msg msg;
1154 u8 buf[3];
1155 int ret;
1156
1157 if (client->addr == OV5640_DEFAULT_SLAVE_ID)
1158 return 0;
1159
1160 buf[0] = OV5640_REG_SLAVE_ID >> 8;
1161 buf[1] = OV5640_REG_SLAVE_ID & 0xff;
1162 buf[2] = client->addr << 1;
1163
1164 msg.addr = OV5640_DEFAULT_SLAVE_ID;
1165 msg.flags = 0;
1166 msg.buf = buf;
1167 msg.len = sizeof(buf);
1168
1169 ret = i2c_transfer(client->adapter, &msg, 1);
1170 if (ret < 0) {
1171 dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
1172 return ret;
1173 }
1174
1175 return 0;
1176}
1177
1178static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
1179{
1180 struct i2c_client *client = sensor->i2c_client;
1181 struct i2c_msg msg;
1182 u8 buf[3];
1183 int ret;
1184
1185 buf[0] = reg >> 8;
1186 buf[1] = reg & 0xff;
1187 buf[2] = val;
1188
1189 msg.addr = client->addr;
1190 msg.flags = client->flags;
1191 msg.buf = buf;
1192 msg.len = sizeof(buf);
1193
1194 ret = i2c_transfer(client->adapter, &msg, 1);
1195 if (ret < 0) {
3924c623 1196 dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
19a81c14
SL		 1197 __func__, reg, val);
1198 return ret;
1199 }
1200
1201 return 0;
1202}
1203
1204static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
1205{
1206 struct i2c_client *client = sensor->i2c_client;
1207 struct i2c_msg msg[2];
1208 u8 buf[2];
1209 int ret;
1210
1211 buf[0] = reg >> 8;
1212 buf[1] = reg & 0xff;
1213
1214 msg[0].addr = client->addr;
1215 msg[0].flags = client->flags;
1216 msg[0].buf = buf;
1217 msg[0].len = sizeof(buf);
1218
1219 msg[1].addr = client->addr;
1220 msg[1].flags = client->flags | I2C_M_RD;
1221 msg[1].buf = buf;
1222 msg[1].len = 1;
1223
1224 ret = i2c_transfer(client->adapter, msg, 2);
3924c623
HF		 1225 if (ret < 0) {
1226 dev_err(&client->dev, "%s: error: reg=%x\n",
1227 __func__, reg);
19a81c14 1228 return ret;
3924c623 1229 }
19a81c14
SL		 1230
1231 *val = buf[0];
1232 return 0;
1233}
1234
1235static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
1236{
1237 u8 hi, lo;
1238 int ret;
1239
1240 ret = ov5640_read_reg(sensor, reg, &hi);
1241 if (ret)
1242 return ret;
41d8d7f5 1243 ret = ov5640_read_reg(sensor, reg + 1, &lo);
19a81c14
SL		 1244 if (ret)
1245 return ret;
1246
1247 *val = ((u16)hi << 8) | (u16)lo;
1248 return 0;
1249}
1250
1251static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
1252{
1253 int ret;
1254
1255 ret = ov5640_write_reg(sensor, reg, val >> 8);
1256 if (ret)
1257 return ret;
1258
1259 return ov5640_write_reg(sensor, reg + 1, val & 0xff);
1260}
1261
1262static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
1263 u8 mask, u8 val)
1264{
1265 u8 readval;
1266 int ret;
1267
1268 ret = ov5640_read_reg(sensor, reg, &readval);
1269 if (ret)
1270 return ret;
1271
1272 readval &= ~mask;
1273 val &= mask;
1274 val |= readval;
1275
1276 return ov5640_write_reg(sensor, reg, val);
1277}
1278
aa288248
MR		 1279/*
1280 * After trying the various combinations, reading various
f8a7647d 1281 * documentations spread around the net, and from the various
aa288248
MR		 1282 * feedback, the clock tree is probably as follows:
1283 *
1284 * +--------------+
1285 * | Ext. Clock |
1286 * +-+------------+
1287 * | +----------+
1288 * +->| PLL1 | - reg 0x3036, for the multiplier
1289 * +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
1290 * | +--------------+
1291 * +->| System Clock | - reg 0x3035, bits 4-7
1292 * +-+------------+
1293 * | +--------------+
1294 * +->| MIPI Divider | - reg 0x3035, bits 0-3
1295 * | +-+------------+
1296 * | +----------------> MIPI SCLK
1297 * | + +-----+
1298 * | +->| / 2 |-------> MIPI BIT CLK
1299 * | +-----+
1300 * | +--------------+
1301 * +->| PLL Root Div | - reg 0x3037, bit 4
1302 * +-+------------+
1303 * | +---------+
4c85f628 1304 * +->| Bit Div | - reg 0x3034, bits 0-3
aa288248
MR		 1305 * +-+-------+
1306 * | +-------------+
1307 * +->| SCLK Div | - reg 0x3108, bits 0-1
1308 * | +-+-----------+
1309 * | +---------------> SCLK
1310 * | +-------------+
1311 * +->| SCLK 2X Div | - reg 0x3108, bits 2-3
1312 * | +-+-----------+
1313 * | +---------------> SCLK 2X
1314 * | +-------------+
1315 * +->| PCLK Div | - reg 0x3108, bits 4-5
1316 * ++------------+
1317 * + +-----------+
1318 * +->| P_DIV | - reg 0x3035, bits 0-3
1319 * +-----+-----+
1320 * +------------> PCLK
1321 *
6c957ed7 1322 * There seems to be also constraints:
aa288248
MR		 1323 * - the PLL pre-divider output rate should be in the 4-27MHz range
1324 * - the PLL multiplier output rate should be in the 500-1000MHz range
1325 * - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
aa288248
MR		 1326 */
1327
1328/*
1329 * This is supposed to be ranging from 1 to 8, but the value is always
1330 * set to 3 in the vendor kernels.
1331 */
1332#define OV5640_PLL_PREDIV 3
1333
1334#define OV5640_PLL_MULT_MIN 4
1335#define OV5640_PLL_MULT_MAX 252
1336
1337/*
1338 * This is supposed to be ranging from 1 to 16, but the value is
1339 * always set to either 1 or 2 in the vendor kernels.
1340 */
1341#define OV5640_SYSDIV_MIN 1
1342#define OV5640_SYSDIV_MAX 16
1343
aa288248
MR		 1344/*
1345 * This is supposed to be ranging from 1 to 2, but the value is always
1346 * set to 2 in the vendor kernels.
1347 */
1348#define OV5640_PLL_ROOT_DIV 2
1349#define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 BIT(4)
1350
1351/*
1352 * We only supports 8-bit formats at the moment
1353 */
1354#define OV5640_BIT_DIV 2
1355#define OV5640_PLL_CTRL0_MIPI_MODE_8BIT 0x08
1356
1357/*
1358 * This is supposed to be ranging from 1 to 8, but the value is always
1359 * set to 2 in the vendor kernels.
1360 */
1361#define OV5640_SCLK_ROOT_DIV 2
1362
1363/*
1364 * This is hardcoded so that the consistency is maintained between SCLK and
1365 * SCLK 2x.
1366 */
1367#define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
1368
1369/*
1370 * This is supposed to be ranging from 1 to 8, but the value is always
1371 * set to 1 in the vendor kernels.
1372 */
1373#define OV5640_PCLK_ROOT_DIV 1
1374#define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS 0x00
1375
1376static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
1377 u8 pll_prediv, u8 pll_mult,
1378 u8 sysdiv)
1379{
1380 unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
1381
1382 /* PLL1 output cannot exceed 1GHz. */
1383 if (sysclk / 1000000 > 1000)
1384 return 0;
1385
1386 return sysclk / sysdiv;
1387}
1388
1389static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
1390 unsigned long rate,
1391 u8 *pll_prediv, u8 *pll_mult,
1392 u8 *sysdiv)
1393{
1394 unsigned long best = ~0;
1395 u8 best_sysdiv = 1, best_mult = 1;
1396 u8 _sysdiv, _pll_mult;
1397
1398 for (_sysdiv = OV5640_SYSDIV_MIN;
1399 _sysdiv <= OV5640_SYSDIV_MAX;
1400 _sysdiv++) {
1401 for (_pll_mult = OV5640_PLL_MULT_MIN;
1402 _pll_mult <= OV5640_PLL_MULT_MAX;
1403 _pll_mult++) {
1404 unsigned long _rate;
1405
1406 /*
1407 * The PLL multiplier cannot be odd if above
1408 * 127.
1409 */
1410 if (_pll_mult > 127 && (_pll_mult % 2))
1411 continue;
1412
1413 _rate = ov5640_compute_sys_clk(sensor,
1414 OV5640_PLL_PREDIV,
1415 _pll_mult, _sysdiv);
1416
1417 /*
1418 * We have reached the maximum allowed PLL1 output,
1419 * increase sysdiv.
1420 */
2e3df204 1421 if (!_rate)
aa288248
MR		 1422 break;
1423
1424 /*
1425 * Prefer rates above the expected clock rate than
1426 * below, even if that means being less precise.
1427 */
1428 if (_rate < rate)
1429 continue;
1430
1431 if (abs(rate - _rate) < abs(rate - best)) {
1432 best = _rate;
1433 best_sysdiv = _sysdiv;
1434 best_mult = _pll_mult;
1435 }
1436
1437 if (_rate == rate)
1438 goto out;
1439 }
1440 }
1441
1442out:
1443 *sysdiv = best_sysdiv;
1444 *pll_prediv = OV5640_PLL_PREDIV;
1445 *pll_mult = best_mult;
1446
1447 return best;
1448}
1449
1450/*
1451 * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
1452 * for the MIPI CSI-2 output.
aa288248 1453 */
6c957ed7 1454static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor)
aa288248 1455{
6c957ed7 1456 u8 bit_div, mipi_div, pclk_div, sclk_div, sclk2x_div, root_div;
aa288248 1457 u8 prediv, mult, sysdiv;
6c957ed7
JM		 1458 unsigned long link_freq;
1459 unsigned long sysclk;
1460 u8 pclk_period;
1461 u32 sample_rate;
1462 u32 num_lanes;
aa288248
MR		 1463 int ret;
1464
6c957ed7
JM		 1465 /* Use the link freq computed at ov5640_update_pixel_rate() time. */
1466 link_freq = sensor->current_link_freq;
1467
aa288248 1468 /*
6c957ed7
JM		 1469 * - mipi_div - Additional divider for the MIPI lane clock.
1470 *
1471 * Higher link frequencies would make sysclk > 1GHz.
1472 * Keep the sysclk low and do not divide in the MIPI domain.
aa288248 1473 */
6c957ed7
JM		 1474 if (link_freq > OV5640_LINK_RATE_MAX)
1475 mipi_div = 1;
aa288248 1476 else
6c957ed7 1477 mipi_div = 2;
aa288248 1478
6c957ed7
JM		 1479 sysclk = link_freq * mipi_div;
1480 ov5640_calc_sys_clk(sensor, sysclk, &prediv, &mult, &sysdiv);
aa288248 1481
6c957ed7
JM		 1482 /*
1483 * Adjust PLL parameters to maintain the MIPI_SCLK-to-PCLK ratio.
1484 *
1485 * - root_div = 2 (fixed)
1486 * - bit_div : MIPI 8-bit = 2; MIPI 10-bit = 2.5
1487 * - pclk_div = 1 (fixed)
1488 * - p_div = (2 lanes ? mipi_div : 2 * mipi_div)
1489 *
1490 * This results in the following MIPI_SCLK depending on the number
1491 * of lanes:
1492 *
1493 * - 2 lanes: MIPI_SCLK = (4 or 5) * PCLK
1494 * - 1 lanes: MIPI_SCLK = (8 or 10) * PCLK
1495 */
1496 root_div = OV5640_PLL_CTRL3_PLL_ROOT_DIV_2;
1497 bit_div = OV5640_PLL_CTRL0_MIPI_MODE_8BIT;
1498 pclk_div = ilog2(OV5640_PCLK_ROOT_DIV);
aa288248 1499
6c957ed7
JM		 1500 /*
1501 * Scaler clock:
1502 * - YUV: PCLK >= 2 * SCLK
1503 * - RAW or JPEG: PCLK >= SCLK
1504 * - sclk2x_div = sclk_div / 2
1505 */
1506 sclk_div = ilog2(OV5640_SCLK_ROOT_DIV);
1507 sclk2x_div = ilog2(OV5640_SCLK2X_ROOT_DIV);
1508
1509 /*
1510 * Set the pixel clock period expressed in ns with 1-bit decimal
1511 * (0x01=0.5ns).
1512 *
1513 * The register is very briefly documented. In the OV5645 datasheet it
1514 * is described as (2 * pclk period), and from testing it seems the
1515 * actual definition is 2 * 8-bit sample period.
1516 *
1517 * 2 * sample_period = (mipi_clk * 2 * num_lanes / bpp) * (bpp / 8) / 2
1518 */
1519 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
1520 sample_rate = (link_freq * mipi_div * num_lanes * 2) / 16;
1521 pclk_period = 2000000000UL / sample_rate;
1522
1523 /* Program the clock tree registers. */
1524 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0, 0x0f, bit_div);
1525 if (ret)
1526 return ret;
1527
1528 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1, 0xff,
1529 (sysdiv << 4) | mipi_div);
aa288248
MR		 1530 if (ret)
1531 return ret;
1532
1533 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
1534 if (ret)
1535 return ret;
1536
6c957ed7
JM		 1537 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3, 0x1f,
1538 root_div | prediv);
1539 if (ret)
1540 return ret;
1541
1542 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1543 (pclk_div << 4) | (sclk2x_div << 2) | sclk_div);
aa288248
MR		 1544 if (ret)
1545 return ret;
1546
6c957ed7
JM		 1547 return ov5640_write_reg(sensor, OV5640_REG_PCLK_PERIOD, pclk_period);
1548}
1549
1550static u32 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1551{
3145efcd 1552 const struct ov5640_mode_info *mode = sensor->current_mode;
5113d5b3 1553 const struct ov5640_timings *timings = &mode->dvp_timings;
6c957ed7
JM		 1554 u32 rate;
1555
5113d5b3 1556 rate = timings->htot * (timings->crop.height + timings->vblank_def);
6c957ed7
JM		 1557 rate *= ov5640_framerates[sensor->current_fr];
1558
1559 return rate;
aa288248
MR		 1560}
1561
1562static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1563 unsigned long rate,
1564 u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1565 u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1566{
1567 unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1568 OV5640_PCLK_ROOT_DIV;
1569
1570 _rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1571 sysdiv);
1572 *pll_rdiv = OV5640_PLL_ROOT_DIV;
1573 *bit_div = OV5640_BIT_DIV;
1574 *pclk_div = OV5640_PCLK_ROOT_DIV;
1575
1576 return _rate / *pll_rdiv / *bit_div / *pclk_div;
1577}
1578
6c957ed7 1579static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor)
aa288248
MR		 1580{
1581 u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
6c957ed7 1582 u32 rate;
aa288248
MR		 1583 int ret;
1584
6c957ed7 1585 rate = ov5640_calc_pixel_rate(sensor);
a89f14bb 1586 rate *= ov5640_code_to_bpp(sensor, sensor->fmt.code);
6c957ed7
JM		 1587 rate /= sensor->ep.bus.parallel.bus_width;
1588
aa288248
MR		 1589 ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1590 &bit_div, &pclk_div);
1591
1592 if (bit_div == 2)
1593 bit_div = 8;
1594
1595 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1596 0x0f, bit_div);
1597 if (ret)
1598 return ret;
1599
1600 /*
1601 * We need to set sysdiv according to the clock, and to clear
1602 * the MIPI divider.
1603 */
1604 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1605 0xff, sysdiv << 4);
1606 if (ret)
1607 return ret;
1608
1609 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1610 0xff, mult);
1611 if (ret)
1612 return ret;
1613
1614 ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1615 0x1f, prediv | ((pll_rdiv - 1) << 4));
1616 if (ret)
1617 return ret;
1618
1619 return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1620 (ilog2(pclk_div) << 4));
1621}
1622
7cb013b1
CYT		 1623/* set JPEG framing sizes */
1624static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1625 const struct ov5640_mode_info *mode)
1626{
1627 int ret;
1628
2b5c18f9
CYT		 1629 /*
1630 * compression mode 3 timing
1631 *
1632 * Data is transmitted with programmable width (VFIFO_HSIZE).
1633 * No padding done. Last line may have less data. Varying
1634 * number of lines per frame, depending on amount of data.
1635 */
1636 ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1637 if (ret < 0)
1638 return ret;
1639
5113d5b3 1640 ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->width);
7cb013b1
CYT		 1641 if (ret < 0)
1642 return ret;
1643
5113d5b3 1644 return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->height);
7cb013b1
CYT		 1645}
1646
19a81c14 1647/* download ov5640 settings to sensor through i2c */
bad1774e
JM		 1648static int ov5640_set_timings(struct ov5640_dev *sensor,
1649 const struct ov5640_mode_info *mode)
1650{
5113d5b3
JM		 1651 const struct ov5640_timings *timings;
1652 const struct v4l2_rect *analog_crop;
1653 const struct v4l2_rect *crop;
bad1774e
JM		 1654 int ret;
1655
7cb013b1
CYT		 1656 if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1657 ret = ov5640_set_jpeg_timings(sensor, mode);
1658 if (ret < 0)
1659 return ret;
1660 }
1661
2de6bb97 1662 timings = ov5640_timings(sensor, mode);
5113d5b3
JM		 1663 analog_crop = &timings->analog_crop;
1664 crop = &timings->crop;
1665
3145efcd
JM		 1666 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HS,
1667 analog_crop->left);
bad1774e
JM		 1668 if (ret < 0)
1669 return ret;
1670
3145efcd
JM		 1671 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VS,
1672 analog_crop->top);
1673 if (ret < 0)
1674 return ret;
1675
1676 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HW,
1677 analog_crop->left + analog_crop->width - 1);
1678 if (ret < 0)
1679 return ret;
1680
1681 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VH,
1682 analog_crop->top + analog_crop->height - 1);
1683 if (ret < 0)
1684 return ret;
1685
1686 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HOFFS, crop->left);
1687 if (ret < 0)
1688 return ret;
1689
1690 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VOFFS, crop->top);
1691 if (ret < 0)
1692 return ret;
1693
5113d5b3 1694 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->width);
3145efcd
JM		 1695 if (ret < 0)
1696 return ret;
1697
5113d5b3 1698 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->height);
bad1774e
JM		 1699 if (ret < 0)
1700 return ret;
1701
5113d5b3 1702 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, timings->htot);
bad1774e
JM		 1703 if (ret < 0)
1704 return ret;
1705
3145efcd 1706 ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS,
5113d5b3 1707 mode->height + timings->vblank_def);
3145efcd
JM		 1708 if (ret < 0)
1709 return ret;
1710
1711 return 0;
bad1774e
JM		 1712}
1713
e4359019
JM		 1714static void ov5640_load_regs(struct ov5640_dev *sensor,
1715 const struct reg_value *regs, unsigned int regnum)
19a81c14 1716{
19a81c14
SL		 1717 unsigned int i;
1718 u32 delay_ms;
1719 u16 reg_addr;
1720 u8 mask, val;
1721 int ret = 0;
1722
e4359019 1723 for (i = 0; i < regnum; ++i, ++regs) {
19a81c14
SL		 1724 delay_ms = regs->delay_ms;
1725 reg_addr = regs->reg_addr;
1726 val = regs->val;
1727 mask = regs->mask;
1728
3b987d70
LP		 1729 /* remain in power down mode for DVP */
1730 if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1731 val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
8e823f5c 1732 !ov5640_is_csi2(sensor))
3b987d70
LP		 1733 continue;
1734
19a81c14
SL		 1735 if (mask)
1736 ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1737 else
1738 ret = ov5640_write_reg(sensor, reg_addr, val);
1739 if (ret)
1740 break;
1741
1742 if (delay_ms)
41d8d7f5 1743 usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
19a81c14 1744 }
19a81c14
SL		 1745}
1746
dc29a1c1
HF		 1747static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1748{
1749 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1750 BIT(0), on ? 0 : BIT(0));
1751}
1752
19a81c14
SL		 1753/* read exposure, in number of line periods */
1754static int ov5640_get_exposure(struct ov5640_dev *sensor)
1755{
1756 int exp, ret;
1757 u8 temp;
1758
1759 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1760 if (ret)
1761 return ret;
1762 exp = ((int)temp & 0x0f) << 16;
1763 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1764 if (ret)
1765 return ret;
1766 exp |= ((int)temp << 8);
1767 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1768 if (ret)
1769 return ret;
1770 exp |= (int)temp;
1771
1772 return exp >> 4;
1773}
1774
1775/* write exposure, given number of line periods */
1776static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1777{
1778 int ret;
1779
1780 exposure <<= 4;
1781
1782 ret = ov5640_write_reg(sensor,
1783 OV5640_REG_AEC_PK_EXPOSURE_LO,
1784 exposure & 0xff);
1785 if (ret)
1786 return ret;
1787 ret = ov5640_write_reg(sensor,
1788 OV5640_REG_AEC_PK_EXPOSURE_MED,
1789 (exposure >> 8) & 0xff);
1790 if (ret)
1791 return ret;
1792 return ov5640_write_reg(sensor,
1793 OV5640_REG_AEC_PK_EXPOSURE_HI,
1794 (exposure >> 16) & 0x0f);
1795}
1796
1797static int ov5640_get_gain(struct ov5640_dev *sensor)
1798{
1799 u16 gain;
1800 int ret;
1801
1802 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1803 if (ret)
1804 return ret;
1805
1806 return gain & 0x3ff;
1807}
1808
3cca8ef5
HF		 1809static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1810{
1811 return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1812 (u16)gain & 0x3ff);
1813}
1814
1815static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1816{
1817 return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1818 BIT(1), on ? 0 : BIT(1));
1819}
1820
f22996db
HF		 1821static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1822{
3b987d70
LP		 1823 return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1824 OV5640_REG_SYS_CTRL0_SW_PWUP :
1825 OV5640_REG_SYS_CTRL0_SW_PWDN);
f22996db
HF		 1826}
1827
1828static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
19a81c14
SL		 1829{
1830 int ret;
1831
aa4bb8b8
JM		 1832 /*
1833 * Enable/disable the MIPI interface
1834 *
1835 * 0x300e = on ? 0x45 : 0x40
1836 *
1837 * FIXME: the sensor manual (version 2.03) reports
1838 * [7:5] = 000 : 1 data lane mode
1839 * [7:5] = 001 : 2 data lanes mode
1840 * But this settings do not work, while the following ones
1841 * have been validated for 2 data lanes mode.
1842 *
1843 * [7:5] = 010 : 2 data lanes mode
1844 * [4] = 0 : Power up MIPI HS Tx
1845 * [3] = 0 : Power up MIPI LS Rx
1846 * [2] = 1/0 : MIPI interface enable/disable
1847 * [1:0] = 01/00: FIXME: 'debug'
1848 */
1849 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1850 on ? 0x45 : 0x40);
19a81c14
SL		 1851 if (ret)
1852 return ret;
1853
1854 return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1855 on ? 0x00 : 0x0f);
1856}
1857
1858static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1859{
1860 /* calculate sysclk */
1861 u32 xvclk = sensor->xclk_freq / 10000;
1862 u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1863 u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1864 u32 bit_div2x = 1, sclk_rdiv, sysclk;
1865 u8 temp1, temp2;
1866 int ret;
1867
1868 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1869 if (ret)
1870 return ret;
1871 temp2 = temp1 & 0x0f;
1872 if (temp2 == 8 || temp2 == 10)
1873 bit_div2x = temp2 / 2;
1874
1875 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1876 if (ret)
1877 return ret;
1878 sysdiv = temp1 >> 4;
1879 if (sysdiv == 0)
1880 sysdiv = 16;
1881
1882 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1883 if (ret)
1884 return ret;
1885 multiplier = temp1;
1886
1887 ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1888 if (ret)
1889 return ret;
1890 prediv = temp1 & 0x0f;
1891 pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1892
1893 ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1894 if (ret)
1895 return ret;
1896 temp2 = temp1 & 0x03;
1897 sclk_rdiv = sclk_rdiv_map[temp2];
1898
1899 if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1900 return -EINVAL;
1901
1902 VCO = xvclk * multiplier / prediv;
1903
1904 sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1905
1906 return sysclk;
1907}
1908
1909static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1910{
1911 /* read HTS from register settings */
1912 u8 mode;
1913 int ret;
1914
1915 ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1916 if (ret)
1917 return ret;
1918 mode &= 0xfb;
1919 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1920}
1921
1922static int ov5640_get_hts(struct ov5640_dev *sensor)
1923{
1924 /* read HTS from register settings */
1925 u16 hts;
1926 int ret;
1927
1928 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1929 if (ret)
1930 return ret;
1931 return hts;
1932}
1933
1934static int ov5640_get_vts(struct ov5640_dev *sensor)
1935{
1936 u16 vts;
1937 int ret;
1938
1939 ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1940 if (ret)
1941 return ret;
1942 return vts;
1943}
1944
1945static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1946{
1947 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1948}
1949
1950static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1951{
1952 /* get banding filter value */
1953 int ret, light_freq = 0;
1954 u8 temp, temp1;
1955
1956 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1957 if (ret)
1958 return ret;
1959
1960 if (temp & 0x80) {
1961 /* manual */
1962 ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1963 &temp1);
1964 if (ret)
1965 return ret;
1966 if (temp1 & 0x04) {
1967 /* 50Hz */
1968 light_freq = 50;
1969 } else {
1970 /* 60Hz */
1971 light_freq = 60;
1972 }
1973 } else {
1974 /* auto */
1975 ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1976 &temp1);
1977 if (ret)
1978 return ret;
1979
1980 if (temp1 & 0x01) {
1981 /* 50Hz */
1982 light_freq = 50;
1983 } else {
1984 /* 60Hz */
1985 }
1986 }
1987
1988 return light_freq;
1989}
1990
1991static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1992{
1993 u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1994 int ret;
1995
1996 /* read preview PCLK */
1997 ret = ov5640_get_sysclk(sensor);
1998 if (ret < 0)
1999 return ret;
2000 if (ret == 0)
2001 return -EINVAL;
2002 sensor->prev_sysclk = ret;
2003 /* read preview HTS */
2004 ret = ov5640_get_hts(sensor);
2005 if (ret < 0)
2006 return ret;
2007 if (ret == 0)
2008 return -EINVAL;
2009 sensor->prev_hts = ret;
2010
2011 /* read preview VTS */
2012 ret = ov5640_get_vts(sensor);
2013 if (ret < 0)
2014 return ret;
2015 prev_vts = ret;
2016
19a81c14
SL		 2017 /* calculate banding filter */
2018 /* 60Hz */
2019 band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
2020 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
2021 if (ret)
2022 return ret;
2023 if (!band_step60)
2024 return -EINVAL;
2025 max_band60 = (int)((prev_vts - 4) / band_step60);
2026 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
2027 if (ret)
2028 return ret;
2029
2030 /* 50Hz */
2031 band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
2032 ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
2033 if (ret)
2034 return ret;
2035 if (!band_step50)
2036 return -EINVAL;
2037 max_band50 = (int)((prev_vts - 4) / band_step50);
2038 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
2039}
2040
2041static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
2042{
2043 /* stable in high */
2044 u32 fast_high, fast_low;
2045 int ret;
2046
2047 sensor->ae_low = target * 23 / 25; /* 0.92 */
2048 sensor->ae_high = target * 27 / 25; /* 1.08 */
2049
2050 fast_high = sensor->ae_high << 1;
2051 if (fast_high > 255)
2052 fast_high = 255;
2053
2054 fast_low = sensor->ae_low >> 1;
2055
2056 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
2057 if (ret)
2058 return ret;
2059 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
2060 if (ret)
2061 return ret;
2062 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
2063 if (ret)
2064 return ret;
2065 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
2066 if (ret)
2067 return ret;
2068 ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
2069 if (ret)
2070 return ret;
2071 return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
2072}
2073
c2c3f42d 2074static int ov5640_get_binning(struct ov5640_dev *sensor)
19a81c14
SL		 2075{
2076 u8 temp;
2077 int ret;
2078
2079 ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
2080 if (ret)
2081 return ret;
c2c3f42d
HF		 2082
2083 return temp & BIT(0);
19a81c14
SL		 2084}
2085
ce85705a
HF		 2086static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
2087{
2088 int ret;
2089
2090 /*
2091 * TIMING TC REG21:
2092 * - [0]: Horizontal binning enable
2093 */
2094 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2095 BIT(0), enable ? BIT(0) : 0);
2096 if (ret)
2097 return ret;
2098 /*
2099 * TIMING TC REG20:
2100 * - [0]: Undocumented, but hardcoded init sequences
2101 * are always setting REG21/REG20 bit 0 to same value...
2102 */
2103 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2104 BIT(0), enable ? BIT(0) : 0);
2105}
2106
19a81c14
SL		 2107static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
2108{
8670d70a 2109 struct i2c_client *client = sensor->i2c_client;
19a81c14
SL		 2110 u8 temp, channel = virtual_channel;
2111 int ret;
2112
8670d70a
HF		 2113 if (channel > 3) {
2114 dev_err(&client->dev,
2115 "%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
2116 __func__, channel);
19a81c14 2117 return -EINVAL;
8670d70a 2118 }
19a81c14
SL		 2119
2120 ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
2121 if (ret)
2122 return ret;
2123 temp &= ~(3 << 6);
2124 temp |= (channel << 6);
2125 return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
2126}
2127
2128static const struct ov5640_mode_info *
b6ae5022 2129ov5640_find_mode(struct ov5640_dev *sensor, int width, int height, bool nearest)
19a81c14 2130{
3c4a7372 2131 const struct ov5640_mode_info *mode;
19a81c14 2132
086c25f8
MR		 2133 mode = v4l2_find_nearest_size(ov5640_mode_data,
2134 ARRAY_SIZE(ov5640_mode_data),
5113d5b3 2135 width, height, width, height);
19a81c14 2136
3c4a7372 2137 if (!mode ||
3145efcd 2138 (!nearest &&
5113d5b3 2139 (mode->width != width || mode->height != height)))
3c4a7372 2140 return NULL;
19a81c14
SL		 2141
2142 return mode;
2143}
2144
2145/*
2146 * sensor changes between scaling and subsampling, go through
2147 * exposure calculation
2148 */
41d8d7f5
HF		 2149static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
2150 const struct ov5640_mode_info *mode)
19a81c14
SL		 2151{
2152 u32 prev_shutter, prev_gain16;
2153 u32 cap_shutter, cap_gain16;
2154 u32 cap_sysclk, cap_hts, cap_vts;
2155 u32 light_freq, cap_bandfilt, cap_maxband;
2156 u32 cap_gain16_shutter;
2157 u8 average;
2158 int ret;
2159
41d8d7f5 2160 if (!mode->reg_data)
19a81c14
SL		 2161 return -EINVAL;
2162
2163 /* read preview shutter */
2164 ret = ov5640_get_exposure(sensor);
2165 if (ret < 0)
2166 return ret;
2167 prev_shutter = ret;
c2c3f42d 2168 ret = ov5640_get_binning(sensor);
19a81c14
SL		 2169 if (ret < 0)
2170 return ret;
2171 if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
2172 mode->id != OV5640_MODE_1080P_1920_1080)
2173 prev_shutter *= 2;
2174
2175 /* read preview gain */
2176 ret = ov5640_get_gain(sensor);
2177 if (ret < 0)
2178 return ret;
2179 prev_gain16 = ret;
2180
2181 /* get average */
2182 ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
2183 if (ret)
2184 return ret;
2185
2186 /* turn off night mode for capture */
2187 ret = ov5640_set_night_mode(sensor);
2188 if (ret < 0)
2189 return ret;
2190
2191 /* Write capture setting */
e4359019
JM		 2192 ov5640_load_regs(sensor, mode->reg_data, mode->reg_data_size);
2193 ret = ov5640_set_timings(sensor, mode);
19a81c14
SL		 2194 if (ret < 0)
2195 return ret;
2196
2197 /* read capture VTS */
2198 ret = ov5640_get_vts(sensor);
2199 if (ret < 0)
2200 return ret;
2201 cap_vts = ret;
2202 ret = ov5640_get_hts(sensor);
2203 if (ret < 0)
2204 return ret;
2205 if (ret == 0)
2206 return -EINVAL;
2207 cap_hts = ret;
2208
2209 ret = ov5640_get_sysclk(sensor);
2210 if (ret < 0)
2211 return ret;
2212 if (ret == 0)
2213 return -EINVAL;
2214 cap_sysclk = ret;
2215
2216 /* calculate capture banding filter */
2217 ret = ov5640_get_light_freq(sensor);
2218 if (ret < 0)
2219 return ret;
2220 light_freq = ret;
2221
2222 if (light_freq == 60) {
2223 /* 60Hz */
2224 cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
2225 } else {
2226 /* 50Hz */
2227 cap_bandfilt = cap_sysclk * 100 / cap_hts;
2228 }
2229
2230 if (!sensor->prev_sysclk) {
2231 ret = ov5640_get_sysclk(sensor);
2232 if (ret < 0)
2233 return ret;
2234 if (ret == 0)
2235 return -EINVAL;
2236 sensor->prev_sysclk = ret;
2237 }
2238
2239 if (!cap_bandfilt)
2240 return -EINVAL;
2241
2242 cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
2243
2244 /* calculate capture shutter/gain16 */
2245 if (average > sensor->ae_low && average < sensor->ae_high) {
2246 /* in stable range */
2247 cap_gain16_shutter =
2248 prev_gain16 * prev_shutter *
2249 cap_sysclk / sensor->prev_sysclk *
2250 sensor->prev_hts / cap_hts *
2251 sensor->ae_target / average;
2252 } else {
2253 cap_gain16_shutter =
2254 prev_gain16 * prev_shutter *
2255 cap_sysclk / sensor->prev_sysclk *
2256 sensor->prev_hts / cap_hts;
2257 }
2258
2259 /* gain to shutter */
2260 if (cap_gain16_shutter < (cap_bandfilt * 16)) {
2261 /* shutter < 1/100 */
2262 cap_shutter = cap_gain16_shutter / 16;
2263 if (cap_shutter < 1)
2264 cap_shutter = 1;
2265
2266 cap_gain16 = cap_gain16_shutter / cap_shutter;
2267 if (cap_gain16 < 16)
2268 cap_gain16 = 16;
2269 } else {
2270 if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
2271 /* exposure reach max */
2272 cap_shutter = cap_bandfilt * cap_maxband;
2273 if (!cap_shutter)
2274 return -EINVAL;
2275
2276 cap_gain16 = cap_gain16_shutter / cap_shutter;
2277 } else {
2278 /* 1/100 < (cap_shutter = n/100) =< max */
2279 cap_shutter =
2280 ((int)(cap_gain16_shutter / 16 / cap_bandfilt))
2281 * cap_bandfilt;
2282 if (!cap_shutter)
2283 return -EINVAL;
2284
2285 cap_gain16 = cap_gain16_shutter / cap_shutter;
2286 }
2287 }
2288
2289 /* set capture gain */
3cca8ef5 2290 ret = ov5640_set_gain(sensor, cap_gain16);
19a81c14
SL		 2291 if (ret)
2292 return ret;
2293
2294 /* write capture shutter */
2295 if (cap_shutter > (cap_vts - 4)) {
2296 cap_vts = cap_shutter + 4;
2297 ret = ov5640_set_vts(sensor, cap_vts);
2298 if (ret < 0)
2299 return ret;
2300 }
2301
2302 /* set exposure */
3cca8ef5 2303 return ov5640_set_exposure(sensor, cap_shutter);
19a81c14
SL		 2304}
2305
2306/*
2307 * if sensor changes inside scaling or subsampling
2308 * change mode directly
2309 */
2310static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
3cca8ef5 2311 const struct ov5640_mode_info *mode)
19a81c14 2312{
41d8d7f5 2313 if (!mode->reg_data)
19a81c14
SL		 2314 return -EINVAL;
2315
2316 /* Write capture setting */
e4359019
JM		 2317 ov5640_load_regs(sensor, mode->reg_data, mode->reg_data_size);
2318 return ov5640_set_timings(sensor, mode);
19a81c14
SL		 2319}
2320
985cdcb0 2321static int ov5640_set_mode(struct ov5640_dev *sensor)
19a81c14
SL		 2322{
2323 const struct ov5640_mode_info *mode = sensor->current_mode;
985cdcb0 2324 const struct ov5640_mode_info *orig_mode = sensor->last_mode;
19a81c14 2325 enum ov5640_downsize_mode dn_mode, orig_dn_mode;
3cca8ef5 2326 bool auto_gain = sensor->ctrls.auto_gain->val == 1;
dc29a1c1 2327 bool auto_exp = sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
19a81c14
SL		 2328 int ret;
2329
2330 dn_mode = mode->dn_mode;
2331 orig_dn_mode = orig_mode->dn_mode;
2332
2333 /* auto gain and exposure must be turned off when changing modes */
3cca8ef5
HF		 2334 if (auto_gain) {
2335 ret = ov5640_set_autogain(sensor, false);
2336 if (ret)
2337 return ret;
2338 }
bf4a4b51 2339
3cca8ef5
HF		 2340 if (auto_exp) {
2341 ret = ov5640_set_autoexposure(sensor, false);
2342 if (ret)
2343 goto restore_auto_gain;
2344 }
19a81c14 2345
6c957ed7
JM		 2346 if (ov5640_is_csi2(sensor))
2347 ret = ov5640_set_mipi_pclk(sensor);
2348 else
2349 ret = ov5640_set_dvp_pclk(sensor);
aa288248
MR		 2350 if (ret < 0)
2351 return 0;
2352
19a81c14
SL		 2353 if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
2354 (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
2355 /*
2356 * change between subsampling and scaling
3cca8ef5 2357 * go through exposure calculation
19a81c14
SL		 2358 */
2359 ret = ov5640_set_mode_exposure_calc(sensor, mode);
2360 } else {
2361 /*
2362 * change inside subsampling or scaling
2363 * download firmware directly
2364 */
3cca8ef5 2365 ret = ov5640_set_mode_direct(sensor, mode);
19a81c14 2366 }
19a81c14 2367 if (ret < 0)
3cca8ef5
HF		 2368 goto restore_auto_exp_gain;
2369
2370 /* restore auto gain and exposure */
2371 if (auto_gain)
2372 ov5640_set_autogain(sensor, true);
2373 if (auto_exp)
2374 ov5640_set_autoexposure(sensor, true);
19a81c14 2375
ce85705a
HF		 2376 ret = ov5640_set_binning(sensor, dn_mode != SCALING);
2377 if (ret < 0)
2378 return ret;
19a81c14
SL		 2379 ret = ov5640_set_ae_target(sensor, sensor->ae_target);
2380 if (ret < 0)
2381 return ret;
2382 ret = ov5640_get_light_freq(sensor);
2383 if (ret < 0)
2384 return ret;
2385 ret = ov5640_set_bandingfilter(sensor);
2386 if (ret < 0)
2387 return ret;
2388 ret = ov5640_set_virtual_channel(sensor);
2389 if (ret < 0)
2390 return ret;
2391
2392 sensor->pending_mode_change = false;
985cdcb0 2393 sensor->last_mode = mode;
19a81c14
SL		 2394
2395 return 0;
3cca8ef5
HF		 2396
2397restore_auto_exp_gain:
2398 if (auto_exp)
2399 ov5640_set_autoexposure(sensor, true);
2400restore_auto_gain:
2401 if (auto_gain)
2402 ov5640_set_autogain(sensor, true);
2403
2404 return ret;
19a81c14
SL		 2405}
2406
19ad26f9
AM		 2407static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2408 struct v4l2_mbus_framefmt *format);
2409
19a81c14
SL		 2410/* restore the last set video mode after chip power-on */
2411static int ov5640_restore_mode(struct ov5640_dev *sensor)
2412{
2413 int ret;
2414
2415 /* first load the initial register values */
e4359019
JM		 2416 ov5640_load_regs(sensor, ov5640_init_setting,
2417 ARRAY_SIZE(ov5640_init_setting));
19a81c14 2418
8f57c2f8 2419 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
7851fe7a
MR		 2420 (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
2421 ilog2(OV5640_SCLK_ROOT_DIV));
8f57c2f8
MR		 2422 if (ret)
2423 return ret;
2424
19a81c14 2425 /* now restore the last capture mode */
985cdcb0 2426 ret = ov5640_set_mode(sensor);
19ad26f9
AM		 2427 if (ret < 0)
2428 return ret;
2429
2430 return ov5640_set_framefmt(sensor, &sensor->fmt);
19a81c14
SL		 2431}
2432
2433static void ov5640_power(struct ov5640_dev *sensor, bool enable)
2434{
1fddc5da 2435 gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
19a81c14
SL		 2436}
2437
d7ff6913
JL		 2438/*
2439 * From section 2.7 power up sequence:
2440 * t0 + t1 + t2 >= 5ms Delay from DOVDD stable to PWDN pull down
2441 * t3 >= 1ms Delay from PWDN pull down to RESETB pull up
2442 * t4 >= 20ms Delay from RESETB pull up to SCCB (i2c) stable
2443 *
2444 * Some modules don't expose RESETB/PWDN pins directly, instead providing a
2445 * "PWUP" GPIO which is wired through appropriate delays and inverters to the
2446 * pins.
2447 *
2448 * In such cases, this gpio should be mapped to pwdn_gpio in the driver, and we
2449 * should still toggle the pwdn_gpio below with the appropriate delays, while
2450 * the calls to reset_gpio will be ignored.
2451 */
2452static void ov5640_powerup_sequence(struct ov5640_dev *sensor)
19a81c14 2453{
decea0a9
JL		 2454 if (sensor->pwdn_gpio) {
2455 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
19a81c14 2456
decea0a9
JL		 2457 /* camera power cycle */
2458 ov5640_power(sensor, false);
2459 usleep_range(5000, 10000);
2460 ov5640_power(sensor, true);
2461 usleep_range(5000, 10000);
19a81c14 2462
decea0a9
JL		 2463 gpiod_set_value_cansleep(sensor->reset_gpio, 1);
2464 usleep_range(1000, 2000);
19a81c14 2465
decea0a9
JL		 2466 gpiod_set_value_cansleep(sensor->reset_gpio, 0);
2467 } else {
2468 /* software reset */
2469 ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0,
2470 OV5640_REG_SYS_CTRL0_SW_RST);
2471 }
1d4c41f3 2472 usleep_range(20000, 25000);
decea0a9
JL		 2473
2474 /*
2475 * software standby: allows registers programming;
2476 * exit at restore_mode() for CSI, s_stream(1) for DVP
2477 */
2478 ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0,
2479 OV5640_REG_SYS_CTRL0_SW_PWDN);
19a81c14
SL		 2480}
2481
0f7acb52 2482static int ov5640_set_power_on(struct ov5640_dev *sensor)
19a81c14 2483{
0f7acb52
HF		 2484 struct i2c_client *client = sensor->i2c_client;
2485 int ret;
19a81c14 2486
0f7acb52
HF		 2487 ret = clk_prepare_enable(sensor->xclk);
2488 if (ret) {
2489 dev_err(&client->dev, "%s: failed to enable clock\n",
2490 __func__);
2491 return ret;
2492 }
19a81c14 2493
0f7acb52
HF		 2494 ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
2495 sensor->supplies);
2496 if (ret) {
2497 dev_err(&client->dev, "%s: failed to enable regulators\n",
2498 __func__);
2499 goto xclk_off;
2500 }
2501
d7ff6913 2502 ov5640_powerup_sequence(sensor);
0f7acb52
HF		 2503
2504 ret = ov5640_init_slave_id(sensor);
2505 if (ret)
2506 goto power_off;
2507
2508 return 0;
2509
2510power_off:
2511 ov5640_power(sensor, false);
2512 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2513xclk_off:
2514 clk_disable_unprepare(sensor->xclk);
2515 return ret;
2516}
2517
2518static void ov5640_set_power_off(struct ov5640_dev *sensor)
2519{
2520 ov5640_power(sensor, false);
2521 regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
2522 clk_disable_unprepare(sensor->xclk);
2523}
19a81c14 2524
b1751ae6
LP		 2525static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
2526{
2527 int ret;
2528
2529 if (!on) {
2530 /* Reset MIPI bus settings to their default values. */
2531 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2532 ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
2533 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
2534 return 0;
2535 }
2536
2537 /*
2538 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
2539 *
2540 * 0x300e = 0x40
2541 * [7:5] = 010 : 2 data lanes mode (see FIXME note in
2542 * "ov5640_set_stream_mipi()")
2543 * [4] = 0 : Power up MIPI HS Tx
2544 * [3] = 0 : Power up MIPI LS Rx
2545 * [2] = 0 : MIPI interface disabled
2546 */
2547 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
2548 if (ret)
2549 return ret;
2550
2551 /*
2552 * Gate clock and set LP11 in 'no packets mode' (idle)
2553 *
2554 * 0x4800 = 0x24
2555 * [5] = 1 : Gate clock when 'no packets'
2556 * [2] = 1 : MIPI bus in LP11 when 'no packets'
2557 */
2558 ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
2559 if (ret)
2560 return ret;
2561
2562 /*
2563 * Set data lanes and clock in LP11 when 'sleeping'
2564 *
2565 * 0x3019 = 0x70
2566 * [6] = 1 : MIPI data lane 2 in LP11 when 'sleeping'
2567 * [5] = 1 : MIPI data lane 1 in LP11 when 'sleeping'
2568 * [4] = 1 : MIPI clock lane in LP11 when 'sleeping'
2569 */
2570 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
2571 if (ret)
2572 return ret;
2573
2574 /* Give lanes some time to coax into LP11 state. */
2575 usleep_range(500, 1000);
2576
2577 return 0;
2578}
2579
576f5d4b
LP		 2580static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
2581{
311a6408 2582 unsigned int flags = sensor->ep.bus.parallel.flags;
68579b32
HF		 2583 bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
2584 u8 polarities = 0;
576f5d4b
LP		 2585 int ret;
2586
2587 if (!on) {
2588 /* Reset settings to their default values. */
68579b32 2589 ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
311a6408
LP		 2590 ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2591 ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
576f5d4b
LP		 2592 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
2593 ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
2594 return 0;
2595 }
2596
311a6408
LP		 2597 /*
2598 * Note about parallel port configuration.
2599 *
2600 * When configured in parallel mode, the OV5640 will
2601 * output 10 bits data on DVP data lines [9:0].
2602 * If only 8 bits data are wanted, the 8 bits data lines
2603 * of the camera interface must be physically connected
2604 * on the DVP data lines [9:2].
2605 *
2606 * Control lines polarity can be configured through
2607 * devicetree endpoint control lines properties.
2608 * If no endpoint control lines properties are set,
2609 * polarity will be as below:
2610 * - VSYNC: active high
2611 * - HREF: active low
2612 * - PCLK: active low
68579b32
HF		 2613 *
2614 * VSYNC & HREF are not configured if BT656 bus mode is selected
311a6408 2615 */
68579b32
HF		 2616
2617 /*
2618 * BT656 embedded synchronization configuration
2619 *
2620 * CCIR656 CTRL00
2621 * - [7]: SYNC code selection (0: auto generate sync code,
2622 * 1: sync code from regs 0x4732-0x4735)
2623 * - [6]: f value in CCIR656 SYNC code when fixed f value
2624 * - [5]: Fixed f value
2625 * - [4:3]: Blank toggle data options (00: data=1'h040/1'h200,
2626 * 01: data from regs 0x4736-0x4738, 10: always keep 0)
2627 * - [1]: Clip data disable
2628 * - [0]: CCIR656 mode enable
2629 *
2630 * Default CCIR656 SAV/EAV mode with default codes
2631 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
2632 * - CCIR656 mode enable
2633 * - auto generation of sync codes
2634 * - blank toggle data 1'h040/1'h200
2635 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
2636 */
2637 ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
2638 bt656 ? 0x01 : 0x00);
2639 if (ret)
2640 return ret;
2641
311a6408
LP		 2642 /*
2643 * configure parallel port control lines polarity
2644 *
2645 * POLARITY CTRL0
2646 * - [5]: PCLK polarity (0: active low, 1: active high)
2647 * - [1]: HREF polarity (0: active low, 1: active high)
2648 * - [0]: VSYNC polarity (mismatch here between
2649 * datasheet and hardware, 0 is active high
2650 * and 1 is active low...)
2651 */
68579b32 2652 if (!bt656) {
4039b037 2653 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
68579b32 2654 polarities |= BIT(1);
4039b037 2655 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
68579b32 2656 polarities |= BIT(0);
4039b037 2657 }
68579b32
HF		 2658 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2659 polarities |= BIT(5);
2660
2661 ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
2662 if (ret)
2663 return ret;
311a6408
LP		 2664
2665 /*
68579b32 2666 * powerdown MIPI TX/RX PHY & enable DVP
311a6408
LP		 2667 *
2668 * MIPI CONTROL 00
68579b32
HF		 2669 * [4] = 1 : Power down MIPI HS Tx
2670 * [3] = 1 : Power down MIPI LS Rx
2671 * [2] = 0 : DVP enable (MIPI disable)
311a6408
LP		 2672 */
2673 ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2674 if (ret)
2675 return ret;
2676
576f5d4b
LP		 2677 /*
2678 * enable VSYNC/HREF/PCLK DVP control lines
2679 * & D[9:6] DVP data lines
2680 *
2681 * PAD OUTPUT ENABLE 01
2682 * - 6: VSYNC output enable
2683 * - 5: HREF output enable
2684 * - 4: PCLK output enable
2685 * - [3:0]: D[9:6] output enable
2686 */
4039b037 2687 ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
68579b32 2688 bt656 ? 0x1f : 0x7f);
576f5d4b
LP		 2689 if (ret)
2690 return ret;
2691
2692 /*
2693 * enable D[5:0] DVP data lines
2694 *
2695 * PAD OUTPUT ENABLE 02
2696 * - [7:2]: D[5:0] output enable
2697 */
2698 return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2699}
2700
0f7acb52
HF		 2701static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2702{
2703 int ret = 0;
19a81c14 2704
0f7acb52
HF		 2705 if (on) {
2706 ret = ov5640_set_power_on(sensor);
19a81c14 2707 if (ret)
0f7acb52 2708 return ret;
19a81c14
SL		 2709
2710 ret = ov5640_restore_mode(sensor);
2711 if (ret)
2712 goto power_off;
b1751ae6 2713 }
19a81c14 2714
576f5d4b 2715 if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
b1751ae6 2716 ret = ov5640_set_power_mipi(sensor, on);
576f5d4b
LP		 2717 else
2718 ret = ov5640_set_power_dvp(sensor, on);
2719 if (ret)
2720 goto power_off;
aa4bb8b8 2721
b1751ae6 2722 if (!on)
aa4bb8b8 2723 ov5640_set_power_off(sensor);
19a81c14 2724
aa4bb8b8
JM		 2725 return 0;
2726
19a81c14 2727power_off:
0f7acb52 2728 ov5640_set_power_off(sensor);
19a81c14
SL		 2729 return ret;
2730}
2731
85644a9b 2732static int ov5640_sensor_suspend(struct device *dev)
19a81c14 2733{
85644a9b
PE		 2734 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2735 struct ov5640_dev *ov5640 = to_ov5640_dev(sd);
19a81c14 2736
85644a9b
PE		 2737 return ov5640_set_power(ov5640, false);
2738}
19a81c14 2739
85644a9b
PE		 2740static int ov5640_sensor_resume(struct device *dev)
2741{
2742 struct v4l2_subdev *sd = dev_get_drvdata(dev);
2743 struct ov5640_dev *ov5640 = to_ov5640_dev(sd);
19a81c14 2744
85644a9b 2745 return ov5640_set_power(ov5640, true);
19a81c14
SL		 2746}
2747
85644a9b
PE		 2748/* --------------- Subdev Operations --------------- */
2749
19a81c14
SL		 2750static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2751 struct v4l2_fract *fi,
f33b56d3 2752 const struct ov5640_mode_info *mode_info)
19a81c14 2753{
f33b56d3 2754 const struct ov5640_mode_info *mode = mode_info;
6530a5eb 2755 enum ov5640_frame_rate rate = OV5640_15_FPS;
f6cc192f
MR		 2756 int minfps, maxfps, best_fps, fps;
2757 int i;
19a81c14
SL		 2758
2759 minfps = ov5640_framerates[OV5640_15_FPS];
f33b56d3 2760 maxfps = ov5640_framerates[mode->max_fps];
19a81c14
SL		 2761
2762 if (fi->numerator == 0) {
2763 fi->denominator = maxfps;
2764 fi->numerator = 1;
f33b56d3 2765 rate = mode->max_fps;
e823fb16 2766 goto find_mode;
19a81c14
SL		 2767 }
2768
f6cc192f
MR		 2769 fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2770 minfps, maxfps);
19a81c14 2771
f6cc192f
MR		 2772 best_fps = minfps;
2773 for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2774 int curr_fps = ov5640_framerates[i];
19a81c14 2775
f6cc192f
MR		 2776 if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2777 best_fps = curr_fps;
2778 rate = i;
2779 }
2780 }
2781
2782 fi->numerator = 1;
2783 fi->denominator = best_fps;
19a81c14 2784
e823fb16 2785find_mode:
f33b56d3 2786 mode = ov5640_find_mode(sensor, mode->width, mode->height, false);
5a3ad937 2787 return mode ? rate : -EINVAL;
19a81c14
SL		 2788}
2789
2790static int ov5640_get_fmt(struct v4l2_subdev *sd,
0d346d2a 2791 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 2792 struct v4l2_subdev_format *format)
2793{
2794 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2795 struct v4l2_mbus_framefmt *fmt;
2796
2797 if (format->pad != 0)
2798 return -EINVAL;
2799
2800 mutex_lock(&sensor->lock);
2801
2802 if (format->which == V4L2_SUBDEV_FORMAT_TRY)
0d346d2a 2803 fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state,
19a81c14
SL		 2804 format->pad);
2805 else
2806 fmt = &sensor->fmt;
2807
2808 format->format = *fmt;
2809
2810 mutex_unlock(&sensor->lock);
2811
2812 return 0;
2813}
2814
2815static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2816 struct v4l2_mbus_framefmt *fmt,
19a81c14
SL		 2817 const struct ov5640_mode_info **new_mode)
2818{
2819 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2820 const struct ov5640_mode_info *mode;
a89f14bb
JM		 2821 const struct ov5640_pixfmt *pixfmt;
2822 unsigned int bpp;
19a81c14 2823
b6ae5022 2824 mode = ov5640_find_mode(sensor, fmt->width, fmt->height, true);
19a81c14
SL		 2825 if (!mode)
2826 return -EINVAL;
dd81b8ff 2827
a89f14bb
JM		 2828 pixfmt = ov5640_code_to_pixfmt(sensor, fmt->code);
2829 bpp = pixfmt->bpp;
2830
dd81b8ff
JM		 2831 /*
2832 * Adjust mode according to bpp:
2833 * - 8bpp modes work for resolution >= 1280x720
2834 * - 24bpp modes work resolution < 1280x720
2835 */
2836 if (bpp == 8 && mode->width < 1280)
2837 mode = &ov5640_mode_data[OV5640_MODE_720P_1280_720];
2838 else if (bpp == 24 && mode->width > 1024)
2839 mode = &ov5640_mode_data[OV5640_MODE_XGA_1024_768];
2840
5113d5b3
JM		 2841 fmt->width = mode->width;
2842 fmt->height = mode->height;
19a81c14
SL		 2843
2844 if (new_mode)
2845 *new_mode = mode;
e3ee691d 2846
a89f14bb
JM		 2847 fmt->code = pixfmt->code;
2848 fmt->colorspace = pixfmt->colorspace;
e6441fde
HF		 2849 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2850 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2851 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
e3ee691d 2852
19a81c14
SL		 2853 return 0;
2854}
2855
3c28588f
JM		 2856static int ov5640_update_pixel_rate(struct ov5640_dev *sensor)
2857{
2858 const struct ov5640_mode_info *mode = sensor->current_mode;
2859 enum ov5640_pixel_rate_id pixel_rate_id = mode->pixel_rate;
2860 struct v4l2_mbus_framefmt *fmt = &sensor->fmt;
32979f67 2861 const struct ov5640_timings *timings;
bce93b82 2862 s32 exposure_val, exposure_max;
32979f67 2863 unsigned int hblank;
3c28588f
JM		 2864 unsigned int i = 0;
2865 u32 pixel_rate;
2866 s64 link_freq;
2867 u32 num_lanes;
19f2e3e6 2868 u32 vblank;
3c28588f
JM		 2869 u32 bpp;
2870
2871 /*
2872 * Update the pixel rate control value.
2873 *
2874 * For DVP mode, maintain the pixel rate calculation using fixed FPS.
2875 */
2876 if (!ov5640_is_csi2(sensor)) {
2877 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2878 ov5640_calc_pixel_rate(sensor));
2879
2880 return 0;
2881 }
2882
2883 /*
2884 * The MIPI CSI-2 link frequency should comply with the CSI-2
2885 * specification and be lower than 1GHz.
2886 *
2887 * Start from the suggested pixel_rate for the current mode and
2888 * progressively slow it down if it exceeds 1GHz.
2889 */
2890 num_lanes = sensor->ep.bus.mipi_csi2.num_data_lanes;
a89f14bb 2891 bpp = ov5640_code_to_bpp(sensor, fmt->code);
3c28588f
JM		 2892 do {
2893 pixel_rate = ov5640_pixel_rates[pixel_rate_id];
2894 link_freq = pixel_rate * bpp / (2 * num_lanes);
2895 } while (link_freq >= 1000000000U &&
2896 ++pixel_rate_id < OV5640_NUM_PIXEL_RATES);
2897
2898 sensor->current_link_freq = link_freq;
2899
2900 /*
2901 * Higher link rates require the clock tree to be programmed with
2902 * 'mipi_div' = 1; this has the effect of halving the actual output
2903 * pixel rate in the MIPI domain.
2904 *
2905 * Adjust the pixel rate and link frequency control value to report it
2906 * correctly to userspace.
2907 */
2908 if (link_freq > OV5640_LINK_RATE_MAX) {
2909 pixel_rate /= 2;
2910 link_freq /= 2;
2911 }
2912
2913 for (i = 0; i < ARRAY_SIZE(ov5640_csi2_link_freqs); ++i) {
2914 if (ov5640_csi2_link_freqs[i] == link_freq)
2915 break;
2916 }
2917 WARN_ON(i == ARRAY_SIZE(ov5640_csi2_link_freqs));
2918
2919 __v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate, pixel_rate);
2920 __v4l2_ctrl_s_ctrl(sensor->ctrls.link_freq, i);
2921
32979f67
JM		 2922 timings = ov5640_timings(sensor, mode);
2923 hblank = timings->htot - mode->width;
2924 __v4l2_ctrl_modify_range(sensor->ctrls.hblank,
2925 hblank, hblank, 1, hblank);
2926
19f2e3e6 2927 vblank = timings->vblank_def;
bce93b82 2928 __v4l2_ctrl_modify_range(sensor->ctrls.vblank, OV5640_MIN_VBLANK,
19f2e3e6
HF		 2929 OV5640_MAX_VTS - mode->height, 1, vblank);
2930 __v4l2_ctrl_s_ctrl(sensor->ctrls.vblank, vblank);
bce93b82 2931
19f2e3e6 2932 exposure_max = timings->crop.height + vblank - 4;
bce93b82
JM		 2933 exposure_val = clamp_t(s32, sensor->ctrls.exposure->val,
2934 sensor->ctrls.exposure->minimum,
2935 exposure_max);
19f2e3e6 2936
bce93b82
JM		 2937 __v4l2_ctrl_modify_range(sensor->ctrls.exposure,
2938 sensor->ctrls.exposure->minimum,
2939 exposure_max, 1, exposure_val);
2940
3c28588f
JM		 2941 return 0;
2942}
2943
19a81c14 2944static int ov5640_set_fmt(struct v4l2_subdev *sd,
0d346d2a 2945 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 2946 struct v4l2_subdev_format *format)
2947{
2948 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2949 const struct ov5640_mode_info *new_mode;
e6441fde 2950 struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
19a81c14
SL		 2951 int ret;
2952
2953 if (format->pad != 0)
2954 return -EINVAL;
2955
2956 mutex_lock(&sensor->lock);
2957
2958 if (sensor->streaming) {
2959 ret = -EBUSY;
2960 goto out;
2961 }
2962
25affde3 2963 ret = ov5640_try_fmt_internal(sd, mbus_fmt, &new_mode);
19a81c14
SL		 2964 if (ret)
2965 goto out;
2966
e738f5dd
MR		 2967 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
2968 *v4l2_subdev_get_try_format(sd, sd_state, 0) = *mbus_fmt;
2969 goto out;
2970 }
19a81c14 2971
6949d864 2972 if (new_mode != sensor->current_mode) {
19f2e3e6 2973 sensor->current_fr = new_mode->def_fps;
6949d864 2974 sensor->current_mode = new_mode;
6949d864
HF		 2975 sensor->pending_mode_change = true;
2976 }
07115449 2977 if (mbus_fmt->code != sensor->fmt.code)
fb98e29f 2978 sensor->pending_fmt_change = true;
07115449 2979
e738f5dd
MR		 2980 /* update format even if code is unchanged, resolution might change */
2981 sensor->fmt = *mbus_fmt;
2982
3c28588f
JM		 2983 ov5640_update_pixel_rate(sensor);
2984
19a81c14
SL		 2985out:
2986 mutex_unlock(&sensor->lock);
2987 return ret;
2988}
2989
66ed85eb
JM		 2990static int ov5640_get_selection(struct v4l2_subdev *sd,
2991 struct v4l2_subdev_state *sd_state,
2992 struct v4l2_subdev_selection *sel)
2993{
2994 struct ov5640_dev *sensor = to_ov5640_dev(sd);
2995 const struct ov5640_mode_info *mode = sensor->current_mode;
2996 const struct ov5640_timings *timings;
2997
2998 switch (sel->target) {
2999 case V4L2_SEL_TGT_CROP: {
3000 mutex_lock(&sensor->lock);
3001 timings = ov5640_timings(sensor, mode);
3002 sel->r = timings->analog_crop;
3003 mutex_unlock(&sensor->lock);
3004
3005 return 0;
3006 }
3007
3008 case V4L2_SEL_TGT_NATIVE_SIZE:
3009 case V4L2_SEL_TGT_CROP_BOUNDS:
3010 sel->r.top = 0;
3011 sel->r.left = 0;
3012 sel->r.width = OV5640_NATIVE_WIDTH;
3013 sel->r.height = OV5640_NATIVE_HEIGHT;
3014
3015 return 0;
3016
3017 case V4L2_SEL_TGT_CROP_DEFAULT:
3018 sel->r.top = OV5640_PIXEL_ARRAY_TOP;
3019 sel->r.left = OV5640_PIXEL_ARRAY_LEFT;
3020 sel->r.width = OV5640_PIXEL_ARRAY_WIDTH;
3021 sel->r.height = OV5640_PIXEL_ARRAY_HEIGHT;
3022
3023 return 0;
3024 }
3025
3026 return -EINVAL;
3027}
3028
e3ee691d
HF		 3029static int ov5640_set_framefmt(struct ov5640_dev *sensor,
3030 struct v4l2_mbus_framefmt *format)
3031{
935fbc94
JM		 3032 bool is_jpeg = format->code == MEDIA_BUS_FMT_JPEG_1X8;
3033 const struct ov5640_pixfmt *pixfmt;
e3ee691d 3034 int ret = 0;
e3ee691d 3035
935fbc94 3036 pixfmt = ov5640_code_to_pixfmt(sensor, format->code);
e3ee691d
HF		 3037
3038 /* FORMAT CONTROL00: YUV and RGB formatting */
935fbc94
JM		 3039 ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00,
3040 pixfmt->ctrl00);
e3ee691d
HF		 3041 if (ret)
3042 return ret;
3043
3044 /* FORMAT MUX CONTROL: ISP YUV or RGB */
935fbc94
JM		 3045 ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL,
3046 pixfmt->mux);
d47c4126
HF		 3047 if (ret)
3048 return ret;
3049
3050 /*
3051 * TIMING TC REG21:
3052 * - [5]: JPEG enable
3053 */
3054 ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
3055 BIT(5), is_jpeg ? BIT(5) : 0);
3056 if (ret)
3057 return ret;
3058
3059 /*
3060 * SYSTEM RESET02:
3061 * - [4]: Reset JFIFO
3062 * - [3]: Reset SFIFO
3063 * - [2]: Reset JPEG
3064 */
3065 ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
3066 BIT(4) | BIT(3) | BIT(2),
3067 is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
3068 if (ret)
3069 return ret;
3070
3071 /*
3072 * CLOCK ENABLE02:
3073 * - [5]: Enable JPEG 2x clock
3074 * - [3]: Enable JPEG clock
3075 */
3076 return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
3077 BIT(5) | BIT(3),
3078 is_jpeg ? (BIT(5) | BIT(3)) : 0);
e3ee691d 3079}
19a81c14
SL		 3080
3081/*
3082 * Sensor Controls.
3083 */
3084
3085static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
3086{
3087 int ret;
3088
3089 if (value) {
3090 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
3091 BIT(0), BIT(0));
3092 if (ret)
3093 return ret;
3094 ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
3095 } else {
3096 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
3097 }
3098
3099 return ret;
3100}
3101
3102static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
3103{
3104 int ret;
3105
3106 if (value) {
3107 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
3108 BIT(2), BIT(2));
3109 if (ret)
3110 return ret;
3111 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
3112 value & 0xff);
3113 } else {
3114 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
3115 }
3116
3117 return ret;
3118}
3119
3120static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
3121{
3122 int ret;
3123
3124 if (value) {
3125 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
3126 BIT(1), BIT(1));
3127 if (ret)
3128 return ret;
3129 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
3130 value & 0xff);
3131 if (ret)
3132 return ret;
3133 ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
3134 value & 0xff);
3135 } else {
3136 ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
3137 }
3138
3139 return ret;
3140}
3141
3142static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
3143{
3144 int ret;
3145
3146 ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
3147 BIT(0), awb ? 0 : 1);
3148 if (ret)
3149 return ret;
3150
3151 if (!awb) {
3152 u16 red = (u16)sensor->ctrls.red_balance->val;
3153 u16 blue = (u16)sensor->ctrls.blue_balance->val;
3154
3155 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
3156 if (ret)
3157 return ret;
3158 ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
3159 }
3160
3161 return ret;
3162}
3163
3cca8ef5
HF		 3164static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
3165 enum v4l2_exposure_auto_type auto_exposure)
19a81c14
SL		 3166{
3167 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3cca8ef5 3168 bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
19a81c14
SL		 3169 int ret = 0;
3170
3171 if (ctrls->auto_exp->is_new) {
3cca8ef5 3172 ret = ov5640_set_autoexposure(sensor, auto_exp);
19a81c14
SL		 3173 if (ret)
3174 return ret;
3175 }
3176
3cca8ef5 3177 if (!auto_exp && ctrls->exposure->is_new) {
19a81c14
SL		 3178 u16 max_exp;
3179
3180 ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
3181 &max_exp);
3182 if (ret)
3183 return ret;
3184 ret = ov5640_get_vts(sensor);
3185 if (ret < 0)
3186 return ret;
3187 max_exp += ret;
6146fde3 3188 ret = 0;
19a81c14
SL		 3189
3190 if (ctrls->exposure->val < max_exp)
3191 ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
3192 }
3193
3194 return ret;
3195}
3196
3cca8ef5 3197static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
19a81c14
SL		 3198{
3199 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3200 int ret = 0;
3201
3202 if (ctrls->auto_gain->is_new) {
3cca8ef5 3203 ret = ov5640_set_autogain(sensor, auto_gain);
19a81c14
SL		 3204 if (ret)
3205 return ret;
3206 }
3207
3cca8ef5
HF		 3208 if (!auto_gain && ctrls->gain->is_new)
3209 ret = ov5640_set_gain(sensor, ctrls->gain->val);
19a81c14
SL		 3210
3211 return ret;
3212}
3213
9f6d7bac
CYT		 3214static const char * const test_pattern_menu[] = {
3215 "Disabled",
3216 "Color bars",
bddc5cdf
CYT		 3217 "Color bars w/ rolling bar",
3218 "Color squares",
3219 "Color squares w/ rolling bar",
9f6d7bac
CYT		 3220};
3221
a0c29afb
CYT		 3222#define OV5640_TEST_ENABLE BIT(7)
3223#define OV5640_TEST_ROLLING BIT(6) /* rolling horizontal bar */
3224#define OV5640_TEST_TRANSPARENT BIT(5)
3225#define OV5640_TEST_SQUARE_BW BIT(4) /* black & white squares */
3226#define OV5640_TEST_BAR_STANDARD (0 << 2)
3227#define OV5640_TEST_BAR_VERT_CHANGE_1 (1 << 2)
3228#define OV5640_TEST_BAR_HOR_CHANGE (2 << 2)
3229#define OV5640_TEST_BAR_VERT_CHANGE_2 (3 << 2)
3230#define OV5640_TEST_BAR (0 << 0)
3231#define OV5640_TEST_RANDOM (1 << 0)
3232#define OV5640_TEST_SQUARE (2 << 0)
3233#define OV5640_TEST_BLACK (3 << 0)
3234
3235static const u8 test_pattern_val[] = {
3236 0,
2aff1fc3 3237 OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
a0c29afb 3238 OV5640_TEST_BAR,
bddc5cdf
CYT		 3239 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
3240 OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
3241 OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
3242 OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
a0c29afb
CYT		 3243};
3244
19a81c14
SL		 3245static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
3246{
a0c29afb
CYT		 3247 return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
3248 test_pattern_val[value]);
19a81c14
SL		 3249}
3250
1068feca
MJ		 3251static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
3252{
3253 int ret;
3254
3255 ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
3256 (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
3257 0 : BIT(7));
3258 if (ret)
3259 return ret;
3260
3261 return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
3262 (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
3263 BIT(2) : 0);
3264}
3265
ce85705a
HF		 3266static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
3267{
3268 /*
c3f3ba3e
HF		 3269 * If sensor is mounted upside down, mirror logic is inversed.
3270 *
ce85705a
HF		 3271 * Sensor is a BSI (Back Side Illuminated) one,
3272 * so image captured is physically mirrored.
3273 * This is why mirror logic is inversed in
3274 * order to cancel this mirror effect.
3275 */
3276
3277 /*
3278 * TIMING TC REG21:
3279 * - [2]: ISP mirror
3280 * - [1]: Sensor mirror
3281 */
3282 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
3283 BIT(2) | BIT(1),
c3f3ba3e
HF		 3284 (!(value ^ sensor->upside_down)) ?
3285 (BIT(2) | BIT(1)) : 0);
ce85705a
HF		 3286}
3287
3288static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
3289{
c3f3ba3e
HF		 3290 /* If sensor is mounted upside down, flip logic is inversed */
3291
ce85705a
HF		 3292 /*
3293 * TIMING TC REG20:
3294 * - [2]: ISP vflip
3295 * - [1]: Sensor vflip
3296 */
3297 return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
3298 BIT(2) | BIT(1),
c3f3ba3e
HF		 3299 (value ^ sensor->upside_down) ?
3300 (BIT(2) | BIT(1)) : 0);
ce85705a
HF		 3301}
3302
bce93b82
JM		 3303static int ov5640_set_ctrl_vblank(struct ov5640_dev *sensor, int value)
3304{
3305 const struct ov5640_mode_info *mode = sensor->current_mode;
3306
3307 /* Update the VTOT timing register value. */
3308 return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS,
3309 mode->height + value);
3310}
3311
19a81c14
SL		 3312static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
3313{
3314 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
3315 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3316 int val;
3317
3318 /* v4l2_ctrl_lock() locks our own mutex */
3319
85644a9b
PE		 3320 if (!pm_runtime_get_if_in_use(&sensor->i2c_client->dev))
3321 return 0;
3322
19a81c14
SL		 3323 switch (ctrl->id) {
3324 case V4L2_CID_AUTOGAIN:
19a81c14
SL		 3325 val = ov5640_get_gain(sensor);
3326 if (val < 0)
3327 return val;
3328 sensor->ctrls.gain->val = val;
3329 break;
3330 case V4L2_CID_EXPOSURE_AUTO:
19a81c14
SL		 3331 val = ov5640_get_exposure(sensor);
3332 if (val < 0)
3333 return val;
3334 sensor->ctrls.exposure->val = val;
3335 break;
3336 }
3337
e13064a3 3338 pm_runtime_mark_last_busy(&sensor->i2c_client->dev);
85644a9b
PE		 3339 pm_runtime_put_autosuspend(&sensor->i2c_client->dev);
3340
19a81c14
SL		 3341 return 0;
3342}
3343
3344static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
3345{
3346 struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
3347 struct ov5640_dev *sensor = to_ov5640_dev(sd);
bce93b82
JM		 3348 const struct ov5640_mode_info *mode = sensor->current_mode;
3349 const struct ov5640_timings *timings;
3350 unsigned int exp_max;
19a81c14
SL		 3351 int ret;
3352
3353 /* v4l2_ctrl_lock() locks our own mutex */
3354
bce93b82
JM		 3355 switch (ctrl->id) {
3356 case V4L2_CID_VBLANK:
3357 /* Update the exposure range to the newly programmed vblank. */
3358 timings = ov5640_timings(sensor, mode);
3359 exp_max = mode->height + ctrl->val - 4;
3360 __v4l2_ctrl_modify_range(sensor->ctrls.exposure,
3361 sensor->ctrls.exposure->minimum,
3362 exp_max, sensor->ctrls.exposure->step,
3363 timings->vblank_def);
3364 break;
3365 }
3366
19a81c14
SL		 3367 /*
3368 * If the device is not powered up by the host driver do
3369 * not apply any controls to H/W at this time. Instead
85644a9b 3370 * the controls will be restored at start streaming time.
19a81c14 3371 */
85644a9b 3372 if (!pm_runtime_get_if_in_use(&sensor->i2c_client->dev))
19a81c14
SL		 3373 return 0;
3374
3375 switch (ctrl->id) {
3376 case V4L2_CID_AUTOGAIN:
3377 ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
3378 break;
3379 case V4L2_CID_EXPOSURE_AUTO:
3380 ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
3381 break;
3382 case V4L2_CID_AUTO_WHITE_BALANCE:
3383 ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
3384 break;
3385 case V4L2_CID_HUE:
3386 ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
3387 break;
3388 case V4L2_CID_CONTRAST:
3389 ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
3390 break;
3391 case V4L2_CID_SATURATION:
3392 ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
3393 break;
3394 case V4L2_CID_TEST_PATTERN:
3395 ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
3396 break;
1068feca
MJ		 3397 case V4L2_CID_POWER_LINE_FREQUENCY:
3398 ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
3399 break;
ce85705a
HF		 3400 case V4L2_CID_HFLIP:
3401 ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
3402 break;
3403 case V4L2_CID_VFLIP:
3404 ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
3405 break;
bce93b82
JM		 3406 case V4L2_CID_VBLANK:
3407 ret = ov5640_set_ctrl_vblank(sensor, ctrl->val);
3408 break;
19a81c14
SL		 3409 default:
3410 ret = -EINVAL;
3411 break;
3412 }
3413
e13064a3 3414 pm_runtime_mark_last_busy(&sensor->i2c_client->dev);
85644a9b
PE		 3415 pm_runtime_put_autosuspend(&sensor->i2c_client->dev);
3416
19a81c14
SL		 3417 return ret;
3418}
3419
3420static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
3421 .g_volatile_ctrl = ov5640_g_volatile_ctrl,
3422 .s_ctrl = ov5640_s_ctrl,
3423};
3424
19a81c14
SL		 3425static int ov5640_init_controls(struct ov5640_dev *sensor)
3426{
22845bf2 3427 const struct ov5640_mode_info *mode = sensor->current_mode;
19a81c14
SL		 3428 const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
3429 struct ov5640_ctrls *ctrls = &sensor->ctrls;
3430 struct v4l2_ctrl_handler *hdl = &ctrls->handler;
1066fc1c 3431 struct v4l2_fwnode_device_properties props;
32979f67 3432 const struct ov5640_timings *timings;
bce93b82 3433 unsigned int max_vblank;
32979f67 3434 unsigned int hblank;
19a81c14
SL		 3435 int ret;
3436
3437 v4l2_ctrl_handler_init(hdl, 32);
3438
3439 /* we can use our own mutex for the ctrl lock */
3440 hdl->lock = &sensor->lock;
3441
cc196e48
BP		 3442 /* Clock related controls */
3443 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
22845bf2
JM		 3444 ov5640_pixel_rates[OV5640_NUM_PIXEL_RATES - 1],
3445 ov5640_pixel_rates[0], 1,
3446 ov5640_pixel_rates[mode->pixel_rate]);
cc196e48 3447
7a3b8d4b
JM		 3448 ctrls->link_freq = v4l2_ctrl_new_int_menu(hdl, ops,
3449 V4L2_CID_LINK_FREQ,
3450 ARRAY_SIZE(ov5640_csi2_link_freqs) - 1,
3451 OV5640_DEFAULT_LINK_FREQ,
3452 ov5640_csi2_link_freqs);
3453
32979f67
JM		 3454 timings = ov5640_timings(sensor, mode);
3455 hblank = timings->htot - mode->width;
3456 ctrls->hblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, hblank,
3457 hblank, 1, hblank);
3458
bce93b82
JM		 3459 max_vblank = OV5640_MAX_VTS - mode->height;
3460 ctrls->vblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VBLANK,
3461 OV5640_MIN_VBLANK, max_vblank,
3462 1, timings->vblank_def);
3463
19a81c14
SL		 3464 /* Auto/manual white balance */
3465 ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
3466 V4L2_CID_AUTO_WHITE_BALANCE,
3467 0, 1, 1, 1);
3468 ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
3469 0, 4095, 1, 0);
3470 ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
3471 0, 4095, 1, 0);
3472 /* Auto/manual exposure */
3473 ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
3474 V4L2_CID_EXPOSURE_AUTO,
3475 V4L2_EXPOSURE_MANUAL, 0,
3476 V4L2_EXPOSURE_AUTO);
3477 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
3478 0, 65535, 1, 0);
3479 /* Auto/manual gain */
3480 ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
3481 0, 1, 1, 1);
afa48057 3482 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN,
19a81c14
SL		 3483 0, 1023, 1, 0);
3484
3485 ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
3486 0, 255, 1, 64);
3487 ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
3488 0, 359, 1, 0);
3489 ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
3490 0, 255, 1, 0);
3491 ctrls->test_pattern =
3492 v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
3493 ARRAY_SIZE(test_pattern_menu) - 1,
3494 0, 0, test_pattern_menu);
ce85705a
HF		 3495 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
3496 0, 1, 1, 0);
3497 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
3498 0, 1, 1, 0);
19a81c14 3499
1068feca
MJ		 3500 ctrls->light_freq =
3501 v4l2_ctrl_new_std_menu(hdl, ops,
3502 V4L2_CID_POWER_LINE_FREQUENCY,
3503 V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
3504 V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
3505
19a81c14
SL		 3506 if (hdl->error) {
3507 ret = hdl->error;
3508 goto free_ctrls;
3509 }
3510
1066fc1c
JM		 3511 ret = v4l2_fwnode_device_parse(&sensor->i2c_client->dev, &props);
3512 if (ret)
3513 goto free_ctrls;
3514
3515 if (props.rotation == 180)
3516 sensor->upside_down = true;
3517
3518 ret = v4l2_ctrl_new_fwnode_properties(hdl, ops, &props);
3519 if (ret)
3520 goto free_ctrls;
3521
cc196e48 3522 ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
7a3b8d4b 3523 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
32979f67 3524 ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
19a81c14
SL		 3525 ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
3526 ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
3527
3528 v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
3529 v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
3530 v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
3531
3532 sensor->sd.ctrl_handler = hdl;
3533 return 0;
3534
3535free_ctrls:
3536 v4l2_ctrl_handler_free(hdl);
3537 return ret;
3538}
3539
3540static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
0d346d2a 3541 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 3542 struct v4l2_subdev_frame_size_enum *fse)
3543{
a89f14bb
JM		 3544 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3545 u32 bpp = ov5640_code_to_bpp(sensor, fse->code);
7dcb3a2f
JM		 3546 unsigned int index = fse->index;
3547
19a81c14
SL		 3548 if (fse->pad != 0)
3549 return -EINVAL;
7dcb3a2f
JM		 3550 if (!bpp)
3551 return -EINVAL;
3552
3553 /* Only low-resolution modes are supported for 24bpp formats. */
3554 if (bpp == 24 && index >= OV5640_MODE_720P_1280_720)
3555 return -EINVAL;
3556
3557 /* FIXME: Low resolution modes don't work in 8bpp formats. */
3558 if (bpp == 8)
3559 index += OV5640_MODE_720P_1280_720;
3560
3561 if (index >= OV5640_NUM_MODES)
19a81c14
SL		 3562 return -EINVAL;
3563
7dcb3a2f 3564 fse->min_width = ov5640_mode_data[index].width;
41d8d7f5 3565 fse->max_width = fse->min_width;
7dcb3a2f 3566 fse->min_height = ov5640_mode_data[index].height;
41d8d7f5 3567 fse->max_height = fse->min_height;
19a81c14
SL		 3568
3569 return 0;
3570}
3571
3572static int ov5640_enum_frame_interval(
3573 struct v4l2_subdev *sd,
0d346d2a 3574 struct v4l2_subdev_state *sd_state,
19a81c14
SL		 3575 struct v4l2_subdev_frame_interval_enum *fie)
3576{
3577 struct ov5640_dev *sensor = to_ov5640_dev(sd);
f33b56d3 3578 const struct ov5640_mode_info *mode;
19a81c14
SL		 3579 struct v4l2_fract tpf;
3580 int ret;
3581
3582 if (fie->pad != 0)
3583 return -EINVAL;
3584 if (fie->index >= OV5640_NUM_FRAMERATES)
3585 return -EINVAL;
3586
f33b56d3
G		 3587 mode = ov5640_find_mode(sensor, fie->width, fie->height, false);
3588 if (!mode)
3589 return -EINVAL;
3590
19a81c14
SL		 3591 tpf.numerator = 1;
3592 tpf.denominator = ov5640_framerates[fie->index];
3593
f33b56d3 3594 ret = ov5640_try_frame_interval(sensor, &tpf, mode);
19a81c14
SL		 3595 if (ret < 0)
3596 return -EINVAL;
3597
3598 fie->interval = tpf;
3599 return 0;
3600}
3601
3602static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
3603 struct v4l2_subdev_frame_interval *fi)
3604{
3605 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3606
3607 mutex_lock(&sensor->lock);
3608 fi->interval = sensor->frame_interval;
3609 mutex_unlock(&sensor->lock);
3610
3611 return 0;
3612}
3613
3614static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
3615 struct v4l2_subdev_frame_interval *fi)
3616{
3617 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3618 const struct ov5640_mode_info *mode;
3619 int frame_rate, ret = 0;
3620
3621 if (fi->pad != 0)
3622 return -EINVAL;
3623
3624 mutex_lock(&sensor->lock);
3625
3626 if (sensor->streaming) {
3627 ret = -EBUSY;
3628 goto out;
3629 }
3630
3631 mode = sensor->current_mode;
3632
f33b56d3 3633 frame_rate = ov5640_try_frame_interval(sensor, &fi->interval, mode);
e823fb16
MR		 3634 if (frame_rate < 0) {
3635 /* Always return a valid frame interval value */
3636 fi->interval = sensor->frame_interval;
3637 goto out;
3638 }
19a81c14 3639
b6ae5022 3640 mode = ov5640_find_mode(sensor, mode->width, mode->height, true);
3c4a7372
HF		 3641 if (!mode) {
3642 ret = -EINVAL;
3643 goto out;
3644 }
3645
b6ae5022
JM		 3646 if (ov5640_framerates[frame_rate] > ov5640_framerates[mode->max_fps]) {
3647 ret = -EINVAL;
3648 goto out;
3649 }
3650
0929983e
HF		 3651 if (mode != sensor->current_mode ||
3652 frame_rate != sensor->current_fr) {
3653 sensor->current_fr = frame_rate;
3654 sensor->frame_interval = fi->interval;
6949d864
HF		 3655 sensor->current_mode = mode;
3656 sensor->pending_mode_change = true;
cc196e48 3657
19f2e3e6 3658 ov5640_update_pixel_rate(sensor);
6949d864 3659 }
19a81c14
SL		 3660out:
3661 mutex_unlock(&sensor->lock);
3662 return ret;
3663}
3664
3665static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
0d346d2a 3666 struct v4l2_subdev_state *sd_state,
41d8d7f5 3667 struct v4l2_subdev_mbus_code_enum *code)
19a81c14 3668{
a89f14bb
JM		 3669 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3670 const struct ov5640_pixfmt *formats;
3671 unsigned int num_formats;
3672
3673 if (ov5640_is_csi2(sensor)) {
3674 formats = ov5640_csi2_formats;
3675 num_formats = ARRAY_SIZE(ov5640_csi2_formats) - 1;
3676 } else {
3677 formats = ov5640_dvp_formats;
3678 num_formats = ARRAY_SIZE(ov5640_dvp_formats) - 1;
3679 }
3680
3681 if (code->index >= num_formats)
19a81c14
SL		 3682 return -EINVAL;
3683
a89f14bb
JM		 3684 code->code = formats[code->index].code;
3685
19a81c14
SL		 3686 return 0;
3687}
3688
3689static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
3690{
3691 struct ov5640_dev *sensor = to_ov5640_dev(sd);
3692 int ret = 0;
3693
85644a9b
PE		 3694 if (enable) {
3695 ret = pm_runtime_resume_and_get(&sensor->i2c_client->dev);
3696 if (ret < 0)
3697 return ret;
3698
3699 ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
3700 if (ret) {
3701 pm_runtime_put(&sensor->i2c_client->dev);
3702 return ret;
3703 }
3704 }
3705
19a81c14
SL		 3706 mutex_lock(&sensor->lock);
3707
3708 if (sensor->streaming == !enable) {
3709 if (enable && sensor->pending_mode_change) {
985cdcb0 3710 ret = ov5640_set_mode(sensor);
19a81c14
SL		 3711 if (ret)
3712 goto out;
fb98e29f 3713 }
e3ee691d 3714
fb98e29f 3715 if (enable && sensor->pending_fmt_change) {
e3ee691d
HF		 3716 ret = ov5640_set_framefmt(sensor, &sensor->fmt);
3717 if (ret)
3718 goto out;
fb98e29f 3719 sensor->pending_fmt_change = false;
19a81c14
SL		 3720 }
3721
8e823f5c 3722 if (ov5640_is_csi2(sensor))
f22996db
HF		 3723 ret = ov5640_set_stream_mipi(sensor, enable);
3724 else
3725 ret = ov5640_set_stream_dvp(sensor, enable);
3726
19a81c14
SL		 3727 if (!ret)
3728 sensor->streaming = enable;
3729 }
85644a9b 3730
19a81c14
SL		 3731out:
3732 mutex_unlock(&sensor->lock);
85644a9b 3733
e13064a3
AS		 3734 if (!enable || ret) {
3735 pm_runtime_mark_last_busy(&sensor->i2c_client->dev);
85644a9b 3736 pm_runtime_put_autosuspend(&sensor->i2c_client->dev);
e13064a3 3737 }
85644a9b 3738
19a81c14
SL		 3739 return ret;
3740}
3741
90b0f355
JM		 3742static int ov5640_init_cfg(struct v4l2_subdev *sd,
3743 struct v4l2_subdev_state *state)
3744{
68453b02 3745 struct ov5640_dev *sensor = to_ov5640_dev(sd);
90b0f355
JM		 3746 struct v4l2_mbus_framefmt *fmt =
3747 v4l2_subdev_get_try_format(sd, state, 0);
66ed85eb 3748 struct v4l2_rect *crop = v4l2_subdev_get_try_crop(sd, state, 0);
90b0f355 3749
68453b02
G		 3750 *fmt = ov5640_is_csi2(sensor) ? ov5640_csi2_default_fmt :
3751 ov5640_dvp_default_fmt;
90b0f355 3752
66ed85eb
JM		 3753 crop->left = OV5640_PIXEL_ARRAY_LEFT;
3754 crop->top = OV5640_PIXEL_ARRAY_TOP;
3755 crop->width = OV5640_PIXEL_ARRAY_WIDTH;
3756 crop->height = OV5640_PIXEL_ARRAY_HEIGHT;
3757
90b0f355
JM		 3758 return 0;
3759}
3760
19a81c14 3761static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2d18fbc5
AM		 3762 .log_status = v4l2_ctrl_subdev_log_status,
3763 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
3764 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
19a81c14
SL		 3765};
3766
3767static const struct v4l2_subdev_video_ops ov5640_video_ops = {
3768 .g_frame_interval = ov5640_g_frame_interval,
3769 .s_frame_interval = ov5640_s_frame_interval,
3770 .s_stream = ov5640_s_stream,
3771};
3772
3773static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
90b0f355 3774 .init_cfg = ov5640_init_cfg,
19a81c14
SL		 3775 .enum_mbus_code = ov5640_enum_mbus_code,
3776 .get_fmt = ov5640_get_fmt,
3777 .set_fmt = ov5640_set_fmt,
66ed85eb 3778 .get_selection = ov5640_get_selection,
19a81c14
SL		 3779 .enum_frame_size = ov5640_enum_frame_size,
3780 .enum_frame_interval = ov5640_enum_frame_interval,
3781};
3782
3783static const struct v4l2_subdev_ops ov5640_subdev_ops = {
3784 .core = &ov5640_core_ops,
3785 .video = &ov5640_video_ops,
3786 .pad = &ov5640_pad_ops,
3787};
3788
3789static int ov5640_get_regulators(struct ov5640_dev *sensor)
3790{
3791 int i;
3792
3793 for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
3794 sensor->supplies[i].supply = ov5640_supply_name[i];
3795
3796 return devm_regulator_bulk_get(&sensor->i2c_client->dev,
3797 OV5640_NUM_SUPPLIES,
3798 sensor->supplies);
3799}
3800
0f7acb52
HF		 3801static int ov5640_check_chip_id(struct ov5640_dev *sensor)
3802{
3803 struct i2c_client *client = sensor->i2c_client;
3804 int ret = 0;
3805 u16 chip_id;
3806
0f7acb52
HF		 3807 ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
3808 if (ret) {
3809 dev_err(&client->dev, "%s: failed to read chip identifier\n",
3810 __func__);
85644a9b 3811 return ret;
0f7acb52
HF		 3812 }
3813
3814 if (chip_id != 0x5640) {
3815 dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
3816 __func__, chip_id);
85644a9b 3817 return -ENXIO;
0f7acb52
HF		 3818 }
3819
85644a9b 3820 return 0;
0f7acb52
HF		 3821}
3822
e6714993 3823static int ov5640_probe(struct i2c_client *client)
19a81c14
SL		 3824{
3825 struct device *dev = &client->dev;
3826 struct fwnode_handle *endpoint;
3827 struct ov5640_dev *sensor;
3828 int ret;
3829
3830 sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3831 if (!sensor)
3832 return -ENOMEM;
3833
3834 sensor->i2c_client = client;
fb98e29f
HF		 3835
3836 /*
3837 * default init sequence initialize sensor to
afe25fbc 3838 * YUV422 UYVY VGA(30FPS in parallel mode, 60 in MIPI CSI-2 mode)
fb98e29f 3839 */
19a81c14
SL		 3840 sensor->frame_interval.numerator = 1;
3841 sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3842 sensor->current_fr = OV5640_30_FPS;
3843 sensor->current_mode =
086c25f8 3844 &ov5640_mode_data[OV5640_MODE_VGA_640_480];
985cdcb0 3845 sensor->last_mode = sensor->current_mode;
d7b41196
G		 3846 sensor->current_link_freq =
3847 ov5640_csi2_link_freqs[OV5640_DEFAULT_LINK_FREQ];
19a81c14
SL		 3848
3849 sensor->ae_target = 52;
3850
ce96bcf5
SA		 3851 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3852 NULL);
19a81c14
SL		 3853 if (!endpoint) {
3854 dev_err(dev, "endpoint node not found\n");
3855 return -EINVAL;
3856 }
3857
3858 ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3859 fwnode_handle_put(endpoint);
3860 if (ret) {
3861 dev_err(dev, "Could not parse endpoint\n");
3862 return ret;
3863 }
3864
2c61e48d
LP		 3865 if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3866 sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3867 sensor->ep.bus_type != V4L2_MBUS_BT656) {
3868 dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3869 return -EINVAL;
3870 }
3871
68453b02
G		 3872 sensor->fmt = ov5640_is_csi2(sensor) ? ov5640_csi2_default_fmt :
3873 ov5640_dvp_default_fmt;
3874
19a81c14
SL		 3875 /* get system clock (xclk) */
3876 sensor->xclk = devm_clk_get(dev, "xclk");
3877 if (IS_ERR(sensor->xclk)) {
3878 dev_err(dev, "failed to get xclk\n");
3879 return PTR_ERR(sensor->xclk);
3880 }
3881
3882 sensor->xclk_freq = clk_get_rate(sensor->xclk);
3883 if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3884 sensor->xclk_freq > OV5640_XCLK_MAX) {
3885 dev_err(dev, "xclk frequency out of range: %d Hz\n",
3886 sensor->xclk_freq);
3887 return -EINVAL;
3888 }
3889
3890 /* request optional power down pin */
3891 sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3892 GPIOD_OUT_HIGH);
8791a102
FE		 3893 if (IS_ERR(sensor->pwdn_gpio))
3894 return PTR_ERR(sensor->pwdn_gpio);
3895
19a81c14
SL		 3896 /* request optional reset pin */
3897 sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3898 GPIOD_OUT_HIGH);
8791a102
FE		 3899 if (IS_ERR(sensor->reset_gpio))
3900 return PTR_ERR(sensor->reset_gpio);
19a81c14
SL		 3901
3902 v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3903
2d18fbc5
AM		 3904 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3905 V4L2_SUBDEV_FL_HAS_EVENTS;
19a81c14
SL		 3906 sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3907 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3908 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3909 if (ret)
3910 return ret;
3911
3912 ret = ov5640_get_regulators(sensor);
3913 if (ret)
85644a9b 3914 goto entity_cleanup;
19a81c14
SL		 3915
3916 mutex_init(&sensor->lock);
3917
85644a9b 3918 ret = ov5640_init_controls(sensor);
0f7acb52
HF		 3919 if (ret)
3920 goto entity_cleanup;
3921
85644a9b
PE		 3922 ret = ov5640_sensor_resume(dev);
3923 if (ret) {
3924 dev_err(dev, "failed to power on\n");
19a81c14 3925 goto entity_cleanup;
85644a9b
PE		 3926 }
3927
3928 pm_runtime_set_active(dev);
3929 pm_runtime_get_noresume(dev);
3930 pm_runtime_enable(dev);
3931
3932 ret = ov5640_check_chip_id(sensor);
3933 if (ret)
3934 goto err_pm_runtime;
19a81c14 3935
15786f7b 3936 ret = v4l2_async_register_subdev_sensor(&sensor->sd);
19a81c14 3937 if (ret)
85644a9b
PE		 3938 goto err_pm_runtime;
3939
3940 pm_runtime_set_autosuspend_delay(dev, 1000);
3941 pm_runtime_use_autosuspend(dev);
e13064a3 3942 pm_runtime_mark_last_busy(dev);
85644a9b 3943 pm_runtime_put_autosuspend(dev);
19a81c14
SL		 3944
3945 return 0;
3946
85644a9b
PE		 3947err_pm_runtime:
3948 pm_runtime_put_noidle(dev);
3949 pm_runtime_disable(dev);
19a81c14 3950 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
85644a9b 3951 ov5640_sensor_suspend(dev);
19a81c14 3952entity_cleanup:
19a81c14 3953 media_entity_cleanup(&sensor->sd.entity);
bfcba38d 3954 mutex_destroy(&sensor->lock);
19a81c14
SL		 3955 return ret;
3956}
3957
ed5c2f5f 3958static void ov5640_remove(struct i2c_client *client)
19a81c14
SL		 3959{
3960 struct v4l2_subdev *sd = i2c_get_clientdata(client);
3961 struct ov5640_dev *sensor = to_ov5640_dev(sd);
85644a9b
PE		 3962 struct device *dev = &client->dev;
3963
3964 pm_runtime_disable(dev);
3965 if (!pm_runtime_status_suspended(dev))
3966 ov5640_sensor_suspend(dev);
3967 pm_runtime_set_suspended(dev);
19a81c14
SL		 3968
3969 v4l2_async_unregister_subdev(&sensor->sd);
19a81c14
SL		 3970 media_entity_cleanup(&sensor->sd.entity);
3971 v4l2_ctrl_handler_free(&sensor->ctrls.handler);
bfcba38d 3972 mutex_destroy(&sensor->lock);
19a81c14
SL		 3973}
3974
85644a9b
PE		 3975static const struct dev_pm_ops ov5640_pm_ops = {
3976 SET_RUNTIME_PM_OPS(ov5640_sensor_suspend, ov5640_sensor_resume, NULL)
3977};
3978
19a81c14
SL		 3979static const struct i2c_device_id ov5640_id[] = {
3980 {"ov5640", 0},
3981 {},
3982};
3983MODULE_DEVICE_TABLE(i2c, ov5640_id);
3984
3985static const struct of_device_id ov5640_dt_ids[] = {
3986 { .compatible = "ovti,ov5640" },
3987 { /* sentinel */ }
3988};
3989MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3990
3991static struct i2c_driver ov5640_i2c_driver = {
3992 .driver = {
3993 .name = "ov5640",
3994 .of_match_table = ov5640_dt_ids,
85644a9b 3995 .pm = &ov5640_pm_ops,
19a81c14
SL		 3996 },
3997 .id_table = ov5640_id,
aaeb31c0 3998 .probe = ov5640_probe,
19a81c14
SL		 3999 .remove = ov5640_remove,
4000};
4001
4002module_i2c_driver(ov5640_i2c_driver);
4003
4004MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
4005MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)