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Merge tag 'nfs-for-6.4-1' of git://git.linux-nfs.org/projects/anna/linux-nfs
[linux-block.git] / drivers / media / i2c / mt9m001.c
CommitLineData
1f01091f 1// SPDX-License-Identifier: GPL-2.0
f8ce7c35
AM		 2/*
3 * Driver for MT9M001 CMOS Image Sensor from Micron
4 *
5 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
f8ce7c35
AM		 6 */
7
8fcfc491
AM		 8#include <linux/clk.h>
9#include <linux/delay.h>
10#include <linux/gpio/consumer.h>
f8ce7c35
AM		 11#include <linux/i2c.h>
12#include <linux/log2.h>
13#include <linux/module.h>
8fcfc491 14#include <linux/pm_runtime.h>
9f4f37b0
AM		 15#include <linux/slab.h>
16#include <linux/videodev2.h>
f8ce7c35 17
f8ce7c35 18#include <media/v4l2-ctrls.h>
74021329 19#include <media/v4l2-device.h>
dd15f070 20#include <media/v4l2-event.h>
9f4f37b0 21#include <media/v4l2-subdev.h>
f8ce7c35
AM		 22
23/*
24 * mt9m001 i2c address 0x5d
f8ce7c35
AM		 25 */
26
27/* mt9m001 selected register addresses */
28#define MT9M001_CHIP_VERSION 0x00
29#define MT9M001_ROW_START 0x01
30#define MT9M001_COLUMN_START 0x02
31#define MT9M001_WINDOW_HEIGHT 0x03
32#define MT9M001_WINDOW_WIDTH 0x04
33#define MT9M001_HORIZONTAL_BLANKING 0x05
34#define MT9M001_VERTICAL_BLANKING 0x06
35#define MT9M001_OUTPUT_CONTROL 0x07
36#define MT9M001_SHUTTER_WIDTH 0x09
37#define MT9M001_FRAME_RESTART 0x0b
38#define MT9M001_SHUTTER_DELAY 0x0c
39#define MT9M001_RESET 0x0d
40#define MT9M001_READ_OPTIONS1 0x1e
41#define MT9M001_READ_OPTIONS2 0x20
42#define MT9M001_GLOBAL_GAIN 0x35
43#define MT9M001_CHIP_ENABLE 0xF1
44
45#define MT9M001_MAX_WIDTH 1280
46#define MT9M001_MAX_HEIGHT 1024
47#define MT9M001_MIN_WIDTH 48
48#define MT9M001_MIN_HEIGHT 32
49#define MT9M001_COLUMN_SKIP 20
50#define MT9M001_ROW_SKIP 12
a5826484
AM		 51#define MT9M001_DEFAULT_HBLANK 9
52#define MT9M001_DEFAULT_VBLANK 25
f8ce7c35
AM		 53
54/* MT9M001 has only one fixed colorspace per pixelcode */
55struct mt9m001_datafmt {
56 u32 code;
57 enum v4l2_colorspace colorspace;
58};
59
60/* Find a data format by a pixel code in an array */
61static const struct mt9m001_datafmt *mt9m001_find_datafmt(
62 u32 code, const struct mt9m001_datafmt *fmt,
63 int n)
64{
65 int i;
66 for (i = 0; i < n; i++)
67 if (fmt[i].code == code)
68 return fmt + i;
69
70 return NULL;
71}
72
73static const struct mt9m001_datafmt mt9m001_colour_fmts[] = {
74 /*
75 * Order important: first natively supported,
76 * second supported with a GPIO extender
77 */
78 {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
79 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
80};
81
82static const struct mt9m001_datafmt mt9m001_monochrome_fmts[] = {
83 /* Order important - see above */
84 {MEDIA_BUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG},
85 {MEDIA_BUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG},
86};
87
88struct mt9m001 {
89 struct v4l2_subdev subdev;
90 struct v4l2_ctrl_handler hdl;
91 struct {
92 /* exposure/auto-exposure cluster */
93 struct v4l2_ctrl *autoexposure;
94 struct v4l2_ctrl *exposure;
95 };
8fcfc491
AM		 96 bool streaming;
97 struct mutex mutex;
f8ce7c35 98 struct v4l2_rect rect; /* Sensor window */
8fcfc491
AM		 99 struct clk *clk;
100 struct gpio_desc *standby_gpio;
101 struct gpio_desc *reset_gpio;
f8ce7c35
AM		 102 const struct mt9m001_datafmt *fmt;
103 const struct mt9m001_datafmt *fmts;
104 int num_fmts;
105 unsigned int total_h;
106 unsigned short y_skip_top; /* Lines to skip at the top */
12d85c3e 107 struct media_pad pad;
f8ce7c35
AM		 108};
109
110static struct mt9m001 *to_mt9m001(const struct i2c_client *client)
111{
112 return container_of(i2c_get_clientdata(client), struct mt9m001, subdev);
113}
114
115static int reg_read(struct i2c_client *client, const u8 reg)
116{
117 return i2c_smbus_read_word_swapped(client, reg);
118}
119
120static int reg_write(struct i2c_client *client, const u8 reg,
121 const u16 data)
122{
123 return i2c_smbus_write_word_swapped(client, reg, data);
124}
125
126static int reg_set(struct i2c_client *client, const u8 reg,
127 const u16 data)
128{
129 int ret;
130
131 ret = reg_read(client, reg);
132 if (ret < 0)
133 return ret;
134 return reg_write(client, reg, ret | data);
135}
136
137static int reg_clear(struct i2c_client *client, const u8 reg,
138 const u16 data)
139{
140 int ret;
141
142 ret = reg_read(client, reg);
143 if (ret < 0)
144 return ret;
145 return reg_write(client, reg, ret & ~data);
146}
147
a5826484
AM		 148struct mt9m001_reg {
149 u8 reg;
150 u16 data;
151};
152
153static int multi_reg_write(struct i2c_client *client,
154 const struct mt9m001_reg *regs, int num)
155{
156 int i;
157
158 for (i = 0; i < num; i++) {
159 int ret = reg_write(client, regs[i].reg, regs[i].data);
160
161 if (ret)
162 return ret;
163 }
164
165 return 0;
166}
167
f8ce7c35
AM		 168static int mt9m001_init(struct i2c_client *client)
169{
36909b55 170 static const struct mt9m001_reg init_regs[] = {
a5826484
AM		 171 /*
172 * Issue a soft reset. This returns all registers to their
173 * default values.
174 */
175 { MT9M001_RESET, 1 },
176 { MT9M001_RESET, 0 },
177 /* Disable chip, synchronous option update */
178 { MT9M001_OUTPUT_CONTROL, 0 }
179 };
f8ce7c35
AM		 180
181 dev_dbg(&client->dev, "%s\n", __func__);
182
a5826484
AM		 183 return multi_reg_write(client, init_regs, ARRAY_SIZE(init_regs));
184}
f8ce7c35 185
8fcfc491 186static int mt9m001_apply_selection(struct v4l2_subdev *sd)
a5826484
AM		 187{
188 struct i2c_client *client = v4l2_get_subdevdata(sd);
189 struct mt9m001 *mt9m001 = to_mt9m001(client);
190 const struct mt9m001_reg regs[] = {
191 /* Blanking and start values - default... */
192 { MT9M001_HORIZONTAL_BLANKING, MT9M001_DEFAULT_HBLANK },
193 { MT9M001_VERTICAL_BLANKING, MT9M001_DEFAULT_VBLANK },
194 /*
195 * The caller provides a supported format, as verified per
196 * call to .set_fmt(FORMAT_TRY).
197 */
8fcfc491
AM		 198 { MT9M001_COLUMN_START, mt9m001->rect.left },
199 { MT9M001_ROW_START, mt9m001->rect.top },
200 { MT9M001_WINDOW_WIDTH, mt9m001->rect.width - 1 },
a5826484 201 { MT9M001_WINDOW_HEIGHT,
8fcfc491 202 mt9m001->rect.height + mt9m001->y_skip_top - 1 },
a5826484 203 };
f8ce7c35 204
a5826484 205 return multi_reg_write(client, regs, ARRAY_SIZE(regs));
f8ce7c35
AM		 206}
207
208static int mt9m001_s_stream(struct v4l2_subdev *sd, int enable)
209{
210 struct i2c_client *client = v4l2_get_subdevdata(sd);
8fcfc491
AM		 211 struct mt9m001 *mt9m001 = to_mt9m001(client);
212 int ret = 0;
213
214 mutex_lock(&mt9m001->mutex);
215
216 if (mt9m001->streaming == enable)
217 goto done;
218
219 if (enable) {
e7c018a9 220 ret = pm_runtime_resume_and_get(&client->dev);
8fcfc491 221 if (ret < 0)
e7c018a9 222 goto unlock;
8fcfc491
AM		 223
224 ret = mt9m001_apply_selection(sd);
225 if (ret)
226 goto put_unlock;
227
228 ret = __v4l2_ctrl_handler_setup(&mt9m001->hdl);
229 if (ret)
230 goto put_unlock;
231
232 /* Switch to master "normal" mode */
233 ret = reg_write(client, MT9M001_OUTPUT_CONTROL, 2);
234 if (ret < 0)
235 goto put_unlock;
236 } else {
237 /* Switch to master stop sensor readout */
238 reg_write(client, MT9M001_OUTPUT_CONTROL, 0);
239 pm_runtime_put(&client->dev);
240 }
241
242 mt9m001->streaming = enable;
243done:
244 mutex_unlock(&mt9m001->mutex);
f8ce7c35 245
f8ce7c35 246 return 0;
8fcfc491
AM		 247
248put_unlock:
249 pm_runtime_put(&client->dev);
e7c018a9 250unlock:
8fcfc491
AM		 251 mutex_unlock(&mt9m001->mutex);
252
253 return ret;
f8ce7c35
AM		 254}
255
256static int mt9m001_set_selection(struct v4l2_subdev *sd,
0d346d2a 257 struct v4l2_subdev_state *sd_state,
f8ce7c35
AM		 258 struct v4l2_subdev_selection *sel)
259{
260 struct i2c_client *client = v4l2_get_subdevdata(sd);
261 struct mt9m001 *mt9m001 = to_mt9m001(client);
262 struct v4l2_rect rect = sel->r;
f8ce7c35
AM		 263
264 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
265 sel->target != V4L2_SEL_TGT_CROP)
266 return -EINVAL;
267
268 if (mt9m001->fmts == mt9m001_colour_fmts)
269 /*
270 * Bayer format - even number of rows for simplicity,
271 * but let the user play with the top row.
272 */
273 rect.height = ALIGN(rect.height, 2);
274
275 /* Datasheet requirement: see register description */
276 rect.width = ALIGN(rect.width, 2);
277 rect.left = ALIGN(rect.left, 2);
278
74021329
AM		 279 rect.width = clamp_t(u32, rect.width, MT9M001_MIN_WIDTH,
280 MT9M001_MAX_WIDTH);
281 rect.left = clamp_t(u32, rect.left, MT9M001_COLUMN_SKIP,
282 MT9M001_COLUMN_SKIP + MT9M001_MAX_WIDTH - rect.width);
f8ce7c35 283
74021329
AM		 284 rect.height = clamp_t(u32, rect.height, MT9M001_MIN_HEIGHT,
285 MT9M001_MAX_HEIGHT);
286 rect.top = clamp_t(u32, rect.top, MT9M001_ROW_SKIP,
287 MT9M001_ROW_SKIP + MT9M001_MAX_HEIGHT - rect.height);
f8ce7c35 288
a5826484
AM		 289 mt9m001->total_h = rect.height + mt9m001->y_skip_top +
290 MT9M001_DEFAULT_VBLANK;
f8ce7c35 291
8fcfc491 292 mt9m001->rect = rect;
f8ce7c35 293
8fcfc491 294 return 0;
f8ce7c35
AM		 295}
296
297static int mt9m001_get_selection(struct v4l2_subdev *sd,
0d346d2a 298 struct v4l2_subdev_state *sd_state,
f8ce7c35
AM		 299 struct v4l2_subdev_selection *sel)
300{
301 struct i2c_client *client = v4l2_get_subdevdata(sd);
302 struct mt9m001 *mt9m001 = to_mt9m001(client);
303
304 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
305 return -EINVAL;
306
307 switch (sel->target) {
308 case V4L2_SEL_TGT_CROP_BOUNDS:
309 sel->r.left = MT9M001_COLUMN_SKIP;
310 sel->r.top = MT9M001_ROW_SKIP;
311 sel->r.width = MT9M001_MAX_WIDTH;
312 sel->r.height = MT9M001_MAX_HEIGHT;
313 return 0;
314 case V4L2_SEL_TGT_CROP:
315 sel->r = mt9m001->rect;
316 return 0;
317 default:
318 return -EINVAL;
319 }
320}
321
322static int mt9m001_get_fmt(struct v4l2_subdev *sd,
0d346d2a 323 struct v4l2_subdev_state *sd_state,
f8ce7c35
AM		 324 struct v4l2_subdev_format *format)
325{
326 struct i2c_client *client = v4l2_get_subdevdata(sd);
327 struct mt9m001 *mt9m001 = to_mt9m001(client);
328 struct v4l2_mbus_framefmt *mf = &format->format;
329
330 if (format->pad)
331 return -EINVAL;
332
71f247da 333 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
0d346d2a 334 mf = v4l2_subdev_get_try_format(sd, sd_state, 0);
71f247da
AM		 335 format->format = *mf;
336 return 0;
337 }
338
f8ce7c35
AM		 339 mf->width = mt9m001->rect.width;
340 mf->height = mt9m001->rect.height;
341 mf->code = mt9m001->fmt->code;
342 mf->colorspace = mt9m001->fmt->colorspace;
343 mf->field = V4L2_FIELD_NONE;
772f63c0
AM		 344 mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
345 mf->quantization = V4L2_QUANTIZATION_DEFAULT;
346 mf->xfer_func = V4L2_XFER_FUNC_DEFAULT;
f8ce7c35
AM		 347
348 return 0;
349}
350
351static int mt9m001_s_fmt(struct v4l2_subdev *sd,
352 const struct mt9m001_datafmt *fmt,
353 struct v4l2_mbus_framefmt *mf)
354{
355 struct i2c_client *client = v4l2_get_subdevdata(sd);
356 struct mt9m001 *mt9m001 = to_mt9m001(client);
357 struct v4l2_subdev_selection sel = {
358 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
359 .target = V4L2_SEL_TGT_CROP,
360 .r.left = mt9m001->rect.left,
361 .r.top = mt9m001->rect.top,
362 .r.width = mf->width,
363 .r.height = mf->height,
364 };
365 int ret;
366
367 /* No support for scaling so far, just crop. TODO: use skipping */
368 ret = mt9m001_set_selection(sd, NULL, &sel);
369 if (!ret) {
370 mf->width = mt9m001->rect.width;
371 mf->height = mt9m001->rect.height;
372 mt9m001->fmt = fmt;
373 mf->colorspace = fmt->colorspace;
374 }
375
376 return ret;
377}
378
379static int mt9m001_set_fmt(struct v4l2_subdev *sd,
0d346d2a 380 struct v4l2_subdev_state *sd_state,
f8ce7c35
AM		 381 struct v4l2_subdev_format *format)
382{
383 struct v4l2_mbus_framefmt *mf = &format->format;
384 struct i2c_client *client = v4l2_get_subdevdata(sd);
385 struct mt9m001 *mt9m001 = to_mt9m001(client);
386 const struct mt9m001_datafmt *fmt;
387
388 if (format->pad)
389 return -EINVAL;
390
391 v4l_bound_align_image(&mf->width, MT9M001_MIN_WIDTH,
392 MT9M001_MAX_WIDTH, 1,
393 &mf->height, MT9M001_MIN_HEIGHT + mt9m001->y_skip_top,
394 MT9M001_MAX_HEIGHT + mt9m001->y_skip_top, 0, 0);
395
396 if (mt9m001->fmts == mt9m001_colour_fmts)
397 mf->height = ALIGN(mf->height - 1, 2);
398
399 fmt = mt9m001_find_datafmt(mf->code, mt9m001->fmts,
400 mt9m001->num_fmts);
401 if (!fmt) {
402 fmt = mt9m001->fmt;
403 mf->code = fmt->code;
404 }
405
406 mf->colorspace = fmt->colorspace;
772f63c0
AM		 407 mf->field = V4L2_FIELD_NONE;
408 mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
409 mf->quantization = V4L2_QUANTIZATION_DEFAULT;
410 mf->xfer_func = V4L2_XFER_FUNC_DEFAULT;
f8ce7c35
AM		 411
412 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
413 return mt9m001_s_fmt(sd, fmt, mf);
0d346d2a 414 sd_state->pads->try_fmt = *mf;
f8ce7c35
AM		 415 return 0;
416}
417
418#ifdef CONFIG_VIDEO_ADV_DEBUG
419static int mt9m001_g_register(struct v4l2_subdev *sd,
420 struct v4l2_dbg_register *reg)
421{
422 struct i2c_client *client = v4l2_get_subdevdata(sd);
423
424 if (reg->reg > 0xff)
425 return -EINVAL;
426
427 reg->size = 2;
428 reg->val = reg_read(client, reg->reg);
429
430 if (reg->val > 0xffff)
431 return -EIO;
432
433 return 0;
434}
435
436static int mt9m001_s_register(struct v4l2_subdev *sd,
437 const struct v4l2_dbg_register *reg)
438{
439 struct i2c_client *client = v4l2_get_subdevdata(sd);
440
441 if (reg->reg > 0xff)
442 return -EINVAL;
443
444 if (reg_write(client, reg->reg, reg->val) < 0)
445 return -EIO;
446
447 return 0;
448}
449#endif
450
8fcfc491 451static int mt9m001_power_on(struct device *dev)
f8ce7c35 452{
8fcfc491 453 struct i2c_client *client = to_i2c_client(dev);
f8ce7c35 454 struct mt9m001 *mt9m001 = to_mt9m001(client);
8fcfc491
AM		 455 int ret;
456
457 ret = clk_prepare_enable(mt9m001->clk);
458 if (ret)
459 return ret;
460
461 if (mt9m001->standby_gpio) {
462 gpiod_set_value_cansleep(mt9m001->standby_gpio, 0);
463 usleep_range(1000, 2000);
464 }
f8ce7c35 465
8fcfc491
AM		 466 if (mt9m001->reset_gpio) {
467 gpiod_set_value_cansleep(mt9m001->reset_gpio, 1);
468 usleep_range(1000, 2000);
469 gpiod_set_value_cansleep(mt9m001->reset_gpio, 0);
470 usleep_range(1000, 2000);
471 }
472
473 return 0;
474}
475
476static int mt9m001_power_off(struct device *dev)
477{
478 struct i2c_client *client = to_i2c_client(dev);
479 struct mt9m001 *mt9m001 = to_mt9m001(client);
480
481 gpiod_set_value_cansleep(mt9m001->standby_gpio, 1);
482 clk_disable_unprepare(mt9m001->clk);
483
484 return 0;
f8ce7c35
AM		 485}
486
487static int mt9m001_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
488{
489 struct mt9m001 *mt9m001 = container_of(ctrl->handler,
490 struct mt9m001, hdl);
491 s32 min, max;
492
493 switch (ctrl->id) {
494 case V4L2_CID_EXPOSURE_AUTO:
495 min = mt9m001->exposure->minimum;
496 max = mt9m001->exposure->maximum;
497 mt9m001->exposure->val =
498 (524 + (mt9m001->total_h - 1) * (max - min)) / 1048 + min;
499 break;
500 }
501 return 0;
502}
503
504static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl)
505{
506 struct mt9m001 *mt9m001 = container_of(ctrl->handler,
507 struct mt9m001, hdl);
508 struct v4l2_subdev *sd = &mt9m001->subdev;
509 struct i2c_client *client = v4l2_get_subdevdata(sd);
510 struct v4l2_ctrl *exp = mt9m001->exposure;
511 int data;
8fcfc491
AM		 512 int ret;
513
514 if (!pm_runtime_get_if_in_use(&client->dev))
515 return 0;
f8ce7c35
AM		 516
517 switch (ctrl->id) {
518 case V4L2_CID_VFLIP:
519 if (ctrl->val)
8fcfc491 520 ret = reg_set(client, MT9M001_READ_OPTIONS2, 0x8000);
f8ce7c35 521 else
8fcfc491
AM		 522 ret = reg_clear(client, MT9M001_READ_OPTIONS2, 0x8000);
523 break;
f8ce7c35
AM		 524
525 case V4L2_CID_GAIN:
526 /* See Datasheet Table 7, Gain settings. */
527 if (ctrl->val <= ctrl->default_value) {
528 /* Pack it into 0..1 step 0.125, register values 0..8 */
529 unsigned long range = ctrl->default_value - ctrl->minimum;
530 data = ((ctrl->val - (s32)ctrl->minimum) * 8 + range / 2) / range;
531
532 dev_dbg(&client->dev, "Setting gain %d\n", data);
8fcfc491 533 ret = reg_write(client, MT9M001_GLOBAL_GAIN, data);
f8ce7c35
AM		 534 } else {
535 /* Pack it into 1.125..15 variable step, register values 9..67 */
536 /* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */
537 unsigned long range = ctrl->maximum - ctrl->default_value - 1;
538 unsigned long gain = ((ctrl->val - (s32)ctrl->default_value - 1) *
539 111 + range / 2) / range + 9;
540
541 if (gain <= 32)
542 data = gain;
543 else if (gain <= 64)
544 data = ((gain - 32) * 16 + 16) / 32 + 80;
545 else
546 data = ((gain - 64) * 7 + 28) / 56 + 96;
547
548 dev_dbg(&client->dev, "Setting gain from %d to %d\n",
549 reg_read(client, MT9M001_GLOBAL_GAIN), data);
8fcfc491 550 ret = reg_write(client, MT9M001_GLOBAL_GAIN, data);
f8ce7c35 551 }
8fcfc491 552 break;
f8ce7c35
AM		 553
554 case V4L2_CID_EXPOSURE_AUTO:
555 if (ctrl->val == V4L2_EXPOSURE_MANUAL) {
556 unsigned long range = exp->maximum - exp->minimum;
557 unsigned long shutter = ((exp->val - (s32)exp->minimum) * 1048 +
558 range / 2) / range + 1;
559
560 dev_dbg(&client->dev,
561 "Setting shutter width from %d to %lu\n",
562 reg_read(client, MT9M001_SHUTTER_WIDTH), shutter);
8fcfc491 563 ret = reg_write(client, MT9M001_SHUTTER_WIDTH, shutter);
f8ce7c35 564 } else {
f8ce7c35 565 mt9m001->total_h = mt9m001->rect.height +
8fcfc491
AM		 566 mt9m001->y_skip_top + MT9M001_DEFAULT_VBLANK;
567 ret = reg_write(client, MT9M001_SHUTTER_WIDTH,
568 mt9m001->total_h);
f8ce7c35 569 }
8fcfc491
AM		 570 break;
571 default:
572 ret = -EINVAL;
573 break;
f8ce7c35 574 }
8fcfc491
AM		 575
576 pm_runtime_put(&client->dev);
577
578 return ret;
f8ce7c35
AM		 579}
580
581/*
582 * Interface active, can use i2c. If it fails, it can indeed mean, that
583 * this wasn't our capture interface, so, we wait for the right one
584 */
74021329 585static int mt9m001_video_probe(struct i2c_client *client)
f8ce7c35
AM		 586{
587 struct mt9m001 *mt9m001 = to_mt9m001(client);
588 s32 data;
f8ce7c35
AM		 589 int ret;
590
f8ce7c35
AM		 591 /* Enable the chip */
592 data = reg_write(client, MT9M001_CHIP_ENABLE, 1);
593 dev_dbg(&client->dev, "write: %d\n", data);
594
595 /* Read out the chip version register */
596 data = reg_read(client, MT9M001_CHIP_VERSION);
597
598 /* must be 0x8411 or 0x8421 for colour sensor and 8431 for bw */
599 switch (data) {
600 case 0x8411:
601 case 0x8421:
602 mt9m001->fmts = mt9m001_colour_fmts;
74021329 603 mt9m001->num_fmts = ARRAY_SIZE(mt9m001_colour_fmts);
f8ce7c35
AM		 604 break;
605 case 0x8431:
606 mt9m001->fmts = mt9m001_monochrome_fmts;
74021329 607 mt9m001->num_fmts = ARRAY_SIZE(mt9m001_monochrome_fmts);
f8ce7c35
AM		 608 break;
609 default:
610 dev_err(&client->dev,
611 "No MT9M001 chip detected, register read %x\n", data);
612 ret = -ENODEV;
613 goto done;
614 }
615
f8ce7c35
AM		 616 mt9m001->fmt = &mt9m001->fmts[0];
617
618 dev_info(&client->dev, "Detected a MT9M001 chip ID %x (%s)\n", data,
619 data == 0x8431 ? "C12STM" : "C12ST");
620
621 ret = mt9m001_init(client);
622 if (ret < 0) {
623 dev_err(&client->dev, "Failed to initialise the camera\n");
624 goto done;
625 }
626
627 /* mt9m001_init() has reset the chip, returning registers to defaults */
628 ret = v4l2_ctrl_handler_setup(&mt9m001->hdl);
629
630done:
f8ce7c35
AM		 631 return ret;
632}
633
f8ce7c35
AM		 634static int mt9m001_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
635{
636 struct i2c_client *client = v4l2_get_subdevdata(sd);
637 struct mt9m001 *mt9m001 = to_mt9m001(client);
638
639 *lines = mt9m001->y_skip_top;
640
641 return 0;
642}
643
644static const struct v4l2_ctrl_ops mt9m001_ctrl_ops = {
645 .g_volatile_ctrl = mt9m001_g_volatile_ctrl,
646 .s_ctrl = mt9m001_s_ctrl,
647};
648
649static const struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = {
dd15f070
AM		 650 .log_status = v4l2_ctrl_subdev_log_status,
651 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
652 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
f8ce7c35
AM		 653#ifdef CONFIG_VIDEO_ADV_DEBUG
654 .g_register = mt9m001_g_register,
655 .s_register = mt9m001_s_register,
656#endif
f8ce7c35
AM		 657};
658
71f247da 659static int mt9m001_init_cfg(struct v4l2_subdev *sd,
0d346d2a 660 struct v4l2_subdev_state *sd_state)
71f247da
AM		 661{
662 struct i2c_client *client = v4l2_get_subdevdata(sd);
663 struct mt9m001 *mt9m001 = to_mt9m001(client);
664 struct v4l2_mbus_framefmt *try_fmt =
0d346d2a 665 v4l2_subdev_get_try_format(sd, sd_state, 0);
71f247da
AM		 666
667 try_fmt->width = MT9M001_MAX_WIDTH;
668 try_fmt->height = MT9M001_MAX_HEIGHT;
669 try_fmt->code = mt9m001->fmts[0].code;
670 try_fmt->colorspace = mt9m001->fmts[0].colorspace;
671 try_fmt->field = V4L2_FIELD_NONE;
672 try_fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
673 try_fmt->quantization = V4L2_QUANTIZATION_DEFAULT;
674 try_fmt->xfer_func = V4L2_XFER_FUNC_DEFAULT;
675
676 return 0;
677}
678
f8ce7c35 679static int mt9m001_enum_mbus_code(struct v4l2_subdev *sd,
0d346d2a 680 struct v4l2_subdev_state *sd_state,
f8ce7c35
AM		 681 struct v4l2_subdev_mbus_code_enum *code)
682{
683 struct i2c_client *client = v4l2_get_subdevdata(sd);
684 struct mt9m001 *mt9m001 = to_mt9m001(client);
685
686 if (code->pad || code->index >= mt9m001->num_fmts)
687 return -EINVAL;
688
689 code->code = mt9m001->fmts[code->index].code;
690 return 0;
691}
692
0c3da525
JM		 693static int mt9m001_get_mbus_config(struct v4l2_subdev *sd,
694 unsigned int pad,
695 struct v4l2_mbus_config *cfg)
f8ce7c35 696{
f8ce7c35 697 /* MT9M001 has all capture_format parameters fixed */
f8ce7c35 698 cfg->type = V4L2_MBUS_PARALLEL;
6a7bdd89
LP		 699 cfg->bus.parallel.flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
700 V4L2_MBUS_HSYNC_ACTIVE_HIGH |
701 V4L2_MBUS_VSYNC_ACTIVE_HIGH |
702 V4L2_MBUS_DATA_ACTIVE_HIGH |
703 V4L2_MBUS_MASTER;
f8ce7c35
AM		 704
705 return 0;
706}
707
f8ce7c35
AM		 708static const struct v4l2_subdev_video_ops mt9m001_subdev_video_ops = {
709 .s_stream = mt9m001_s_stream,
f8ce7c35
AM		 710};
711
712static const struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = {
713 .g_skip_top_lines = mt9m001_g_skip_top_lines,
714};
715
716static const struct v4l2_subdev_pad_ops mt9m001_subdev_pad_ops = {
71f247da 717 .init_cfg = mt9m001_init_cfg,
f8ce7c35
AM		 718 .enum_mbus_code = mt9m001_enum_mbus_code,
719 .get_selection = mt9m001_get_selection,
720 .set_selection = mt9m001_set_selection,
721 .get_fmt = mt9m001_get_fmt,
722 .set_fmt = mt9m001_set_fmt,
0c3da525 723 .get_mbus_config = mt9m001_get_mbus_config,
f8ce7c35
AM		 724};
725
726static const struct v4l2_subdev_ops mt9m001_subdev_ops = {
727 .core = &mt9m001_subdev_core_ops,
728 .video = &mt9m001_subdev_video_ops,
729 .sensor = &mt9m001_subdev_sensor_ops,
730 .pad = &mt9m001_subdev_pad_ops,
731};
732
e6714993 733static int mt9m001_probe(struct i2c_client *client)
f8ce7c35
AM		 734{
735 struct mt9m001 *mt9m001;
41341dd9 736 struct i2c_adapter *adapter = client->adapter;
f8ce7c35
AM		 737 int ret;
738
f8ce7c35
AM		 739 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
740 dev_warn(&adapter->dev,
741 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
742 return -EIO;
743 }
744
74021329 745 mt9m001 = devm_kzalloc(&client->dev, sizeof(*mt9m001), GFP_KERNEL);
f8ce7c35
AM		 746 if (!mt9m001)
747 return -ENOMEM;
748
8fcfc491
AM		 749 mt9m001->clk = devm_clk_get(&client->dev, NULL);
750 if (IS_ERR(mt9m001->clk))
751 return PTR_ERR(mt9m001->clk);
752
753 mt9m001->standby_gpio = devm_gpiod_get_optional(&client->dev, "standby",
754 GPIOD_OUT_LOW);
755 if (IS_ERR(mt9m001->standby_gpio))
756 return PTR_ERR(mt9m001->standby_gpio);
757
758 mt9m001->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
759 GPIOD_OUT_LOW);
760 if (IS_ERR(mt9m001->reset_gpio))
761 return PTR_ERR(mt9m001->reset_gpio);
762
f8ce7c35 763 v4l2_i2c_subdev_init(&mt9m001->subdev, client, &mt9m001_subdev_ops);
dd15f070
AM		 764 mt9m001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
765 V4L2_SUBDEV_FL_HAS_EVENTS;
f8ce7c35
AM		 766 v4l2_ctrl_handler_init(&mt9m001->hdl, 4);
767 v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops,
768 V4L2_CID_VFLIP, 0, 1, 1, 0);
769 v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops,
770 V4L2_CID_GAIN, 0, 127, 1, 64);
771 mt9m001->exposure = v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops,
772 V4L2_CID_EXPOSURE, 1, 255, 1, 255);
773 /*
774 * Simulated autoexposure. If enabled, we calculate shutter width
775 * ourselves in the driver based on vertical blanking and frame width
776 */
777 mt9m001->autoexposure = v4l2_ctrl_new_std_menu(&mt9m001->hdl,
778 &mt9m001_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
779 V4L2_EXPOSURE_AUTO);
780 mt9m001->subdev.ctrl_handler = &mt9m001->hdl;
781 if (mt9m001->hdl.error)
782 return mt9m001->hdl.error;
783
784 v4l2_ctrl_auto_cluster(2, &mt9m001->autoexposure,
785 V4L2_EXPOSURE_MANUAL, true);
786
8fcfc491
AM		 787 mutex_init(&mt9m001->mutex);
788 mt9m001->hdl.lock = &mt9m001->mutex;
789
f8ce7c35
AM		 790 /* Second stage probe - when a capture adapter is there */
791 mt9m001->y_skip_top = 0;
792 mt9m001->rect.left = MT9M001_COLUMN_SKIP;
793 mt9m001->rect.top = MT9M001_ROW_SKIP;
794 mt9m001->rect.width = MT9M001_MAX_WIDTH;
795 mt9m001->rect.height = MT9M001_MAX_HEIGHT;
796
8fcfc491
AM		 797 ret = mt9m001_power_on(&client->dev);
798 if (ret)
799 goto error_hdl_free;
800
801 pm_runtime_set_active(&client->dev);
802 pm_runtime_enable(&client->dev);
f8ce7c35 803
74021329 804 ret = mt9m001_video_probe(client);
8fcfc491
AM		 805 if (ret)
806 goto error_power_off;
807
12d85c3e
AM		 808 mt9m001->pad.flags = MEDIA_PAD_FL_SOURCE;
809 mt9m001->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
810 ret = media_entity_pads_init(&mt9m001->subdev.entity, 1, &mt9m001->pad);
811 if (ret)
812 goto error_power_off;
813
73b33860
AM		 814 ret = v4l2_async_register_subdev(&mt9m001->subdev);
815 if (ret)
816 goto error_entity_cleanup;
817
8fcfc491
AM		 818 pm_runtime_idle(&client->dev);
819
820 return 0;
821
73b33860
AM		 822error_entity_cleanup:
823 media_entity_cleanup(&mt9m001->subdev.entity);
8fcfc491
AM		 824error_power_off:
825 pm_runtime_disable(&client->dev);
826 pm_runtime_set_suspended(&client->dev);
827 mt9m001_power_off(&client->dev);
828
829error_hdl_free:
830 v4l2_ctrl_handler_free(&mt9m001->hdl);
831 mutex_destroy(&mt9m001->mutex);
f8ce7c35
AM		 832
833 return ret;
834}
835
ed5c2f5f 836static void mt9m001_remove(struct i2c_client *client)
f8ce7c35
AM		 837{
838 struct mt9m001 *mt9m001 = to_mt9m001(client);
f8ce7c35 839
e7c018a9
MCC		 840 /*
841 * As it increments RPM usage_count even on errors, we don't need to
842 * check the returned code here.
843 */
8fcfc491
AM		 844 pm_runtime_get_sync(&client->dev);
845
73b33860 846 v4l2_async_unregister_subdev(&mt9m001->subdev);
12d85c3e
AM		 847 media_entity_cleanup(&mt9m001->subdev.entity);
848
8fcfc491
AM		 849 pm_runtime_disable(&client->dev);
850 pm_runtime_set_suspended(&client->dev);
851 pm_runtime_put_noidle(&client->dev);
852 mt9m001_power_off(&client->dev);
853
f8ce7c35 854 v4l2_ctrl_handler_free(&mt9m001->hdl);
8fcfc491 855 mutex_destroy(&mt9m001->mutex);
f8ce7c35
AM		 856}
857
858static const struct i2c_device_id mt9m001_id[] = {
859 { "mt9m001", 0 },
860 { }
861};
862MODULE_DEVICE_TABLE(i2c, mt9m001_id);
863
8fcfc491
AM		 864static const struct dev_pm_ops mt9m001_pm_ops = {
865 SET_RUNTIME_PM_OPS(mt9m001_power_off, mt9m001_power_on, NULL)
866};
867
1e57e4ce
AM		 868static const struct of_device_id mt9m001_of_match[] = {
869 { .compatible = "onnn,mt9m001", },
870 { /* sentinel */ },
871};
872MODULE_DEVICE_TABLE(of, mt9m001_of_match);
873
f8ce7c35
AM		 874static struct i2c_driver mt9m001_i2c_driver = {
875 .driver = {
876 .name = "mt9m001",
8fcfc491 877 .pm = &mt9m001_pm_ops,
1e57e4ce 878 .of_match_table = mt9m001_of_match,
f8ce7c35 879 },
e6714993 880 .probe_new = mt9m001_probe,
f8ce7c35
AM		 881 .remove = mt9m001_remove,
882 .id_table = mt9m001_id,
883};
884
885module_i2c_driver(mt9m001_i2c_driver);
886
887MODULE_DESCRIPTION("Micron MT9M001 Camera driver");
888MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
1f01091f 889MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)