Commit | Line | Data |
---|---|---|
5a544cce HV |
1 | /* |
2 | * Analog Devices ADV7511 HDMI Transmitter Device Driver | |
3 | * | |
4 | * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved. | |
5 | * | |
6 | * This program is free software; you may redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; version 2 of the License. | |
9 | * | |
10 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
11 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
12 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
13 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
14 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
15 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
16 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
17 | * SOFTWARE. | |
18 | */ | |
19 | ||
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/slab.h> | |
24 | #include <linux/i2c.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/videodev2.h> | |
27 | #include <linux/gpio.h> | |
28 | #include <linux/workqueue.h> | |
1fb69bfd | 29 | #include <linux/hdmi.h> |
5a544cce HV |
30 | #include <linux/v4l2-dv-timings.h> |
31 | #include <media/v4l2-device.h> | |
32 | #include <media/v4l2-common.h> | |
33 | #include <media/v4l2-ctrls.h> | |
34 | #include <media/v4l2-dv-timings.h> | |
b5dcee22 | 35 | #include <media/i2c/adv7511.h> |
5a544cce HV |
36 | |
37 | static int debug; | |
38 | module_param(debug, int, 0644); | |
39 | MODULE_PARM_DESC(debug, "debug level (0-2)"); | |
40 | ||
41 | MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver"); | |
42 | MODULE_AUTHOR("Hans Verkuil"); | |
8f7a5f46 | 43 | MODULE_LICENSE("GPL v2"); |
5a544cce HV |
44 | |
45 | #define MASK_ADV7511_EDID_RDY_INT 0x04 | |
46 | #define MASK_ADV7511_MSEN_INT 0x40 | |
47 | #define MASK_ADV7511_HPD_INT 0x80 | |
48 | ||
49 | #define MASK_ADV7511_HPD_DETECT 0x40 | |
50 | #define MASK_ADV7511_MSEN_DETECT 0x20 | |
51 | #define MASK_ADV7511_EDID_RDY 0x10 | |
52 | ||
53 | #define EDID_MAX_RETRIES (8) | |
54 | #define EDID_DELAY 250 | |
55 | #define EDID_MAX_SEGM 8 | |
56 | ||
57 | #define ADV7511_MAX_WIDTH 1920 | |
58 | #define ADV7511_MAX_HEIGHT 1200 | |
59 | #define ADV7511_MIN_PIXELCLOCK 20000000 | |
60 | #define ADV7511_MAX_PIXELCLOCK 225000000 | |
61 | ||
62 | /* | |
63 | ********************************************************************** | |
64 | * | |
65 | * Arrays with configuration parameters for the ADV7511 | |
66 | * | |
67 | ********************************************************************** | |
68 | */ | |
69 | ||
70 | struct i2c_reg_value { | |
71 | unsigned char reg; | |
72 | unsigned char value; | |
73 | }; | |
74 | ||
75 | struct adv7511_state_edid { | |
76 | /* total number of blocks */ | |
77 | u32 blocks; | |
78 | /* Number of segments read */ | |
79 | u32 segments; | |
5be50ef1 | 80 | u8 data[EDID_MAX_SEGM * 256]; |
5a544cce HV |
81 | /* Number of EDID read retries left */ |
82 | unsigned read_retries; | |
83 | bool complete; | |
84 | }; | |
85 | ||
86 | struct adv7511_state { | |
87 | struct adv7511_platform_data pdata; | |
88 | struct v4l2_subdev sd; | |
89 | struct media_pad pad; | |
90 | struct v4l2_ctrl_handler hdl; | |
91 | int chip_revision; | |
5be50ef1 HV |
92 | u8 i2c_edid_addr; |
93 | u8 i2c_cec_addr; | |
b4dbad8f | 94 | u8 i2c_pktmem_addr; |
5a544cce HV |
95 | /* Is the adv7511 powered on? */ |
96 | bool power_on; | |
97 | /* Did we receive hotplug and rx-sense signals? */ | |
98 | bool have_monitor; | |
99 | /* timings from s_dv_timings */ | |
100 | struct v4l2_dv_timings dv_timings; | |
1fb69bfd HV |
101 | u32 fmt_code; |
102 | u32 colorspace; | |
103 | u32 ycbcr_enc; | |
104 | u32 quantization; | |
e719a51a | 105 | u32 xfer_func; |
5a544cce HV |
106 | /* controls */ |
107 | struct v4l2_ctrl *hdmi_mode_ctrl; | |
108 | struct v4l2_ctrl *hotplug_ctrl; | |
109 | struct v4l2_ctrl *rx_sense_ctrl; | |
110 | struct v4l2_ctrl *have_edid0_ctrl; | |
111 | struct v4l2_ctrl *rgb_quantization_range_ctrl; | |
112 | struct i2c_client *i2c_edid; | |
b4dbad8f | 113 | struct i2c_client *i2c_pktmem; |
5a544cce HV |
114 | struct adv7511_state_edid edid; |
115 | /* Running counter of the number of detected EDIDs (for debugging) */ | |
116 | unsigned edid_detect_counter; | |
117 | struct workqueue_struct *work_queue; | |
118 | struct delayed_work edid_handler; /* work entry */ | |
119 | }; | |
120 | ||
121 | static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd); | |
122 | static bool adv7511_check_edid_status(struct v4l2_subdev *sd); | |
123 | static void adv7511_setup(struct v4l2_subdev *sd); | |
124 | static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq); | |
125 | static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq); | |
126 | ||
127 | ||
128 | static const struct v4l2_dv_timings_cap adv7511_timings_cap = { | |
129 | .type = V4L2_DV_BT_656_1120, | |
aefd4a5a GG |
130 | /* keep this initialization for compatibility with GCC < 4.4.6 */ |
131 | .reserved = { 0 }, | |
132 | V4L2_INIT_BT_TIMINGS(0, ADV7511_MAX_WIDTH, 0, ADV7511_MAX_HEIGHT, | |
133 | ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK, | |
134 | V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | | |
5a544cce | 135 | V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT, |
aefd4a5a GG |
136 | V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING | |
137 | V4L2_DV_BT_CAP_CUSTOM) | |
5a544cce HV |
138 | }; |
139 | ||
140 | static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd) | |
141 | { | |
142 | return container_of(sd, struct adv7511_state, sd); | |
143 | } | |
144 | ||
145 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) | |
146 | { | |
147 | return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd; | |
148 | } | |
149 | ||
150 | /* ------------------------ I2C ----------------------------------------------- */ | |
151 | ||
152 | static s32 adv_smbus_read_byte_data_check(struct i2c_client *client, | |
153 | u8 command, bool check) | |
154 | { | |
155 | union i2c_smbus_data data; | |
156 | ||
157 | if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags, | |
158 | I2C_SMBUS_READ, command, | |
159 | I2C_SMBUS_BYTE_DATA, &data)) | |
160 | return data.byte; | |
161 | if (check) | |
162 | v4l_err(client, "error reading %02x, %02x\n", | |
163 | client->addr, command); | |
164 | return -1; | |
165 | } | |
166 | ||
167 | static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command) | |
168 | { | |
169 | int i; | |
170 | for (i = 0; i < 3; i++) { | |
171 | int ret = adv_smbus_read_byte_data_check(client, command, true); | |
172 | if (ret >= 0) { | |
173 | if (i) | |
174 | v4l_err(client, "read ok after %d retries\n", i); | |
175 | return ret; | |
176 | } | |
177 | } | |
178 | v4l_err(client, "read failed\n"); | |
179 | return -1; | |
180 | } | |
181 | ||
182 | static int adv7511_rd(struct v4l2_subdev *sd, u8 reg) | |
183 | { | |
184 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
185 | ||
186 | return adv_smbus_read_byte_data(client, reg); | |
187 | } | |
188 | ||
189 | static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val) | |
190 | { | |
191 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
192 | int ret; | |
193 | int i; | |
194 | ||
195 | for (i = 0; i < 3; i++) { | |
196 | ret = i2c_smbus_write_byte_data(client, reg, val); | |
197 | if (ret == 0) | |
198 | return 0; | |
199 | } | |
200 | v4l2_err(sd, "%s: i2c write error\n", __func__); | |
201 | return ret; | |
202 | } | |
203 | ||
204 | /* To set specific bits in the register, a clear-mask is given (to be AND-ed), | |
205 | and then the value-mask (to be OR-ed). */ | |
5be50ef1 | 206 | static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) |
5a544cce HV |
207 | { |
208 | adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask); | |
209 | } | |
210 | ||
211 | static int adv_smbus_read_i2c_block_data(struct i2c_client *client, | |
212 | u8 command, unsigned length, u8 *values) | |
213 | { | |
214 | union i2c_smbus_data data; | |
215 | int ret; | |
216 | ||
217 | if (length > I2C_SMBUS_BLOCK_MAX) | |
218 | length = I2C_SMBUS_BLOCK_MAX; | |
219 | data.block[0] = length; | |
220 | ||
221 | ret = i2c_smbus_xfer(client->adapter, client->addr, client->flags, | |
222 | I2C_SMBUS_READ, command, | |
223 | I2C_SMBUS_I2C_BLOCK_DATA, &data); | |
224 | memcpy(values, data.block + 1, length); | |
225 | return ret; | |
226 | } | |
227 | ||
5be50ef1 | 228 | static inline void adv7511_edid_rd(struct v4l2_subdev *sd, u16 len, u8 *buf) |
5a544cce HV |
229 | { |
230 | struct adv7511_state *state = get_adv7511_state(sd); | |
231 | int i; | |
232 | int err = 0; | |
233 | ||
234 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
235 | ||
236 | for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX) | |
237 | err = adv_smbus_read_i2c_block_data(state->i2c_edid, i, | |
238 | I2C_SMBUS_BLOCK_MAX, buf + i); | |
239 | if (err) | |
240 | v4l2_err(sd, "%s: i2c read error\n", __func__); | |
241 | } | |
242 | ||
b4dbad8f HV |
243 | static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg) |
244 | { | |
245 | struct adv7511_state *state = get_adv7511_state(sd); | |
246 | ||
247 | return adv_smbus_read_byte_data(state->i2c_pktmem, reg); | |
248 | } | |
249 | ||
250 | static int adv7511_pktmem_wr(struct v4l2_subdev *sd, u8 reg, u8 val) | |
251 | { | |
252 | struct adv7511_state *state = get_adv7511_state(sd); | |
253 | int ret; | |
254 | int i; | |
255 | ||
256 | for (i = 0; i < 3; i++) { | |
257 | ret = i2c_smbus_write_byte_data(state->i2c_pktmem, reg, val); | |
258 | if (ret == 0) | |
259 | return 0; | |
260 | } | |
261 | v4l2_err(sd, "%s: i2c write error\n", __func__); | |
262 | return ret; | |
263 | } | |
264 | ||
265 | /* To set specific bits in the register, a clear-mask is given (to be AND-ed), | |
266 | and then the value-mask (to be OR-ed). */ | |
267 | static inline void adv7511_pktmem_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask) | |
268 | { | |
269 | adv7511_pktmem_wr(sd, reg, (adv7511_pktmem_rd(sd, reg) & clr_mask) | val_mask); | |
270 | } | |
271 | ||
5a544cce HV |
272 | static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd) |
273 | { | |
274 | return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT; | |
275 | } | |
276 | ||
277 | static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd) | |
278 | { | |
279 | return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT; | |
280 | } | |
281 | ||
5be50ef1 | 282 | static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode) |
5a544cce HV |
283 | { |
284 | adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5); | |
285 | } | |
286 | ||
287 | static void adv7511_csc_coeff(struct v4l2_subdev *sd, | |
288 | u16 A1, u16 A2, u16 A3, u16 A4, | |
289 | u16 B1, u16 B2, u16 B3, u16 B4, | |
290 | u16 C1, u16 C2, u16 C3, u16 C4) | |
291 | { | |
292 | /* A */ | |
293 | adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8); | |
294 | adv7511_wr(sd, 0x19, A1); | |
295 | adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8); | |
296 | adv7511_wr(sd, 0x1B, A2); | |
297 | adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8); | |
298 | adv7511_wr(sd, 0x1d, A3); | |
299 | adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8); | |
300 | adv7511_wr(sd, 0x1f, A4); | |
301 | ||
302 | /* B */ | |
303 | adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8); | |
304 | adv7511_wr(sd, 0x21, B1); | |
305 | adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8); | |
306 | adv7511_wr(sd, 0x23, B2); | |
307 | adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8); | |
308 | adv7511_wr(sd, 0x25, B3); | |
309 | adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8); | |
310 | adv7511_wr(sd, 0x27, B4); | |
311 | ||
312 | /* C */ | |
313 | adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8); | |
314 | adv7511_wr(sd, 0x29, C1); | |
315 | adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8); | |
316 | adv7511_wr(sd, 0x2B, C2); | |
317 | adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8); | |
318 | adv7511_wr(sd, 0x2D, C3); | |
319 | adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8); | |
320 | adv7511_wr(sd, 0x2F, C4); | |
321 | } | |
322 | ||
323 | static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable) | |
324 | { | |
325 | if (enable) { | |
5be50ef1 | 326 | u8 csc_mode = 0; |
5a544cce HV |
327 | adv7511_csc_conversion_mode(sd, csc_mode); |
328 | adv7511_csc_coeff(sd, | |
329 | 4096-564, 0, 0, 256, | |
330 | 0, 4096-564, 0, 256, | |
331 | 0, 0, 4096-564, 256); | |
332 | /* enable CSC */ | |
333 | adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80); | |
334 | /* AVI infoframe: Limited range RGB (16-235) */ | |
335 | adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04); | |
336 | } else { | |
337 | /* disable CSC */ | |
338 | adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0); | |
339 | /* AVI infoframe: Full range RGB (0-255) */ | |
340 | adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08); | |
341 | } | |
342 | } | |
343 | ||
344 | static void adv7511_set_IT_content_AVI_InfoFrame(struct v4l2_subdev *sd) | |
345 | { | |
346 | struct adv7511_state *state = get_adv7511_state(sd); | |
680fee04 HV |
347 | if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { |
348 | /* CE format, not IT */ | |
5a544cce HV |
349 | adv7511_wr_and_or(sd, 0x57, 0x7f, 0x00); |
350 | } else { | |
351 | /* IT format */ | |
352 | adv7511_wr_and_or(sd, 0x57, 0x7f, 0x80); | |
353 | } | |
354 | } | |
355 | ||
356 | static int adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl) | |
357 | { | |
358 | switch (ctrl->val) { | |
359 | default: | |
360 | return -EINVAL; | |
361 | break; | |
362 | case V4L2_DV_RGB_RANGE_AUTO: { | |
363 | /* automatic */ | |
364 | struct adv7511_state *state = get_adv7511_state(sd); | |
365 | ||
680fee04 HV |
366 | if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { |
367 | /* CE format, RGB limited range (16-235) */ | |
5a544cce HV |
368 | adv7511_csc_rgb_full2limit(sd, true); |
369 | } else { | |
680fee04 | 370 | /* not CE format, RGB full range (0-255) */ |
5a544cce HV |
371 | adv7511_csc_rgb_full2limit(sd, false); |
372 | } | |
373 | } | |
374 | break; | |
375 | case V4L2_DV_RGB_RANGE_LIMITED: | |
376 | /* RGB limited range (16-235) */ | |
377 | adv7511_csc_rgb_full2limit(sd, true); | |
378 | break; | |
379 | case V4L2_DV_RGB_RANGE_FULL: | |
380 | /* RGB full range (0-255) */ | |
381 | adv7511_csc_rgb_full2limit(sd, false); | |
382 | break; | |
383 | } | |
384 | return 0; | |
385 | } | |
386 | ||
387 | /* ------------------------------ CTRL OPS ------------------------------ */ | |
388 | ||
389 | static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl) | |
390 | { | |
391 | struct v4l2_subdev *sd = to_sd(ctrl); | |
392 | struct adv7511_state *state = get_adv7511_state(sd); | |
393 | ||
394 | v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val); | |
395 | ||
396 | if (state->hdmi_mode_ctrl == ctrl) { | |
397 | /* Set HDMI or DVI-D */ | |
398 | adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00); | |
399 | return 0; | |
400 | } | |
401 | if (state->rgb_quantization_range_ctrl == ctrl) | |
402 | return adv7511_set_rgb_quantization_mode(sd, ctrl); | |
403 | ||
404 | return -EINVAL; | |
405 | } | |
406 | ||
407 | static const struct v4l2_ctrl_ops adv7511_ctrl_ops = { | |
408 | .s_ctrl = adv7511_s_ctrl, | |
409 | }; | |
410 | ||
411 | /* ---------------------------- CORE OPS ------------------------------------------- */ | |
412 | ||
413 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
414 | static void adv7511_inv_register(struct v4l2_subdev *sd) | |
415 | { | |
416 | v4l2_info(sd, "0x000-0x0ff: Main Map\n"); | |
417 | } | |
418 | ||
419 | static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) | |
420 | { | |
421 | reg->size = 1; | |
422 | switch (reg->reg >> 8) { | |
423 | case 0: | |
424 | reg->val = adv7511_rd(sd, reg->reg & 0xff); | |
425 | break; | |
426 | default: | |
427 | v4l2_info(sd, "Register %03llx not supported\n", reg->reg); | |
428 | adv7511_inv_register(sd); | |
429 | break; | |
430 | } | |
431 | return 0; | |
432 | } | |
433 | ||
434 | static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) | |
435 | { | |
436 | switch (reg->reg >> 8) { | |
437 | case 0: | |
438 | adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff); | |
439 | break; | |
440 | default: | |
441 | v4l2_info(sd, "Register %03llx not supported\n", reg->reg); | |
442 | adv7511_inv_register(sd); | |
443 | break; | |
444 | } | |
445 | return 0; | |
446 | } | |
447 | #endif | |
448 | ||
b4dbad8f HV |
449 | struct adv7511_cfg_read_infoframe { |
450 | const char *desc; | |
451 | u8 present_reg; | |
452 | u8 present_mask; | |
453 | u8 header[3]; | |
454 | u16 payload_addr; | |
455 | }; | |
456 | ||
457 | static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size) | |
458 | { | |
459 | u8 csum = 0; | |
460 | size_t i; | |
461 | ||
462 | /* compute checksum */ | |
463 | for (i = 0; i < size; i++) | |
464 | csum += ptr[i]; | |
465 | ||
466 | return 256 - csum; | |
467 | } | |
468 | ||
469 | static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri) | |
470 | { | |
471 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
472 | struct device *dev = &client->dev; | |
473 | union hdmi_infoframe frame; | |
474 | u8 buffer[32]; | |
475 | u8 len; | |
476 | int i; | |
477 | ||
478 | if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) { | |
479 | v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc); | |
480 | return; | |
481 | } | |
482 | ||
483 | memcpy(buffer, cri->header, sizeof(cri->header)); | |
484 | ||
485 | len = buffer[2]; | |
486 | ||
487 | if (len + 4 > sizeof(buffer)) { | |
488 | v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len); | |
489 | return; | |
490 | } | |
491 | ||
492 | if (cri->payload_addr >= 0x100) { | |
493 | for (i = 0; i < len; i++) | |
494 | buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100); | |
495 | } else { | |
496 | for (i = 0; i < len; i++) | |
497 | buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i); | |
498 | } | |
499 | buffer[3] = 0; | |
500 | buffer[3] = hdmi_infoframe_checksum(buffer, len + 4); | |
501 | ||
502 | if (hdmi_infoframe_unpack(&frame, buffer) < 0) { | |
503 | v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc); | |
504 | return; | |
505 | } | |
506 | ||
507 | hdmi_infoframe_log(KERN_INFO, dev, &frame); | |
508 | } | |
509 | ||
510 | static void adv7511_log_infoframes(struct v4l2_subdev *sd) | |
511 | { | |
512 | static const struct adv7511_cfg_read_infoframe cri[] = { | |
513 | { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 }, | |
514 | { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 }, | |
515 | { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 }, | |
516 | }; | |
517 | int i; | |
518 | ||
519 | for (i = 0; i < ARRAY_SIZE(cri); i++) | |
520 | log_infoframe(sd, &cri[i]); | |
521 | } | |
522 | ||
5a544cce HV |
523 | static int adv7511_log_status(struct v4l2_subdev *sd) |
524 | { | |
525 | struct adv7511_state *state = get_adv7511_state(sd); | |
526 | struct adv7511_state_edid *edid = &state->edid; | |
527 | ||
528 | static const char * const states[] = { | |
529 | "in reset", | |
530 | "reading EDID", | |
531 | "idle", | |
532 | "initializing HDCP", | |
533 | "HDCP enabled", | |
534 | "initializing HDCP repeater", | |
535 | "6", "7", "8", "9", "A", "B", "C", "D", "E", "F" | |
536 | }; | |
537 | static const char * const errors[] = { | |
538 | "no error", | |
539 | "bad receiver BKSV", | |
540 | "Ri mismatch", | |
541 | "Pj mismatch", | |
542 | "i2c error", | |
543 | "timed out", | |
544 | "max repeater cascade exceeded", | |
545 | "hash check failed", | |
546 | "too many devices", | |
547 | "9", "A", "B", "C", "D", "E", "F" | |
548 | }; | |
549 | ||
550 | v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off"); | |
551 | v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n", | |
552 | (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no", | |
553 | (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no", | |
554 | edid->segments ? "found" : "no", | |
555 | edid->blocks); | |
556 | v4l2_info(sd, "%s output %s\n", | |
557 | (adv7511_rd(sd, 0xaf) & 0x02) ? | |
558 | "HDMI" : "DVI-D", | |
559 | (adv7511_rd(sd, 0xa1) & 0x3c) ? | |
560 | "disabled" : "enabled"); | |
561 | v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n", | |
562 | states[adv7511_rd(sd, 0xc8) & 0xf], | |
563 | errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter, | |
564 | adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96)); | |
565 | v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full"); | |
3ecabed1 MB |
566 | if (adv7511_rd(sd, 0xaf) & 0x02) { |
567 | /* HDMI only */ | |
568 | u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80; | |
569 | u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 | | |
570 | adv7511_rd(sd, 0x02) << 8 | | |
571 | adv7511_rd(sd, 0x03); | |
572 | u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2; | |
573 | u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f; | |
574 | u32 CTS; | |
575 | ||
576 | if (manual_cts) | |
577 | CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 | | |
578 | adv7511_rd(sd, 0x08) << 8 | | |
579 | adv7511_rd(sd, 0x09); | |
580 | else | |
581 | CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 | | |
582 | adv7511_rd(sd, 0x05) << 8 | | |
583 | adv7511_rd(sd, 0x06); | |
584 | v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n", | |
585 | manual_cts ? "manual" : "automatic", N, CTS); | |
586 | v4l2_info(sd, "VIC: detected %d, sent %d\n", | |
587 | vic_detect, vic_sent); | |
b4dbad8f | 588 | adv7511_log_infoframes(sd); |
3ecabed1 | 589 | } |
5a544cce HV |
590 | if (state->dv_timings.type == V4L2_DV_BT_656_1120) |
591 | v4l2_print_dv_timings(sd->name, "timings: ", | |
592 | &state->dv_timings, false); | |
593 | else | |
594 | v4l2_info(sd, "no timings set\n"); | |
595 | v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr); | |
596 | v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr); | |
b4dbad8f | 597 | v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr); |
5a544cce HV |
598 | return 0; |
599 | } | |
600 | ||
601 | /* Power up/down adv7511 */ | |
602 | static int adv7511_s_power(struct v4l2_subdev *sd, int on) | |
603 | { | |
604 | struct adv7511_state *state = get_adv7511_state(sd); | |
605 | const int retries = 20; | |
606 | int i; | |
607 | ||
608 | v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off"); | |
609 | ||
610 | state->power_on = on; | |
611 | ||
612 | if (!on) { | |
613 | /* Power down */ | |
614 | adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40); | |
615 | return true; | |
616 | } | |
617 | ||
618 | /* Power up */ | |
619 | /* The adv7511 does not always come up immediately. | |
620 | Retry multiple times. */ | |
621 | for (i = 0; i < retries; i++) { | |
622 | adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0); | |
623 | if ((adv7511_rd(sd, 0x41) & 0x40) == 0) | |
624 | break; | |
625 | adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40); | |
626 | msleep(10); | |
627 | } | |
628 | if (i == retries) { | |
629 | v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__); | |
630 | adv7511_s_power(sd, 0); | |
631 | return false; | |
632 | } | |
633 | if (i > 1) | |
634 | v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i); | |
635 | ||
636 | /* Reserved registers that must be set */ | |
637 | adv7511_wr(sd, 0x98, 0x03); | |
638 | adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70); | |
639 | adv7511_wr(sd, 0x9c, 0x30); | |
640 | adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01); | |
641 | adv7511_wr(sd, 0xa2, 0xa4); | |
642 | adv7511_wr(sd, 0xa3, 0xa4); | |
643 | adv7511_wr(sd, 0xe0, 0xd0); | |
644 | adv7511_wr(sd, 0xf9, 0x00); | |
645 | ||
646 | adv7511_wr(sd, 0x43, state->i2c_edid_addr); | |
b4dbad8f | 647 | adv7511_wr(sd, 0x45, state->i2c_pktmem_addr); |
5a544cce HV |
648 | |
649 | /* Set number of attempts to read the EDID */ | |
650 | adv7511_wr(sd, 0xc9, 0xf); | |
651 | return true; | |
652 | } | |
653 | ||
654 | /* Enable interrupts */ | |
655 | static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable) | |
656 | { | |
5be50ef1 HV |
657 | u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT; |
658 | u8 irqs_rd; | |
5a544cce HV |
659 | int retries = 100; |
660 | ||
661 | v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable"); | |
662 | ||
663 | /* The datasheet says that the EDID ready interrupt should be | |
664 | disabled if there is no hotplug. */ | |
665 | if (!enable) | |
666 | irqs = 0; | |
667 | else if (adv7511_have_hotplug(sd)) | |
668 | irqs |= MASK_ADV7511_EDID_RDY_INT; | |
669 | ||
670 | /* | |
671 | * This i2c write can fail (approx. 1 in 1000 writes). But it | |
672 | * is essential that this register is correct, so retry it | |
673 | * multiple times. | |
674 | * | |
675 | * Note that the i2c write does not report an error, but the readback | |
676 | * clearly shows the wrong value. | |
677 | */ | |
678 | do { | |
679 | adv7511_wr(sd, 0x94, irqs); | |
680 | irqs_rd = adv7511_rd(sd, 0x94); | |
681 | } while (retries-- && irqs_rd != irqs); | |
682 | ||
683 | if (irqs_rd == irqs) | |
684 | return; | |
685 | v4l2_err(sd, "Could not set interrupts: hw failure?\n"); | |
686 | } | |
687 | ||
688 | /* Interrupt handler */ | |
689 | static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled) | |
690 | { | |
5be50ef1 | 691 | u8 irq_status; |
5a544cce HV |
692 | |
693 | /* disable interrupts to prevent a race condition */ | |
694 | adv7511_set_isr(sd, false); | |
695 | irq_status = adv7511_rd(sd, 0x96); | |
696 | /* clear detected interrupts */ | |
697 | adv7511_wr(sd, 0x96, irq_status); | |
698 | ||
699 | v4l2_dbg(1, debug, sd, "%s: irq 0x%x\n", __func__, irq_status); | |
700 | ||
701 | if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT)) | |
702 | adv7511_check_monitor_present_status(sd); | |
703 | if (irq_status & MASK_ADV7511_EDID_RDY_INT) | |
704 | adv7511_check_edid_status(sd); | |
705 | ||
706 | /* enable interrupts */ | |
707 | adv7511_set_isr(sd, true); | |
708 | ||
709 | if (handled) | |
710 | *handled = true; | |
711 | return 0; | |
712 | } | |
713 | ||
5a544cce HV |
714 | static const struct v4l2_subdev_core_ops adv7511_core_ops = { |
715 | .log_status = adv7511_log_status, | |
716 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
717 | .g_register = adv7511_g_register, | |
718 | .s_register = adv7511_s_register, | |
719 | #endif | |
720 | .s_power = adv7511_s_power, | |
721 | .interrupt_service_routine = adv7511_isr, | |
722 | }; | |
723 | ||
724 | /* ------------------------------ VIDEO OPS ------------------------------ */ | |
725 | ||
726 | /* Enable/disable adv7511 output */ | |
727 | static int adv7511_s_stream(struct v4l2_subdev *sd, int enable) | |
728 | { | |
729 | struct adv7511_state *state = get_adv7511_state(sd); | |
730 | ||
731 | v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis")); | |
732 | adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c)); | |
733 | if (enable) { | |
734 | adv7511_check_monitor_present_status(sd); | |
735 | } else { | |
736 | adv7511_s_power(sd, 0); | |
737 | state->have_monitor = false; | |
738 | } | |
739 | return 0; | |
740 | } | |
741 | ||
742 | static int adv7511_s_dv_timings(struct v4l2_subdev *sd, | |
743 | struct v4l2_dv_timings *timings) | |
744 | { | |
745 | struct adv7511_state *state = get_adv7511_state(sd); | |
746 | ||
747 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
748 | ||
749 | /* quick sanity check */ | |
750 | if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL)) | |
751 | return -EINVAL; | |
752 | ||
753 | /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings | |
754 | if the format is one of the CEA or DMT timings. */ | |
755 | v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL); | |
756 | ||
757 | timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS; | |
758 | ||
759 | /* save timings */ | |
760 | state->dv_timings = *timings; | |
761 | ||
762 | /* update quantization range based on new dv_timings */ | |
763 | adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl); | |
764 | ||
765 | /* update AVI infoframe */ | |
766 | adv7511_set_IT_content_AVI_InfoFrame(sd); | |
767 | ||
768 | return 0; | |
769 | } | |
770 | ||
771 | static int adv7511_g_dv_timings(struct v4l2_subdev *sd, | |
772 | struct v4l2_dv_timings *timings) | |
773 | { | |
774 | struct adv7511_state *state = get_adv7511_state(sd); | |
775 | ||
776 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
777 | ||
778 | if (!timings) | |
779 | return -EINVAL; | |
780 | ||
781 | *timings = state->dv_timings; | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
786 | static int adv7511_enum_dv_timings(struct v4l2_subdev *sd, | |
787 | struct v4l2_enum_dv_timings *timings) | |
788 | { | |
9646171f LP |
789 | if (timings->pad != 0) |
790 | return -EINVAL; | |
791 | ||
5a544cce HV |
792 | return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL); |
793 | } | |
794 | ||
795 | static int adv7511_dv_timings_cap(struct v4l2_subdev *sd, | |
796 | struct v4l2_dv_timings_cap *cap) | |
797 | { | |
9646171f LP |
798 | if (cap->pad != 0) |
799 | return -EINVAL; | |
800 | ||
5a544cce HV |
801 | *cap = adv7511_timings_cap; |
802 | return 0; | |
803 | } | |
804 | ||
805 | static const struct v4l2_subdev_video_ops adv7511_video_ops = { | |
806 | .s_stream = adv7511_s_stream, | |
807 | .s_dv_timings = adv7511_s_dv_timings, | |
808 | .g_dv_timings = adv7511_g_dv_timings, | |
5a544cce HV |
809 | }; |
810 | ||
811 | /* ------------------------------ AUDIO OPS ------------------------------ */ | |
812 | static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable) | |
813 | { | |
814 | v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis")); | |
815 | ||
816 | if (enable) | |
817 | adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80); | |
818 | else | |
819 | adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40); | |
820 | ||
821 | return 0; | |
822 | } | |
823 | ||
824 | static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq) | |
825 | { | |
826 | u32 N; | |
827 | ||
828 | switch (freq) { | |
829 | case 32000: N = 4096; break; | |
830 | case 44100: N = 6272; break; | |
831 | case 48000: N = 6144; break; | |
832 | case 88200: N = 12544; break; | |
833 | case 96000: N = 12288; break; | |
834 | case 176400: N = 25088; break; | |
835 | case 192000: N = 24576; break; | |
836 | default: | |
837 | return -EINVAL; | |
838 | } | |
839 | ||
840 | /* Set N (used with CTS to regenerate the audio clock) */ | |
841 | adv7511_wr(sd, 0x01, (N >> 16) & 0xf); | |
842 | adv7511_wr(sd, 0x02, (N >> 8) & 0xff); | |
843 | adv7511_wr(sd, 0x03, N & 0xff); | |
844 | ||
845 | return 0; | |
846 | } | |
847 | ||
848 | static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq) | |
849 | { | |
850 | u32 i2s_sf; | |
851 | ||
852 | switch (freq) { | |
853 | case 32000: i2s_sf = 0x30; break; | |
854 | case 44100: i2s_sf = 0x00; break; | |
855 | case 48000: i2s_sf = 0x20; break; | |
856 | case 88200: i2s_sf = 0x80; break; | |
857 | case 96000: i2s_sf = 0xa0; break; | |
858 | case 176400: i2s_sf = 0xc0; break; | |
859 | case 192000: i2s_sf = 0xe0; break; | |
860 | default: | |
861 | return -EINVAL; | |
862 | } | |
863 | ||
864 | /* Set sampling frequency for I2S audio to 48 kHz */ | |
865 | adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf); | |
866 | ||
867 | return 0; | |
868 | } | |
869 | ||
870 | static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config) | |
871 | { | |
872 | /* Only 2 channels in use for application */ | |
873 | adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1); | |
874 | /* Speaker mapping */ | |
875 | adv7511_wr(sd, 0x76, 0x00); | |
876 | ||
877 | /* 16 bit audio word length */ | |
878 | adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02); | |
879 | ||
880 | return 0; | |
881 | } | |
882 | ||
883 | static const struct v4l2_subdev_audio_ops adv7511_audio_ops = { | |
884 | .s_stream = adv7511_s_audio_stream, | |
885 | .s_clock_freq = adv7511_s_clock_freq, | |
886 | .s_i2s_clock_freq = adv7511_s_i2s_clock_freq, | |
887 | .s_routing = adv7511_s_routing, | |
888 | }; | |
889 | ||
9646171f LP |
890 | /* ---------------------------- PAD OPS ------------------------------------- */ |
891 | ||
892 | static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) | |
893 | { | |
894 | struct adv7511_state *state = get_adv7511_state(sd); | |
895 | ||
c81285ae HV |
896 | memset(edid->reserved, 0, sizeof(edid->reserved)); |
897 | ||
9646171f LP |
898 | if (edid->pad != 0) |
899 | return -EINVAL; | |
c81285ae HV |
900 | |
901 | if (edid->start_block == 0 && edid->blocks == 0) { | |
902 | edid->blocks = state->edid.segments * 2; | |
903 | return 0; | |
9646171f | 904 | } |
c81285ae HV |
905 | |
906 | if (state->edid.segments == 0) | |
907 | return -ENODATA; | |
908 | ||
9646171f | 909 | if (edid->start_block >= state->edid.segments * 2) |
c81285ae HV |
910 | return -EINVAL; |
911 | ||
912 | if (edid->start_block + edid->blocks > state->edid.segments * 2) | |
9646171f LP |
913 | edid->blocks = state->edid.segments * 2 - edid->start_block; |
914 | ||
915 | memcpy(edid->edid, &state->edid.data[edid->start_block * 128], | |
916 | 128 * edid->blocks); | |
c81285ae | 917 | |
9646171f LP |
918 | return 0; |
919 | } | |
920 | ||
1fb69bfd | 921 | static int adv7511_enum_mbus_code(struct v4l2_subdev *sd, |
f7234138 | 922 | struct v4l2_subdev_pad_config *cfg, |
1fb69bfd HV |
923 | struct v4l2_subdev_mbus_code_enum *code) |
924 | { | |
925 | if (code->pad != 0) | |
926 | return -EINVAL; | |
927 | ||
928 | switch (code->index) { | |
929 | case 0: | |
930 | code->code = MEDIA_BUS_FMT_RGB888_1X24; | |
931 | break; | |
932 | case 1: | |
933 | code->code = MEDIA_BUS_FMT_YUYV8_1X16; | |
934 | break; | |
935 | case 2: | |
936 | code->code = MEDIA_BUS_FMT_UYVY8_1X16; | |
937 | break; | |
938 | default: | |
939 | return -EINVAL; | |
940 | } | |
941 | return 0; | |
942 | } | |
943 | ||
944 | static void adv7511_fill_format(struct adv7511_state *state, | |
945 | struct v4l2_mbus_framefmt *format) | |
946 | { | |
947 | memset(format, 0, sizeof(*format)); | |
948 | ||
949 | format->width = state->dv_timings.bt.width; | |
950 | format->height = state->dv_timings.bt.height; | |
951 | format->field = V4L2_FIELD_NONE; | |
952 | } | |
953 | ||
f7234138 HV |
954 | static int adv7511_get_fmt(struct v4l2_subdev *sd, |
955 | struct v4l2_subdev_pad_config *cfg, | |
956 | struct v4l2_subdev_format *format) | |
1fb69bfd HV |
957 | { |
958 | struct adv7511_state *state = get_adv7511_state(sd); | |
959 | ||
960 | if (format->pad != 0) | |
961 | return -EINVAL; | |
962 | ||
963 | adv7511_fill_format(state, &format->format); | |
964 | ||
965 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | |
966 | struct v4l2_mbus_framefmt *fmt; | |
967 | ||
f7234138 | 968 | fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad); |
1fb69bfd HV |
969 | format->format.code = fmt->code; |
970 | format->format.colorspace = fmt->colorspace; | |
971 | format->format.ycbcr_enc = fmt->ycbcr_enc; | |
972 | format->format.quantization = fmt->quantization; | |
e719a51a | 973 | format->format.xfer_func = fmt->xfer_func; |
1fb69bfd HV |
974 | } else { |
975 | format->format.code = state->fmt_code; | |
976 | format->format.colorspace = state->colorspace; | |
977 | format->format.ycbcr_enc = state->ycbcr_enc; | |
978 | format->format.quantization = state->quantization; | |
e719a51a | 979 | format->format.xfer_func = state->xfer_func; |
1fb69bfd HV |
980 | } |
981 | ||
982 | return 0; | |
983 | } | |
984 | ||
f7234138 HV |
985 | static int adv7511_set_fmt(struct v4l2_subdev *sd, |
986 | struct v4l2_subdev_pad_config *cfg, | |
987 | struct v4l2_subdev_format *format) | |
1fb69bfd HV |
988 | { |
989 | struct adv7511_state *state = get_adv7511_state(sd); | |
990 | /* | |
991 | * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary | |
992 | * Video Information (AVI) InfoFrame Format" | |
993 | * | |
994 | * c = Colorimetry | |
995 | * ec = Extended Colorimetry | |
996 | * y = RGB or YCbCr | |
997 | * q = RGB Quantization Range | |
998 | * yq = YCC Quantization Range | |
999 | */ | |
1000 | u8 c = HDMI_COLORIMETRY_NONE; | |
1001 | u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; | |
1002 | u8 y = HDMI_COLORSPACE_RGB; | |
1003 | u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT; | |
1004 | u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED; | |
1005 | ||
1006 | if (format->pad != 0) | |
1007 | return -EINVAL; | |
1008 | switch (format->format.code) { | |
1009 | case MEDIA_BUS_FMT_UYVY8_1X16: | |
1010 | case MEDIA_BUS_FMT_YUYV8_1X16: | |
1011 | case MEDIA_BUS_FMT_RGB888_1X24: | |
1012 | break; | |
1013 | default: | |
1014 | return -EINVAL; | |
1015 | } | |
1016 | ||
1017 | adv7511_fill_format(state, &format->format); | |
1018 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | |
1019 | struct v4l2_mbus_framefmt *fmt; | |
1020 | ||
f7234138 | 1021 | fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad); |
1fb69bfd HV |
1022 | fmt->code = format->format.code; |
1023 | fmt->colorspace = format->format.colorspace; | |
1024 | fmt->ycbcr_enc = format->format.ycbcr_enc; | |
1025 | fmt->quantization = format->format.quantization; | |
e719a51a | 1026 | fmt->xfer_func = format->format.xfer_func; |
1fb69bfd HV |
1027 | return 0; |
1028 | } | |
1029 | ||
1030 | switch (format->format.code) { | |
1031 | case MEDIA_BUS_FMT_UYVY8_1X16: | |
1032 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01); | |
1033 | adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8); | |
1034 | y = HDMI_COLORSPACE_YUV422; | |
1035 | break; | |
1036 | case MEDIA_BUS_FMT_YUYV8_1X16: | |
1037 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01); | |
1038 | adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc); | |
1039 | y = HDMI_COLORSPACE_YUV422; | |
1040 | break; | |
1041 | case MEDIA_BUS_FMT_RGB888_1X24: | |
1042 | default: | |
1043 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00); | |
1044 | adv7511_wr_and_or(sd, 0x16, 0x03, 0x00); | |
1045 | break; | |
1046 | } | |
1047 | state->fmt_code = format->format.code; | |
1048 | state->colorspace = format->format.colorspace; | |
1049 | state->ycbcr_enc = format->format.ycbcr_enc; | |
1050 | state->quantization = format->format.quantization; | |
e719a51a | 1051 | state->xfer_func = format->format.xfer_func; |
1fb69bfd HV |
1052 | |
1053 | switch (format->format.colorspace) { | |
1054 | case V4L2_COLORSPACE_ADOBERGB: | |
1055 | c = HDMI_COLORIMETRY_EXTENDED; | |
1056 | ec = y ? HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601 : | |
1057 | HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB; | |
1058 | break; | |
1059 | case V4L2_COLORSPACE_SMPTE170M: | |
1060 | c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE; | |
1061 | if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) { | |
1062 | c = HDMI_COLORIMETRY_EXTENDED; | |
1063 | ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; | |
1064 | } | |
1065 | break; | |
1066 | case V4L2_COLORSPACE_REC709: | |
1067 | c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE; | |
1068 | if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) { | |
1069 | c = HDMI_COLORIMETRY_EXTENDED; | |
1070 | ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709; | |
1071 | } | |
1072 | break; | |
1073 | case V4L2_COLORSPACE_SRGB: | |
1074 | c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE; | |
1075 | ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 : | |
1076 | HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; | |
1077 | break; | |
1078 | case V4L2_COLORSPACE_BT2020: | |
1079 | c = HDMI_COLORIMETRY_EXTENDED; | |
1080 | if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM) | |
1081 | ec = 5; /* Not yet available in hdmi.h */ | |
1082 | else | |
1083 | ec = 6; /* Not yet available in hdmi.h */ | |
1084 | break; | |
1085 | default: | |
1086 | break; | |
1087 | } | |
1088 | ||
1089 | /* | |
1090 | * CEA-861-F says that for RGB formats the YCC range must match the | |
1091 | * RGB range, although sources should ignore the YCC range. | |
1092 | * | |
1093 | * The RGB quantization range shouldn't be non-zero if the EDID doesn't | |
1094 | * have the Q bit set in the Video Capabilities Data Block, however this | |
1095 | * isn't checked at the moment. The assumption is that the application | |
1096 | * knows the EDID and can detect this. | |
1097 | * | |
1098 | * The same is true for the YCC quantization range: non-standard YCC | |
1099 | * quantization ranges should only be sent if the EDID has the YQ bit | |
1100 | * set in the Video Capabilities Data Block. | |
1101 | */ | |
1102 | switch (format->format.quantization) { | |
1103 | case V4L2_QUANTIZATION_FULL_RANGE: | |
1104 | q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT : | |
1105 | HDMI_QUANTIZATION_RANGE_FULL; | |
1106 | yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL; | |
1107 | break; | |
1108 | case V4L2_QUANTIZATION_LIM_RANGE: | |
1109 | q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT : | |
1110 | HDMI_QUANTIZATION_RANGE_LIMITED; | |
1111 | yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED; | |
1112 | break; | |
1113 | } | |
1114 | ||
1115 | adv7511_wr_and_or(sd, 0x4a, 0xbf, 0); | |
1116 | adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5); | |
1117 | adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6); | |
1118 | adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2)); | |
dc5e0205 | 1119 | adv7511_wr_and_or(sd, 0x59, 0x3f, yq << 6); |
1fb69bfd HV |
1120 | adv7511_wr_and_or(sd, 0x4a, 0xff, 1); |
1121 | ||
1122 | return 0; | |
1123 | } | |
1124 | ||
9646171f LP |
1125 | static const struct v4l2_subdev_pad_ops adv7511_pad_ops = { |
1126 | .get_edid = adv7511_get_edid, | |
1fb69bfd HV |
1127 | .enum_mbus_code = adv7511_enum_mbus_code, |
1128 | .get_fmt = adv7511_get_fmt, | |
1129 | .set_fmt = adv7511_set_fmt, | |
9646171f LP |
1130 | .enum_dv_timings = adv7511_enum_dv_timings, |
1131 | .dv_timings_cap = adv7511_dv_timings_cap, | |
1132 | }; | |
1133 | ||
5a544cce HV |
1134 | /* --------------------- SUBDEV OPS --------------------------------------- */ |
1135 | ||
1136 | static const struct v4l2_subdev_ops adv7511_ops = { | |
1137 | .core = &adv7511_core_ops, | |
1138 | .pad = &adv7511_pad_ops, | |
1139 | .video = &adv7511_video_ops, | |
1140 | .audio = &adv7511_audio_ops, | |
1141 | }; | |
1142 | ||
1143 | /* ----------------------------------------------------------------------- */ | |
5be50ef1 | 1144 | static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf) |
5a544cce HV |
1145 | { |
1146 | if (debug >= lvl) { | |
1147 | int i, j; | |
1148 | v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment); | |
1149 | for (i = 0; i < 256; i += 16) { | |
1150 | u8 b[128]; | |
1151 | u8 *bp = b; | |
1152 | if (i == 128) | |
1153 | v4l2_dbg(lvl, debug, sd, "\n"); | |
1154 | for (j = i; j < i + 16; j++) { | |
1155 | sprintf(bp, "0x%02x, ", buf[j]); | |
1156 | bp += 6; | |
1157 | } | |
1158 | bp[0] = '\0'; | |
1159 | v4l2_dbg(lvl, debug, sd, "%s\n", b); | |
1160 | } | |
1161 | } | |
1162 | } | |
1163 | ||
1164 | static void adv7511_edid_handler(struct work_struct *work) | |
1165 | { | |
1166 | struct delayed_work *dwork = to_delayed_work(work); | |
1167 | struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler); | |
1168 | struct v4l2_subdev *sd = &state->sd; | |
1169 | struct adv7511_edid_detect ed; | |
1170 | ||
1171 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
1172 | ||
1173 | if (adv7511_check_edid_status(sd)) { | |
1174 | /* Return if we received the EDID. */ | |
1175 | return; | |
1176 | } | |
1177 | ||
1178 | if (adv7511_have_hotplug(sd)) { | |
1179 | /* We must retry reading the EDID several times, it is possible | |
1180 | * that initially the EDID couldn't be read due to i2c errors | |
1181 | * (DVI connectors are particularly prone to this problem). */ | |
1182 | if (state->edid.read_retries) { | |
1183 | state->edid.read_retries--; | |
1184 | v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__); | |
1185 | state->have_monitor = false; | |
1186 | adv7511_s_power(sd, false); | |
1187 | adv7511_s_power(sd, true); | |
1188 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1189 | return; | |
1190 | } | |
1191 | } | |
1192 | ||
1193 | /* We failed to read the EDID, so send an event for this. */ | |
1194 | ed.present = false; | |
1195 | ed.segment = adv7511_rd(sd, 0xc4); | |
1196 | v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed); | |
1197 | v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__); | |
1198 | } | |
1199 | ||
1200 | static void adv7511_audio_setup(struct v4l2_subdev *sd) | |
1201 | { | |
1202 | v4l2_dbg(1, debug, sd, "%s\n", __func__); | |
1203 | ||
1204 | adv7511_s_i2s_clock_freq(sd, 48000); | |
1205 | adv7511_s_clock_freq(sd, 48000); | |
1206 | adv7511_s_routing(sd, 0, 0, 0); | |
1207 | } | |
1208 | ||
1209 | /* Configure hdmi transmitter. */ | |
1210 | static void adv7511_setup(struct v4l2_subdev *sd) | |
1211 | { | |
1212 | struct adv7511_state *state = get_adv7511_state(sd); | |
1213 | v4l2_dbg(1, debug, sd, "%s\n", __func__); | |
1214 | ||
1215 | /* Input format: RGB 4:4:4 */ | |
1216 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0); | |
1217 | /* Output format: RGB 4:4:4 */ | |
1218 | adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0); | |
1219 | /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */ | |
1220 | adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06); | |
1221 | /* Disable pixel repetition */ | |
1222 | adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0); | |
1223 | /* Disable CSC */ | |
1224 | adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0); | |
1225 | /* Output format: RGB 4:4:4, Active Format Information is valid, | |
1226 | * underscanned */ | |
1227 | adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12); | |
1228 | /* AVI Info frame packet enable, Audio Info frame disable */ | |
1229 | adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10); | |
1230 | /* Colorimetry, Active format aspect ratio: same as picure. */ | |
1231 | adv7511_wr(sd, 0x56, 0xa8); | |
1232 | /* No encryption */ | |
1233 | adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0); | |
1234 | ||
1235 | /* Positive clk edge capture for input video clock */ | |
1236 | adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60); | |
1237 | ||
1238 | adv7511_audio_setup(sd); | |
1239 | ||
1240 | v4l2_ctrl_handler_setup(&state->hdl); | |
1241 | } | |
1242 | ||
1243 | static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd) | |
1244 | { | |
1245 | struct adv7511_monitor_detect mdt; | |
1246 | struct adv7511_state *state = get_adv7511_state(sd); | |
1247 | ||
1248 | mdt.present = state->have_monitor; | |
1249 | v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt); | |
1250 | } | |
1251 | ||
1252 | static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd) | |
1253 | { | |
1254 | struct adv7511_state *state = get_adv7511_state(sd); | |
1255 | /* read hotplug and rx-sense state */ | |
5be50ef1 | 1256 | u8 status = adv7511_rd(sd, 0x42); |
5a544cce HV |
1257 | |
1258 | v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n", | |
1259 | __func__, | |
1260 | status, | |
1261 | status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "", | |
1262 | status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : ""); | |
1263 | ||
1264 | /* update read only ctrls */ | |
1265 | v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0); | |
1266 | v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0); | |
1267 | v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, state->edid.segments ? 0x1 : 0x0); | |
1268 | ||
1269 | if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) { | |
1270 | v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__); | |
1271 | if (!state->have_monitor) { | |
1272 | v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__); | |
1273 | state->have_monitor = true; | |
1274 | adv7511_set_isr(sd, true); | |
1275 | if (!adv7511_s_power(sd, true)) { | |
1276 | v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__); | |
1277 | return; | |
1278 | } | |
1279 | adv7511_setup(sd); | |
1280 | adv7511_notify_monitor_detect(sd); | |
1281 | state->edid.read_retries = EDID_MAX_RETRIES; | |
1282 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1283 | } | |
1284 | } else if (status & MASK_ADV7511_HPD_DETECT) { | |
1285 | v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__); | |
1286 | state->edid.read_retries = EDID_MAX_RETRIES; | |
1287 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1288 | } else if (!(status & MASK_ADV7511_HPD_DETECT)) { | |
1289 | v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__); | |
1290 | if (state->have_monitor) { | |
1291 | v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__); | |
1292 | state->have_monitor = false; | |
1293 | adv7511_notify_monitor_detect(sd); | |
1294 | } | |
1295 | adv7511_s_power(sd, false); | |
1296 | memset(&state->edid, 0, sizeof(struct adv7511_state_edid)); | |
1297 | } | |
1298 | } | |
1299 | ||
5be50ef1 | 1300 | static bool edid_block_verify_crc(u8 *edid_block) |
5a544cce | 1301 | { |
5be50ef1 | 1302 | u8 sum = 0; |
928b0fe7 | 1303 | int i; |
5a544cce HV |
1304 | |
1305 | for (i = 0; i < 128; i++) | |
928b0fe7 MB |
1306 | sum += edid_block[i]; |
1307 | return sum == 0; | |
5a544cce HV |
1308 | } |
1309 | ||
928b0fe7 | 1310 | static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment) |
5a544cce HV |
1311 | { |
1312 | struct adv7511_state *state = get_adv7511_state(sd); | |
1313 | u32 blocks = state->edid.blocks; | |
5be50ef1 | 1314 | u8 *data = state->edid.data; |
5a544cce | 1315 | |
928b0fe7 MB |
1316 | if (!edid_block_verify_crc(&data[segment * 256])) |
1317 | return false; | |
1318 | if ((segment + 1) * 2 <= blocks) | |
1319 | return edid_block_verify_crc(&data[segment * 256 + 128]); | |
1320 | return true; | |
1321 | } | |
1322 | ||
1323 | static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment) | |
1324 | { | |
1325 | static const u8 hdmi_header[] = { | |
1326 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 | |
1327 | }; | |
1328 | struct adv7511_state *state = get_adv7511_state(sd); | |
1329 | u8 *data = state->edid.data; | |
1330 | ||
1331 | if (segment != 0) | |
5a544cce | 1332 | return true; |
928b0fe7 | 1333 | return !memcmp(data, hdmi_header, sizeof(hdmi_header)); |
5a544cce HV |
1334 | } |
1335 | ||
1336 | static bool adv7511_check_edid_status(struct v4l2_subdev *sd) | |
1337 | { | |
1338 | struct adv7511_state *state = get_adv7511_state(sd); | |
5be50ef1 | 1339 | u8 edidRdy = adv7511_rd(sd, 0xc5); |
5a544cce HV |
1340 | |
1341 | v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n", | |
1342 | __func__, EDID_MAX_RETRIES - state->edid.read_retries); | |
1343 | ||
1344 | if (state->edid.complete) | |
1345 | return true; | |
1346 | ||
1347 | if (edidRdy & MASK_ADV7511_EDID_RDY) { | |
1348 | int segment = adv7511_rd(sd, 0xc4); | |
1349 | struct adv7511_edid_detect ed; | |
1350 | ||
1351 | if (segment >= EDID_MAX_SEGM) { | |
1352 | v4l2_err(sd, "edid segment number too big\n"); | |
1353 | return false; | |
1354 | } | |
1355 | v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment); | |
1356 | adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]); | |
1357 | adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]); | |
1358 | if (segment == 0) { | |
1359 | state->edid.blocks = state->edid.data[0x7e] + 1; | |
1360 | v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks); | |
1361 | } | |
928b0fe7 MB |
1362 | if (!edid_verify_crc(sd, segment) || |
1363 | !edid_verify_header(sd, segment)) { | |
5a544cce | 1364 | /* edid crc error, force reread of edid segment */ |
928b0fe7 | 1365 | v4l2_err(sd, "%s: edid crc or header error\n", __func__); |
5a544cce HV |
1366 | state->have_monitor = false; |
1367 | adv7511_s_power(sd, false); | |
1368 | adv7511_s_power(sd, true); | |
1369 | return false; | |
1370 | } | |
1371 | /* one more segment read ok */ | |
1372 | state->edid.segments = segment + 1; | |
1373 | if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) { | |
1374 | /* Request next EDID segment */ | |
1375 | v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments); | |
1376 | adv7511_wr(sd, 0xc9, 0xf); | |
1377 | adv7511_wr(sd, 0xc4, state->edid.segments); | |
1378 | state->edid.read_retries = EDID_MAX_RETRIES; | |
1379 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1380 | return false; | |
1381 | } | |
1382 | ||
1383 | v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments); | |
1384 | state->edid.complete = true; | |
1385 | ||
1386 | /* report when we have all segments | |
1387 | but report only for segment 0 | |
1388 | */ | |
1389 | ed.present = true; | |
1390 | ed.segment = 0; | |
1391 | state->edid_detect_counter++; | |
1392 | v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, state->edid.segments ? 0x1 : 0x0); | |
1393 | v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed); | |
1394 | return ed.present; | |
1395 | } | |
1396 | ||
1397 | return false; | |
1398 | } | |
1399 | ||
1400 | /* ----------------------------------------------------------------------- */ | |
1401 | /* Setup ADV7511 */ | |
1402 | static void adv7511_init_setup(struct v4l2_subdev *sd) | |
1403 | { | |
1404 | struct adv7511_state *state = get_adv7511_state(sd); | |
1405 | struct adv7511_state_edid *edid = &state->edid; | |
1406 | ||
1407 | v4l2_dbg(1, debug, sd, "%s\n", __func__); | |
1408 | ||
1409 | /* clear all interrupts */ | |
1410 | adv7511_wr(sd, 0x96, 0xff); | |
a62c6216 MB |
1411 | /* |
1412 | * Stop HPD from resetting a lot of registers. | |
1413 | * It might leave the chip in a partly un-initialized state, | |
1414 | * in particular with regards to hotplug bounces. | |
1415 | */ | |
1416 | adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0); | |
5a544cce HV |
1417 | memset(edid, 0, sizeof(struct adv7511_state_edid)); |
1418 | state->have_monitor = false; | |
1419 | adv7511_set_isr(sd, false); | |
1420 | adv7511_s_stream(sd, false); | |
1421 | adv7511_s_audio_stream(sd, false); | |
1422 | } | |
1423 | ||
1424 | static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
1425 | { | |
1426 | struct adv7511_state *state; | |
1427 | struct adv7511_platform_data *pdata = client->dev.platform_data; | |
1428 | struct v4l2_ctrl_handler *hdl; | |
1429 | struct v4l2_subdev *sd; | |
1430 | u8 chip_id[2]; | |
1431 | int err = -EIO; | |
1432 | ||
1433 | /* Check if the adapter supports the needed features */ | |
1434 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
1435 | return -EIO; | |
1436 | ||
1437 | state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL); | |
1438 | if (!state) | |
1439 | return -ENOMEM; | |
1440 | ||
1441 | /* Platform data */ | |
1442 | if (!pdata) { | |
1443 | v4l_err(client, "No platform data!\n"); | |
1444 | return -ENODEV; | |
1445 | } | |
1446 | memcpy(&state->pdata, pdata, sizeof(state->pdata)); | |
1fb69bfd HV |
1447 | state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24; |
1448 | state->colorspace = V4L2_COLORSPACE_SRGB; | |
5a544cce HV |
1449 | |
1450 | sd = &state->sd; | |
1451 | ||
1452 | v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n", | |
1453 | client->addr << 1); | |
1454 | ||
1455 | v4l2_i2c_subdev_init(sd, client, &adv7511_ops); | |
1456 | ||
1457 | hdl = &state->hdl; | |
1458 | v4l2_ctrl_handler_init(hdl, 10); | |
1459 | /* add in ascending ID order */ | |
1460 | state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, | |
1461 | V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI, | |
1462 | 0, V4L2_DV_TX_MODE_DVI_D); | |
1463 | state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL, | |
1464 | V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0); | |
1465 | state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL, | |
1466 | V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0); | |
1467 | state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL, | |
1468 | V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0); | |
1469 | state->rgb_quantization_range_ctrl = | |
1470 | v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, | |
1471 | V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL, | |
1472 | 0, V4L2_DV_RGB_RANGE_AUTO); | |
1473 | sd->ctrl_handler = hdl; | |
1474 | if (hdl->error) { | |
1475 | err = hdl->error; | |
1476 | goto err_hdl; | |
1477 | } | |
1478 | state->hdmi_mode_ctrl->is_private = true; | |
1479 | state->hotplug_ctrl->is_private = true; | |
1480 | state->rx_sense_ctrl->is_private = true; | |
1481 | state->have_edid0_ctrl->is_private = true; | |
1482 | state->rgb_quantization_range_ctrl->is_private = true; | |
1483 | ||
1484 | state->pad.flags = MEDIA_PAD_FL_SINK; | |
18095107 | 1485 | err = media_entity_init(&sd->entity, 1, &state->pad); |
5a544cce HV |
1486 | if (err) |
1487 | goto err_hdl; | |
1488 | ||
1489 | /* EDID and CEC i2c addr */ | |
1490 | state->i2c_edid_addr = state->pdata.i2c_edid << 1; | |
1491 | state->i2c_cec_addr = state->pdata.i2c_cec << 1; | |
b4dbad8f | 1492 | state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1; |
5a544cce HV |
1493 | |
1494 | state->chip_revision = adv7511_rd(sd, 0x0); | |
1495 | chip_id[0] = adv7511_rd(sd, 0xf5); | |
1496 | chip_id[1] = adv7511_rd(sd, 0xf6); | |
1497 | if (chip_id[0] != 0x75 || chip_id[1] != 0x11) { | |
1498 | v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0], chip_id[1]); | |
1499 | err = -EIO; | |
1500 | goto err_entity; | |
1501 | } | |
1502 | ||
1503 | state->i2c_edid = i2c_new_dummy(client->adapter, state->i2c_edid_addr >> 1); | |
1504 | if (state->i2c_edid == NULL) { | |
1505 | v4l2_err(sd, "failed to register edid i2c client\n"); | |
f527b17a | 1506 | err = -ENOMEM; |
5a544cce HV |
1507 | goto err_entity; |
1508 | } | |
1509 | ||
b4dbad8f HV |
1510 | state->i2c_pktmem = i2c_new_dummy(client->adapter, state->i2c_pktmem_addr >> 1); |
1511 | if (state->i2c_pktmem == NULL) { | |
1512 | v4l2_err(sd, "failed to register pktmem i2c client\n"); | |
1513 | err = -ENOMEM; | |
1514 | goto err_unreg_edid; | |
1515 | } | |
1516 | ||
5a544cce HV |
1517 | adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */ |
1518 | state->work_queue = create_singlethread_workqueue(sd->name); | |
1519 | if (state->work_queue == NULL) { | |
1520 | v4l2_err(sd, "could not create workqueue\n"); | |
f527b17a | 1521 | err = -ENOMEM; |
b4dbad8f | 1522 | goto err_unreg_pktmem; |
5a544cce HV |
1523 | } |
1524 | ||
1525 | INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler); | |
1526 | ||
1527 | adv7511_init_setup(sd); | |
1528 | adv7511_set_isr(sd, true); | |
1529 | adv7511_check_monitor_present_status(sd); | |
1530 | ||
1531 | v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name, | |
1532 | client->addr << 1, client->adapter->name); | |
1533 | return 0; | |
1534 | ||
b4dbad8f HV |
1535 | err_unreg_pktmem: |
1536 | i2c_unregister_device(state->i2c_pktmem); | |
1537 | err_unreg_edid: | |
5a544cce HV |
1538 | i2c_unregister_device(state->i2c_edid); |
1539 | err_entity: | |
1540 | media_entity_cleanup(&sd->entity); | |
1541 | err_hdl: | |
1542 | v4l2_ctrl_handler_free(&state->hdl); | |
1543 | return err; | |
1544 | } | |
1545 | ||
1546 | /* ----------------------------------------------------------------------- */ | |
1547 | ||
1548 | static int adv7511_remove(struct i2c_client *client) | |
1549 | { | |
1550 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
1551 | struct adv7511_state *state = get_adv7511_state(sd); | |
1552 | ||
1553 | state->chip_revision = -1; | |
1554 | ||
1555 | v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name, | |
1556 | client->addr << 1, client->adapter->name); | |
1557 | ||
1558 | adv7511_init_setup(sd); | |
1559 | cancel_delayed_work(&state->edid_handler); | |
1560 | i2c_unregister_device(state->i2c_edid); | |
b4dbad8f | 1561 | i2c_unregister_device(state->i2c_pktmem); |
5a544cce HV |
1562 | destroy_workqueue(state->work_queue); |
1563 | v4l2_device_unregister_subdev(sd); | |
1564 | media_entity_cleanup(&sd->entity); | |
1565 | v4l2_ctrl_handler_free(sd->ctrl_handler); | |
1566 | return 0; | |
1567 | } | |
1568 | ||
1569 | /* ----------------------------------------------------------------------- */ | |
1570 | ||
1571 | static struct i2c_device_id adv7511_id[] = { | |
1572 | { "adv7511", 0 }, | |
1573 | { } | |
1574 | }; | |
1575 | MODULE_DEVICE_TABLE(i2c, adv7511_id); | |
1576 | ||
1577 | static struct i2c_driver adv7511_driver = { | |
1578 | .driver = { | |
5a544cce HV |
1579 | .name = "adv7511", |
1580 | }, | |
1581 | .probe = adv7511_probe, | |
1582 | .remove = adv7511_remove, | |
1583 | .id_table = adv7511_id, | |
1584 | }; | |
1585 | ||
1586 | module_i2c_driver(adv7511_driver); |