[media] adv7180: Prepare for multi-chip support
[linux-2.6-block.git] / drivers / media / i2c / adv7180.c
CommitLineData
6789cb52
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1/*
2 * adv7180.c Analog Devices ADV7180 video decoder driver
3 * Copyright (c) 2009 Intel Corporation
cccb83f7
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4 * Copyright (C) 2013 Cogent Embedded, Inc.
5 * Copyright (C) 2013 Renesas Solutions Corp.
6789cb52
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6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/interrupt.h>
26#include <linux/i2c.h>
5a0e3ad6 27#include <linux/slab.h>
6789cb52
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28#include <media/v4l2-ioctl.h>
29#include <linux/videodev2.h>
30#include <media/v4l2-device.h>
c9fbeddd 31#include <media/v4l2-ctrls.h>
42752f7a 32#include <linux/mutex.h>
c18818e9 33#include <linux/delay.h>
6789cb52 34
f5dde49b
LPC
35#define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM 0x0
36#define ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1
37#define ADV7180_STD_AD_PAL_N_NTSC_J_SECAM 0x2
38#define ADV7180_STD_AD_PAL_N_NTSC_M_SECAM 0x3
39#define ADV7180_STD_NTSC_J 0x4
40#define ADV7180_STD_NTSC_M 0x5
41#define ADV7180_STD_PAL60 0x6
42#define ADV7180_STD_NTSC_443 0x7
43#define ADV7180_STD_PAL_BG 0x8
44#define ADV7180_STD_PAL_N 0x9
45#define ADV7180_STD_PAL_M 0xa
46#define ADV7180_STD_PAL_M_PED 0xb
47#define ADV7180_STD_PAL_COMB_N 0xc
48#define ADV7180_STD_PAL_COMB_N_PED 0xd
49#define ADV7180_STD_PAL_SECAM 0xe
50#define ADV7180_STD_PAL_SECAM_PED 0xf
51
3999e5d0 52#define ADV7180_REG_INPUT_CONTROL 0x0000
bca7ad1a 53#define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
d3124294 54
3999e5d0 55#define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004
42752f7a 56#define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
6789cb52 57
029d6177 58#define ADV7180_REG_AUTODETECT_ENABLE 0x07
42752f7a 59#define ADV7180_AUTODETECT_DEFAULT 0x7f
c9fbeddd 60/* Contrast */
3999e5d0 61#define ADV7180_REG_CON 0x0008 /*Unsigned */
c9fbeddd
FV
62#define ADV7180_CON_MIN 0
63#define ADV7180_CON_DEF 128
64#define ADV7180_CON_MAX 255
65/* Brightness*/
3999e5d0 66#define ADV7180_REG_BRI 0x000a /*Signed */
c9fbeddd
FV
67#define ADV7180_BRI_MIN -128
68#define ADV7180_BRI_DEF 0
69#define ADV7180_BRI_MAX 127
70/* Hue */
3999e5d0 71#define ADV7180_REG_HUE 0x000b /*Signed, inverted */
c9fbeddd
FV
72#define ADV7180_HUE_MIN -127
73#define ADV7180_HUE_DEF 0
74#define ADV7180_HUE_MAX 128
bca7ad1a 75
3999e5d0 76#define ADV7180_REG_CTRL 0x000e
029d6177 77#define ADV7180_CTRL_IRQ_SPACE 0x20
6789cb52 78
029d6177 79#define ADV7180_REG_PWR_MAN 0x0f
bca7ad1a
FV
80#define ADV7180_PWR_MAN_ON 0x04
81#define ADV7180_PWR_MAN_OFF 0x24
82#define ADV7180_PWR_MAN_RES 0x80
83
3999e5d0 84#define ADV7180_REG_STATUS1 0x0010
d3124294
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85#define ADV7180_STATUS1_IN_LOCK 0x01
86#define ADV7180_STATUS1_AUTOD_MASK 0x70
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87#define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
88#define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
89#define ADV7180_STATUS1_AUTOD_PAL_M 0x20
90#define ADV7180_STATUS1_AUTOD_PAL_60 0x30
91#define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
92#define ADV7180_STATUS1_AUTOD_SECAM 0x50
93#define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
94#define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
95
3999e5d0 96#define ADV7180_REG_IDENT 0x0011
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97#define ADV7180_ID_7180 0x18
98
3999e5d0 99#define ADV7180_REG_ICONF1 0x0040
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100#define ADV7180_ICONF1_ACTIVE_LOW 0x01
101#define ADV7180_ICONF1_PSYNC_ONLY 0x10
102#define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
c9fbeddd 103/* Saturation */
3999e5d0
LPC
104#define ADV7180_REG_SD_SAT_CB 0x00e3 /*Unsigned */
105#define ADV7180_REG_SD_SAT_CR 0x00e4 /*Unsigned */
c9fbeddd
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106#define ADV7180_SAT_MIN 0
107#define ADV7180_SAT_DEF 128
108#define ADV7180_SAT_MAX 255
bca7ad1a 109
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110#define ADV7180_IRQ1_LOCK 0x01
111#define ADV7180_IRQ1_UNLOCK 0x02
3999e5d0
LPC
112#define ADV7180_REG_ISR1 0x0042
113#define ADV7180_REG_ICR1 0x0043
114#define ADV7180_REG_IMR1 0x0044
115#define ADV7180_REG_IMR2 0x0048
42752f7a 116#define ADV7180_IRQ3_AD_CHANGE 0x08
3999e5d0
LPC
117#define ADV7180_REG_ISR3 0x004A
118#define ADV7180_REG_ICR3 0x004B
119#define ADV7180_REG_IMR3 0x004C
029d6177 120#define ADV7180_REG_IMR4 0x50
6789cb52 121
3999e5d0 122#define ADV7180_REG_NTSC_V_BIT_END 0x00E6
bca7ad1a
FV
123#define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
124
f5dde49b
LPC
125#define ADV7180_INPUT_CVBS_AIN1 0x00
126#define ADV7180_INPUT_CVBS_AIN2 0x01
127#define ADV7180_INPUT_CVBS_AIN3 0x02
128#define ADV7180_INPUT_CVBS_AIN4 0x03
129#define ADV7180_INPUT_CVBS_AIN5 0x04
130#define ADV7180_INPUT_CVBS_AIN6 0x05
131#define ADV7180_INPUT_SVIDEO_AIN1_AIN2 0x06
132#define ADV7180_INPUT_SVIDEO_AIN3_AIN4 0x07
133#define ADV7180_INPUT_SVIDEO_AIN5_AIN6 0x08
134#define ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3 0x09
135#define ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6 0x0a
136
137struct adv7180_state;
138
139#define ADV7180_FLAG_RESET_POWERED BIT(0)
140
141struct adv7180_chip_info {
142 unsigned int flags;
143 unsigned int valid_input_mask;
144 int (*set_std)(struct adv7180_state *st, unsigned int std);
145 int (*select_input)(struct adv7180_state *st, unsigned int input);
146 int (*init)(struct adv7180_state *state);
147};
148
6789cb52 149struct adv7180_state {
c9fbeddd 150 struct v4l2_ctrl_handler ctrl_hdl;
c277b60a 151 struct v4l2_subdev sd;
d5d51a82 152 struct media_pad pad;
42752f7a
RR
153 struct mutex mutex; /* mutual excl. when accessing chip */
154 int irq;
c277b60a
RR
155 v4l2_std_id curr_norm;
156 bool autodetect;
e246c333 157 bool powered;
bca7ad1a 158 u8 input;
3999e5d0
LPC
159
160 struct i2c_client *client;
161 unsigned int register_page;
f5dde49b 162 const struct adv7180_chip_info *chip_info;
6789cb52 163};
c9fbeddd
FV
164#define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
165 struct adv7180_state, \
166 ctrl_hdl)->sd)
6789cb52 167
3999e5d0
LPC
168static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
169{
170 if (state->register_page != page) {
171 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
172 page);
173 state->register_page = page;
174 }
175
176 return 0;
177}
178
179static int adv7180_write(struct adv7180_state *state, unsigned int reg,
180 unsigned int value)
181{
182 lockdep_assert_held(&state->mutex);
183 adv7180_select_page(state, reg >> 8);
184 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
185}
186
187static int adv7180_read(struct adv7180_state *state, unsigned int reg)
188{
189 lockdep_assert_held(&state->mutex);
190 adv7180_select_page(state, reg >> 8);
191 return i2c_smbus_read_byte_data(state->client, reg & 0xff);
192}
193
f5dde49b
LPC
194static int adv7180_set_video_standard(struct adv7180_state *state,
195 unsigned int std)
196{
197 return state->chip_info->set_std(state, std);
198}
3999e5d0 199
d3124294 200static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
6789cb52 201{
b294a192
VB
202 /* in case V4L2_IN_ST_NO_SIGNAL */
203 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
204 return V4L2_STD_UNKNOWN;
205
6789cb52
RR
206 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
207 case ADV7180_STATUS1_AUTOD_NTSM_M_J:
d3124294 208 return V4L2_STD_NTSC;
6789cb52
RR
209 case ADV7180_STATUS1_AUTOD_NTSC_4_43:
210 return V4L2_STD_NTSC_443;
211 case ADV7180_STATUS1_AUTOD_PAL_M:
212 return V4L2_STD_PAL_M;
213 case ADV7180_STATUS1_AUTOD_PAL_60:
214 return V4L2_STD_PAL_60;
215 case ADV7180_STATUS1_AUTOD_PAL_B_G:
216 return V4L2_STD_PAL;
217 case ADV7180_STATUS1_AUTOD_SECAM:
218 return V4L2_STD_SECAM;
219 case ADV7180_STATUS1_AUTOD_PAL_COMB:
220 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
221 case ADV7180_STATUS1_AUTOD_SECAM_525:
222 return V4L2_STD_SECAM;
223 default:
224 return V4L2_STD_UNKNOWN;
225 }
226}
227
c277b60a
RR
228static int v4l2_std_to_adv7180(v4l2_std_id std)
229{
230 if (std == V4L2_STD_PAL_60)
f5dde49b 231 return ADV7180_STD_PAL60;
c277b60a 232 if (std == V4L2_STD_NTSC_443)
f5dde49b 233 return ADV7180_STD_NTSC_443;
c277b60a 234 if (std == V4L2_STD_PAL_N)
f5dde49b 235 return ADV7180_STD_PAL_N;
c277b60a 236 if (std == V4L2_STD_PAL_M)
f5dde49b 237 return ADV7180_STD_PAL_M;
c277b60a 238 if (std == V4L2_STD_PAL_Nc)
f5dde49b 239 return ADV7180_STD_PAL_COMB_N;
c277b60a
RR
240
241 if (std & V4L2_STD_PAL)
f5dde49b 242 return ADV7180_STD_PAL_BG;
c277b60a 243 if (std & V4L2_STD_NTSC)
f5dde49b 244 return ADV7180_STD_NTSC_M;
c277b60a 245 if (std & V4L2_STD_SECAM)
f5dde49b 246 return ADV7180_STD_PAL_SECAM;
c277b60a
RR
247
248 return -EINVAL;
249}
250
d3124294
RR
251static u32 adv7180_status_to_v4l2(u8 status1)
252{
253 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
254 return V4L2_IN_ST_NO_SIGNAL;
255
256 return 0;
257}
258
3999e5d0 259static int __adv7180_status(struct adv7180_state *state, u32 *status,
bca7ad1a 260 v4l2_std_id *std)
d3124294 261{
3999e5d0 262 int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
d3124294
RR
263
264 if (status1 < 0)
265 return status1;
266
267 if (status)
268 *status = adv7180_status_to_v4l2(status1);
269 if (std)
270 *std = adv7180_std_to_v4l2(status1);
271
272 return 0;
273}
274
6789cb52
RR
275static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
276{
277 return container_of(sd, struct adv7180_state, sd);
278}
279
280static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
281{
c277b60a 282 struct adv7180_state *state = to_state(sd);
42752f7a
RR
283 int err = mutex_lock_interruptible(&state->mutex);
284 if (err)
285 return err;
c277b60a 286
42752f7a
RR
287 /* when we are interrupt driven we know the state */
288 if (!state->autodetect || state->irq > 0)
c277b60a
RR
289 *std = state->curr_norm;
290 else
3999e5d0 291 err = __adv7180_status(state, NULL, std);
c277b60a 292
42752f7a 293 mutex_unlock(&state->mutex);
c277b60a 294 return err;
d3124294 295}
6789cb52 296
bca7ad1a
FV
297static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
298 u32 output, u32 config)
299{
300 struct adv7180_state *state = to_state(sd);
301 int ret = mutex_lock_interruptible(&state->mutex);
bca7ad1a
FV
302
303 if (ret)
304 return ret;
305
f5dde49b
LPC
306 if (input > 31 || !(BIT(input) & state->chip_info->valid_input_mask)) {
307 ret = -EINVAL;
bca7ad1a 308 goto out;
f5dde49b 309 }
bca7ad1a 310
f5dde49b 311 ret = state->chip_info->select_input(state, input);
bca7ad1a 312
f5dde49b
LPC
313 if (ret == 0)
314 state->input = input;
bca7ad1a
FV
315out:
316 mutex_unlock(&state->mutex);
317 return ret;
318}
319
d3124294
RR
320static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
321{
42752f7a
RR
322 struct adv7180_state *state = to_state(sd);
323 int ret = mutex_lock_interruptible(&state->mutex);
324 if (ret)
325 return ret;
326
3999e5d0 327 ret = __adv7180_status(state, status, NULL);
42752f7a
RR
328 mutex_unlock(&state->mutex);
329 return ret;
6789cb52
RR
330}
331
3e35e33c 332static int adv7180_program_std(struct adv7180_state *state)
c277b60a 333{
3e35e33c 334 int ret;
c277b60a 335
3e35e33c 336 if (state->autodetect) {
f5dde49b
LPC
337 ret = adv7180_set_video_standard(state,
338 ADV7180_STD_AD_PAL_BG_NTSC_J_SECAM);
c277b60a 339 if (ret < 0)
3e35e33c 340 return ret;
c277b60a 341
3999e5d0 342 __adv7180_status(state, NULL, &state->curr_norm);
c277b60a 343 } else {
3e35e33c 344 ret = v4l2_std_to_adv7180(state->curr_norm);
c277b60a 345 if (ret < 0)
3e35e33c 346 return ret;
c277b60a 347
f5dde49b 348 ret = adv7180_set_video_standard(state, ret);
3e35e33c
LPC
349 if (ret < 0)
350 return ret;
351 }
352
353 return 0;
354}
355
356static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
357{
358 struct adv7180_state *state = to_state(sd);
359 int ret = mutex_lock_interruptible(&state->mutex);
360
361 if (ret)
362 return ret;
363
364 /* all standards -> autodetect */
365 if (std == V4L2_STD_ALL) {
366 state->autodetect = true;
367 } else {
368 /* Make sure we can support this std */
369 ret = v4l2_std_to_adv7180(std);
c277b60a
RR
370 if (ret < 0)
371 goto out;
372
373 state->curr_norm = std;
374 state->autodetect = false;
375 }
3e35e33c
LPC
376
377 ret = adv7180_program_std(state);
c277b60a 378out:
42752f7a 379 mutex_unlock(&state->mutex);
c277b60a
RR
380 return ret;
381}
382
3999e5d0 383static int adv7180_set_power(struct adv7180_state *state, bool on)
e246c333
LPC
384{
385 u8 val;
386
387 if (on)
388 val = ADV7180_PWR_MAN_ON;
389 else
390 val = ADV7180_PWR_MAN_OFF;
391
3999e5d0 392 return adv7180_write(state, ADV7180_REG_PWR_MAN, val);
e246c333
LPC
393}
394
395static int adv7180_s_power(struct v4l2_subdev *sd, int on)
396{
397 struct adv7180_state *state = to_state(sd);
e246c333
LPC
398 int ret;
399
400 ret = mutex_lock_interruptible(&state->mutex);
401 if (ret)
402 return ret;
403
3999e5d0 404 ret = adv7180_set_power(state, on);
e246c333
LPC
405 if (ret == 0)
406 state->powered = on;
407
408 mutex_unlock(&state->mutex);
409 return ret;
410}
411
c9fbeddd 412static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
bca7ad1a 413{
c9fbeddd 414 struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
bca7ad1a 415 struct adv7180_state *state = to_state(sd);
bca7ad1a 416 int ret = mutex_lock_interruptible(&state->mutex);
c9fbeddd
FV
417 int val;
418
bca7ad1a
FV
419 if (ret)
420 return ret;
c9fbeddd 421 val = ctrl->val;
bca7ad1a
FV
422 switch (ctrl->id) {
423 case V4L2_CID_BRIGHTNESS:
3999e5d0 424 ret = adv7180_write(state, ADV7180_REG_BRI, val);
bca7ad1a
FV
425 break;
426 case V4L2_CID_HUE:
bca7ad1a 427 /*Hue is inverted according to HSL chart */
3999e5d0 428 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
bca7ad1a
FV
429 break;
430 case V4L2_CID_CONTRAST:
3999e5d0 431 ret = adv7180_write(state, ADV7180_REG_CON, val);
bca7ad1a
FV
432 break;
433 case V4L2_CID_SATURATION:
bca7ad1a
FV
434 /*
435 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
436 *Let's not confuse the user, everybody understands saturation
437 */
3999e5d0 438 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
bca7ad1a
FV
439 if (ret < 0)
440 break;
3999e5d0 441 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
bca7ad1a
FV
442 break;
443 default:
444 ret = -EINVAL;
445 }
446
447 mutex_unlock(&state->mutex);
448 return ret;
449}
450
c9fbeddd
FV
451static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
452 .s_ctrl = adv7180_s_ctrl,
453};
454
455static int adv7180_init_controls(struct adv7180_state *state)
456{
457 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
458
459 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
460 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
461 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
462 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
463 V4L2_CID_CONTRAST, ADV7180_CON_MIN,
464 ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
465 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
466 V4L2_CID_SATURATION, ADV7180_SAT_MIN,
467 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
468 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
469 V4L2_CID_HUE, ADV7180_HUE_MIN,
470 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
471 state->sd.ctrl_handler = &state->ctrl_hdl;
472 if (state->ctrl_hdl.error) {
473 int err = state->ctrl_hdl.error;
474
475 v4l2_ctrl_handler_free(&state->ctrl_hdl);
476 return err;
477 }
478 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
479
480 return 0;
481}
482static void adv7180_exit_controls(struct adv7180_state *state)
483{
484 v4l2_ctrl_handler_free(&state->ctrl_hdl);
485}
486
d5d51a82
LPC
487static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
488 struct v4l2_subdev_fh *fh,
489 struct v4l2_subdev_mbus_code_enum *code)
cccb83f7 490{
d5d51a82 491 if (code->index != 0)
cccb83f7
VB
492 return -EINVAL;
493
d5d51a82 494 code->code = MEDIA_BUS_FMT_YUYV8_2X8;
cccb83f7
VB
495
496 return 0;
497}
498
499static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
500 struct v4l2_mbus_framefmt *fmt)
501{
502 struct adv7180_state *state = to_state(sd);
503
f5fe58fd 504 fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
cccb83f7
VB
505 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
506 fmt->field = V4L2_FIELD_INTERLACED;
507 fmt->width = 720;
508 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
509
510 return 0;
511}
512
d5d51a82
LPC
513static int adv7180_get_pad_format(struct v4l2_subdev *sd,
514 struct v4l2_subdev_fh *fh,
515 struct v4l2_subdev_format *format)
516{
517 return adv7180_mbus_fmt(sd, &format->format);
518}
519
520static int adv7180_set_pad_format(struct v4l2_subdev *sd,
521 struct v4l2_subdev_fh *fh,
522 struct v4l2_subdev_format *format)
523{
524 return adv7180_mbus_fmt(sd, &format->format);
525}
526
cccb83f7
VB
527static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
528 struct v4l2_mbus_config *cfg)
529{
530 /*
531 * The ADV7180 sensor supports BT.601/656 output modes.
532 * The BT.656 is default and not yet configurable by s/w.
533 */
534 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
535 V4L2_MBUS_DATA_ACTIVE_HIGH;
536 cfg->type = V4L2_MBUS_BT656;
537
538 return 0;
539}
540
6789cb52 541static const struct v4l2_subdev_video_ops adv7180_video_ops = {
8774bed9 542 .s_std = adv7180_s_std,
6789cb52 543 .querystd = adv7180_querystd,
d3124294 544 .g_input_status = adv7180_g_input_status,
bca7ad1a 545 .s_routing = adv7180_s_routing,
cccb83f7 546 .g_mbus_config = adv7180_g_mbus_config,
6789cb52
RR
547};
548
f5dde49b 549
6789cb52 550static const struct v4l2_subdev_core_ops adv7180_core_ops = {
e246c333 551 .s_power = adv7180_s_power,
6789cb52
RR
552};
553
d5d51a82
LPC
554static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
555 .enum_mbus_code = adv7180_enum_mbus_code,
556 .set_fmt = adv7180_set_pad_format,
557 .get_fmt = adv7180_get_pad_format,
558};
559
6789cb52
RR
560static const struct v4l2_subdev_ops adv7180_ops = {
561 .core = &adv7180_core_ops,
562 .video = &adv7180_video_ops,
d5d51a82 563 .pad = &adv7180_pad_ops,
6789cb52
RR
564};
565
0c25534d 566static irqreturn_t adv7180_irq(int irq, void *devid)
42752f7a 567{
0c25534d 568 struct adv7180_state *state = devid;
42752f7a
RR
569 u8 isr3;
570
571 mutex_lock(&state->mutex);
3999e5d0 572 isr3 = adv7180_read(state, ADV7180_REG_ISR3);
42752f7a 573 /* clear */
3999e5d0 574 adv7180_write(state, ADV7180_REG_ICR3, isr3);
42752f7a
RR
575
576 if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
3999e5d0 577 __adv7180_status(state, NULL, &state->curr_norm);
42752f7a
RR
578 mutex_unlock(&state->mutex);
579
42752f7a
RR
580 return IRQ_HANDLED;
581}
582
f5dde49b 583static int adv7180_init(struct adv7180_state *state)
6789cb52 584{
6789cb52
RR
585 int ret;
586
42752f7a 587 /* ITU-R BT.656-4 compatible */
3999e5d0 588 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
bca7ad1a 589 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
42752f7a 590 if (ret < 0)
f5dde49b 591 return ret;
bca7ad1a
FV
592
593 /* Manually set V bit end position in NTSC mode */
f5dde49b 594 return adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
bca7ad1a 595 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
f5dde49b
LPC
596}
597
598static int adv7180_set_std(struct adv7180_state *state, unsigned int std)
599{
600 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
601 (std << 4) | state->input);
602}
603
604static int adv7180_select_input(struct adv7180_state *state, unsigned int input)
605{
606 int ret;
607
608 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
bca7ad1a 609 if (ret < 0)
f5dde49b
LPC
610 return ret;
611
612 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
613 ret |= input;
614 return adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret);
615}
616
617static const struct adv7180_chip_info adv7180_info = {
618 .flags = ADV7180_FLAG_RESET_POWERED,
619 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
620 * all inputs and let the card driver take care of validation
621 */
622 .valid_input_mask = BIT(ADV7180_INPUT_CVBS_AIN1) |
623 BIT(ADV7180_INPUT_CVBS_AIN2) |
624 BIT(ADV7180_INPUT_CVBS_AIN3) |
625 BIT(ADV7180_INPUT_CVBS_AIN4) |
626 BIT(ADV7180_INPUT_CVBS_AIN5) |
627 BIT(ADV7180_INPUT_CVBS_AIN6) |
628 BIT(ADV7180_INPUT_SVIDEO_AIN1_AIN2) |
629 BIT(ADV7180_INPUT_SVIDEO_AIN3_AIN4) |
630 BIT(ADV7180_INPUT_SVIDEO_AIN5_AIN6) |
631 BIT(ADV7180_INPUT_YPRPB_AIN1_AIN2_AIN3) |
632 BIT(ADV7180_INPUT_YPRPB_AIN4_AIN5_AIN6),
633 .init = adv7180_init,
634 .set_std = adv7180_set_std,
635 .select_input = adv7180_select_input,
636};
637
638static int init_device(struct adv7180_state *state)
639{
640 int ret;
641
642 mutex_lock(&state->mutex);
643
644 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
645 usleep_range(2000, 10000);
646
647 ret = state->chip_info->init(state);
648 if (ret)
3999e5d0 649 goto out_unlock;
42752f7a 650
f5dde49b
LPC
651 ret = adv7180_program_std(state);
652 if (ret)
653 goto out_unlock;
42752f7a
RR
654
655 /* register for interrupts */
656 if (state->irq > 0) {
42752f7a 657 /* config the Interrupt pin to be active low */
3999e5d0 658 ret = adv7180_write(state, ADV7180_REG_ICONF1,
bca7ad1a
FV
659 ADV7180_ICONF1_ACTIVE_LOW |
660 ADV7180_ICONF1_PSYNC_ONLY);
42752f7a 661 if (ret < 0)
3999e5d0 662 goto out_unlock;
42752f7a 663
3999e5d0 664 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
42752f7a 665 if (ret < 0)
3999e5d0 666 goto out_unlock;
42752f7a 667
3999e5d0 668 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
42752f7a 669 if (ret < 0)
3999e5d0 670 goto out_unlock;
42752f7a
RR
671
672 /* enable AD change interrupts interrupts */
3999e5d0 673 ret = adv7180_write(state, ADV7180_REG_IMR3,
bca7ad1a 674 ADV7180_IRQ3_AD_CHANGE);
42752f7a 675 if (ret < 0)
3999e5d0 676 goto out_unlock;
42752f7a 677
3999e5d0 678 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
42752f7a 679 if (ret < 0)
3999e5d0 680 goto out_unlock;
6789cb52
RR
681 }
682
3999e5d0
LPC
683out_unlock:
684 mutex_unlock(&state->mutex);
df065b37 685
df065b37 686 return ret;
bca7ad1a
FV
687}
688
4c62e976
GKH
689static int adv7180_probe(struct i2c_client *client,
690 const struct i2c_device_id *id)
bca7ad1a
FV
691{
692 struct adv7180_state *state;
693 struct v4l2_subdev *sd;
694 int ret;
695
696 /* Check if the adapter supports the needed features */
697 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
698 return -EIO;
699
700 v4l_info(client, "chip found @ 0x%02x (%s)\n",
701 client->addr, client->adapter->name);
702
c02b211d 703 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
7657e064
FE
704 if (state == NULL)
705 return -ENOMEM;
bca7ad1a 706
3999e5d0 707 state->client = client;
f5dde49b 708 state->chip_info = (struct adv7180_chip_info *)id->driver_data;
3999e5d0 709
bca7ad1a 710 state->irq = client->irq;
bca7ad1a
FV
711 mutex_init(&state->mutex);
712 state->autodetect = true;
f5dde49b
LPC
713 if (state->chip_info->flags & ADV7180_FLAG_RESET_POWERED)
714 state->powered = true;
715 else
716 state->powered = false;
bca7ad1a
FV
717 state->input = 0;
718 sd = &state->sd;
719 v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
d5d51a82 720 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
bca7ad1a 721
c9fbeddd
FV
722 ret = adv7180_init_controls(state);
723 if (ret)
bca7ad1a 724 goto err_unreg_subdev;
d5d51a82
LPC
725
726 state->pad.flags = MEDIA_PAD_FL_SOURCE;
727 sd->entity.flags |= MEDIA_ENT_T_V4L2_SUBDEV_DECODER;
728 ret = media_entity_init(&sd->entity, 1, &state->pad, 0);
c9fbeddd
FV
729 if (ret)
730 goto err_free_ctrl;
fa5b7945 731
d5d51a82
LPC
732 ret = init_device(state);
733 if (ret)
734 goto err_media_entity_cleanup;
735
fa5721d1
LPC
736 if (state->irq) {
737 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
f3e991d4
LPC
738 IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
739 KBUILD_MODNAME, state);
fa5721d1 740 if (ret)
d5d51a82 741 goto err_media_entity_cleanup;
fa5721d1
LPC
742 }
743
fa5b7945
LPC
744 ret = v4l2_async_register_subdev(sd);
745 if (ret)
746 goto err_free_irq;
747
6789cb52 748 return 0;
42752f7a 749
fa5b7945
LPC
750err_free_irq:
751 if (state->irq > 0)
752 free_irq(client->irq, state);
d5d51a82
LPC
753err_media_entity_cleanup:
754 media_entity_cleanup(&sd->entity);
c9fbeddd
FV
755err_free_ctrl:
756 adv7180_exit_controls(state);
42752f7a 757err_unreg_subdev:
297a0ae3 758 mutex_destroy(&state->mutex);
42752f7a 759 return ret;
6789cb52
RR
760}
761
4c62e976 762static int adv7180_remove(struct i2c_client *client)
6789cb52
RR
763{
764 struct v4l2_subdev *sd = i2c_get_clientdata(client);
42752f7a
RR
765 struct adv7180_state *state = to_state(sd);
766
fa5b7945
LPC
767 v4l2_async_unregister_subdev(sd);
768
0c25534d 769 if (state->irq > 0)
42752f7a 770 free_irq(client->irq, state);
6789cb52 771
d5d51a82 772 media_entity_cleanup(&sd->entity);
b13f4af2 773 adv7180_exit_controls(state);
297a0ae3 774 mutex_destroy(&state->mutex);
6789cb52
RR
775 return 0;
776}
777
778static const struct i2c_device_id adv7180_id[] = {
f5dde49b 779 { "adv7180", (kernel_ulong_t)&adv7180_info },
6789cb52
RR
780 {},
781};
f5dde49b 782MODULE_DEVICE_TABLE(i2c, adv7180_id);
6789cb52 783
cc1088dc
LPC
784#ifdef CONFIG_PM_SLEEP
785static int adv7180_suspend(struct device *dev)
bca7ad1a 786{
cc1088dc 787 struct i2c_client *client = to_i2c_client(dev);
e246c333
LPC
788 struct v4l2_subdev *sd = i2c_get_clientdata(client);
789 struct adv7180_state *state = to_state(sd);
bca7ad1a 790
3999e5d0 791 return adv7180_set_power(state, false);
bca7ad1a
FV
792}
793
cc1088dc 794static int adv7180_resume(struct device *dev)
bca7ad1a 795{
cc1088dc 796 struct i2c_client *client = to_i2c_client(dev);
bca7ad1a
FV
797 struct v4l2_subdev *sd = i2c_get_clientdata(client);
798 struct adv7180_state *state = to_state(sd);
799 int ret;
800
3999e5d0 801 ret = init_device(state);
bca7ad1a
FV
802 if (ret < 0)
803 return ret;
c18818e9
LPC
804
805 ret = adv7180_set_power(state, state->powered);
806 if (ret)
807 return ret;
808
bca7ad1a
FV
809 return 0;
810}
cc1088dc
LPC
811
812static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
813#define ADV7180_PM_OPS (&adv7180_pm_ops)
814
815#else
816#define ADV7180_PM_OPS NULL
bca7ad1a
FV
817#endif
818
6789cb52
RR
819static struct i2c_driver adv7180_driver = {
820 .driver = {
bca7ad1a 821 .owner = THIS_MODULE,
c9fbeddd 822 .name = KBUILD_MODNAME,
cc1088dc 823 .pm = ADV7180_PM_OPS,
bca7ad1a
FV
824 },
825 .probe = adv7180_probe,
4c62e976 826 .remove = adv7180_remove,
bca7ad1a 827 .id_table = adv7180_id,
6789cb52
RR
828};
829
c6e8d86f 830module_i2c_driver(adv7180_driver);
6789cb52
RR
831
832MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
833MODULE_AUTHOR("Mocean Laboratories");
834MODULE_LICENSE("GPL v2");