Commit | Line | Data |
---|---|---|
6789cb52 RR |
1 | /* |
2 | * adv7180.c Analog Devices ADV7180 video decoder driver | |
3 | * Copyright (c) 2009 Intel Corporation | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/i2c.h> | |
5a0e3ad6 | 25 | #include <linux/slab.h> |
6789cb52 RR |
26 | #include <media/v4l2-ioctl.h> |
27 | #include <linux/videodev2.h> | |
28 | #include <media/v4l2-device.h> | |
c9fbeddd | 29 | #include <media/v4l2-ctrls.h> |
6789cb52 | 30 | #include <media/v4l2-chip-ident.h> |
42752f7a | 31 | #include <linux/mutex.h> |
6789cb52 | 32 | |
d3124294 RR |
33 | #define ADV7180_INPUT_CONTROL_REG 0x00 |
34 | #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM 0x00 | |
35 | #define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM_PED 0x10 | |
36 | #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_J_SECAM 0x20 | |
37 | #define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_M_SECAM 0x30 | |
38 | #define ADV7180_INPUT_CONTROL_NTSC_J 0x40 | |
39 | #define ADV7180_INPUT_CONTROL_NTSC_M 0x50 | |
40 | #define ADV7180_INPUT_CONTROL_PAL60 0x60 | |
41 | #define ADV7180_INPUT_CONTROL_NTSC_443 0x70 | |
42 | #define ADV7180_INPUT_CONTROL_PAL_BG 0x80 | |
43 | #define ADV7180_INPUT_CONTROL_PAL_N 0x90 | |
44 | #define ADV7180_INPUT_CONTROL_PAL_M 0xa0 | |
45 | #define ADV7180_INPUT_CONTROL_PAL_M_PED 0xb0 | |
46 | #define ADV7180_INPUT_CONTROL_PAL_COMB_N 0xc0 | |
47 | #define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED 0xd0 | |
48 | #define ADV7180_INPUT_CONTROL_PAL_SECAM 0xe0 | |
49 | #define ADV7180_INPUT_CONTROL_PAL_SECAM_PED 0xf0 | |
bca7ad1a | 50 | #define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f |
d3124294 | 51 | |
42752f7a RR |
52 | #define ADV7180_EXTENDED_OUTPUT_CONTROL_REG 0x04 |
53 | #define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5 | |
6789cb52 | 54 | |
42752f7a RR |
55 | #define ADV7180_AUTODETECT_ENABLE_REG 0x07 |
56 | #define ADV7180_AUTODETECT_DEFAULT 0x7f | |
c9fbeddd | 57 | /* Contrast */ |
bca7ad1a | 58 | #define ADV7180_CON_REG 0x08 /*Unsigned */ |
c9fbeddd FV |
59 | #define ADV7180_CON_MIN 0 |
60 | #define ADV7180_CON_DEF 128 | |
61 | #define ADV7180_CON_MAX 255 | |
62 | /* Brightness*/ | |
bca7ad1a | 63 | #define ADV7180_BRI_REG 0x0a /*Signed */ |
c9fbeddd FV |
64 | #define ADV7180_BRI_MIN -128 |
65 | #define ADV7180_BRI_DEF 0 | |
66 | #define ADV7180_BRI_MAX 127 | |
67 | /* Hue */ | |
bca7ad1a | 68 | #define ADV7180_HUE_REG 0x0b /*Signed, inverted */ |
c9fbeddd FV |
69 | #define ADV7180_HUE_MIN -127 |
70 | #define ADV7180_HUE_DEF 0 | |
71 | #define ADV7180_HUE_MAX 128 | |
bca7ad1a | 72 | |
42752f7a RR |
73 | #define ADV7180_ADI_CTRL_REG 0x0e |
74 | #define ADV7180_ADI_CTRL_IRQ_SPACE 0x20 | |
6789cb52 | 75 | |
bca7ad1a FV |
76 | #define ADV7180_PWR_MAN_REG 0x0f |
77 | #define ADV7180_PWR_MAN_ON 0x04 | |
78 | #define ADV7180_PWR_MAN_OFF 0x24 | |
79 | #define ADV7180_PWR_MAN_RES 0x80 | |
80 | ||
d3124294 RR |
81 | #define ADV7180_STATUS1_REG 0x10 |
82 | #define ADV7180_STATUS1_IN_LOCK 0x01 | |
83 | #define ADV7180_STATUS1_AUTOD_MASK 0x70 | |
6789cb52 RR |
84 | #define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00 |
85 | #define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10 | |
86 | #define ADV7180_STATUS1_AUTOD_PAL_M 0x20 | |
87 | #define ADV7180_STATUS1_AUTOD_PAL_60 0x30 | |
88 | #define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40 | |
89 | #define ADV7180_STATUS1_AUTOD_SECAM 0x50 | |
90 | #define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60 | |
91 | #define ADV7180_STATUS1_AUTOD_SECAM_525 0x70 | |
92 | ||
93 | #define ADV7180_IDENT_REG 0x11 | |
94 | #define ADV7180_ID_7180 0x18 | |
95 | ||
42752f7a RR |
96 | #define ADV7180_ICONF1_ADI 0x40 |
97 | #define ADV7180_ICONF1_ACTIVE_LOW 0x01 | |
98 | #define ADV7180_ICONF1_PSYNC_ONLY 0x10 | |
99 | #define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0 | |
c9fbeddd | 100 | /* Saturation */ |
bca7ad1a FV |
101 | #define ADV7180_SD_SAT_CB_REG 0xe3 /*Unsigned */ |
102 | #define ADV7180_SD_SAT_CR_REG 0xe4 /*Unsigned */ | |
c9fbeddd FV |
103 | #define ADV7180_SAT_MIN 0 |
104 | #define ADV7180_SAT_DEF 128 | |
105 | #define ADV7180_SAT_MAX 255 | |
bca7ad1a | 106 | |
42752f7a RR |
107 | #define ADV7180_IRQ1_LOCK 0x01 |
108 | #define ADV7180_IRQ1_UNLOCK 0x02 | |
109 | #define ADV7180_ISR1_ADI 0x42 | |
110 | #define ADV7180_ICR1_ADI 0x43 | |
111 | #define ADV7180_IMR1_ADI 0x44 | |
112 | #define ADV7180_IMR2_ADI 0x48 | |
113 | #define ADV7180_IRQ3_AD_CHANGE 0x08 | |
114 | #define ADV7180_ISR3_ADI 0x4A | |
115 | #define ADV7180_ICR3_ADI 0x4B | |
116 | #define ADV7180_IMR3_ADI 0x4C | |
117 | #define ADV7180_IMR4_ADI 0x50 | |
6789cb52 | 118 | |
bca7ad1a FV |
119 | #define ADV7180_NTSC_V_BIT_END_REG 0xE6 |
120 | #define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F | |
121 | ||
6789cb52 | 122 | struct adv7180_state { |
c9fbeddd | 123 | struct v4l2_ctrl_handler ctrl_hdl; |
c277b60a | 124 | struct v4l2_subdev sd; |
42752f7a RR |
125 | struct work_struct work; |
126 | struct mutex mutex; /* mutual excl. when accessing chip */ | |
127 | int irq; | |
c277b60a RR |
128 | v4l2_std_id curr_norm; |
129 | bool autodetect; | |
bca7ad1a | 130 | u8 input; |
6789cb52 | 131 | }; |
c9fbeddd FV |
132 | #define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \ |
133 | struct adv7180_state, \ | |
134 | ctrl_hdl)->sd) | |
6789cb52 | 135 | |
d3124294 | 136 | static v4l2_std_id adv7180_std_to_v4l2(u8 status1) |
6789cb52 | 137 | { |
6789cb52 RR |
138 | switch (status1 & ADV7180_STATUS1_AUTOD_MASK) { |
139 | case ADV7180_STATUS1_AUTOD_NTSM_M_J: | |
d3124294 | 140 | return V4L2_STD_NTSC; |
6789cb52 RR |
141 | case ADV7180_STATUS1_AUTOD_NTSC_4_43: |
142 | return V4L2_STD_NTSC_443; | |
143 | case ADV7180_STATUS1_AUTOD_PAL_M: | |
144 | return V4L2_STD_PAL_M; | |
145 | case ADV7180_STATUS1_AUTOD_PAL_60: | |
146 | return V4L2_STD_PAL_60; | |
147 | case ADV7180_STATUS1_AUTOD_PAL_B_G: | |
148 | return V4L2_STD_PAL; | |
149 | case ADV7180_STATUS1_AUTOD_SECAM: | |
150 | return V4L2_STD_SECAM; | |
151 | case ADV7180_STATUS1_AUTOD_PAL_COMB: | |
152 | return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N; | |
153 | case ADV7180_STATUS1_AUTOD_SECAM_525: | |
154 | return V4L2_STD_SECAM; | |
155 | default: | |
156 | return V4L2_STD_UNKNOWN; | |
157 | } | |
158 | } | |
159 | ||
c277b60a RR |
160 | static int v4l2_std_to_adv7180(v4l2_std_id std) |
161 | { | |
162 | if (std == V4L2_STD_PAL_60) | |
163 | return ADV7180_INPUT_CONTROL_PAL60; | |
164 | if (std == V4L2_STD_NTSC_443) | |
165 | return ADV7180_INPUT_CONTROL_NTSC_443; | |
166 | if (std == V4L2_STD_PAL_N) | |
167 | return ADV7180_INPUT_CONTROL_PAL_N; | |
168 | if (std == V4L2_STD_PAL_M) | |
169 | return ADV7180_INPUT_CONTROL_PAL_M; | |
170 | if (std == V4L2_STD_PAL_Nc) | |
171 | return ADV7180_INPUT_CONTROL_PAL_COMB_N; | |
172 | ||
173 | if (std & V4L2_STD_PAL) | |
174 | return ADV7180_INPUT_CONTROL_PAL_BG; | |
175 | if (std & V4L2_STD_NTSC) | |
176 | return ADV7180_INPUT_CONTROL_NTSC_M; | |
177 | if (std & V4L2_STD_SECAM) | |
178 | return ADV7180_INPUT_CONTROL_PAL_SECAM; | |
179 | ||
180 | return -EINVAL; | |
181 | } | |
182 | ||
d3124294 RR |
183 | static u32 adv7180_status_to_v4l2(u8 status1) |
184 | { | |
185 | if (!(status1 & ADV7180_STATUS1_IN_LOCK)) | |
186 | return V4L2_IN_ST_NO_SIGNAL; | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | static int __adv7180_status(struct i2c_client *client, u32 *status, | |
bca7ad1a | 192 | v4l2_std_id *std) |
d3124294 RR |
193 | { |
194 | int status1 = i2c_smbus_read_byte_data(client, ADV7180_STATUS1_REG); | |
195 | ||
196 | if (status1 < 0) | |
197 | return status1; | |
198 | ||
199 | if (status) | |
200 | *status = adv7180_status_to_v4l2(status1); | |
201 | if (std) | |
202 | *std = adv7180_std_to_v4l2(status1); | |
203 | ||
204 | return 0; | |
205 | } | |
206 | ||
6789cb52 RR |
207 | static inline struct adv7180_state *to_state(struct v4l2_subdev *sd) |
208 | { | |
209 | return container_of(sd, struct adv7180_state, sd); | |
210 | } | |
211 | ||
212 | static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) | |
213 | { | |
c277b60a | 214 | struct adv7180_state *state = to_state(sd); |
42752f7a RR |
215 | int err = mutex_lock_interruptible(&state->mutex); |
216 | if (err) | |
217 | return err; | |
c277b60a | 218 | |
42752f7a RR |
219 | /* when we are interrupt driven we know the state */ |
220 | if (!state->autodetect || state->irq > 0) | |
c277b60a RR |
221 | *std = state->curr_norm; |
222 | else | |
223 | err = __adv7180_status(v4l2_get_subdevdata(sd), NULL, std); | |
224 | ||
42752f7a | 225 | mutex_unlock(&state->mutex); |
c277b60a | 226 | return err; |
d3124294 | 227 | } |
6789cb52 | 228 | |
bca7ad1a FV |
229 | static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input, |
230 | u32 output, u32 config) | |
231 | { | |
232 | struct adv7180_state *state = to_state(sd); | |
233 | int ret = mutex_lock_interruptible(&state->mutex); | |
234 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
235 | ||
236 | if (ret) | |
237 | return ret; | |
238 | ||
c9fbeddd | 239 | /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept |
bca7ad1a FV |
240 | * all inputs and let the card driver take care of validation |
241 | */ | |
242 | if ((input & ADV7180_INPUT_CONTROL_INSEL_MASK) != input) | |
243 | goto out; | |
244 | ||
245 | ret = i2c_smbus_read_byte_data(client, ADV7180_INPUT_CONTROL_REG); | |
246 | ||
247 | if (ret < 0) | |
248 | goto out; | |
249 | ||
250 | ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK; | |
251 | ret = i2c_smbus_write_byte_data(client, | |
252 | ADV7180_INPUT_CONTROL_REG, ret | input); | |
253 | state->input = input; | |
254 | out: | |
255 | mutex_unlock(&state->mutex); | |
256 | return ret; | |
257 | } | |
258 | ||
d3124294 RR |
259 | static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status) |
260 | { | |
42752f7a RR |
261 | struct adv7180_state *state = to_state(sd); |
262 | int ret = mutex_lock_interruptible(&state->mutex); | |
263 | if (ret) | |
264 | return ret; | |
265 | ||
266 | ret = __adv7180_status(v4l2_get_subdevdata(sd), status, NULL); | |
267 | mutex_unlock(&state->mutex); | |
268 | return ret; | |
6789cb52 RR |
269 | } |
270 | ||
271 | static int adv7180_g_chip_ident(struct v4l2_subdev *sd, | |
bca7ad1a | 272 | struct v4l2_dbg_chip_ident *chip) |
6789cb52 RR |
273 | { |
274 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
275 | ||
276 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7180, 0); | |
277 | } | |
278 | ||
c277b60a RR |
279 | static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
280 | { | |
281 | struct adv7180_state *state = to_state(sd); | |
282 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
42752f7a RR |
283 | int ret = mutex_lock_interruptible(&state->mutex); |
284 | if (ret) | |
285 | return ret; | |
c277b60a RR |
286 | |
287 | /* all standards -> autodetect */ | |
288 | if (std == V4L2_STD_ALL) { | |
bca7ad1a FV |
289 | ret = |
290 | i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG, | |
291 | ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM | |
292 | | state->input); | |
c277b60a RR |
293 | if (ret < 0) |
294 | goto out; | |
295 | ||
42752f7a | 296 | __adv7180_status(client, NULL, &state->curr_norm); |
c277b60a RR |
297 | state->autodetect = true; |
298 | } else { | |
299 | ret = v4l2_std_to_adv7180(std); | |
300 | if (ret < 0) | |
301 | goto out; | |
302 | ||
303 | ret = i2c_smbus_write_byte_data(client, | |
bca7ad1a FV |
304 | ADV7180_INPUT_CONTROL_REG, |
305 | ret | state->input); | |
c277b60a RR |
306 | if (ret < 0) |
307 | goto out; | |
308 | ||
309 | state->curr_norm = std; | |
310 | state->autodetect = false; | |
311 | } | |
312 | ret = 0; | |
313 | out: | |
42752f7a | 314 | mutex_unlock(&state->mutex); |
c277b60a RR |
315 | return ret; |
316 | } | |
317 | ||
c9fbeddd | 318 | static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl) |
bca7ad1a | 319 | { |
c9fbeddd | 320 | struct v4l2_subdev *sd = to_adv7180_sd(ctrl); |
bca7ad1a FV |
321 | struct adv7180_state *state = to_state(sd); |
322 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
323 | int ret = mutex_lock_interruptible(&state->mutex); | |
c9fbeddd FV |
324 | int val; |
325 | ||
bca7ad1a FV |
326 | if (ret) |
327 | return ret; | |
c9fbeddd | 328 | val = ctrl->val; |
bca7ad1a FV |
329 | switch (ctrl->id) { |
330 | case V4L2_CID_BRIGHTNESS: | |
c9fbeddd | 331 | ret = i2c_smbus_write_byte_data(client, ADV7180_BRI_REG, val); |
bca7ad1a FV |
332 | break; |
333 | case V4L2_CID_HUE: | |
bca7ad1a | 334 | /*Hue is inverted according to HSL chart */ |
c9fbeddd | 335 | ret = i2c_smbus_write_byte_data(client, ADV7180_HUE_REG, -val); |
bca7ad1a FV |
336 | break; |
337 | case V4L2_CID_CONTRAST: | |
c9fbeddd | 338 | ret = i2c_smbus_write_byte_data(client, ADV7180_CON_REG, val); |
bca7ad1a FV |
339 | break; |
340 | case V4L2_CID_SATURATION: | |
bca7ad1a FV |
341 | /* |
342 | *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE | |
343 | *Let's not confuse the user, everybody understands saturation | |
344 | */ | |
c9fbeddd FV |
345 | ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CB_REG, |
346 | val); | |
bca7ad1a FV |
347 | if (ret < 0) |
348 | break; | |
c9fbeddd FV |
349 | ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CR_REG, |
350 | val); | |
bca7ad1a FV |
351 | break; |
352 | default: | |
353 | ret = -EINVAL; | |
354 | } | |
355 | ||
356 | mutex_unlock(&state->mutex); | |
357 | return ret; | |
358 | } | |
359 | ||
c9fbeddd FV |
360 | static const struct v4l2_ctrl_ops adv7180_ctrl_ops = { |
361 | .s_ctrl = adv7180_s_ctrl, | |
362 | }; | |
363 | ||
364 | static int adv7180_init_controls(struct adv7180_state *state) | |
365 | { | |
366 | v4l2_ctrl_handler_init(&state->ctrl_hdl, 4); | |
367 | ||
368 | v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, | |
369 | V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN, | |
370 | ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF); | |
371 | v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, | |
372 | V4L2_CID_CONTRAST, ADV7180_CON_MIN, | |
373 | ADV7180_CON_MAX, 1, ADV7180_CON_DEF); | |
374 | v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, | |
375 | V4L2_CID_SATURATION, ADV7180_SAT_MIN, | |
376 | ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF); | |
377 | v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops, | |
378 | V4L2_CID_HUE, ADV7180_HUE_MIN, | |
379 | ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF); | |
380 | state->sd.ctrl_handler = &state->ctrl_hdl; | |
381 | if (state->ctrl_hdl.error) { | |
382 | int err = state->ctrl_hdl.error; | |
383 | ||
384 | v4l2_ctrl_handler_free(&state->ctrl_hdl); | |
385 | return err; | |
386 | } | |
387 | v4l2_ctrl_handler_setup(&state->ctrl_hdl); | |
388 | ||
389 | return 0; | |
390 | } | |
391 | static void adv7180_exit_controls(struct adv7180_state *state) | |
392 | { | |
393 | v4l2_ctrl_handler_free(&state->ctrl_hdl); | |
394 | } | |
395 | ||
6789cb52 RR |
396 | static const struct v4l2_subdev_video_ops adv7180_video_ops = { |
397 | .querystd = adv7180_querystd, | |
d3124294 | 398 | .g_input_status = adv7180_g_input_status, |
bca7ad1a | 399 | .s_routing = adv7180_s_routing, |
6789cb52 RR |
400 | }; |
401 | ||
402 | static const struct v4l2_subdev_core_ops adv7180_core_ops = { | |
403 | .g_chip_ident = adv7180_g_chip_ident, | |
c277b60a | 404 | .s_std = adv7180_s_std, |
c9fbeddd FV |
405 | .queryctrl = v4l2_subdev_queryctrl, |
406 | .g_ctrl = v4l2_subdev_g_ctrl, | |
407 | .s_ctrl = v4l2_subdev_s_ctrl, | |
6789cb52 RR |
408 | }; |
409 | ||
410 | static const struct v4l2_subdev_ops adv7180_ops = { | |
411 | .core = &adv7180_core_ops, | |
412 | .video = &adv7180_video_ops, | |
413 | }; | |
414 | ||
42752f7a RR |
415 | static void adv7180_work(struct work_struct *work) |
416 | { | |
417 | struct adv7180_state *state = container_of(work, struct adv7180_state, | |
bca7ad1a | 418 | work); |
42752f7a RR |
419 | struct i2c_client *client = v4l2_get_subdevdata(&state->sd); |
420 | u8 isr3; | |
421 | ||
422 | mutex_lock(&state->mutex); | |
423 | i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, | |
bca7ad1a | 424 | ADV7180_ADI_CTRL_IRQ_SPACE); |
42752f7a RR |
425 | isr3 = i2c_smbus_read_byte_data(client, ADV7180_ISR3_ADI); |
426 | /* clear */ | |
427 | i2c_smbus_write_byte_data(client, ADV7180_ICR3_ADI, isr3); | |
428 | i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, 0); | |
429 | ||
430 | if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect) | |
431 | __adv7180_status(client, NULL, &state->curr_norm); | |
432 | mutex_unlock(&state->mutex); | |
433 | ||
434 | enable_irq(state->irq); | |
435 | } | |
436 | ||
437 | static irqreturn_t adv7180_irq(int irq, void *devid) | |
438 | { | |
439 | struct adv7180_state *state = devid; | |
440 | ||
441 | schedule_work(&state->work); | |
442 | ||
443 | disable_irq_nosync(state->irq); | |
444 | ||
445 | return IRQ_HANDLED; | |
446 | } | |
447 | ||
bca7ad1a | 448 | static int init_device(struct i2c_client *client, struct adv7180_state *state) |
6789cb52 | 449 | { |
6789cb52 RR |
450 | int ret; |
451 | ||
6789cb52 | 452 | /* Initialize adv7180 */ |
42752f7a | 453 | /* Enable autodetection */ |
bca7ad1a FV |
454 | if (state->autodetect) { |
455 | ret = | |
456 | i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG, | |
457 | ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM | |
458 | | state->input); | |
459 | if (ret < 0) | |
460 | return ret; | |
42752f7a | 461 | |
bca7ad1a FV |
462 | ret = |
463 | i2c_smbus_write_byte_data(client, | |
464 | ADV7180_AUTODETECT_ENABLE_REG, | |
465 | ADV7180_AUTODETECT_DEFAULT); | |
466 | if (ret < 0) | |
467 | return ret; | |
468 | } else { | |
469 | ret = v4l2_std_to_adv7180(state->curr_norm); | |
470 | if (ret < 0) | |
471 | return ret; | |
42752f7a | 472 | |
bca7ad1a FV |
473 | ret = |
474 | i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG, | |
475 | ret | state->input); | |
476 | if (ret < 0) | |
477 | return ret; | |
478 | ||
479 | } | |
42752f7a RR |
480 | /* ITU-R BT.656-4 compatible */ |
481 | ret = i2c_smbus_write_byte_data(client, | |
bca7ad1a FV |
482 | ADV7180_EXTENDED_OUTPUT_CONTROL_REG, |
483 | ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS); | |
42752f7a | 484 | if (ret < 0) |
bca7ad1a FV |
485 | return ret; |
486 | ||
487 | /* Manually set V bit end position in NTSC mode */ | |
488 | ret = i2c_smbus_write_byte_data(client, | |
489 | ADV7180_NTSC_V_BIT_END_REG, | |
490 | ADV7180_NTSC_V_BIT_END_MANUAL_NVEND); | |
491 | if (ret < 0) | |
492 | return ret; | |
42752f7a RR |
493 | |
494 | /* read current norm */ | |
495 | __adv7180_status(client, NULL, &state->curr_norm); | |
496 | ||
497 | /* register for interrupts */ | |
498 | if (state->irq > 0) { | |
c9fbeddd | 499 | ret = request_irq(state->irq, adv7180_irq, 0, KBUILD_MODNAME, |
bca7ad1a | 500 | state); |
42752f7a | 501 | if (ret) |
bca7ad1a | 502 | return ret; |
42752f7a RR |
503 | |
504 | ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, | |
bca7ad1a | 505 | ADV7180_ADI_CTRL_IRQ_SPACE); |
42752f7a | 506 | if (ret < 0) |
bca7ad1a | 507 | return ret; |
42752f7a RR |
508 | |
509 | /* config the Interrupt pin to be active low */ | |
510 | ret = i2c_smbus_write_byte_data(client, ADV7180_ICONF1_ADI, | |
bca7ad1a FV |
511 | ADV7180_ICONF1_ACTIVE_LOW | |
512 | ADV7180_ICONF1_PSYNC_ONLY); | |
42752f7a | 513 | if (ret < 0) |
bca7ad1a | 514 | return ret; |
42752f7a RR |
515 | |
516 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR1_ADI, 0); | |
517 | if (ret < 0) | |
bca7ad1a | 518 | return ret; |
42752f7a RR |
519 | |
520 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR2_ADI, 0); | |
521 | if (ret < 0) | |
bca7ad1a | 522 | return ret; |
42752f7a RR |
523 | |
524 | /* enable AD change interrupts interrupts */ | |
525 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR3_ADI, | |
bca7ad1a | 526 | ADV7180_IRQ3_AD_CHANGE); |
42752f7a | 527 | if (ret < 0) |
bca7ad1a | 528 | return ret; |
42752f7a RR |
529 | |
530 | ret = i2c_smbus_write_byte_data(client, ADV7180_IMR4_ADI, 0); | |
531 | if (ret < 0) | |
bca7ad1a | 532 | return ret; |
42752f7a RR |
533 | |
534 | ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, | |
bca7ad1a | 535 | 0); |
42752f7a | 536 | if (ret < 0) |
bca7ad1a | 537 | return ret; |
6789cb52 RR |
538 | } |
539 | ||
bca7ad1a FV |
540 | return 0; |
541 | } | |
542 | ||
543 | static __devinit int adv7180_probe(struct i2c_client *client, | |
544 | const struct i2c_device_id *id) | |
545 | { | |
546 | struct adv7180_state *state; | |
547 | struct v4l2_subdev *sd; | |
548 | int ret; | |
549 | ||
550 | /* Check if the adapter supports the needed features */ | |
551 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
552 | return -EIO; | |
553 | ||
554 | v4l_info(client, "chip found @ 0x%02x (%s)\n", | |
555 | client->addr, client->adapter->name); | |
556 | ||
557 | state = kzalloc(sizeof(struct adv7180_state), GFP_KERNEL); | |
558 | if (state == NULL) { | |
559 | ret = -ENOMEM; | |
560 | goto err; | |
561 | } | |
562 | ||
563 | state->irq = client->irq; | |
564 | INIT_WORK(&state->work, adv7180_work); | |
565 | mutex_init(&state->mutex); | |
566 | state->autodetect = true; | |
bca7ad1a FV |
567 | state->input = 0; |
568 | sd = &state->sd; | |
569 | v4l2_i2c_subdev_init(sd, client, &adv7180_ops); | |
570 | ||
c9fbeddd FV |
571 | ret = adv7180_init_controls(state); |
572 | if (ret) | |
bca7ad1a | 573 | goto err_unreg_subdev; |
c9fbeddd FV |
574 | ret = init_device(client, state); |
575 | if (ret) | |
576 | goto err_free_ctrl; | |
6789cb52 | 577 | return 0; |
42752f7a | 578 | |
c9fbeddd FV |
579 | err_free_ctrl: |
580 | adv7180_exit_controls(state); | |
42752f7a RR |
581 | err_unreg_subdev: |
582 | mutex_destroy(&state->mutex); | |
583 | v4l2_device_unregister_subdev(sd); | |
584 | kfree(state); | |
585 | err: | |
c9fbeddd | 586 | printk(KERN_ERR KBUILD_MODNAME ": Failed to probe: %d\n", ret); |
42752f7a | 587 | return ret; |
6789cb52 RR |
588 | } |
589 | ||
527aebf2 | 590 | static __devexit int adv7180_remove(struct i2c_client *client) |
6789cb52 RR |
591 | { |
592 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
42752f7a RR |
593 | struct adv7180_state *state = to_state(sd); |
594 | ||
595 | if (state->irq > 0) { | |
596 | free_irq(client->irq, state); | |
597 | if (cancel_work_sync(&state->work)) { | |
598 | /* | |
599 | * Work was pending, therefore we need to enable | |
600 | * IRQ here to balance the disable_irq() done in the | |
601 | * interrupt handler. | |
602 | */ | |
603 | enable_irq(state->irq); | |
604 | } | |
605 | } | |
6789cb52 | 606 | |
42752f7a | 607 | mutex_destroy(&state->mutex); |
6789cb52 RR |
608 | v4l2_device_unregister_subdev(sd); |
609 | kfree(to_state(sd)); | |
610 | return 0; | |
611 | } | |
612 | ||
613 | static const struct i2c_device_id adv7180_id[] = { | |
c9fbeddd | 614 | {KBUILD_MODNAME, 0}, |
6789cb52 RR |
615 | {}, |
616 | }; | |
617 | ||
bca7ad1a FV |
618 | #ifdef CONFIG_PM |
619 | static int adv7180_suspend(struct i2c_client *client, pm_message_t state) | |
620 | { | |
621 | int ret; | |
622 | ||
623 | ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG, | |
624 | ADV7180_PWR_MAN_OFF); | |
625 | if (ret < 0) | |
626 | return ret; | |
627 | return 0; | |
628 | } | |
629 | ||
630 | static int adv7180_resume(struct i2c_client *client) | |
631 | { | |
632 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
633 | struct adv7180_state *state = to_state(sd); | |
634 | int ret; | |
635 | ||
636 | ret = i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG, | |
637 | ADV7180_PWR_MAN_ON); | |
638 | if (ret < 0) | |
639 | return ret; | |
640 | ret = init_device(client, state); | |
641 | if (ret < 0) | |
642 | return ret; | |
643 | return 0; | |
644 | } | |
645 | #endif | |
646 | ||
6789cb52 RR |
647 | MODULE_DEVICE_TABLE(i2c, adv7180_id); |
648 | ||
649 | static struct i2c_driver adv7180_driver = { | |
650 | .driver = { | |
bca7ad1a | 651 | .owner = THIS_MODULE, |
c9fbeddd | 652 | .name = KBUILD_MODNAME, |
bca7ad1a FV |
653 | }, |
654 | .probe = adv7180_probe, | |
655 | .remove = __devexit_p(adv7180_remove), | |
656 | #ifdef CONFIG_PM | |
657 | .suspend = adv7180_suspend, | |
658 | .resume = adv7180_resume, | |
659 | #endif | |
660 | .id_table = adv7180_id, | |
6789cb52 RR |
661 | }; |
662 | ||
c6e8d86f | 663 | module_i2c_driver(adv7180_driver); |
6789cb52 RR |
664 | |
665 | MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver"); | |
666 | MODULE_AUTHOR("Mocean Laboratories"); | |
667 | MODULE_LICENSE("GPL v2"); |