Commit | Line | Data |
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6fef4fc7 KD |
1 | /* |
2 | Montage Technology TS2020 - Silicon Tuner driver | |
3 | Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com> | |
4 | ||
5 | Copyright (C) 2009-2012 TurboSight.com | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
fada1935 | 22 | #include <media/dvb_frontend.h> |
6fef4fc7 | 23 | #include "ts2020.h" |
f158cbce | 24 | #include <linux/regmap.h> |
87b09bd0 | 25 | #include <linux/math64.h> |
6fef4fc7 KD |
26 | |
27 | #define TS2020_XTAL_FREQ 27000 /* in kHz */ | |
b858c331 | 28 | #define FREQ_OFFSET_LOW_SYM_RATE 3000 |
6fef4fc7 | 29 | |
b858c331 | 30 | struct ts2020_priv { |
e6ad9ce3 | 31 | struct i2c_client *client; |
f158cbce AP |
32 | struct mutex regmap_mutex; |
33 | struct regmap_config regmap_config; | |
34 | struct regmap *regmap; | |
dc245a5f | 35 | struct dvb_frontend *fe; |
3366cd5d | 36 | struct delayed_work stat_work; |
0f91c9d6 | 37 | int (*get_agc_pwm)(struct dvb_frontend *fe, u8 *_agc_pwm); |
b858c331 | 38 | /* i2c details */ |
6fef4fc7 | 39 | struct i2c_adapter *i2c; |
3366cd5d | 40 | int i2c_address; |
0f20baad | 41 | bool loop_through:1; |
abd9025b AP |
42 | u8 clk_out:2; |
43 | u8 clk_out_div:5; | |
c7275ae1 | 44 | bool dont_poll:1; |
af9d5255 AP |
45 | u32 frequency_div; /* LO output divider switch frequency */ |
46 | u32 frequency_khz; /* actual used LO frequency */ | |
abd9025b AP |
47 | #define TS2020_M88TS2020 0 |
48 | #define TS2020_M88TS2022 1 | |
49 | u8 tuner; | |
abd9025b AP |
50 | }; |
51 | ||
52 | struct ts2020_reg_val { | |
53 | u8 reg; | |
54 | u8 val; | |
6fef4fc7 KD |
55 | }; |
56 | ||
c7275ae1 DH |
57 | static void ts2020_stat_work(struct work_struct *work); |
58 | ||
194ced7a | 59 | static void ts2020_release(struct dvb_frontend *fe) |
6fef4fc7 | 60 | { |
e6ad9ce3 AP |
61 | struct ts2020_priv *priv = fe->tuner_priv; |
62 | struct i2c_client *client = priv->client; | |
63 | ||
64 | dev_dbg(&client->dev, "\n"); | |
65 | ||
66 | i2c_unregister_device(client); | |
b858c331 IL |
67 | } |
68 | ||
b858c331 | 69 | static int ts2020_sleep(struct dvb_frontend *fe) |
6fef4fc7 | 70 | { |
b858c331 | 71 | struct ts2020_priv *priv = fe->tuner_priv; |
3366cd5d | 72 | int ret; |
b3226f96 | 73 | u8 u8tmp; |
6fef4fc7 | 74 | |
b3226f96 AP |
75 | if (priv->tuner == TS2020_M88TS2020) |
76 | u8tmp = 0x0a; /* XXX: probably wrong */ | |
77 | else | |
78 | u8tmp = 0x00; | |
6fef4fc7 | 79 | |
3366cd5d DH |
80 | ret = regmap_write(priv->regmap, u8tmp, 0x00); |
81 | if (ret < 0) | |
82 | return ret; | |
83 | ||
84 | /* stop statistics polling */ | |
c7275ae1 DH |
85 | if (!priv->dont_poll) |
86 | cancel_delayed_work_sync(&priv->stat_work); | |
3366cd5d | 87 | return 0; |
6fef4fc7 KD |
88 | } |
89 | ||
90 | static int ts2020_init(struct dvb_frontend *fe) | |
91 | { | |
3366cd5d | 92 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
b858c331 | 93 | struct ts2020_priv *priv = fe->tuner_priv; |
abd9025b AP |
94 | int i; |
95 | u8 u8tmp; | |
96 | ||
97 | if (priv->tuner == TS2020_M88TS2020) { | |
f158cbce AP |
98 | regmap_write(priv->regmap, 0x42, 0x73); |
99 | regmap_write(priv->regmap, 0x05, priv->clk_out_div); | |
100 | regmap_write(priv->regmap, 0x20, 0x27); | |
101 | regmap_write(priv->regmap, 0x07, 0x02); | |
102 | regmap_write(priv->regmap, 0x11, 0xff); | |
103 | regmap_write(priv->regmap, 0x60, 0xf9); | |
104 | regmap_write(priv->regmap, 0x08, 0x01); | |
105 | regmap_write(priv->regmap, 0x00, 0x41); | |
abd9025b AP |
106 | } else { |
107 | static const struct ts2020_reg_val reg_vals[] = { | |
108 | {0x7d, 0x9d}, | |
109 | {0x7c, 0x9a}, | |
110 | {0x7a, 0x76}, | |
111 | {0x3b, 0x01}, | |
112 | {0x63, 0x88}, | |
113 | {0x61, 0x85}, | |
114 | {0x22, 0x30}, | |
115 | {0x30, 0x40}, | |
116 | {0x20, 0x23}, | |
117 | {0x24, 0x02}, | |
118 | {0x12, 0xa0}, | |
119 | }; | |
120 | ||
f158cbce AP |
121 | regmap_write(priv->regmap, 0x00, 0x01); |
122 | regmap_write(priv->regmap, 0x00, 0x03); | |
abd9025b AP |
123 | |
124 | switch (priv->clk_out) { | |
125 | case TS2020_CLK_OUT_DISABLED: | |
126 | u8tmp = 0x60; | |
127 | break; | |
128 | case TS2020_CLK_OUT_ENABLED: | |
129 | u8tmp = 0x70; | |
f158cbce | 130 | regmap_write(priv->regmap, 0x05, priv->clk_out_div); |
abd9025b AP |
131 | break; |
132 | case TS2020_CLK_OUT_ENABLED_XTALOUT: | |
133 | u8tmp = 0x6c; | |
134 | break; | |
135 | default: | |
136 | u8tmp = 0x60; | |
137 | break; | |
138 | } | |
139 | ||
f158cbce | 140 | regmap_write(priv->regmap, 0x42, u8tmp); |
abd9025b AP |
141 | |
142 | if (priv->loop_through) | |
143 | u8tmp = 0xec; | |
144 | else | |
145 | u8tmp = 0x6c; | |
b858c331 | 146 | |
f158cbce | 147 | regmap_write(priv->regmap, 0x62, u8tmp); |
abd9025b AP |
148 | |
149 | for (i = 0; i < ARRAY_SIZE(reg_vals); i++) | |
f158cbce AP |
150 | regmap_write(priv->regmap, reg_vals[i].reg, |
151 | reg_vals[i].val); | |
abd9025b | 152 | } |
b858c331 | 153 | |
3366cd5d DH |
154 | /* Initialise v5 stats here */ |
155 | c->strength.len = 1; | |
156 | c->strength.stat[0].scale = FE_SCALE_DECIBEL; | |
157 | c->strength.stat[0].uvalue = 0; | |
158 | ||
c7275ae1 DH |
159 | /* Start statistics polling by invoking the work function */ |
160 | ts2020_stat_work(&priv->stat_work.work); | |
6fef4fc7 KD |
161 | return 0; |
162 | } | |
163 | ||
b858c331 | 164 | static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset) |
6fef4fc7 | 165 | { |
f158cbce | 166 | struct ts2020_priv *priv = fe->tuner_priv; |
b858c331 | 167 | int ret; |
f158cbce AP |
168 | ret = regmap_write(priv->regmap, 0x51, 0x1f - offset); |
169 | ret |= regmap_write(priv->regmap, 0x51, 0x1f); | |
170 | ret |= regmap_write(priv->regmap, 0x50, offset); | |
171 | ret |= regmap_write(priv->regmap, 0x50, 0x00); | |
b858c331 IL |
172 | msleep(20); |
173 | return ret; | |
174 | } | |
6fef4fc7 | 175 | |
b858c331 IL |
176 | static int ts2020_set_tuner_rf(struct dvb_frontend *fe) |
177 | { | |
f158cbce AP |
178 | struct ts2020_priv *dev = fe->tuner_priv; |
179 | int ret; | |
180 | unsigned int utmp; | |
181 | ||
182 | ret = regmap_read(dev->regmap, 0x3d, &utmp); | |
183 | utmp &= 0x7f; | |
184 | if (utmp < 0x16) | |
185 | utmp = 0xa1; | |
186 | else if (utmp == 0x16) | |
187 | utmp = 0x99; | |
b858c331 | 188 | else |
f158cbce | 189 | utmp = 0xf9; |
6fef4fc7 | 190 | |
f158cbce AP |
191 | regmap_write(dev->regmap, 0x60, utmp); |
192 | ret = ts2020_tuner_gate_ctrl(fe, 0x08); | |
6fef4fc7 | 193 | |
f158cbce | 194 | return ret; |
6fef4fc7 KD |
195 | } |
196 | ||
197 | static int ts2020_set_params(struct dvb_frontend *fe) | |
198 | { | |
199 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; | |
9898df64 | 200 | struct ts2020_priv *priv = fe->tuner_priv; |
b858c331 | 201 | int ret; |
f158cbce | 202 | unsigned int utmp; |
b858c331 | 203 | u32 f3db, gdiv28; |
af9d5255 AP |
204 | u16 u16tmp, value, lpf_coeff; |
205 | u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf; | |
206 | unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n; | |
207 | unsigned int frequency_khz = c->frequency; | |
208 | ||
209 | /* | |
210 | * Integer-N PLL synthesizer | |
211 | * kHz is used for all calculations to keep calculations within 32-bit | |
212 | */ | |
213 | f_ref_khz = TS2020_XTAL_FREQ; | |
214 | div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000); | |
215 | ||
216 | /* select LO output divider */ | |
217 | if (frequency_khz < priv->frequency_div) { | |
218 | div_out = 4; | |
219 | reg10 = 0x10; | |
220 | } else { | |
221 | div_out = 2; | |
222 | reg10 = 0x00; | |
223 | } | |
224 | ||
225 | f_vco_khz = frequency_khz * div_out; | |
226 | pll_n = f_vco_khz * div_ref / f_ref_khz; | |
227 | pll_n += pll_n % 2; | |
228 | priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out; | |
229 | ||
230 | pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n", | |
231 | priv->frequency_khz, priv->frequency_khz - c->frequency, | |
232 | f_vco_khz, pll_n, div_ref, div_out); | |
b858c331 | 233 | |
abd9025b AP |
234 | if (priv->tuner == TS2020_M88TS2020) { |
235 | lpf_coeff = 2766; | |
af9d5255 | 236 | reg10 |= 0x01; |
f158cbce | 237 | ret = regmap_write(priv->regmap, 0x10, reg10); |
abd9025b AP |
238 | } else { |
239 | lpf_coeff = 3200; | |
af9d5255 | 240 | reg10 |= 0x0b; |
f158cbce AP |
241 | ret = regmap_write(priv->regmap, 0x10, reg10); |
242 | ret |= regmap_write(priv->regmap, 0x11, 0x40); | |
abd9025b | 243 | } |
b858c331 | 244 | |
af9d5255 AP |
245 | u16tmp = pll_n - 1024; |
246 | buf[0] = (u16tmp >> 8) & 0xff; | |
247 | buf[1] = (u16tmp >> 0) & 0xff; | |
248 | buf[2] = div_ref - 8; | |
249 | ||
f158cbce AP |
250 | ret |= regmap_write(priv->regmap, 0x01, buf[0]); |
251 | ret |= regmap_write(priv->regmap, 0x02, buf[1]); | |
252 | ret |= regmap_write(priv->regmap, 0x03, buf[2]); | |
b858c331 | 253 | |
b858c331 IL |
254 | ret |= ts2020_tuner_gate_ctrl(fe, 0x10); |
255 | if (ret < 0) | |
256 | return -ENODEV; | |
257 | ||
b858c331 IL |
258 | ret |= ts2020_tuner_gate_ctrl(fe, 0x08); |
259 | ||
260 | /* Tuner RF */ | |
abd9025b AP |
261 | if (priv->tuner == TS2020_M88TS2020) |
262 | ret |= ts2020_set_tuner_rf(fe); | |
b858c331 IL |
263 | |
264 | gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000; | |
f158cbce | 265 | ret |= regmap_write(priv->regmap, 0x04, gdiv28 & 0xff); |
b858c331 IL |
266 | ret |= ts2020_tuner_gate_ctrl(fe, 0x04); |
267 | if (ret < 0) | |
268 | return -ENODEV; | |
6fef4fc7 | 269 | |
abd9025b | 270 | if (priv->tuner == TS2020_M88TS2022) { |
f158cbce AP |
271 | ret = regmap_write(priv->regmap, 0x25, 0x00); |
272 | ret |= regmap_write(priv->regmap, 0x27, 0x70); | |
273 | ret |= regmap_write(priv->regmap, 0x41, 0x09); | |
274 | ret |= regmap_write(priv->regmap, 0x08, 0x0b); | |
abd9025b AP |
275 | if (ret < 0) |
276 | return -ENODEV; | |
277 | } | |
278 | ||
f158cbce AP |
279 | regmap_read(priv->regmap, 0x26, &utmp); |
280 | value = utmp; | |
6fef4fc7 | 281 | |
2ca58f45 AP |
282 | f3db = (c->bandwidth_hz / 1000 / 2) + 2000; |
283 | f3db += FREQ_OFFSET_LOW_SYM_RATE; /* FIXME: ~always too wide filter */ | |
284 | f3db = clamp(f3db, 7000U, 40000U); | |
6fef4fc7 | 285 | |
b858c331 IL |
286 | gdiv28 = gdiv28 * 207 / (value * 2 + 151); |
287 | mlpf_max = gdiv28 * 135 / 100; | |
288 | mlpf_min = gdiv28 * 78 / 100; | |
6fef4fc7 KD |
289 | if (mlpf_max > 63) |
290 | mlpf_max = 63; | |
291 | ||
b858c331 IL |
292 | nlpf = (f3db * gdiv28 * 2 / lpf_coeff / |
293 | (TS2020_XTAL_FREQ / 1000) + 1) / 2; | |
6fef4fc7 KD |
294 | if (nlpf > 23) |
295 | nlpf = 23; | |
296 | if (nlpf < 1) | |
297 | nlpf = 1; | |
298 | ||
b858c331 IL |
299 | lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000) |
300 | * lpf_coeff * 2 / f3db + 1) / 2; | |
6fef4fc7 | 301 | |
b858c331 | 302 | if (lpf_mxdiv < mlpf_min) { |
6fef4fc7 | 303 | nlpf++; |
b858c331 IL |
304 | lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000) |
305 | * lpf_coeff * 2 / f3db + 1) / 2; | |
6fef4fc7 KD |
306 | } |
307 | ||
b858c331 IL |
308 | if (lpf_mxdiv > mlpf_max) |
309 | lpf_mxdiv = mlpf_max; | |
6fef4fc7 | 310 | |
f158cbce AP |
311 | ret = regmap_write(priv->regmap, 0x04, lpf_mxdiv); |
312 | ret |= regmap_write(priv->regmap, 0x06, nlpf); | |
6fef4fc7 | 313 | |
b858c331 | 314 | ret |= ts2020_tuner_gate_ctrl(fe, 0x04); |
6fef4fc7 | 315 | |
b858c331 | 316 | ret |= ts2020_tuner_gate_ctrl(fe, 0x01); |
6fef4fc7 | 317 | |
b858c331 | 318 | msleep(80); |
b858c331 IL |
319 | |
320 | return (ret < 0) ? -EINVAL : 0; | |
321 | } | |
6fef4fc7 | 322 | |
b858c331 IL |
323 | static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
324 | { | |
325 | struct ts2020_priv *priv = fe->tuner_priv; | |
abd9025b | 326 | |
af9d5255 | 327 | *frequency = priv->frequency_khz; |
abd9025b AP |
328 | return 0; |
329 | } | |
330 | ||
331 | static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) | |
332 | { | |
333 | *frequency = 0; /* Zero-IF */ | |
6fef4fc7 KD |
334 | return 0; |
335 | } | |
336 | ||
0f91c9d6 DH |
337 | /* |
338 | * Get the tuner gain. | |
339 | * @fe: The front end for which we're determining the gain | |
340 | * @v_agc: The voltage of the AGC from the demodulator (0-2600mV) | |
341 | * @_gain: Where to store the gain (in 0.001dB units) | |
342 | * | |
343 | * Returns 0 or a negative error code. | |
344 | */ | |
345 | static int ts2020_read_tuner_gain(struct dvb_frontend *fe, unsigned v_agc, | |
346 | __s64 *_gain) | |
6fef4fc7 | 347 | { |
f158cbce | 348 | struct ts2020_priv *priv = fe->tuner_priv; |
0f91c9d6 DH |
349 | unsigned long gain1, gain2, gain3; |
350 | unsigned utmp; | |
351 | int ret; | |
352 | ||
353 | /* Read the RF gain */ | |
354 | ret = regmap_read(priv->regmap, 0x3d, &utmp); | |
355 | if (ret < 0) | |
356 | return ret; | |
357 | gain1 = utmp & 0x1f; | |
358 | ||
359 | /* Read the baseband gain */ | |
360 | ret = regmap_read(priv->regmap, 0x21, &utmp); | |
361 | if (ret < 0) | |
362 | return ret; | |
363 | gain2 = utmp & 0x1f; | |
364 | ||
365 | switch (priv->tuner) { | |
366 | case TS2020_M88TS2020: | |
367 | gain1 = clamp_t(long, gain1, 0, 15); | |
368 | gain2 = clamp_t(long, gain2, 0, 13); | |
369 | v_agc = clamp_t(long, v_agc, 400, 1100); | |
370 | ||
81742be1 | 371 | *_gain = -((__s64)gain1 * 2330 + |
0f91c9d6 DH |
372 | gain2 * 3500 + |
373 | v_agc * 24 / 10 * 10 + | |
374 | 10000); | |
375 | /* gain in range -19600 to -116850 in units of 0.001dB */ | |
376 | break; | |
377 | ||
378 | case TS2020_M88TS2022: | |
379 | ret = regmap_read(priv->regmap, 0x66, &utmp); | |
380 | if (ret < 0) | |
381 | return ret; | |
382 | gain3 = (utmp >> 3) & 0x07; | |
383 | ||
384 | gain1 = clamp_t(long, gain1, 0, 15); | |
385 | gain2 = clamp_t(long, gain2, 2, 16); | |
386 | gain3 = clamp_t(long, gain3, 0, 6); | |
387 | v_agc = clamp_t(long, v_agc, 600, 1600); | |
388 | ||
81742be1 | 389 | *_gain = -((__s64)gain1 * 2650 + |
0f91c9d6 DH |
390 | gain2 * 3380 + |
391 | gain3 * 2850 + | |
392 | v_agc * 176 / 100 * 10 - | |
393 | 30000); | |
394 | /* gain in range -47320 to -158950 in units of 0.001dB */ | |
395 | break; | |
396 | } | |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
401 | /* | |
402 | * Get the AGC information from the demodulator and use that to calculate the | |
403 | * tuner gain. | |
404 | */ | |
405 | static int ts2020_get_tuner_gain(struct dvb_frontend *fe, __s64 *_gain) | |
406 | { | |
407 | struct ts2020_priv *priv = fe->tuner_priv; | |
408 | int v_agc = 0, ret; | |
409 | u8 agc_pwm; | |
6fef4fc7 | 410 | |
0f91c9d6 DH |
411 | /* Read the AGC PWM rate from the demodulator */ |
412 | if (priv->get_agc_pwm) { | |
413 | ret = priv->get_agc_pwm(fe, &agc_pwm); | |
414 | if (ret < 0) | |
415 | return ret; | |
6fef4fc7 | 416 | |
0f91c9d6 DH |
417 | switch (priv->tuner) { |
418 | case TS2020_M88TS2020: | |
419 | v_agc = (int)agc_pwm * 20 - 1166; | |
420 | break; | |
421 | case TS2020_M88TS2022: | |
422 | v_agc = (int)agc_pwm * 16 - 670; | |
423 | break; | |
424 | } | |
6fef4fc7 | 425 | |
0f91c9d6 DH |
426 | if (v_agc < 0) |
427 | v_agc = 0; | |
428 | } | |
6fef4fc7 | 429 | |
0f91c9d6 DH |
430 | return ts2020_read_tuner_gain(fe, v_agc, _gain); |
431 | } | |
6fef4fc7 | 432 | |
3366cd5d DH |
433 | /* |
434 | * Gather statistics on a regular basis | |
435 | */ | |
436 | static void ts2020_stat_work(struct work_struct *work) | |
437 | { | |
438 | struct ts2020_priv *priv = container_of(work, struct ts2020_priv, | |
439 | stat_work.work); | |
440 | struct i2c_client *client = priv->client; | |
441 | struct dtv_frontend_properties *c = &priv->fe->dtv_property_cache; | |
442 | int ret; | |
443 | ||
444 | dev_dbg(&client->dev, "\n"); | |
445 | ||
446 | ret = ts2020_get_tuner_gain(priv->fe, &c->strength.stat[0].svalue); | |
447 | if (ret < 0) | |
448 | goto err; | |
449 | ||
450 | c->strength.stat[0].scale = FE_SCALE_DECIBEL; | |
451 | ||
c7275ae1 DH |
452 | if (!priv->dont_poll) |
453 | schedule_delayed_work(&priv->stat_work, msecs_to_jiffies(2000)); | |
3366cd5d DH |
454 | return; |
455 | err: | |
456 | dev_dbg(&client->dev, "failed=%d\n", ret); | |
457 | } | |
458 | ||
0f91c9d6 DH |
459 | /* |
460 | * Read TS2020 signal strength in v3 format. | |
461 | */ | |
462 | static int ts2020_read_signal_strength(struct dvb_frontend *fe, | |
3366cd5d | 463 | u16 *_signal_strength) |
0f91c9d6 | 464 | { |
3366cd5d | 465 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
c7275ae1 | 466 | struct ts2020_priv *priv = fe->tuner_priv; |
0f91c9d6 DH |
467 | unsigned strength; |
468 | __s64 gain; | |
0f91c9d6 | 469 | |
c7275ae1 DH |
470 | if (priv->dont_poll) |
471 | ts2020_stat_work(&priv->stat_work.work); | |
472 | ||
3366cd5d DH |
473 | if (c->strength.stat[0].scale == FE_SCALE_NOT_AVAILABLE) { |
474 | *_signal_strength = 0; | |
475 | return 0; | |
476 | } | |
477 | ||
478 | gain = c->strength.stat[0].svalue; | |
0f91c9d6 DH |
479 | |
480 | /* Calculate the signal strength based on the total gain of the tuner */ | |
481 | if (gain < -85000) | |
482 | /* 0%: no signal or weak signal */ | |
483 | strength = 0; | |
484 | else if (gain < -65000) | |
485 | /* 0% - 60%: weak signal */ | |
87b09bd0 | 486 | strength = 0 + div64_s64((85000 + gain) * 3, 1000); |
0f91c9d6 DH |
487 | else if (gain < -45000) |
488 | /* 60% - 90%: normal signal */ | |
87b09bd0 | 489 | strength = 60 + div64_s64((65000 + gain) * 3, 2000); |
0f91c9d6 DH |
490 | else |
491 | /* 90% - 99%: strong signal */ | |
87b09bd0 | 492 | strength = 90 + div64_s64((45000 + gain), 5000); |
6fef4fc7 | 493 | |
3366cd5d | 494 | *_signal_strength = strength * 65535 / 100; |
6fef4fc7 KD |
495 | return 0; |
496 | } | |
497 | ||
14c4bf3c | 498 | static const struct dvb_tuner_ops ts2020_tuner_ops = { |
6fef4fc7 | 499 | .info = { |
b858c331 | 500 | .name = "TS2020", |
a3f90c75 MCC |
501 | .frequency_min_hz = 950 * MHz, |
502 | .frequency_max_hz = 2150 * MHz | |
6fef4fc7 | 503 | }, |
6fef4fc7 KD |
504 | .init = ts2020_init, |
505 | .release = ts2020_release, | |
b858c331 | 506 | .sleep = ts2020_sleep, |
6fef4fc7 KD |
507 | .set_params = ts2020_set_params, |
508 | .get_frequency = ts2020_get_frequency, | |
abd9025b | 509 | .get_if_frequency = ts2020_get_if_frequency, |
b858c331 | 510 | .get_rf_strength = ts2020_read_signal_strength, |
6fef4fc7 KD |
511 | }; |
512 | ||
513 | struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe, | |
b858c331 IL |
514 | const struct ts2020_config *config, |
515 | struct i2c_adapter *i2c) | |
6fef4fc7 | 516 | { |
e6ad9ce3 AP |
517 | struct i2c_client *client; |
518 | struct i2c_board_info board_info; | |
80868c8e DH |
519 | |
520 | /* This is only used by ts2020_probe() so can be on the stack */ | |
e6ad9ce3 AP |
521 | struct ts2020_config pdata; |
522 | ||
523 | memcpy(&pdata, config, sizeof(pdata)); | |
524 | pdata.fe = fe; | |
525 | pdata.attach_in_use = true; | |
526 | ||
527 | memset(&board_info, 0, sizeof(board_info)); | |
c0decac1 | 528 | strscpy(board_info.type, "ts2020", I2C_NAME_SIZE); |
e6ad9ce3 AP |
529 | board_info.addr = config->tuner_address; |
530 | board_info.platform_data = &pdata; | |
531 | client = i2c_new_device(i2c, &board_info); | |
532 | if (!client || !client->dev.driver) | |
b858c331 | 533 | return NULL; |
6fef4fc7 | 534 | |
6fef4fc7 KD |
535 | return fe; |
536 | } | |
537 | EXPORT_SYMBOL(ts2020_attach); | |
538 | ||
f158cbce AP |
539 | /* |
540 | * We implement own regmap locking due to legacy DVB attach which uses frontend | |
541 | * gate control callback to control I2C bus access. We can open / close gate and | |
542 | * serialize whole open / I2C-operation / close sequence at the same. | |
543 | */ | |
544 | static void ts2020_regmap_lock(void *__dev) | |
545 | { | |
546 | struct ts2020_priv *dev = __dev; | |
547 | ||
548 | mutex_lock(&dev->regmap_mutex); | |
549 | if (dev->fe->ops.i2c_gate_ctrl) | |
550 | dev->fe->ops.i2c_gate_ctrl(dev->fe, 1); | |
551 | } | |
552 | ||
553 | static void ts2020_regmap_unlock(void *__dev) | |
554 | { | |
555 | struct ts2020_priv *dev = __dev; | |
556 | ||
557 | if (dev->fe->ops.i2c_gate_ctrl) | |
558 | dev->fe->ops.i2c_gate_ctrl(dev->fe, 0); | |
559 | mutex_unlock(&dev->regmap_mutex); | |
560 | } | |
561 | ||
dc245a5f AP |
562 | static int ts2020_probe(struct i2c_client *client, |
563 | const struct i2c_device_id *id) | |
564 | { | |
565 | struct ts2020_config *pdata = client->dev.platform_data; | |
566 | struct dvb_frontend *fe = pdata->fe; | |
567 | struct ts2020_priv *dev; | |
568 | int ret; | |
569 | u8 u8tmp; | |
570 | unsigned int utmp; | |
571 | char *chip_str; | |
572 | ||
573 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
574 | if (!dev) { | |
575 | ret = -ENOMEM; | |
576 | goto err; | |
577 | } | |
578 | ||
f158cbce AP |
579 | /* create regmap */ |
580 | mutex_init(&dev->regmap_mutex); | |
581 | dev->regmap_config.reg_bits = 8, | |
582 | dev->regmap_config.val_bits = 8, | |
583 | dev->regmap_config.lock = ts2020_regmap_lock, | |
584 | dev->regmap_config.unlock = ts2020_regmap_unlock, | |
585 | dev->regmap_config.lock_arg = dev, | |
586 | dev->regmap = regmap_init_i2c(client, &dev->regmap_config); | |
587 | if (IS_ERR(dev->regmap)) { | |
588 | ret = PTR_ERR(dev->regmap); | |
589 | goto err_kfree; | |
590 | } | |
591 | ||
dc245a5f AP |
592 | dev->i2c = client->adapter; |
593 | dev->i2c_address = client->addr; | |
0f20baad | 594 | dev->loop_through = pdata->loop_through; |
dc245a5f AP |
595 | dev->clk_out = pdata->clk_out; |
596 | dev->clk_out_div = pdata->clk_out_div; | |
c7275ae1 | 597 | dev->dont_poll = pdata->dont_poll; |
dc245a5f AP |
598 | dev->frequency_div = pdata->frequency_div; |
599 | dev->fe = fe; | |
0f91c9d6 | 600 | dev->get_agc_pwm = pdata->get_agc_pwm; |
dc245a5f | 601 | fe->tuner_priv = dev; |
e6ad9ce3 | 602 | dev->client = client; |
3366cd5d | 603 | INIT_DELAYED_WORK(&dev->stat_work, ts2020_stat_work); |
dc245a5f AP |
604 | |
605 | /* check if the tuner is there */ | |
f158cbce AP |
606 | ret = regmap_read(dev->regmap, 0x00, &utmp); |
607 | if (ret) | |
608 | goto err_regmap_exit; | |
dc245a5f AP |
609 | |
610 | if ((utmp & 0x03) == 0x00) { | |
f158cbce | 611 | ret = regmap_write(dev->regmap, 0x00, 0x01); |
dc245a5f | 612 | if (ret) |
f158cbce | 613 | goto err_regmap_exit; |
dc245a5f AP |
614 | |
615 | usleep_range(2000, 50000); | |
616 | } | |
617 | ||
f158cbce | 618 | ret = regmap_write(dev->regmap, 0x00, 0x03); |
dc245a5f | 619 | if (ret) |
f158cbce | 620 | goto err_regmap_exit; |
dc245a5f AP |
621 | |
622 | usleep_range(2000, 50000); | |
623 | ||
f158cbce AP |
624 | ret = regmap_read(dev->regmap, 0x00, &utmp); |
625 | if (ret) | |
626 | goto err_regmap_exit; | |
dc245a5f AP |
627 | |
628 | dev_dbg(&client->dev, "chip_id=%02x\n", utmp); | |
629 | ||
630 | switch (utmp) { | |
631 | case 0x01: | |
632 | case 0x41: | |
633 | case 0x81: | |
634 | dev->tuner = TS2020_M88TS2020; | |
635 | chip_str = "TS2020"; | |
636 | if (!dev->frequency_div) | |
637 | dev->frequency_div = 1060000; | |
638 | break; | |
639 | case 0xc3: | |
640 | case 0x83: | |
641 | dev->tuner = TS2020_M88TS2022; | |
642 | chip_str = "TS2022"; | |
643 | if (!dev->frequency_div) | |
644 | dev->frequency_div = 1103000; | |
645 | break; | |
646 | default: | |
647 | ret = -ENODEV; | |
f158cbce | 648 | goto err_regmap_exit; |
dc245a5f AP |
649 | } |
650 | ||
651 | if (dev->tuner == TS2020_M88TS2022) { | |
652 | switch (dev->clk_out) { | |
653 | case TS2020_CLK_OUT_DISABLED: | |
654 | u8tmp = 0x60; | |
655 | break; | |
656 | case TS2020_CLK_OUT_ENABLED: | |
657 | u8tmp = 0x70; | |
f158cbce | 658 | ret = regmap_write(dev->regmap, 0x05, dev->clk_out_div); |
dc245a5f | 659 | if (ret) |
f158cbce | 660 | goto err_regmap_exit; |
dc245a5f AP |
661 | break; |
662 | case TS2020_CLK_OUT_ENABLED_XTALOUT: | |
663 | u8tmp = 0x6c; | |
664 | break; | |
665 | default: | |
666 | ret = -EINVAL; | |
f158cbce | 667 | goto err_regmap_exit; |
dc245a5f AP |
668 | } |
669 | ||
f158cbce | 670 | ret = regmap_write(dev->regmap, 0x42, u8tmp); |
dc245a5f | 671 | if (ret) |
f158cbce | 672 | goto err_regmap_exit; |
dc245a5f AP |
673 | |
674 | if (dev->loop_through) | |
675 | u8tmp = 0xec; | |
676 | else | |
677 | u8tmp = 0x6c; | |
678 | ||
f158cbce | 679 | ret = regmap_write(dev->regmap, 0x62, u8tmp); |
dc245a5f | 680 | if (ret) |
f158cbce | 681 | goto err_regmap_exit; |
dc245a5f AP |
682 | } |
683 | ||
684 | /* sleep */ | |
f158cbce | 685 | ret = regmap_write(dev->regmap, 0x00, 0x00); |
dc245a5f | 686 | if (ret) |
f158cbce | 687 | goto err_regmap_exit; |
dc245a5f AP |
688 | |
689 | dev_info(&client->dev, | |
690 | "Montage Technology %s successfully identified\n", chip_str); | |
691 | ||
692 | memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops, | |
693 | sizeof(struct dvb_tuner_ops)); | |
e6ad9ce3 AP |
694 | if (!pdata->attach_in_use) |
695 | fe->ops.tuner_ops.release = NULL; | |
dc245a5f AP |
696 | |
697 | i2c_set_clientdata(client, dev); | |
698 | return 0; | |
f158cbce AP |
699 | err_regmap_exit: |
700 | regmap_exit(dev->regmap); | |
701 | err_kfree: | |
702 | kfree(dev); | |
dc245a5f AP |
703 | err: |
704 | dev_dbg(&client->dev, "failed=%d\n", ret); | |
dc245a5f AP |
705 | return ret; |
706 | } | |
707 | ||
708 | static int ts2020_remove(struct i2c_client *client) | |
709 | { | |
710 | struct ts2020_priv *dev = i2c_get_clientdata(client); | |
dc245a5f AP |
711 | |
712 | dev_dbg(&client->dev, "\n"); | |
713 | ||
41ff9142 EMW |
714 | /* stop statistics polling */ |
715 | if (!dev->dont_poll) | |
716 | cancel_delayed_work_sync(&dev->stat_work); | |
717 | ||
f158cbce | 718 | regmap_exit(dev->regmap); |
dc245a5f | 719 | kfree(dev); |
dc245a5f AP |
720 | return 0; |
721 | } | |
722 | ||
723 | static const struct i2c_device_id ts2020_id_table[] = { | |
724 | {"ts2020", 0}, | |
725 | {"ts2022", 0}, | |
726 | {} | |
727 | }; | |
728 | MODULE_DEVICE_TABLE(i2c, ts2020_id_table); | |
729 | ||
730 | static struct i2c_driver ts2020_driver = { | |
731 | .driver = { | |
dc245a5f AP |
732 | .name = "ts2020", |
733 | }, | |
734 | .probe = ts2020_probe, | |
735 | .remove = ts2020_remove, | |
736 | .id_table = ts2020_id_table, | |
737 | }; | |
738 | ||
739 | module_i2c_driver(ts2020_driver); | |
740 | ||
6fef4fc7 KD |
741 | MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>"); |
742 | MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module"); | |
743 | MODULE_LICENSE("GPL"); |