Commit | Line | Data |
---|---|---|
74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
6fef4fc7 KD |
2 | /* |
3 | Montage Technology TS2020 - Silicon Tuner driver | |
4 | Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com> | |
5 | ||
6 | Copyright (C) 2009-2012 TurboSight.com | |
7 | ||
6fef4fc7 KD |
8 | */ |
9 | ||
fada1935 | 10 | #include <media/dvb_frontend.h> |
6fef4fc7 | 11 | #include "ts2020.h" |
f158cbce | 12 | #include <linux/regmap.h> |
87b09bd0 | 13 | #include <linux/math64.h> |
6fef4fc7 KD |
14 | |
15 | #define TS2020_XTAL_FREQ 27000 /* in kHz */ | |
b858c331 | 16 | #define FREQ_OFFSET_LOW_SYM_RATE 3000 |
6fef4fc7 | 17 | |
b858c331 | 18 | struct ts2020_priv { |
e6ad9ce3 | 19 | struct i2c_client *client; |
f158cbce AP |
20 | struct mutex regmap_mutex; |
21 | struct regmap_config regmap_config; | |
22 | struct regmap *regmap; | |
dc245a5f | 23 | struct dvb_frontend *fe; |
3366cd5d | 24 | struct delayed_work stat_work; |
0f91c9d6 | 25 | int (*get_agc_pwm)(struct dvb_frontend *fe, u8 *_agc_pwm); |
b858c331 | 26 | /* i2c details */ |
6fef4fc7 | 27 | struct i2c_adapter *i2c; |
3366cd5d | 28 | int i2c_address; |
0f20baad | 29 | bool loop_through:1; |
abd9025b AP |
30 | u8 clk_out:2; |
31 | u8 clk_out_div:5; | |
c7275ae1 | 32 | bool dont_poll:1; |
af9d5255 AP |
33 | u32 frequency_div; /* LO output divider switch frequency */ |
34 | u32 frequency_khz; /* actual used LO frequency */ | |
abd9025b AP |
35 | #define TS2020_M88TS2020 0 |
36 | #define TS2020_M88TS2022 1 | |
37 | u8 tuner; | |
abd9025b AP |
38 | }; |
39 | ||
40 | struct ts2020_reg_val { | |
41 | u8 reg; | |
42 | u8 val; | |
6fef4fc7 KD |
43 | }; |
44 | ||
c7275ae1 DH |
45 | static void ts2020_stat_work(struct work_struct *work); |
46 | ||
194ced7a | 47 | static void ts2020_release(struct dvb_frontend *fe) |
6fef4fc7 | 48 | { |
e6ad9ce3 AP |
49 | struct ts2020_priv *priv = fe->tuner_priv; |
50 | struct i2c_client *client = priv->client; | |
51 | ||
52 | dev_dbg(&client->dev, "\n"); | |
53 | ||
54 | i2c_unregister_device(client); | |
b858c331 IL |
55 | } |
56 | ||
b858c331 | 57 | static int ts2020_sleep(struct dvb_frontend *fe) |
6fef4fc7 | 58 | { |
b858c331 | 59 | struct ts2020_priv *priv = fe->tuner_priv; |
3366cd5d | 60 | int ret; |
b3226f96 | 61 | u8 u8tmp; |
6fef4fc7 | 62 | |
b3226f96 AP |
63 | if (priv->tuner == TS2020_M88TS2020) |
64 | u8tmp = 0x0a; /* XXX: probably wrong */ | |
65 | else | |
66 | u8tmp = 0x00; | |
6fef4fc7 | 67 | |
3366cd5d DH |
68 | ret = regmap_write(priv->regmap, u8tmp, 0x00); |
69 | if (ret < 0) | |
70 | return ret; | |
71 | ||
72 | /* stop statistics polling */ | |
c7275ae1 DH |
73 | if (!priv->dont_poll) |
74 | cancel_delayed_work_sync(&priv->stat_work); | |
3366cd5d | 75 | return 0; |
6fef4fc7 KD |
76 | } |
77 | ||
78 | static int ts2020_init(struct dvb_frontend *fe) | |
79 | { | |
3366cd5d | 80 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
b858c331 | 81 | struct ts2020_priv *priv = fe->tuner_priv; |
abd9025b AP |
82 | int i; |
83 | u8 u8tmp; | |
84 | ||
85 | if (priv->tuner == TS2020_M88TS2020) { | |
f158cbce AP |
86 | regmap_write(priv->regmap, 0x42, 0x73); |
87 | regmap_write(priv->regmap, 0x05, priv->clk_out_div); | |
88 | regmap_write(priv->regmap, 0x20, 0x27); | |
89 | regmap_write(priv->regmap, 0x07, 0x02); | |
90 | regmap_write(priv->regmap, 0x11, 0xff); | |
91 | regmap_write(priv->regmap, 0x60, 0xf9); | |
92 | regmap_write(priv->regmap, 0x08, 0x01); | |
93 | regmap_write(priv->regmap, 0x00, 0x41); | |
abd9025b AP |
94 | } else { |
95 | static const struct ts2020_reg_val reg_vals[] = { | |
96 | {0x7d, 0x9d}, | |
97 | {0x7c, 0x9a}, | |
98 | {0x7a, 0x76}, | |
99 | {0x3b, 0x01}, | |
100 | {0x63, 0x88}, | |
101 | {0x61, 0x85}, | |
102 | {0x22, 0x30}, | |
103 | {0x30, 0x40}, | |
104 | {0x20, 0x23}, | |
105 | {0x24, 0x02}, | |
106 | {0x12, 0xa0}, | |
107 | }; | |
108 | ||
f158cbce AP |
109 | regmap_write(priv->regmap, 0x00, 0x01); |
110 | regmap_write(priv->regmap, 0x00, 0x03); | |
abd9025b AP |
111 | |
112 | switch (priv->clk_out) { | |
113 | case TS2020_CLK_OUT_DISABLED: | |
114 | u8tmp = 0x60; | |
115 | break; | |
116 | case TS2020_CLK_OUT_ENABLED: | |
117 | u8tmp = 0x70; | |
f158cbce | 118 | regmap_write(priv->regmap, 0x05, priv->clk_out_div); |
abd9025b AP |
119 | break; |
120 | case TS2020_CLK_OUT_ENABLED_XTALOUT: | |
121 | u8tmp = 0x6c; | |
122 | break; | |
123 | default: | |
124 | u8tmp = 0x60; | |
125 | break; | |
126 | } | |
127 | ||
f158cbce | 128 | regmap_write(priv->regmap, 0x42, u8tmp); |
abd9025b AP |
129 | |
130 | if (priv->loop_through) | |
131 | u8tmp = 0xec; | |
132 | else | |
133 | u8tmp = 0x6c; | |
b858c331 | 134 | |
f158cbce | 135 | regmap_write(priv->regmap, 0x62, u8tmp); |
abd9025b AP |
136 | |
137 | for (i = 0; i < ARRAY_SIZE(reg_vals); i++) | |
f158cbce AP |
138 | regmap_write(priv->regmap, reg_vals[i].reg, |
139 | reg_vals[i].val); | |
abd9025b | 140 | } |
b858c331 | 141 | |
3366cd5d DH |
142 | /* Initialise v5 stats here */ |
143 | c->strength.len = 1; | |
144 | c->strength.stat[0].scale = FE_SCALE_DECIBEL; | |
145 | c->strength.stat[0].uvalue = 0; | |
146 | ||
c7275ae1 DH |
147 | /* Start statistics polling by invoking the work function */ |
148 | ts2020_stat_work(&priv->stat_work.work); | |
6fef4fc7 KD |
149 | return 0; |
150 | } | |
151 | ||
b858c331 | 152 | static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset) |
6fef4fc7 | 153 | { |
f158cbce | 154 | struct ts2020_priv *priv = fe->tuner_priv; |
b858c331 | 155 | int ret; |
f158cbce AP |
156 | ret = regmap_write(priv->regmap, 0x51, 0x1f - offset); |
157 | ret |= regmap_write(priv->regmap, 0x51, 0x1f); | |
158 | ret |= regmap_write(priv->regmap, 0x50, offset); | |
159 | ret |= regmap_write(priv->regmap, 0x50, 0x00); | |
b858c331 IL |
160 | msleep(20); |
161 | return ret; | |
162 | } | |
6fef4fc7 | 163 | |
b858c331 IL |
164 | static int ts2020_set_tuner_rf(struct dvb_frontend *fe) |
165 | { | |
f158cbce AP |
166 | struct ts2020_priv *dev = fe->tuner_priv; |
167 | int ret; | |
168 | unsigned int utmp; | |
169 | ||
170 | ret = regmap_read(dev->regmap, 0x3d, &utmp); | |
37d1e62b Y |
171 | if (ret) |
172 | return ret; | |
173 | ||
f158cbce AP |
174 | utmp &= 0x7f; |
175 | if (utmp < 0x16) | |
176 | utmp = 0xa1; | |
177 | else if (utmp == 0x16) | |
178 | utmp = 0x99; | |
b858c331 | 179 | else |
f158cbce | 180 | utmp = 0xf9; |
6fef4fc7 | 181 | |
f158cbce AP |
182 | regmap_write(dev->regmap, 0x60, utmp); |
183 | ret = ts2020_tuner_gate_ctrl(fe, 0x08); | |
6fef4fc7 | 184 | |
f158cbce | 185 | return ret; |
6fef4fc7 KD |
186 | } |
187 | ||
188 | static int ts2020_set_params(struct dvb_frontend *fe) | |
189 | { | |
190 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; | |
9898df64 | 191 | struct ts2020_priv *priv = fe->tuner_priv; |
b858c331 | 192 | int ret; |
f158cbce | 193 | unsigned int utmp; |
b858c331 | 194 | u32 f3db, gdiv28; |
af9d5255 AP |
195 | u16 u16tmp, value, lpf_coeff; |
196 | u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf; | |
197 | unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n; | |
198 | unsigned int frequency_khz = c->frequency; | |
199 | ||
200 | /* | |
201 | * Integer-N PLL synthesizer | |
202 | * kHz is used for all calculations to keep calculations within 32-bit | |
203 | */ | |
204 | f_ref_khz = TS2020_XTAL_FREQ; | |
205 | div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000); | |
206 | ||
207 | /* select LO output divider */ | |
208 | if (frequency_khz < priv->frequency_div) { | |
209 | div_out = 4; | |
210 | reg10 = 0x10; | |
211 | } else { | |
212 | div_out = 2; | |
213 | reg10 = 0x00; | |
214 | } | |
215 | ||
216 | f_vco_khz = frequency_khz * div_out; | |
217 | pll_n = f_vco_khz * div_ref / f_ref_khz; | |
218 | pll_n += pll_n % 2; | |
219 | priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out; | |
220 | ||
221 | pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n", | |
222 | priv->frequency_khz, priv->frequency_khz - c->frequency, | |
223 | f_vco_khz, pll_n, div_ref, div_out); | |
b858c331 | 224 | |
abd9025b AP |
225 | if (priv->tuner == TS2020_M88TS2020) { |
226 | lpf_coeff = 2766; | |
af9d5255 | 227 | reg10 |= 0x01; |
f158cbce | 228 | ret = regmap_write(priv->regmap, 0x10, reg10); |
abd9025b AP |
229 | } else { |
230 | lpf_coeff = 3200; | |
af9d5255 | 231 | reg10 |= 0x0b; |
f158cbce AP |
232 | ret = regmap_write(priv->regmap, 0x10, reg10); |
233 | ret |= regmap_write(priv->regmap, 0x11, 0x40); | |
abd9025b | 234 | } |
b858c331 | 235 | |
af9d5255 AP |
236 | u16tmp = pll_n - 1024; |
237 | buf[0] = (u16tmp >> 8) & 0xff; | |
238 | buf[1] = (u16tmp >> 0) & 0xff; | |
239 | buf[2] = div_ref - 8; | |
240 | ||
f158cbce AP |
241 | ret |= regmap_write(priv->regmap, 0x01, buf[0]); |
242 | ret |= regmap_write(priv->regmap, 0x02, buf[1]); | |
243 | ret |= regmap_write(priv->regmap, 0x03, buf[2]); | |
b858c331 | 244 | |
b858c331 IL |
245 | ret |= ts2020_tuner_gate_ctrl(fe, 0x10); |
246 | if (ret < 0) | |
247 | return -ENODEV; | |
248 | ||
b858c331 IL |
249 | ret |= ts2020_tuner_gate_ctrl(fe, 0x08); |
250 | ||
251 | /* Tuner RF */ | |
abd9025b AP |
252 | if (priv->tuner == TS2020_M88TS2020) |
253 | ret |= ts2020_set_tuner_rf(fe); | |
b858c331 IL |
254 | |
255 | gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000; | |
f158cbce | 256 | ret |= regmap_write(priv->regmap, 0x04, gdiv28 & 0xff); |
b858c331 IL |
257 | ret |= ts2020_tuner_gate_ctrl(fe, 0x04); |
258 | if (ret < 0) | |
259 | return -ENODEV; | |
6fef4fc7 | 260 | |
abd9025b | 261 | if (priv->tuner == TS2020_M88TS2022) { |
f158cbce AP |
262 | ret = regmap_write(priv->regmap, 0x25, 0x00); |
263 | ret |= regmap_write(priv->regmap, 0x27, 0x70); | |
264 | ret |= regmap_write(priv->regmap, 0x41, 0x09); | |
265 | ret |= regmap_write(priv->regmap, 0x08, 0x0b); | |
abd9025b AP |
266 | if (ret < 0) |
267 | return -ENODEV; | |
268 | } | |
269 | ||
f158cbce AP |
270 | regmap_read(priv->regmap, 0x26, &utmp); |
271 | value = utmp; | |
6fef4fc7 | 272 | |
2ca58f45 AP |
273 | f3db = (c->bandwidth_hz / 1000 / 2) + 2000; |
274 | f3db += FREQ_OFFSET_LOW_SYM_RATE; /* FIXME: ~always too wide filter */ | |
275 | f3db = clamp(f3db, 7000U, 40000U); | |
6fef4fc7 | 276 | |
b858c331 IL |
277 | gdiv28 = gdiv28 * 207 / (value * 2 + 151); |
278 | mlpf_max = gdiv28 * 135 / 100; | |
279 | mlpf_min = gdiv28 * 78 / 100; | |
6fef4fc7 KD |
280 | if (mlpf_max > 63) |
281 | mlpf_max = 63; | |
282 | ||
b858c331 IL |
283 | nlpf = (f3db * gdiv28 * 2 / lpf_coeff / |
284 | (TS2020_XTAL_FREQ / 1000) + 1) / 2; | |
6fef4fc7 KD |
285 | if (nlpf > 23) |
286 | nlpf = 23; | |
287 | if (nlpf < 1) | |
288 | nlpf = 1; | |
289 | ||
b858c331 IL |
290 | lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000) |
291 | * lpf_coeff * 2 / f3db + 1) / 2; | |
6fef4fc7 | 292 | |
b858c331 | 293 | if (lpf_mxdiv < mlpf_min) { |
6fef4fc7 | 294 | nlpf++; |
b858c331 IL |
295 | lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000) |
296 | * lpf_coeff * 2 / f3db + 1) / 2; | |
6fef4fc7 KD |
297 | } |
298 | ||
b858c331 IL |
299 | if (lpf_mxdiv > mlpf_max) |
300 | lpf_mxdiv = mlpf_max; | |
6fef4fc7 | 301 | |
f158cbce AP |
302 | ret = regmap_write(priv->regmap, 0x04, lpf_mxdiv); |
303 | ret |= regmap_write(priv->regmap, 0x06, nlpf); | |
6fef4fc7 | 304 | |
b858c331 | 305 | ret |= ts2020_tuner_gate_ctrl(fe, 0x04); |
6fef4fc7 | 306 | |
b858c331 | 307 | ret |= ts2020_tuner_gate_ctrl(fe, 0x01); |
6fef4fc7 | 308 | |
b858c331 | 309 | msleep(80); |
b858c331 IL |
310 | |
311 | return (ret < 0) ? -EINVAL : 0; | |
312 | } | |
6fef4fc7 | 313 | |
b858c331 IL |
314 | static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
315 | { | |
316 | struct ts2020_priv *priv = fe->tuner_priv; | |
abd9025b | 317 | |
af9d5255 | 318 | *frequency = priv->frequency_khz; |
abd9025b AP |
319 | return 0; |
320 | } | |
321 | ||
322 | static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency) | |
323 | { | |
324 | *frequency = 0; /* Zero-IF */ | |
6fef4fc7 KD |
325 | return 0; |
326 | } | |
327 | ||
0f91c9d6 DH |
328 | /* |
329 | * Get the tuner gain. | |
330 | * @fe: The front end for which we're determining the gain | |
331 | * @v_agc: The voltage of the AGC from the demodulator (0-2600mV) | |
332 | * @_gain: Where to store the gain (in 0.001dB units) | |
333 | * | |
334 | * Returns 0 or a negative error code. | |
335 | */ | |
336 | static int ts2020_read_tuner_gain(struct dvb_frontend *fe, unsigned v_agc, | |
337 | __s64 *_gain) | |
6fef4fc7 | 338 | { |
f158cbce | 339 | struct ts2020_priv *priv = fe->tuner_priv; |
0f91c9d6 DH |
340 | unsigned long gain1, gain2, gain3; |
341 | unsigned utmp; | |
342 | int ret; | |
343 | ||
344 | /* Read the RF gain */ | |
345 | ret = regmap_read(priv->regmap, 0x3d, &utmp); | |
346 | if (ret < 0) | |
347 | return ret; | |
348 | gain1 = utmp & 0x1f; | |
349 | ||
350 | /* Read the baseband gain */ | |
351 | ret = regmap_read(priv->regmap, 0x21, &utmp); | |
352 | if (ret < 0) | |
353 | return ret; | |
354 | gain2 = utmp & 0x1f; | |
355 | ||
356 | switch (priv->tuner) { | |
357 | case TS2020_M88TS2020: | |
358 | gain1 = clamp_t(long, gain1, 0, 15); | |
359 | gain2 = clamp_t(long, gain2, 0, 13); | |
360 | v_agc = clamp_t(long, v_agc, 400, 1100); | |
361 | ||
81742be1 | 362 | *_gain = -((__s64)gain1 * 2330 + |
0f91c9d6 DH |
363 | gain2 * 3500 + |
364 | v_agc * 24 / 10 * 10 + | |
365 | 10000); | |
366 | /* gain in range -19600 to -116850 in units of 0.001dB */ | |
367 | break; | |
368 | ||
369 | case TS2020_M88TS2022: | |
370 | ret = regmap_read(priv->regmap, 0x66, &utmp); | |
371 | if (ret < 0) | |
372 | return ret; | |
373 | gain3 = (utmp >> 3) & 0x07; | |
374 | ||
375 | gain1 = clamp_t(long, gain1, 0, 15); | |
376 | gain2 = clamp_t(long, gain2, 2, 16); | |
377 | gain3 = clamp_t(long, gain3, 0, 6); | |
378 | v_agc = clamp_t(long, v_agc, 600, 1600); | |
379 | ||
81742be1 | 380 | *_gain = -((__s64)gain1 * 2650 + |
0f91c9d6 DH |
381 | gain2 * 3380 + |
382 | gain3 * 2850 + | |
383 | v_agc * 176 / 100 * 10 - | |
384 | 30000); | |
385 | /* gain in range -47320 to -158950 in units of 0.001dB */ | |
386 | break; | |
387 | } | |
388 | ||
389 | return 0; | |
390 | } | |
391 | ||
392 | /* | |
393 | * Get the AGC information from the demodulator and use that to calculate the | |
394 | * tuner gain. | |
395 | */ | |
396 | static int ts2020_get_tuner_gain(struct dvb_frontend *fe, __s64 *_gain) | |
397 | { | |
398 | struct ts2020_priv *priv = fe->tuner_priv; | |
399 | int v_agc = 0, ret; | |
400 | u8 agc_pwm; | |
6fef4fc7 | 401 | |
0f91c9d6 DH |
402 | /* Read the AGC PWM rate from the demodulator */ |
403 | if (priv->get_agc_pwm) { | |
404 | ret = priv->get_agc_pwm(fe, &agc_pwm); | |
405 | if (ret < 0) | |
406 | return ret; | |
6fef4fc7 | 407 | |
0f91c9d6 DH |
408 | switch (priv->tuner) { |
409 | case TS2020_M88TS2020: | |
410 | v_agc = (int)agc_pwm * 20 - 1166; | |
411 | break; | |
412 | case TS2020_M88TS2022: | |
413 | v_agc = (int)agc_pwm * 16 - 670; | |
414 | break; | |
415 | } | |
6fef4fc7 | 416 | |
0f91c9d6 DH |
417 | if (v_agc < 0) |
418 | v_agc = 0; | |
419 | } | |
6fef4fc7 | 420 | |
0f91c9d6 DH |
421 | return ts2020_read_tuner_gain(fe, v_agc, _gain); |
422 | } | |
6fef4fc7 | 423 | |
3366cd5d DH |
424 | /* |
425 | * Gather statistics on a regular basis | |
426 | */ | |
427 | static void ts2020_stat_work(struct work_struct *work) | |
428 | { | |
429 | struct ts2020_priv *priv = container_of(work, struct ts2020_priv, | |
430 | stat_work.work); | |
431 | struct i2c_client *client = priv->client; | |
432 | struct dtv_frontend_properties *c = &priv->fe->dtv_property_cache; | |
433 | int ret; | |
434 | ||
435 | dev_dbg(&client->dev, "\n"); | |
436 | ||
437 | ret = ts2020_get_tuner_gain(priv->fe, &c->strength.stat[0].svalue); | |
438 | if (ret < 0) | |
439 | goto err; | |
440 | ||
441 | c->strength.stat[0].scale = FE_SCALE_DECIBEL; | |
442 | ||
c7275ae1 DH |
443 | if (!priv->dont_poll) |
444 | schedule_delayed_work(&priv->stat_work, msecs_to_jiffies(2000)); | |
3366cd5d DH |
445 | return; |
446 | err: | |
447 | dev_dbg(&client->dev, "failed=%d\n", ret); | |
448 | } | |
449 | ||
0f91c9d6 DH |
450 | /* |
451 | * Read TS2020 signal strength in v3 format. | |
452 | */ | |
453 | static int ts2020_read_signal_strength(struct dvb_frontend *fe, | |
3366cd5d | 454 | u16 *_signal_strength) |
0f91c9d6 | 455 | { |
3366cd5d | 456 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
c7275ae1 | 457 | struct ts2020_priv *priv = fe->tuner_priv; |
0f91c9d6 DH |
458 | unsigned strength; |
459 | __s64 gain; | |
0f91c9d6 | 460 | |
c7275ae1 DH |
461 | if (priv->dont_poll) |
462 | ts2020_stat_work(&priv->stat_work.work); | |
463 | ||
3366cd5d DH |
464 | if (c->strength.stat[0].scale == FE_SCALE_NOT_AVAILABLE) { |
465 | *_signal_strength = 0; | |
466 | return 0; | |
467 | } | |
468 | ||
469 | gain = c->strength.stat[0].svalue; | |
0f91c9d6 DH |
470 | |
471 | /* Calculate the signal strength based on the total gain of the tuner */ | |
472 | if (gain < -85000) | |
473 | /* 0%: no signal or weak signal */ | |
474 | strength = 0; | |
475 | else if (gain < -65000) | |
476 | /* 0% - 60%: weak signal */ | |
87b09bd0 | 477 | strength = 0 + div64_s64((85000 + gain) * 3, 1000); |
0f91c9d6 DH |
478 | else if (gain < -45000) |
479 | /* 60% - 90%: normal signal */ | |
87b09bd0 | 480 | strength = 60 + div64_s64((65000 + gain) * 3, 2000); |
0f91c9d6 DH |
481 | else |
482 | /* 90% - 99%: strong signal */ | |
87b09bd0 | 483 | strength = 90 + div64_s64((45000 + gain), 5000); |
6fef4fc7 | 484 | |
3366cd5d | 485 | *_signal_strength = strength * 65535 / 100; |
6fef4fc7 KD |
486 | return 0; |
487 | } | |
488 | ||
14c4bf3c | 489 | static const struct dvb_tuner_ops ts2020_tuner_ops = { |
6fef4fc7 | 490 | .info = { |
b858c331 | 491 | .name = "TS2020", |
a3f90c75 MCC |
492 | .frequency_min_hz = 950 * MHz, |
493 | .frequency_max_hz = 2150 * MHz | |
6fef4fc7 | 494 | }, |
6fef4fc7 KD |
495 | .init = ts2020_init, |
496 | .release = ts2020_release, | |
b858c331 | 497 | .sleep = ts2020_sleep, |
6fef4fc7 KD |
498 | .set_params = ts2020_set_params, |
499 | .get_frequency = ts2020_get_frequency, | |
abd9025b | 500 | .get_if_frequency = ts2020_get_if_frequency, |
b858c331 | 501 | .get_rf_strength = ts2020_read_signal_strength, |
6fef4fc7 KD |
502 | }; |
503 | ||
504 | struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe, | |
b858c331 IL |
505 | const struct ts2020_config *config, |
506 | struct i2c_adapter *i2c) | |
6fef4fc7 | 507 | { |
e6ad9ce3 AP |
508 | struct i2c_client *client; |
509 | struct i2c_board_info board_info; | |
80868c8e DH |
510 | |
511 | /* This is only used by ts2020_probe() so can be on the stack */ | |
e6ad9ce3 AP |
512 | struct ts2020_config pdata; |
513 | ||
514 | memcpy(&pdata, config, sizeof(pdata)); | |
515 | pdata.fe = fe; | |
516 | pdata.attach_in_use = true; | |
517 | ||
518 | memset(&board_info, 0, sizeof(board_info)); | |
c0decac1 | 519 | strscpy(board_info.type, "ts2020", I2C_NAME_SIZE); |
e6ad9ce3 AP |
520 | board_info.addr = config->tuner_address; |
521 | board_info.platform_data = &pdata; | |
522 | client = i2c_new_device(i2c, &board_info); | |
523 | if (!client || !client->dev.driver) | |
b858c331 | 524 | return NULL; |
6fef4fc7 | 525 | |
6fef4fc7 KD |
526 | return fe; |
527 | } | |
528 | EXPORT_SYMBOL(ts2020_attach); | |
529 | ||
f158cbce AP |
530 | /* |
531 | * We implement own regmap locking due to legacy DVB attach which uses frontend | |
532 | * gate control callback to control I2C bus access. We can open / close gate and | |
533 | * serialize whole open / I2C-operation / close sequence at the same. | |
534 | */ | |
535 | static void ts2020_regmap_lock(void *__dev) | |
536 | { | |
537 | struct ts2020_priv *dev = __dev; | |
538 | ||
539 | mutex_lock(&dev->regmap_mutex); | |
540 | if (dev->fe->ops.i2c_gate_ctrl) | |
541 | dev->fe->ops.i2c_gate_ctrl(dev->fe, 1); | |
542 | } | |
543 | ||
544 | static void ts2020_regmap_unlock(void *__dev) | |
545 | { | |
546 | struct ts2020_priv *dev = __dev; | |
547 | ||
548 | if (dev->fe->ops.i2c_gate_ctrl) | |
549 | dev->fe->ops.i2c_gate_ctrl(dev->fe, 0); | |
550 | mutex_unlock(&dev->regmap_mutex); | |
551 | } | |
552 | ||
dc245a5f AP |
553 | static int ts2020_probe(struct i2c_client *client, |
554 | const struct i2c_device_id *id) | |
555 | { | |
556 | struct ts2020_config *pdata = client->dev.platform_data; | |
557 | struct dvb_frontend *fe = pdata->fe; | |
558 | struct ts2020_priv *dev; | |
559 | int ret; | |
560 | u8 u8tmp; | |
561 | unsigned int utmp; | |
562 | char *chip_str; | |
563 | ||
564 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
565 | if (!dev) { | |
566 | ret = -ENOMEM; | |
567 | goto err; | |
568 | } | |
569 | ||
f158cbce AP |
570 | /* create regmap */ |
571 | mutex_init(&dev->regmap_mutex); | |
572 | dev->regmap_config.reg_bits = 8, | |
573 | dev->regmap_config.val_bits = 8, | |
574 | dev->regmap_config.lock = ts2020_regmap_lock, | |
575 | dev->regmap_config.unlock = ts2020_regmap_unlock, | |
576 | dev->regmap_config.lock_arg = dev, | |
577 | dev->regmap = regmap_init_i2c(client, &dev->regmap_config); | |
578 | if (IS_ERR(dev->regmap)) { | |
579 | ret = PTR_ERR(dev->regmap); | |
580 | goto err_kfree; | |
581 | } | |
582 | ||
dc245a5f AP |
583 | dev->i2c = client->adapter; |
584 | dev->i2c_address = client->addr; | |
0f20baad | 585 | dev->loop_through = pdata->loop_through; |
dc245a5f AP |
586 | dev->clk_out = pdata->clk_out; |
587 | dev->clk_out_div = pdata->clk_out_div; | |
c7275ae1 | 588 | dev->dont_poll = pdata->dont_poll; |
dc245a5f AP |
589 | dev->frequency_div = pdata->frequency_div; |
590 | dev->fe = fe; | |
0f91c9d6 | 591 | dev->get_agc_pwm = pdata->get_agc_pwm; |
dc245a5f | 592 | fe->tuner_priv = dev; |
e6ad9ce3 | 593 | dev->client = client; |
3366cd5d | 594 | INIT_DELAYED_WORK(&dev->stat_work, ts2020_stat_work); |
dc245a5f AP |
595 | |
596 | /* check if the tuner is there */ | |
f158cbce AP |
597 | ret = regmap_read(dev->regmap, 0x00, &utmp); |
598 | if (ret) | |
599 | goto err_regmap_exit; | |
dc245a5f AP |
600 | |
601 | if ((utmp & 0x03) == 0x00) { | |
f158cbce | 602 | ret = regmap_write(dev->regmap, 0x00, 0x01); |
dc245a5f | 603 | if (ret) |
f158cbce | 604 | goto err_regmap_exit; |
dc245a5f AP |
605 | |
606 | usleep_range(2000, 50000); | |
607 | } | |
608 | ||
f158cbce | 609 | ret = regmap_write(dev->regmap, 0x00, 0x03); |
dc245a5f | 610 | if (ret) |
f158cbce | 611 | goto err_regmap_exit; |
dc245a5f AP |
612 | |
613 | usleep_range(2000, 50000); | |
614 | ||
f158cbce AP |
615 | ret = regmap_read(dev->regmap, 0x00, &utmp); |
616 | if (ret) | |
617 | goto err_regmap_exit; | |
dc245a5f AP |
618 | |
619 | dev_dbg(&client->dev, "chip_id=%02x\n", utmp); | |
620 | ||
621 | switch (utmp) { | |
622 | case 0x01: | |
623 | case 0x41: | |
624 | case 0x81: | |
625 | dev->tuner = TS2020_M88TS2020; | |
626 | chip_str = "TS2020"; | |
627 | if (!dev->frequency_div) | |
628 | dev->frequency_div = 1060000; | |
629 | break; | |
630 | case 0xc3: | |
631 | case 0x83: | |
632 | dev->tuner = TS2020_M88TS2022; | |
633 | chip_str = "TS2022"; | |
634 | if (!dev->frequency_div) | |
635 | dev->frequency_div = 1103000; | |
636 | break; | |
637 | default: | |
638 | ret = -ENODEV; | |
f158cbce | 639 | goto err_regmap_exit; |
dc245a5f AP |
640 | } |
641 | ||
642 | if (dev->tuner == TS2020_M88TS2022) { | |
643 | switch (dev->clk_out) { | |
644 | case TS2020_CLK_OUT_DISABLED: | |
645 | u8tmp = 0x60; | |
646 | break; | |
647 | case TS2020_CLK_OUT_ENABLED: | |
648 | u8tmp = 0x70; | |
f158cbce | 649 | ret = regmap_write(dev->regmap, 0x05, dev->clk_out_div); |
dc245a5f | 650 | if (ret) |
f158cbce | 651 | goto err_regmap_exit; |
dc245a5f AP |
652 | break; |
653 | case TS2020_CLK_OUT_ENABLED_XTALOUT: | |
654 | u8tmp = 0x6c; | |
655 | break; | |
656 | default: | |
657 | ret = -EINVAL; | |
f158cbce | 658 | goto err_regmap_exit; |
dc245a5f AP |
659 | } |
660 | ||
f158cbce | 661 | ret = regmap_write(dev->regmap, 0x42, u8tmp); |
dc245a5f | 662 | if (ret) |
f158cbce | 663 | goto err_regmap_exit; |
dc245a5f AP |
664 | |
665 | if (dev->loop_through) | |
666 | u8tmp = 0xec; | |
667 | else | |
668 | u8tmp = 0x6c; | |
669 | ||
f158cbce | 670 | ret = regmap_write(dev->regmap, 0x62, u8tmp); |
dc245a5f | 671 | if (ret) |
f158cbce | 672 | goto err_regmap_exit; |
dc245a5f AP |
673 | } |
674 | ||
675 | /* sleep */ | |
f158cbce | 676 | ret = regmap_write(dev->regmap, 0x00, 0x00); |
dc245a5f | 677 | if (ret) |
f158cbce | 678 | goto err_regmap_exit; |
dc245a5f AP |
679 | |
680 | dev_info(&client->dev, | |
681 | "Montage Technology %s successfully identified\n", chip_str); | |
682 | ||
683 | memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops, | |
684 | sizeof(struct dvb_tuner_ops)); | |
e6ad9ce3 AP |
685 | if (!pdata->attach_in_use) |
686 | fe->ops.tuner_ops.release = NULL; | |
dc245a5f AP |
687 | |
688 | i2c_set_clientdata(client, dev); | |
689 | return 0; | |
f158cbce AP |
690 | err_regmap_exit: |
691 | regmap_exit(dev->regmap); | |
692 | err_kfree: | |
693 | kfree(dev); | |
dc245a5f AP |
694 | err: |
695 | dev_dbg(&client->dev, "failed=%d\n", ret); | |
dc245a5f AP |
696 | return ret; |
697 | } | |
698 | ||
699 | static int ts2020_remove(struct i2c_client *client) | |
700 | { | |
701 | struct ts2020_priv *dev = i2c_get_clientdata(client); | |
dc245a5f AP |
702 | |
703 | dev_dbg(&client->dev, "\n"); | |
704 | ||
41ff9142 EMW |
705 | /* stop statistics polling */ |
706 | if (!dev->dont_poll) | |
707 | cancel_delayed_work_sync(&dev->stat_work); | |
708 | ||
f158cbce | 709 | regmap_exit(dev->regmap); |
dc245a5f | 710 | kfree(dev); |
dc245a5f AP |
711 | return 0; |
712 | } | |
713 | ||
714 | static const struct i2c_device_id ts2020_id_table[] = { | |
715 | {"ts2020", 0}, | |
716 | {"ts2022", 0}, | |
717 | {} | |
718 | }; | |
719 | MODULE_DEVICE_TABLE(i2c, ts2020_id_table); | |
720 | ||
721 | static struct i2c_driver ts2020_driver = { | |
722 | .driver = { | |
dc245a5f AP |
723 | .name = "ts2020", |
724 | }, | |
725 | .probe = ts2020_probe, | |
726 | .remove = ts2020_remove, | |
727 | .id_table = ts2020_id_table, | |
728 | }; | |
729 | ||
730 | module_i2c_driver(ts2020_driver); | |
731 | ||
6fef4fc7 KD |
732 | MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>"); |
733 | MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module"); | |
734 | MODULE_LICENSE("GPL"); |