Commit | Line | Data |
---|---|---|
6bca3580 AQ |
1 | /* |
2 | Driver for Philips tda10086 DVBS Demodulator | |
3 | ||
4 | (c) 2006 Andrew de Quincey | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ||
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | ||
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/module.h> | |
6bca3580 AQ |
25 | #include <linux/device.h> |
26 | #include <linux/jiffies.h> | |
27 | #include <linux/string.h> | |
28 | #include <linux/slab.h> | |
29 | ||
30 | #include "dvb_frontend.h" | |
31 | #include "tda10086.h" | |
32 | ||
33 | #define SACLK 96000000 | |
34 | ||
35 | struct tda10086_state { | |
36 | struct i2c_adapter* i2c; | |
37 | const struct tda10086_config* config; | |
38 | struct dvb_frontend frontend; | |
39 | ||
40 | /* private demod data */ | |
41 | u32 frequency; | |
42 | u32 symbol_rate; | |
c6604150 | 43 | bool has_lock; |
6bca3580 AQ |
44 | }; |
45 | ||
ff699e6b | 46 | static int debug; |
6bca3580 AQ |
47 | #define dprintk(args...) \ |
48 | do { \ | |
49 | if (debug) printk(KERN_DEBUG "tda10086: " args); \ | |
50 | } while (0) | |
51 | ||
52 | static int tda10086_write_byte(struct tda10086_state *state, int reg, int data) | |
53 | { | |
54 | int ret; | |
55 | u8 b0[] = { reg, data }; | |
56 | struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 }; | |
57 | ||
58 | msg.addr = state->config->demod_address; | |
59 | ret = i2c_transfer(state->i2c, &msg, 1); | |
60 | ||
61 | if (ret != 1) | |
62 | dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n", | |
271ddbf7 | 63 | __func__, reg, data, ret); |
6bca3580 AQ |
64 | |
65 | return (ret != 1) ? ret : 0; | |
66 | } | |
67 | ||
68 | static int tda10086_read_byte(struct tda10086_state *state, int reg) | |
69 | { | |
70 | int ret; | |
71 | u8 b0[] = { reg }; | |
72 | u8 b1[] = { 0 }; | |
73 | struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 }, | |
74 | { .flags = I2C_M_RD, .buf = b1, .len = 1 }}; | |
75 | ||
76 | msg[0].addr = state->config->demod_address; | |
77 | msg[1].addr = state->config->demod_address; | |
78 | ret = i2c_transfer(state->i2c, msg, 2); | |
79 | ||
80 | if (ret != 2) { | |
271ddbf7 | 81 | dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, |
6bca3580 AQ |
82 | ret); |
83 | return ret; | |
84 | } | |
85 | ||
86 | return b1[0]; | |
87 | } | |
88 | ||
89 | static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data) | |
90 | { | |
91 | int val; | |
92 | ||
b1c54fe2 | 93 | /* read a byte and check */ |
6bca3580 AQ |
94 | val = tda10086_read_byte(state, reg); |
95 | if (val < 0) | |
96 | return val; | |
97 | ||
b1c54fe2 | 98 | /* mask if off */ |
6bca3580 AQ |
99 | val = val & ~mask; |
100 | val |= data & 0xff; | |
101 | ||
b1c54fe2 | 102 | /* write it out again */ |
6bca3580 AQ |
103 | return tda10086_write_byte(state, reg, val); |
104 | } | |
105 | ||
106 | static int tda10086_init(struct dvb_frontend* fe) | |
107 | { | |
108 | struct tda10086_state* state = fe->demodulator_priv; | |
ea75baf4 | 109 | u8 t22k_off = 0x80; |
6bca3580 | 110 | |
271ddbf7 | 111 | dprintk ("%s\n", __func__); |
6bca3580 | 112 | |
ea75baf4 HH |
113 | if (state->config->diseqc_tone) |
114 | t22k_off = 0; | |
b1c54fe2 | 115 | /* reset */ |
6bca3580 AQ |
116 | tda10086_write_byte(state, 0x00, 0x00); |
117 | msleep(10); | |
118 | ||
b1c54fe2 | 119 | /* misc setup */ |
6bca3580 | 120 | tda10086_write_byte(state, 0x01, 0x94); |
b1c54fe2 | 121 | tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */ |
c6604150 | 122 | tda10086_write_byte(state, 0x03, 0xe4); |
6bca3580 AQ |
123 | tda10086_write_byte(state, 0x04, 0x43); |
124 | tda10086_write_byte(state, 0x0c, 0x0c); | |
b1c54fe2 HH |
125 | tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */ |
126 | tda10086_write_byte(state, 0x20, 0x89); /* misc */ | |
127 | tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */ | |
128 | tda10086_write_byte(state, 0x32, 0x00); /* irq off */ | |
129 | tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */ | |
130 | ||
131 | /* setup PLL (this assumes SACLK = 96MHz) */ | |
132 | tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */ | |
9a1b04e4 | 133 | if (state->config->xtal_freq == TDA10086_XTAL_16M) { |
b1c54fe2 HH |
134 | tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */ |
135 | tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */ | |
9a1b04e4 | 136 | } else { |
b1c54fe2 HH |
137 | tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */ |
138 | tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */ | |
9a1b04e4 | 139 | } |
b1c54fe2 | 140 | tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */ |
6bca3580 | 141 | |
b1c54fe2 | 142 | /* setup TS interface */ |
6bca3580 AQ |
143 | tda10086_write_byte(state, 0x11, 0x81); |
144 | tda10086_write_byte(state, 0x12, 0x81); | |
b1c54fe2 HH |
145 | tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */ |
146 | tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */ | |
147 | tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */ | |
6bca3580 AQ |
148 | tda10086_write_byte(state, 0x10, 0x2a); |
149 | ||
b1c54fe2 HH |
150 | /* setup ADC */ |
151 | tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */ | |
152 | tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */ | |
6bca3580 | 153 | |
b1c54fe2 | 154 | /* setup AGC */ |
6bca3580 AQ |
155 | tda10086_write_byte(state, 0x05, 0x0B); |
156 | tda10086_write_byte(state, 0x37, 0x63); | |
b1c54fe2 | 157 | tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */ |
6bca3580 AQ |
158 | tda10086_write_byte(state, 0x40, 0x64); |
159 | tda10086_write_byte(state, 0x41, 0x4f); | |
160 | tda10086_write_byte(state, 0x42, 0x43); | |
161 | ||
b1c54fe2 HH |
162 | /* setup viterbi */ |
163 | tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */ | |
6bca3580 | 164 | |
b1c54fe2 | 165 | /* setup carrier recovery */ |
6bca3580 AQ |
166 | tda10086_write_byte(state, 0x3d, 0x80); |
167 | ||
b1c54fe2 HH |
168 | /* setup SEC */ |
169 | tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */ | |
170 | tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); | |
171 | tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); | |
6bca3580 AQ |
172 | |
173 | return 0; | |
174 | } | |
175 | ||
176 | static void tda10086_diseqc_wait(struct tda10086_state *state) | |
177 | { | |
178 | unsigned long timeout = jiffies + msecs_to_jiffies(200); | |
179 | while (!(tda10086_read_byte(state, 0x50) & 0x01)) { | |
180 | if(time_after(jiffies, timeout)) { | |
271ddbf7 | 181 | printk("%s: diseqc queue not ready, command may be lost.\n", __func__); |
6bca3580 AQ |
182 | break; |
183 | } | |
184 | msleep(10); | |
185 | } | |
186 | } | |
187 | ||
188 | static int tda10086_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
189 | { | |
190 | struct tda10086_state* state = fe->demodulator_priv; | |
ea75baf4 | 191 | u8 t22k_off = 0x80; |
6bca3580 | 192 | |
271ddbf7 | 193 | dprintk ("%s\n", __func__); |
6bca3580 | 194 | |
ea75baf4 HH |
195 | if (state->config->diseqc_tone) |
196 | t22k_off = 0; | |
197 | ||
33f77714 | 198 | switch (tone) { |
6bca3580 | 199 | case SEC_TONE_OFF: |
ea75baf4 | 200 | tda10086_write_byte(state, 0x36, t22k_off); |
6bca3580 AQ |
201 | break; |
202 | ||
203 | case SEC_TONE_ON: | |
ea75baf4 | 204 | tda10086_write_byte(state, 0x36, 0x01 + t22k_off); |
6bca3580 AQ |
205 | break; |
206 | } | |
207 | ||
208 | return 0; | |
209 | } | |
210 | ||
211 | static int tda10086_send_master_cmd (struct dvb_frontend* fe, | |
212 | struct dvb_diseqc_master_cmd* cmd) | |
213 | { | |
214 | struct tda10086_state* state = fe->demodulator_priv; | |
215 | int i; | |
216 | u8 oldval; | |
ea75baf4 | 217 | u8 t22k_off = 0x80; |
6bca3580 | 218 | |
271ddbf7 | 219 | dprintk ("%s\n", __func__); |
6bca3580 | 220 | |
ea75baf4 HH |
221 | if (state->config->diseqc_tone) |
222 | t22k_off = 0; | |
223 | ||
6bca3580 AQ |
224 | if (cmd->msg_len > 6) |
225 | return -EINVAL; | |
226 | oldval = tda10086_read_byte(state, 0x36); | |
227 | ||
228 | for(i=0; i< cmd->msg_len; i++) { | |
229 | tda10086_write_byte(state, 0x48+i, cmd->msg[i]); | |
230 | } | |
ea75baf4 HH |
231 | tda10086_write_byte(state, 0x36, (0x08 + t22k_off) |
232 | | ((cmd->msg_len - 1) << 4)); | |
6bca3580 AQ |
233 | |
234 | tda10086_diseqc_wait(state); | |
235 | ||
236 | tda10086_write_byte(state, 0x36, oldval); | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
241 | static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | |
242 | { | |
243 | struct tda10086_state* state = fe->demodulator_priv; | |
244 | u8 oldval = tda10086_read_byte(state, 0x36); | |
ea75baf4 | 245 | u8 t22k_off = 0x80; |
6bca3580 | 246 | |
271ddbf7 | 247 | dprintk ("%s\n", __func__); |
6bca3580 | 248 | |
ea75baf4 HH |
249 | if (state->config->diseqc_tone) |
250 | t22k_off = 0; | |
251 | ||
6bca3580 AQ |
252 | switch(minicmd) { |
253 | case SEC_MINI_A: | |
ea75baf4 | 254 | tda10086_write_byte(state, 0x36, 0x04 + t22k_off); |
6bca3580 AQ |
255 | break; |
256 | ||
257 | case SEC_MINI_B: | |
ea75baf4 | 258 | tda10086_write_byte(state, 0x36, 0x06 + t22k_off); |
6bca3580 AQ |
259 | break; |
260 | } | |
261 | ||
262 | tda10086_diseqc_wait(state); | |
263 | ||
264 | tda10086_write_byte(state, 0x36, oldval); | |
265 | ||
266 | return 0; | |
267 | } | |
268 | ||
269 | static int tda10086_set_inversion(struct tda10086_state *state, | |
6714049e | 270 | struct dtv_frontend_properties *fe_params) |
6bca3580 AQ |
271 | { |
272 | u8 invval = 0x80; | |
273 | ||
271ddbf7 | 274 | dprintk ("%s %i %i\n", __func__, fe_params->inversion, state->config->invert); |
6bca3580 AQ |
275 | |
276 | switch(fe_params->inversion) { | |
277 | case INVERSION_OFF: | |
278 | if (state->config->invert) | |
279 | invval = 0x40; | |
280 | break; | |
281 | case INVERSION_ON: | |
282 | if (!state->config->invert) | |
283 | invval = 0x40; | |
284 | break; | |
285 | case INVERSION_AUTO: | |
286 | invval = 0x00; | |
287 | break; | |
288 | } | |
289 | tda10086_write_mask(state, 0x0c, 0xc0, invval); | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | static int tda10086_set_symbol_rate(struct tda10086_state *state, | |
6714049e | 295 | struct dtv_frontend_properties *fe_params) |
6bca3580 AQ |
296 | { |
297 | u8 dfn = 0; | |
298 | u8 afs = 0; | |
299 | u8 byp = 0; | |
300 | u8 reg37 = 0x43; | |
301 | u8 reg42 = 0x43; | |
302 | u64 big; | |
303 | u32 tmp; | |
304 | u32 bdr; | |
305 | u32 bdri; | |
6714049e | 306 | u32 symbol_rate = fe_params->symbol_rate; |
6bca3580 | 307 | |
271ddbf7 | 308 | dprintk ("%s %i\n", __func__, symbol_rate); |
6bca3580 | 309 | |
b1c54fe2 | 310 | /* setup the decimation and anti-aliasing filters.. */ |
6bca3580 AQ |
311 | if (symbol_rate < (u32) (SACLK * 0.0137)) { |
312 | dfn=4; | |
313 | afs=1; | |
314 | } else if (symbol_rate < (u32) (SACLK * 0.0208)) { | |
315 | dfn=4; | |
316 | afs=0; | |
317 | } else if (symbol_rate < (u32) (SACLK * 0.0270)) { | |
318 | dfn=3; | |
319 | afs=1; | |
320 | } else if (symbol_rate < (u32) (SACLK * 0.0416)) { | |
321 | dfn=3; | |
322 | afs=0; | |
323 | } else if (symbol_rate < (u32) (SACLK * 0.0550)) { | |
324 | dfn=2; | |
325 | afs=1; | |
326 | } else if (symbol_rate < (u32) (SACLK * 0.0833)) { | |
327 | dfn=2; | |
328 | afs=0; | |
329 | } else if (symbol_rate < (u32) (SACLK * 0.1100)) { | |
330 | dfn=1; | |
331 | afs=1; | |
332 | } else if (symbol_rate < (u32) (SACLK * 0.1666)) { | |
333 | dfn=1; | |
334 | afs=0; | |
335 | } else if (symbol_rate < (u32) (SACLK * 0.2200)) { | |
336 | dfn=0; | |
337 | afs=1; | |
338 | } else if (symbol_rate < (u32) (SACLK * 0.3333)) { | |
339 | dfn=0; | |
340 | afs=0; | |
341 | } else { | |
342 | reg37 = 0x63; | |
343 | reg42 = 0x4f; | |
344 | byp=1; | |
345 | } | |
346 | ||
b1c54fe2 | 347 | /* calculate BDR */ |
6bca3580 AQ |
348 | big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn); |
349 | big += ((SACLK/1000ULL)-1ULL); | |
350 | do_div(big, (SACLK/1000ULL)); | |
351 | bdr = big & 0xfffff; | |
352 | ||
b1c54fe2 | 353 | /* calculate BDRI */ |
6bca3580 AQ |
354 | tmp = (1<<dfn)*(symbol_rate/1000); |
355 | bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp; | |
356 | ||
357 | tda10086_write_byte(state, 0x21, (afs << 7) | dfn); | |
358 | tda10086_write_mask(state, 0x20, 0x08, byp << 3); | |
359 | tda10086_write_byte(state, 0x06, bdr); | |
360 | tda10086_write_byte(state, 0x07, bdr >> 8); | |
361 | tda10086_write_byte(state, 0x08, bdr >> 16); | |
362 | tda10086_write_byte(state, 0x09, bdri); | |
363 | tda10086_write_byte(state, 0x37, reg37); | |
364 | tda10086_write_byte(state, 0x42, reg42); | |
365 | ||
366 | return 0; | |
367 | } | |
368 | ||
369 | static int tda10086_set_fec(struct tda10086_state *state, | |
6714049e | 370 | struct dtv_frontend_properties *fe_params) |
6bca3580 AQ |
371 | { |
372 | u8 fecval; | |
373 | ||
6714049e | 374 | dprintk("%s %i\n", __func__, fe_params->fec_inner); |
6bca3580 | 375 | |
6714049e | 376 | switch (fe_params->fec_inner) { |
6bca3580 AQ |
377 | case FEC_1_2: |
378 | fecval = 0x00; | |
379 | break; | |
380 | case FEC_2_3: | |
381 | fecval = 0x01; | |
382 | break; | |
383 | case FEC_3_4: | |
384 | fecval = 0x02; | |
385 | break; | |
386 | case FEC_4_5: | |
387 | fecval = 0x03; | |
388 | break; | |
389 | case FEC_5_6: | |
390 | fecval = 0x04; | |
391 | break; | |
392 | case FEC_6_7: | |
393 | fecval = 0x05; | |
394 | break; | |
395 | case FEC_7_8: | |
396 | fecval = 0x06; | |
397 | break; | |
398 | case FEC_8_9: | |
399 | fecval = 0x07; | |
400 | break; | |
401 | case FEC_AUTO: | |
402 | fecval = 0x08; | |
403 | break; | |
404 | default: | |
405 | return -1; | |
406 | } | |
407 | tda10086_write_byte(state, 0x0d, fecval); | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
6714049e | 412 | static int tda10086_set_frontend(struct dvb_frontend *fe) |
6bca3580 | 413 | { |
6714049e | 414 | struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache; |
6bca3580 AQ |
415 | struct tda10086_state *state = fe->demodulator_priv; |
416 | int ret; | |
417 | u32 freq = 0; | |
418 | int freqoff; | |
419 | ||
271ddbf7 | 420 | dprintk ("%s\n", __func__); |
6bca3580 | 421 | |
b1c54fe2 | 422 | /* modify parameters for tuning */ |
c6604150 OE |
423 | tda10086_write_byte(state, 0x02, 0x35); |
424 | state->has_lock = false; | |
425 | ||
b1c54fe2 | 426 | /* set params */ |
6bca3580 | 427 | if (fe->ops.tuner_ops.set_params) { |
14d24d14 | 428 | fe->ops.tuner_ops.set_params(fe); |
6bca3580 AQ |
429 | if (fe->ops.i2c_gate_ctrl) |
430 | fe->ops.i2c_gate_ctrl(fe, 0); | |
431 | ||
432 | if (fe->ops.tuner_ops.get_frequency) | |
433 | fe->ops.tuner_ops.get_frequency(fe, &freq); | |
434 | if (fe->ops.i2c_gate_ctrl) | |
435 | fe->ops.i2c_gate_ctrl(fe, 0); | |
436 | } | |
437 | ||
b1c54fe2 | 438 | /* calcluate the frequency offset (in *Hz* not kHz) */ |
6bca3580 AQ |
439 | freqoff = fe_params->frequency - freq; |
440 | freqoff = ((1<<16) * freqoff) / (SACLK/1000); | |
441 | tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f)); | |
442 | tda10086_write_byte(state, 0x3e, freqoff); | |
443 | ||
444 | if ((ret = tda10086_set_inversion(state, fe_params)) < 0) | |
445 | return ret; | |
446 | if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0) | |
447 | return ret; | |
448 | if ((ret = tda10086_set_fec(state, fe_params)) < 0) | |
449 | return ret; | |
450 | ||
b1c54fe2 | 451 | /* soft reset + disable TS output until lock */ |
6bca3580 AQ |
452 | tda10086_write_mask(state, 0x10, 0x40, 0x40); |
453 | tda10086_write_mask(state, 0x00, 0x01, 0x00); | |
454 | ||
6714049e | 455 | state->symbol_rate = fe_params->symbol_rate; |
6bca3580 AQ |
456 | state->frequency = fe_params->frequency; |
457 | return 0; | |
458 | } | |
459 | ||
7c61d80a | 460 | static int tda10086_get_frontend(struct dvb_frontend *fe) |
6bca3580 | 461 | { |
7c61d80a | 462 | struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache; |
6bca3580 AQ |
463 | struct tda10086_state* state = fe->demodulator_priv; |
464 | u8 val; | |
465 | int tmp; | |
466 | u64 tmp64; | |
467 | ||
271ddbf7 | 468 | dprintk ("%s\n", __func__); |
6bca3580 | 469 | |
b1c54fe2 | 470 | /* check for invalid symbol rate */ |
6714049e | 471 | if (fe_params->symbol_rate < 500000) |
221a09d5 AQ |
472 | return -EINVAL; |
473 | ||
b1c54fe2 | 474 | /* calculate the updated frequency (note: we convert from Hz->kHz) */ |
6bca3580 AQ |
475 | tmp64 = tda10086_read_byte(state, 0x52); |
476 | tmp64 |= (tda10086_read_byte(state, 0x51) << 8); | |
477 | if (tmp64 & 0x8000) | |
478 | tmp64 |= 0xffffffffffff0000ULL; | |
479 | tmp64 = (tmp64 * (SACLK/1000ULL)); | |
480 | do_div(tmp64, (1ULL<<15) * (1ULL<<1)); | |
481 | fe_params->frequency = (int) state->frequency + (int) tmp64; | |
482 | ||
b1c54fe2 | 483 | /* the inversion */ |
6bca3580 AQ |
484 | val = tda10086_read_byte(state, 0x0c); |
485 | if (val & 0x80) { | |
486 | switch(val & 0x40) { | |
487 | case 0x00: | |
488 | fe_params->inversion = INVERSION_OFF; | |
489 | if (state->config->invert) | |
490 | fe_params->inversion = INVERSION_ON; | |
491 | break; | |
492 | default: | |
493 | fe_params->inversion = INVERSION_ON; | |
494 | if (state->config->invert) | |
495 | fe_params->inversion = INVERSION_OFF; | |
496 | break; | |
497 | } | |
498 | } else { | |
499 | tda10086_read_byte(state, 0x0f); | |
500 | switch(val & 0x02) { | |
501 | case 0x00: | |
502 | fe_params->inversion = INVERSION_OFF; | |
503 | if (state->config->invert) | |
504 | fe_params->inversion = INVERSION_ON; | |
505 | break; | |
506 | default: | |
507 | fe_params->inversion = INVERSION_ON; | |
508 | if (state->config->invert) | |
509 | fe_params->inversion = INVERSION_OFF; | |
510 | break; | |
511 | } | |
512 | } | |
513 | ||
b1c54fe2 | 514 | /* calculate the updated symbol rate */ |
6bca3580 AQ |
515 | tmp = tda10086_read_byte(state, 0x1d); |
516 | if (tmp & 0x80) | |
517 | tmp |= 0xffffff00; | |
518 | tmp = (tmp * 480 * (1<<1)) / 128; | |
519 | tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000); | |
6714049e | 520 | fe_params->symbol_rate = state->symbol_rate + tmp; |
6bca3580 | 521 | |
b1c54fe2 | 522 | /* the FEC */ |
6bca3580 AQ |
523 | val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4; |
524 | switch(val) { | |
525 | case 0x00: | |
6714049e | 526 | fe_params->fec_inner = FEC_1_2; |
6bca3580 AQ |
527 | break; |
528 | case 0x01: | |
6714049e | 529 | fe_params->fec_inner = FEC_2_3; |
6bca3580 AQ |
530 | break; |
531 | case 0x02: | |
6714049e | 532 | fe_params->fec_inner = FEC_3_4; |
6bca3580 AQ |
533 | break; |
534 | case 0x03: | |
6714049e | 535 | fe_params->fec_inner = FEC_4_5; |
6bca3580 AQ |
536 | break; |
537 | case 0x04: | |
6714049e | 538 | fe_params->fec_inner = FEC_5_6; |
6bca3580 AQ |
539 | break; |
540 | case 0x05: | |
6714049e | 541 | fe_params->fec_inner = FEC_6_7; |
6bca3580 AQ |
542 | break; |
543 | case 0x06: | |
6714049e | 544 | fe_params->fec_inner = FEC_7_8; |
6bca3580 AQ |
545 | break; |
546 | case 0x07: | |
6714049e | 547 | fe_params->fec_inner = FEC_8_9; |
6bca3580 AQ |
548 | break; |
549 | } | |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
554 | static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status) | |
555 | { | |
556 | struct tda10086_state* state = fe->demodulator_priv; | |
557 | u8 val; | |
558 | ||
271ddbf7 | 559 | dprintk ("%s\n", __func__); |
6bca3580 AQ |
560 | |
561 | val = tda10086_read_byte(state, 0x0e); | |
562 | *fe_status = 0; | |
563 | if (val & 0x01) | |
564 | *fe_status |= FE_HAS_SIGNAL; | |
565 | if (val & 0x02) | |
566 | *fe_status |= FE_HAS_CARRIER; | |
567 | if (val & 0x04) | |
568 | *fe_status |= FE_HAS_VITERBI; | |
569 | if (val & 0x08) | |
570 | *fe_status |= FE_HAS_SYNC; | |
c6604150 | 571 | if (val & 0x10) { |
6bca3580 | 572 | *fe_status |= FE_HAS_LOCK; |
c6604150 OE |
573 | if (!state->has_lock) { |
574 | state->has_lock = true; | |
b1c54fe2 | 575 | /* modify parameters for stable reception */ |
c6604150 OE |
576 | tda10086_write_byte(state, 0x02, 0x00); |
577 | } | |
578 | } | |
6bca3580 AQ |
579 | |
580 | return 0; | |
581 | } | |
582 | ||
583 | static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal) | |
584 | { | |
585 | struct tda10086_state* state = fe->demodulator_priv; | |
586 | u8 _str; | |
587 | ||
271ddbf7 | 588 | dprintk ("%s\n", __func__); |
6bca3580 | 589 | |
c6604150 | 590 | _str = 0xff - tda10086_read_byte(state, 0x43); |
6bca3580 AQ |
591 | *signal = (_str << 8) | _str; |
592 | ||
593 | return 0; | |
594 | } | |
595 | ||
596 | static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr) | |
597 | { | |
598 | struct tda10086_state* state = fe->demodulator_priv; | |
599 | u8 _snr; | |
600 | ||
271ddbf7 | 601 | dprintk ("%s\n", __func__); |
6bca3580 | 602 | |
c6604150 | 603 | _snr = 0xff - tda10086_read_byte(state, 0x1c); |
6bca3580 AQ |
604 | *snr = (_snr << 8) | _snr; |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
609 | static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
610 | { | |
611 | struct tda10086_state* state = fe->demodulator_priv; | |
612 | ||
271ddbf7 | 613 | dprintk ("%s\n", __func__); |
6bca3580 | 614 | |
b1c54fe2 | 615 | /* read it */ |
6bca3580 AQ |
616 | *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f; |
617 | ||
b1c54fe2 | 618 | /* reset counter */ |
6bca3580 AQ |
619 | tda10086_write_byte(state, 0x18, 0x00); |
620 | tda10086_write_byte(state, 0x18, 0x80); | |
621 | ||
622 | return 0; | |
623 | } | |
624 | ||
625 | static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber) | |
626 | { | |
627 | struct tda10086_state* state = fe->demodulator_priv; | |
628 | ||
271ddbf7 | 629 | dprintk ("%s\n", __func__); |
6bca3580 | 630 | |
b1c54fe2 | 631 | /* read it */ |
6bca3580 AQ |
632 | *ber = 0; |
633 | *ber |= tda10086_read_byte(state, 0x15); | |
634 | *ber |= tda10086_read_byte(state, 0x16) << 8; | |
635 | *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16; | |
636 | ||
637 | return 0; | |
638 | } | |
639 | ||
640 | static int tda10086_sleep(struct dvb_frontend* fe) | |
641 | { | |
642 | struct tda10086_state* state = fe->demodulator_priv; | |
643 | ||
271ddbf7 | 644 | dprintk ("%s\n", __func__); |
6bca3580 AQ |
645 | |
646 | tda10086_write_mask(state, 0x00, 0x08, 0x08); | |
647 | ||
648 | return 0; | |
649 | } | |
650 | ||
651 | static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) | |
652 | { | |
653 | struct tda10086_state* state = fe->demodulator_priv; | |
654 | ||
271ddbf7 | 655 | dprintk ("%s\n", __func__); |
6bca3580 AQ |
656 | |
657 | if (enable) { | |
658 | tda10086_write_mask(state, 0x00, 0x10, 0x10); | |
659 | } else { | |
660 | tda10086_write_mask(state, 0x00, 0x10, 0x00); | |
661 | } | |
662 | ||
663 | return 0; | |
664 | } | |
665 | ||
666 | static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) | |
667 | { | |
5581e130 MCC |
668 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
669 | ||
670 | if (p->symbol_rate > 20000000) { | |
6bca3580 AQ |
671 | fesettings->min_delay_ms = 50; |
672 | fesettings->step_size = 2000; | |
673 | fesettings->max_drift = 8000; | |
5581e130 | 674 | } else if (p->symbol_rate > 12000000) { |
6bca3580 AQ |
675 | fesettings->min_delay_ms = 100; |
676 | fesettings->step_size = 1500; | |
677 | fesettings->max_drift = 9000; | |
5581e130 | 678 | } else if (p->symbol_rate > 8000000) { |
6bca3580 AQ |
679 | fesettings->min_delay_ms = 100; |
680 | fesettings->step_size = 1000; | |
681 | fesettings->max_drift = 8000; | |
5581e130 | 682 | } else if (p->symbol_rate > 4000000) { |
6bca3580 AQ |
683 | fesettings->min_delay_ms = 100; |
684 | fesettings->step_size = 500; | |
685 | fesettings->max_drift = 7000; | |
5581e130 | 686 | } else if (p->symbol_rate > 2000000) { |
6bca3580 | 687 | fesettings->min_delay_ms = 200; |
5581e130 | 688 | fesettings->step_size = p->symbol_rate / 8000; |
6bca3580 AQ |
689 | fesettings->max_drift = 14 * fesettings->step_size; |
690 | } else { | |
691 | fesettings->min_delay_ms = 200; | |
5581e130 | 692 | fesettings->step_size = p->symbol_rate / 8000; |
6bca3580 AQ |
693 | fesettings->max_drift = 18 * fesettings->step_size; |
694 | } | |
695 | ||
696 | return 0; | |
697 | } | |
698 | ||
699 | static void tda10086_release(struct dvb_frontend* fe) | |
700 | { | |
701 | struct tda10086_state *state = fe->demodulator_priv; | |
702 | tda10086_sleep(fe); | |
703 | kfree(state); | |
704 | } | |
705 | ||
706 | static struct dvb_frontend_ops tda10086_ops = { | |
6714049e | 707 | .delsys = { SYS_DVBS }, |
6bca3580 AQ |
708 | .info = { |
709 | .name = "Philips TDA10086 DVB-S", | |
6bca3580 AQ |
710 | .frequency_min = 950000, |
711 | .frequency_max = 2150000, | |
712 | .frequency_stepsize = 125, /* kHz for QPSK frontends */ | |
713 | .symbol_rate_min = 1000000, | |
714 | .symbol_rate_max = 45000000, | |
715 | .caps = FE_CAN_INVERSION_AUTO | | |
716 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
717 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
718 | FE_CAN_QPSK | |
719 | }, | |
720 | ||
721 | .release = tda10086_release, | |
722 | ||
723 | .init = tda10086_init, | |
724 | .sleep = tda10086_sleep, | |
725 | .i2c_gate_ctrl = tda10086_i2c_gate_ctrl, | |
726 | ||
6714049e MCC |
727 | .set_frontend = tda10086_set_frontend, |
728 | .get_frontend = tda10086_get_frontend, | |
6bca3580 AQ |
729 | .get_tune_settings = tda10086_get_tune_settings, |
730 | ||
731 | .read_status = tda10086_read_status, | |
732 | .read_ber = tda10086_read_ber, | |
733 | .read_signal_strength = tda10086_read_signal_strength, | |
734 | .read_snr = tda10086_read_snr, | |
735 | .read_ucblocks = tda10086_read_ucblocks, | |
736 | ||
737 | .diseqc_send_master_cmd = tda10086_send_master_cmd, | |
738 | .diseqc_send_burst = tda10086_send_burst, | |
739 | .set_tone = tda10086_set_tone, | |
740 | }; | |
741 | ||
742 | struct dvb_frontend* tda10086_attach(const struct tda10086_config* config, | |
743 | struct i2c_adapter* i2c) | |
744 | { | |
745 | struct tda10086_state *state; | |
746 | ||
271ddbf7 | 747 | dprintk ("%s\n", __func__); |
6bca3580 AQ |
748 | |
749 | /* allocate memory for the internal state */ | |
084e24ac | 750 | state = kzalloc(sizeof(struct tda10086_state), GFP_KERNEL); |
6bca3580 AQ |
751 | if (!state) |
752 | return NULL; | |
753 | ||
754 | /* setup the state */ | |
755 | state->config = config; | |
756 | state->i2c = i2c; | |
757 | ||
758 | /* check if the demod is there */ | |
759 | if (tda10086_read_byte(state, 0x1e) != 0xe1) { | |
760 | kfree(state); | |
761 | return NULL; | |
762 | } | |
763 | ||
764 | /* create dvb_frontend */ | |
765 | memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops)); | |
766 | state->frontend.demodulator_priv = state; | |
767 | return &state->frontend; | |
768 | } | |
769 | ||
770 | module_param(debug, int, 0644); | |
771 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
772 | ||
773 | MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator"); | |
774 | MODULE_AUTHOR("Andrew de Quincey"); | |
775 | MODULE_LICENSE("GPL"); | |
776 | ||
777 | EXPORT_SYMBOL(tda10086_attach); |