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Merge tag 'nfsd-5.4' of git://linux-nfs.org/~bfields/linux
[linux-2.6-block.git] / drivers / media / dvb-frontends / tda10086.c
CommitLineData
74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
6bca3580
AQ		 2 /*
3 Driver for Philips tda10086 DVBS Demodulator
4
5 (c) 2006 Andrew de Quincey
6
6bca3580
AQ		 7
8 */
9
10#include <linux/init.h>
11#include <linux/module.h>
6bca3580
AQ		 12#include <linux/device.h>
13#include <linux/jiffies.h>
14#include <linux/string.h>
15#include <linux/slab.h>
16
fada1935 17#include <media/dvb_frontend.h>
6bca3580
AQ		 18#include "tda10086.h"
19
20#define SACLK 96000000
21
22struct tda10086_state {
23 struct i2c_adapter* i2c;
24 const struct tda10086_config* config;
25 struct dvb_frontend frontend;
26
27 /* private demod data */
28 u32 frequency;
29 u32 symbol_rate;
c6604150 30 bool has_lock;
6bca3580
AQ		 31};
32
ff699e6b 33static int debug;
6bca3580
AQ		 34#define dprintk(args...) \
35 do { \
36 if (debug) printk(KERN_DEBUG "tda10086: " args); \
37 } while (0)
38
39static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
40{
41 int ret;
42 u8 b0[] = { reg, data };
43 struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
44
45 msg.addr = state->config->demod_address;
46 ret = i2c_transfer(state->i2c, &msg, 1);
47
48 if (ret != 1)
49 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
271ddbf7 50 __func__, reg, data, ret);
6bca3580
AQ		 51
52 return (ret != 1) ? ret : 0;
53}
54
55static int tda10086_read_byte(struct tda10086_state *state, int reg)
56{
57 int ret;
58 u8 b0[] = { reg };
59 u8 b1[] = { 0 };
60 struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
61 { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
62
63 msg[0].addr = state->config->demod_address;
64 msg[1].addr = state->config->demod_address;
65 ret = i2c_transfer(state->i2c, msg, 2);
66
67 if (ret != 2) {
271ddbf7 68 dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg,
6bca3580
AQ		 69 ret);
70 return ret;
71 }
72
73 return b1[0];
74}
75
76static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
77{
78 int val;
79
b1c54fe2 80 /* read a byte and check */
6bca3580
AQ		 81 val = tda10086_read_byte(state, reg);
82 if (val < 0)
83 return val;
84
b1c54fe2 85 /* mask if off */
6bca3580
AQ		 86 val = val & ~mask;
87 val |= data & 0xff;
88
b1c54fe2 89 /* write it out again */
6bca3580
AQ		 90 return tda10086_write_byte(state, reg, val);
91}
92
93static int tda10086_init(struct dvb_frontend* fe)
94{
95 struct tda10086_state* state = fe->demodulator_priv;
ea75baf4 96 u8 t22k_off = 0x80;
6bca3580 97
271ddbf7 98 dprintk ("%s\n", __func__);
6bca3580 99
ea75baf4
HH		 100 if (state->config->diseqc_tone)
101 t22k_off = 0;
b1c54fe2 102 /* reset */
6bca3580
AQ		 103 tda10086_write_byte(state, 0x00, 0x00);
104 msleep(10);
105
b1c54fe2 106 /* misc setup */
6bca3580 107 tda10086_write_byte(state, 0x01, 0x94);
b1c54fe2 108 tda10086_write_byte(state, 0x02, 0x35); /* NOTE: TT drivers appear to disable CSWP */
c6604150 109 tda10086_write_byte(state, 0x03, 0xe4);
6bca3580
AQ		 110 tda10086_write_byte(state, 0x04, 0x43);
111 tda10086_write_byte(state, 0x0c, 0x0c);
b1c54fe2
HH		 112 tda10086_write_byte(state, 0x1b, 0xb0); /* noise threshold */
113 tda10086_write_byte(state, 0x20, 0x89); /* misc */
114 tda10086_write_byte(state, 0x30, 0x04); /* acquisition period length */
115 tda10086_write_byte(state, 0x32, 0x00); /* irq off */
116 tda10086_write_byte(state, 0x31, 0x56); /* setup AFC */
117
118 /* setup PLL (this assumes SACLK = 96MHz) */
119 tda10086_write_byte(state, 0x55, 0x2c); /* misc PLL setup */
9a1b04e4 120 if (state->config->xtal_freq == TDA10086_XTAL_16M) {
b1c54fe2
HH		 121 tda10086_write_byte(state, 0x3a, 0x0b); /* M=12 */
122 tda10086_write_byte(state, 0x3b, 0x01); /* P=2 */
9a1b04e4 123 } else {
b1c54fe2
HH		 124 tda10086_write_byte(state, 0x3a, 0x17); /* M=24 */
125 tda10086_write_byte(state, 0x3b, 0x00); /* P=1 */
9a1b04e4 126 }
b1c54fe2 127 tda10086_write_mask(state, 0x55, 0x20, 0x00); /* powerup PLL */
6bca3580 128
b1c54fe2 129 /* setup TS interface */
6bca3580
AQ		 130 tda10086_write_byte(state, 0x11, 0x81);
131 tda10086_write_byte(state, 0x12, 0x81);
b1c54fe2
HH		 132 tda10086_write_byte(state, 0x19, 0x40); /* parallel mode A + MSBFIRST */
133 tda10086_write_byte(state, 0x56, 0x80); /* powerdown WPLL - unused in the mode we use */
134 tda10086_write_byte(state, 0x57, 0x08); /* bypass WPLL - unused in the mode we use */
6bca3580
AQ		 135 tda10086_write_byte(state, 0x10, 0x2a);
136
b1c54fe2
HH		 137 /* setup ADC */
138 tda10086_write_byte(state, 0x58, 0x61); /* ADC setup */
139 tda10086_write_mask(state, 0x58, 0x01, 0x00); /* powerup ADC */
6bca3580 140
b1c54fe2 141 /* setup AGC */
6bca3580
AQ		 142 tda10086_write_byte(state, 0x05, 0x0B);
143 tda10086_write_byte(state, 0x37, 0x63);
b1c54fe2 144 tda10086_write_byte(state, 0x3f, 0x0a); /* NOTE: flydvb varies it */
6bca3580
AQ		 145 tda10086_write_byte(state, 0x40, 0x64);
146 tda10086_write_byte(state, 0x41, 0x4f);
147 tda10086_write_byte(state, 0x42, 0x43);
148
b1c54fe2
HH		 149 /* setup viterbi */
150 tda10086_write_byte(state, 0x1a, 0x11); /* VBER 10^6, DVB, QPSK */
6bca3580 151
b1c54fe2 152 /* setup carrier recovery */
6bca3580
AQ		 153 tda10086_write_byte(state, 0x3d, 0x80);
154
b1c54fe2
HH		 155 /* setup SEC */
156 tda10086_write_byte(state, 0x36, t22k_off); /* all SEC off, 22k tone */
157 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000)));
158 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8);
6bca3580
AQ		 159
160 return 0;
161}
162
163static void tda10086_diseqc_wait(struct tda10086_state *state)
164{
165 unsigned long timeout = jiffies + msecs_to_jiffies(200);
166 while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
167 if(time_after(jiffies, timeout)) {
271ddbf7 168 printk("%s: diseqc queue not ready, command may be lost.\n", __func__);
6bca3580
AQ		 169 break;
170 }
171 msleep(10);
172 }
173}
174
0df289a2
MCC		 175static int tda10086_set_tone(struct dvb_frontend *fe,
176 enum fe_sec_tone_mode tone)
6bca3580
AQ		 177{
178 struct tda10086_state* state = fe->demodulator_priv;
ea75baf4 179 u8 t22k_off = 0x80;
6bca3580 180
271ddbf7 181 dprintk ("%s\n", __func__);
6bca3580 182
ea75baf4
HH		 183 if (state->config->diseqc_tone)
184 t22k_off = 0;
185
33f77714 186 switch (tone) {
6bca3580 187 case SEC_TONE_OFF:
ea75baf4 188 tda10086_write_byte(state, 0x36, t22k_off);
6bca3580
AQ		 189 break;
190
191 case SEC_TONE_ON:
ea75baf4 192 tda10086_write_byte(state, 0x36, 0x01 + t22k_off);
6bca3580
AQ		 193 break;
194 }
195
196 return 0;
197}
198
199static int tda10086_send_master_cmd (struct dvb_frontend* fe,
200 struct dvb_diseqc_master_cmd* cmd)
201{
202 struct tda10086_state* state = fe->demodulator_priv;
203 int i;
204 u8 oldval;
ea75baf4 205 u8 t22k_off = 0x80;
6bca3580 206
271ddbf7 207 dprintk ("%s\n", __func__);
6bca3580 208
ea75baf4
HH		 209 if (state->config->diseqc_tone)
210 t22k_off = 0;
211
6bca3580
AQ		 212 if (cmd->msg_len > 6)
213 return -EINVAL;
214 oldval = tda10086_read_byte(state, 0x36);
215
216 for(i=0; i< cmd->msg_len; i++) {
217 tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
218 }
ea75baf4
HH		 219 tda10086_write_byte(state, 0x36, (0x08 + t22k_off)
220 | ((cmd->msg_len - 1) << 4));
6bca3580
AQ		 221
222 tda10086_diseqc_wait(state);
223
224 tda10086_write_byte(state, 0x36, oldval);
225
226 return 0;
227}
228
0df289a2
MCC		 229static int tda10086_send_burst(struct dvb_frontend *fe,
230 enum fe_sec_mini_cmd minicmd)
6bca3580
AQ		 231{
232 struct tda10086_state* state = fe->demodulator_priv;
233 u8 oldval = tda10086_read_byte(state, 0x36);
ea75baf4 234 u8 t22k_off = 0x80;
6bca3580 235
271ddbf7 236 dprintk ("%s\n", __func__);
6bca3580 237
ea75baf4
HH		 238 if (state->config->diseqc_tone)
239 t22k_off = 0;
240
6bca3580
AQ		 241 switch(minicmd) {
242 case SEC_MINI_A:
ea75baf4 243 tda10086_write_byte(state, 0x36, 0x04 + t22k_off);
6bca3580
AQ		 244 break;
245
246 case SEC_MINI_B:
ea75baf4 247 tda10086_write_byte(state, 0x36, 0x06 + t22k_off);
6bca3580
AQ		 248 break;
249 }
250
251 tda10086_diseqc_wait(state);
252
253 tda10086_write_byte(state, 0x36, oldval);
254
255 return 0;
256}
257
258static int tda10086_set_inversion(struct tda10086_state *state,
6714049e 259 struct dtv_frontend_properties *fe_params)
6bca3580
AQ		 260{
261 u8 invval = 0x80;
262
271ddbf7 263 dprintk ("%s %i %i\n", __func__, fe_params->inversion, state->config->invert);
6bca3580
AQ		 264
265 switch(fe_params->inversion) {
266 case INVERSION_OFF:
267 if (state->config->invert)
268 invval = 0x40;
269 break;
270 case INVERSION_ON:
271 if (!state->config->invert)
272 invval = 0x40;
273 break;
274 case INVERSION_AUTO:
275 invval = 0x00;
276 break;
277 }
278 tda10086_write_mask(state, 0x0c, 0xc0, invval);
279
280 return 0;
281}
282
283static int tda10086_set_symbol_rate(struct tda10086_state *state,
6714049e 284 struct dtv_frontend_properties *fe_params)
6bca3580
AQ		 285{
286 u8 dfn = 0;
287 u8 afs = 0;
288 u8 byp = 0;
289 u8 reg37 = 0x43;
290 u8 reg42 = 0x43;
291 u64 big;
292 u32 tmp;
293 u32 bdr;
294 u32 bdri;
6714049e 295 u32 symbol_rate = fe_params->symbol_rate;
6bca3580 296
271ddbf7 297 dprintk ("%s %i\n", __func__, symbol_rate);
6bca3580 298
b1c54fe2 299 /* setup the decimation and anti-aliasing filters.. */
6bca3580
AQ		 300 if (symbol_rate < (u32) (SACLK * 0.0137)) {
301 dfn=4;
302 afs=1;
303 } else if (symbol_rate < (u32) (SACLK * 0.0208)) {
304 dfn=4;
305 afs=0;
306 } else if (symbol_rate < (u32) (SACLK * 0.0270)) {
307 dfn=3;
308 afs=1;
309 } else if (symbol_rate < (u32) (SACLK * 0.0416)) {
310 dfn=3;
311 afs=0;
312 } else if (symbol_rate < (u32) (SACLK * 0.0550)) {
313 dfn=2;
314 afs=1;
315 } else if (symbol_rate < (u32) (SACLK * 0.0833)) {
316 dfn=2;
317 afs=0;
318 } else if (symbol_rate < (u32) (SACLK * 0.1100)) {
319 dfn=1;
320 afs=1;
321 } else if (symbol_rate < (u32) (SACLK * 0.1666)) {
322 dfn=1;
323 afs=0;
324 } else if (symbol_rate < (u32) (SACLK * 0.2200)) {
325 dfn=0;
326 afs=1;
327 } else if (symbol_rate < (u32) (SACLK * 0.3333)) {
328 dfn=0;
329 afs=0;
330 } else {
331 reg37 = 0x63;
332 reg42 = 0x4f;
333 byp=1;
334 }
335
b1c54fe2 336 /* calculate BDR */
6bca3580
AQ		 337 big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
338 big += ((SACLK/1000ULL)-1ULL);
339 do_div(big, (SACLK/1000ULL));
340 bdr = big & 0xfffff;
341
b1c54fe2 342 /* calculate BDRI */
6bca3580
AQ		 343 tmp = (1<<dfn)*(symbol_rate/1000);
344 bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
345
346 tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
347 tda10086_write_mask(state, 0x20, 0x08, byp << 3);
348 tda10086_write_byte(state, 0x06, bdr);
349 tda10086_write_byte(state, 0x07, bdr >> 8);
350 tda10086_write_byte(state, 0x08, bdr >> 16);
351 tda10086_write_byte(state, 0x09, bdri);
352 tda10086_write_byte(state, 0x37, reg37);
353 tda10086_write_byte(state, 0x42, reg42);
354
355 return 0;
356}
357
358static int tda10086_set_fec(struct tda10086_state *state,
6714049e 359 struct dtv_frontend_properties *fe_params)
6bca3580
AQ		 360{
361 u8 fecval;
362
6714049e 363 dprintk("%s %i\n", __func__, fe_params->fec_inner);
6bca3580 364
6714049e 365 switch (fe_params->fec_inner) {
6bca3580
AQ		 366 case FEC_1_2:
367 fecval = 0x00;
368 break;
369 case FEC_2_3:
370 fecval = 0x01;
371 break;
372 case FEC_3_4:
373 fecval = 0x02;
374 break;
375 case FEC_4_5:
376 fecval = 0x03;
377 break;
378 case FEC_5_6:
379 fecval = 0x04;
380 break;
381 case FEC_6_7:
382 fecval = 0x05;
383 break;
384 case FEC_7_8:
385 fecval = 0x06;
386 break;
387 case FEC_8_9:
388 fecval = 0x07;
389 break;
390 case FEC_AUTO:
391 fecval = 0x08;
392 break;
393 default:
394 return -1;
395 }
396 tda10086_write_byte(state, 0x0d, fecval);
397
398 return 0;
399}
400
6714049e 401static int tda10086_set_frontend(struct dvb_frontend *fe)
6bca3580 402{
6714049e 403 struct dtv_frontend_properties *fe_params = &fe->dtv_property_cache;
6bca3580
AQ		 404 struct tda10086_state *state = fe->demodulator_priv;
405 int ret;
406 u32 freq = 0;
407 int freqoff;
408
271ddbf7 409 dprintk ("%s\n", __func__);
6bca3580 410
b1c54fe2 411 /* modify parameters for tuning */
c6604150
OE		 412 tda10086_write_byte(state, 0x02, 0x35);
413 state->has_lock = false;
414
b1c54fe2 415 /* set params */
6bca3580 416 if (fe->ops.tuner_ops.set_params) {
14d24d14 417 fe->ops.tuner_ops.set_params(fe);
6bca3580
AQ		 418 if (fe->ops.i2c_gate_ctrl)
419 fe->ops.i2c_gate_ctrl(fe, 0);
420
421 if (fe->ops.tuner_ops.get_frequency)
422 fe->ops.tuner_ops.get_frequency(fe, &freq);
423 if (fe->ops.i2c_gate_ctrl)
424 fe->ops.i2c_gate_ctrl(fe, 0);
425 }
426
868c9a17 427 /* calculate the frequency offset (in *Hz* not kHz) */
6bca3580
AQ		 428 freqoff = fe_params->frequency - freq;
429 freqoff = ((1<<16) * freqoff) / (SACLK/1000);
430 tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
431 tda10086_write_byte(state, 0x3e, freqoff);
432
433 if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
434 return ret;
435 if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
436 return ret;
437 if ((ret = tda10086_set_fec(state, fe_params)) < 0)
438 return ret;
439
b1c54fe2 440 /* soft reset + disable TS output until lock */
6bca3580
AQ		 441 tda10086_write_mask(state, 0x10, 0x40, 0x40);
442 tda10086_write_mask(state, 0x00, 0x01, 0x00);
443
6714049e 444 state->symbol_rate = fe_params->symbol_rate;
6bca3580
AQ		 445 state->frequency = fe_params->frequency;
446 return 0;
447}
448
7e3e68bc
MCC		 449static int tda10086_get_frontend(struct dvb_frontend *fe,
450 struct dtv_frontend_properties *fe_params)
6bca3580
AQ		 451{
452 struct tda10086_state* state = fe->demodulator_priv;
453 u8 val;
454 int tmp;
455 u64 tmp64;
456
271ddbf7 457 dprintk ("%s\n", __func__);
6bca3580 458
b1c54fe2 459 /* check for invalid symbol rate */
6714049e 460 if (fe_params->symbol_rate < 500000)
221a09d5
AQ		 461 return -EINVAL;
462
b1c54fe2 463 /* calculate the updated frequency (note: we convert from Hz->kHz) */
b674ac29
MCC		 464 tmp64 = ((u64)tda10086_read_byte(state, 0x52)
465 | (tda10086_read_byte(state, 0x51) << 8));
6bca3580
AQ		 466 if (tmp64 & 0x8000)
467 tmp64 |= 0xffffffffffff0000ULL;
468 tmp64 = (tmp64 * (SACLK/1000ULL));
469 do_div(tmp64, (1ULL<<15) * (1ULL<<1));
470 fe_params->frequency = (int) state->frequency + (int) tmp64;
471
b1c54fe2 472 /* the inversion */
6bca3580
AQ		 473 val = tda10086_read_byte(state, 0x0c);
474 if (val & 0x80) {
475 switch(val & 0x40) {
476 case 0x00:
477 fe_params->inversion = INVERSION_OFF;
478 if (state->config->invert)
479 fe_params->inversion = INVERSION_ON;
480 break;
481 default:
482 fe_params->inversion = INVERSION_ON;
483 if (state->config->invert)
484 fe_params->inversion = INVERSION_OFF;
485 break;
486 }
487 } else {
488 tda10086_read_byte(state, 0x0f);
489 switch(val & 0x02) {
490 case 0x00:
491 fe_params->inversion = INVERSION_OFF;
492 if (state->config->invert)
493 fe_params->inversion = INVERSION_ON;
494 break;
495 default:
496 fe_params->inversion = INVERSION_ON;
497 if (state->config->invert)
498 fe_params->inversion = INVERSION_OFF;
499 break;
500 }
501 }
502
b1c54fe2 503 /* calculate the updated symbol rate */
6bca3580
AQ		 504 tmp = tda10086_read_byte(state, 0x1d);
505 if (tmp & 0x80)
506 tmp |= 0xffffff00;
507 tmp = (tmp * 480 * (1<<1)) / 128;
508 tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
6714049e 509 fe_params->symbol_rate = state->symbol_rate + tmp;
6bca3580 510
b1c54fe2 511 /* the FEC */
6bca3580
AQ		 512 val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
513 switch(val) {
514 case 0x00:
6714049e 515 fe_params->fec_inner = FEC_1_2;
6bca3580
AQ		 516 break;
517 case 0x01:
6714049e 518 fe_params->fec_inner = FEC_2_3;
6bca3580
AQ		 519 break;
520 case 0x02:
6714049e 521 fe_params->fec_inner = FEC_3_4;
6bca3580
AQ		 522 break;
523 case 0x03:
6714049e 524 fe_params->fec_inner = FEC_4_5;
6bca3580
AQ		 525 break;
526 case 0x04:
6714049e 527 fe_params->fec_inner = FEC_5_6;
6bca3580
AQ		 528 break;
529 case 0x05:
6714049e 530 fe_params->fec_inner = FEC_6_7;
6bca3580
AQ		 531 break;
532 case 0x06:
6714049e 533 fe_params->fec_inner = FEC_7_8;
6bca3580
AQ		 534 break;
535 case 0x07:
6714049e 536 fe_params->fec_inner = FEC_8_9;
6bca3580
AQ		 537 break;
538 }
539
540 return 0;
541}
542
0df289a2
MCC		 543static int tda10086_read_status(struct dvb_frontend *fe,
544 enum fe_status *fe_status)
6bca3580
AQ		 545{
546 struct tda10086_state* state = fe->demodulator_priv;
547 u8 val;
548
271ddbf7 549 dprintk ("%s\n", __func__);
6bca3580
AQ		 550
551 val = tda10086_read_byte(state, 0x0e);
552 *fe_status = 0;
553 if (val & 0x01)
554 *fe_status |= FE_HAS_SIGNAL;
555 if (val & 0x02)
556 *fe_status |= FE_HAS_CARRIER;
557 if (val & 0x04)
558 *fe_status |= FE_HAS_VITERBI;
559 if (val & 0x08)
560 *fe_status |= FE_HAS_SYNC;
c6604150 561 if (val & 0x10) {
6bca3580 562 *fe_status |= FE_HAS_LOCK;
c6604150
OE		 563 if (!state->has_lock) {
564 state->has_lock = true;
b1c54fe2 565 /* modify parameters for stable reception */
c6604150
OE		 566 tda10086_write_byte(state, 0x02, 0x00);
567 }
568 }
6bca3580
AQ		 569
570 return 0;
571}
572
573static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
574{
575 struct tda10086_state* state = fe->demodulator_priv;
576 u8 _str;
577
271ddbf7 578 dprintk ("%s\n", __func__);
6bca3580 579
c6604150 580 _str = 0xff - tda10086_read_byte(state, 0x43);
6bca3580
AQ		 581 *signal = (_str << 8) | _str;
582
583 return 0;
584}
585
586static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
587{
588 struct tda10086_state* state = fe->demodulator_priv;
589 u8 _snr;
590
271ddbf7 591 dprintk ("%s\n", __func__);
6bca3580 592
c6604150 593 _snr = 0xff - tda10086_read_byte(state, 0x1c);
6bca3580
AQ		 594 *snr = (_snr << 8) | _snr;
595
596 return 0;
597}
598
599static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
600{
601 struct tda10086_state* state = fe->demodulator_priv;
602
271ddbf7 603 dprintk ("%s\n", __func__);
6bca3580 604
b1c54fe2 605 /* read it */
6bca3580
AQ		 606 *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
607
b1c54fe2 608 /* reset counter */
6bca3580
AQ		 609 tda10086_write_byte(state, 0x18, 0x00);
610 tda10086_write_byte(state, 0x18, 0x80);
611
612 return 0;
613}
614
615static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
616{
617 struct tda10086_state* state = fe->demodulator_priv;
618
271ddbf7 619 dprintk ("%s\n", __func__);
6bca3580 620
b1c54fe2 621 /* read it */
6bca3580
AQ		 622 *ber = 0;
623 *ber |= tda10086_read_byte(state, 0x15);
624 *ber |= tda10086_read_byte(state, 0x16) << 8;
625 *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
626
627 return 0;
628}
629
630static int tda10086_sleep(struct dvb_frontend* fe)
631{
632 struct tda10086_state* state = fe->demodulator_priv;
633
271ddbf7 634 dprintk ("%s\n", __func__);
6bca3580
AQ		 635
636 tda10086_write_mask(state, 0x00, 0x08, 0x08);
637
638 return 0;
639}
640
641static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
642{
643 struct tda10086_state* state = fe->demodulator_priv;
644
271ddbf7 645 dprintk ("%s\n", __func__);
6bca3580
AQ		 646
647 if (enable) {
648 tda10086_write_mask(state, 0x00, 0x10, 0x10);
649 } else {
650 tda10086_write_mask(state, 0x00, 0x10, 0x00);
651 }
652
653 return 0;
654}
655
656static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
657{
5581e130
MCC		 658 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
659
660 if (p->symbol_rate > 20000000) {
6bca3580
AQ		 661 fesettings->min_delay_ms = 50;
662 fesettings->step_size = 2000;
663 fesettings->max_drift = 8000;
5581e130 664 } else if (p->symbol_rate > 12000000) {
6bca3580
AQ		 665 fesettings->min_delay_ms = 100;
666 fesettings->step_size = 1500;
667 fesettings->max_drift = 9000;
5581e130 668 } else if (p->symbol_rate > 8000000) {
6bca3580
AQ		 669 fesettings->min_delay_ms = 100;
670 fesettings->step_size = 1000;
671 fesettings->max_drift = 8000;
5581e130 672 } else if (p->symbol_rate > 4000000) {
6bca3580
AQ		 673 fesettings->min_delay_ms = 100;
674 fesettings->step_size = 500;
675 fesettings->max_drift = 7000;
5581e130 676 } else if (p->symbol_rate > 2000000) {
6bca3580 677 fesettings->min_delay_ms = 200;
5581e130 678 fesettings->step_size = p->symbol_rate / 8000;
6bca3580
AQ		 679 fesettings->max_drift = 14 * fesettings->step_size;
680 } else {
681 fesettings->min_delay_ms = 200;
5581e130 682 fesettings->step_size = p->symbol_rate / 8000;
6bca3580
AQ		 683 fesettings->max_drift = 18 * fesettings->step_size;
684 }
685
686 return 0;
687}
688
689static void tda10086_release(struct dvb_frontend* fe)
690{
691 struct tda10086_state *state = fe->demodulator_priv;
692 tda10086_sleep(fe);
693 kfree(state);
694}
695
bd336e63 696static const struct dvb_frontend_ops tda10086_ops = {
6714049e 697 .delsys = { SYS_DVBS },
6bca3580
AQ		 698 .info = {
699 .name = "Philips TDA10086 DVB-S",
f1b1eabf
MCC		 700 .frequency_min_hz = 950 * MHz,
701 .frequency_max_hz = 2150 * MHz,
702 .frequency_stepsize_hz = 125 * kHz,
6bca3580
AQ		 703 .symbol_rate_min = 1000000,
704 .symbol_rate_max = 45000000,
705 .caps = FE_CAN_INVERSION_AUTO |
706 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
707 FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
708 FE_CAN_QPSK
709 },
710
711 .release = tda10086_release,
712
713 .init = tda10086_init,
714 .sleep = tda10086_sleep,
715 .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
716
6714049e
MCC		 717 .set_frontend = tda10086_set_frontend,
718 .get_frontend = tda10086_get_frontend,
6bca3580
AQ		 719 .get_tune_settings = tda10086_get_tune_settings,
720
721 .read_status = tda10086_read_status,
722 .read_ber = tda10086_read_ber,
723 .read_signal_strength = tda10086_read_signal_strength,
724 .read_snr = tda10086_read_snr,
725 .read_ucblocks = tda10086_read_ucblocks,
726
727 .diseqc_send_master_cmd = tda10086_send_master_cmd,
728 .diseqc_send_burst = tda10086_send_burst,
729 .set_tone = tda10086_set_tone,
730};
731
732struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
733 struct i2c_adapter* i2c)
734{
735 struct tda10086_state *state;
736
271ddbf7 737 dprintk ("%s\n", __func__);
6bca3580
AQ		 738
739 /* allocate memory for the internal state */
084e24ac 740 state = kzalloc(sizeof(struct tda10086_state), GFP_KERNEL);
6bca3580
AQ		 741 if (!state)
742 return NULL;
743
744 /* setup the state */
745 state->config = config;
746 state->i2c = i2c;
747
748 /* check if the demod is there */
749 if (tda10086_read_byte(state, 0x1e) != 0xe1) {
750 kfree(state);
751 return NULL;
752 }
753
754 /* create dvb_frontend */
755 memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
756 state->frontend.demodulator_priv = state;
757 return &state->frontend;
758}
759
760module_param(debug, int, 0644);
761MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
762
763MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
764MODULE_AUTHOR("Andrew de Quincey");
765MODULE_LICENSE("GPL");
766
767EXPORT_SYMBOL(tda10086_attach);
Linux 6.x block layer and io_uring tree(s)