[linux-2.6-block.git] / drivers / media / dvb-frontends / tda10023.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
    TDA10023  - DVB-C decoder
    (as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)

    Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
    Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)

    Remotely based on tda10021.c
    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
		   Support for TDA10021

*/

#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>

#include <asm/div64.h>

#include <media/dvb_frontend.h>
#include "tda1002x.h"

#define REG0_INIT_VAL 0x23

struct tda10023_state {
	struct i2c_adapter* i2c;
	/* configuration settings */
	const struct tda10023_config *config;
	struct dvb_frontend frontend;

	u8 pwm;
	u8 reg0;

	/* clock settings */
	u32 xtal;
	u8 pll_m;
	u8 pll_p;
	u8 pll_n;
	u32 sysclk;
};

#define dprintk(x...)

static int verbose;

static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
{
	u8 b0 [] = { reg };
	u8 b1 [] = { 0 };
	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
				  { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
	int ret;

	ret = i2c_transfer (state->i2c, msg, 2);
	if (ret != 2) {
		int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
		printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error (reg == 0x%02x, ret == %i)\n",
			num, __func__, reg, ret);
	}
	return b1[0];
}

static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	int ret;

	ret = i2c_transfer (state->i2c, &msg, 1);
	if (ret != 1) {
		int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
		printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
			num, __func__, reg, data, ret);
	}
	return (ret != 1) ? -EREMOTEIO : 0;
}


static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
{
	if (mask==0xff)
		return tda10023_writereg(state, reg, data);
	else {
		u8 val;
		val=tda10023_readreg(state,reg);
		val&=~mask;
		val|=(data&mask);
		return tda10023_writereg(state, reg, val);
	}
}

static void tda10023_writetab(struct tda10023_state* state, u8* tab)
{
	u8 r,m,v;
	while (1) {
		r=*tab++;
		m=*tab++;
		v=*tab++;
		if (r==0xff) {
			if (m==0xff)
				break;
			else
				msleep(m);
		}
		else
			tda10023_writebit(state,r,m,v);
	}
}

//get access to tuner
static int lock_tuner(struct tda10023_state* state)
{
	u8 buf[2] = { 0x0f, 0xc0 };
	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};

	if(i2c_transfer(state->i2c, &msg, 1) != 1)
	{
		printk("tda10023: lock tuner fails\n");
		return -EREMOTEIO;
	}
	return 0;
}

//release access from tuner
static int unlock_tuner(struct tda10023_state* state)
{
	u8 buf[2] = { 0x0f, 0x40 };
	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};

	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
	{
		printk("tda10023: unlock tuner fails\n");
		return -EREMOTEIO;
	}
	return 0;
}

static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
{
	reg0 |= state->reg0 & 0x63;

	tda10023_writereg (state, 0x00, reg0 & 0xfe);
	tda10023_writereg (state, 0x00, reg0 | 0x01);

	state->reg0 = reg0;
	return 0;
}

static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
{
	s32 BDR;
	s32 BDRI;
	s16 SFIL=0;
	u16 NDEC = 0;

	/* avoid floating point operations multiplying syscloc and divider
	   by 10 */
	u32 sysclk_x_10 = state->sysclk * 10;

	if (sr < (u32)(sysclk_x_10/984)) {
		NDEC=3;
		SFIL=1;
	} else if (sr < (u32)(sysclk_x_10/640)) {
		NDEC=3;
		SFIL=0;
	} else if (sr < (u32)(sysclk_x_10/492)) {
		NDEC=2;
		SFIL=1;
	} else if (sr < (u32)(sysclk_x_10/320)) {
		NDEC=2;
		SFIL=0;
	} else if (sr < (u32)(sysclk_x_10/246)) {
		NDEC=1;
		SFIL=1;
	} else if (sr < (u32)(sysclk_x_10/160)) {
		NDEC=1;
		SFIL=0;
	} else if (sr < (u32)(sysclk_x_10/123)) {
		NDEC=0;
		SFIL=1;
	}

	BDRI = (state->sysclk)*16;
	BDRI>>=NDEC;
	BDRI +=sr/2;
	BDRI /=sr;

	if (BDRI>255)
		BDRI=255;

	{
		u64 BDRX;

		BDRX=1<<(24+NDEC);
		BDRX*=sr;
		do_div(BDRX, state->sysclk);	/* BDRX/=SYSCLK; */

		BDR=(s32)BDRX;
	}
	dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
		sr, BDR, BDRI, NDEC);
	tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
	tda10023_writereg (state, 0x0a, BDR&255);
	tda10023_writereg (state, 0x0b, (BDR>>8)&255);
	tda10023_writereg (state, 0x0c, (BDR>>16)&31);
	tda10023_writereg (state, 0x0d, BDRI);
	tda10023_writereg (state, 0x3d, (SFIL<<7));
	return 0;
}

static int tda10023_init (struct dvb_frontend *fe)
{
	struct tda10023_state* state = fe->demodulator_priv;
	u8 tda10023_inittab[] = {
/*        reg  mask val */
/* 000 */ 0x2a, 0xff, 0x02,  /* PLL3, Bypass, Power Down */
/* 003 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
/* 006 */ 0x2a, 0xff, 0x03,  /* PLL3, Bypass, Power Down */
/* 009 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
			   /* PLL1 */
/* 012 */ 0x28, 0xff, (state->pll_m-1),
			   /* PLL2 */
/* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
			   /* GPR FSAMPLING=1 */
/* 018 */ 0x00, 0xff, REG0_INIT_VAL,
/* 021 */ 0x2a, 0xff, 0x08,  /* PLL3 PSACLK=1 */
/* 024 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
/* 027 */ 0x1f, 0xff, 0x00,  /* RESET */
/* 030 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
/* 033 */ 0xe6, 0x0c, 0x04,  /* RSCFG_IND */
/* 036 */ 0x10, 0xc0, 0x80,  /* DECDVBCFG1 PBER=1 */

/* 039 */ 0x0e, 0xff, 0x82,  /* GAIN1 */
/* 042 */ 0x03, 0x08, 0x08,  /* CLKCONF DYN=1 */
/* 045 */ 0x2e, 0xbf, 0x30,  /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
				       PPWMTUN=0 PPWMIF=0 */
/* 048 */ 0x01, 0xff, 0x30,  /* AGCREF */
/* 051 */ 0x1e, 0x84, 0x84,  /* CONTROL SACLK_ON=1 */
/* 054 */ 0x1b, 0xff, 0xc8,  /* ADC TWOS=1 */
/* 057 */ 0x3b, 0xff, 0xff,  /* IFMAX */
/* 060 */ 0x3c, 0xff, 0x00,  /* IFMIN */
/* 063 */ 0x34, 0xff, 0x00,  /* PWMREF */
/* 066 */ 0x35, 0xff, 0xff,  /* TUNMAX */
/* 069 */ 0x36, 0xff, 0x00,  /* TUNMIN */
/* 072 */ 0x06, 0xff, 0x7f,  /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
/* 075 */ 0x1c, 0x30, 0x30,  /* EQCONF2 STEPALGO=SGNALGO=1 */
/* 078 */ 0x37, 0xff, 0xf6,  /* DELTAF_LSB */
/* 081 */ 0x38, 0xff, 0xff,  /* DELTAF_MSB */
/* 084 */ 0x02, 0xff, 0x93,  /* AGCCONF1  IFS=1 KAGCIF=2 KAGCTUN=3 */
/* 087 */ 0x2d, 0xff, 0xf6,  /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
/* 090 */ 0x04, 0x10, 0x00,  /* SWRAMP=1 */
/* 093 */ 0x12, 0xff, TDA10023_OUTPUT_MODE_PARALLEL_B, /*
				INTP1 POCLKP=1 FEL=1 MFS=0 */
/* 096 */ 0x2b, 0x01, 0xa1,  /* INTS1 */
/* 099 */ 0x20, 0xff, 0x04,  /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
/* 102 */ 0x2c, 0xff, 0x0d,  /* INTP/S TRIP=0 TRIS=0 */
/* 105 */ 0xc4, 0xff, 0x00,
/* 108 */ 0xc3, 0x30, 0x00,
/* 111 */ 0xb5, 0xff, 0x19,  /* ERAGC_THD */
/* 114 */ 0x00, 0x03, 0x01,  /* GPR, CLBS soft reset */
/* 117 */ 0x00, 0x03, 0x03,  /* GPR, CLBS soft reset */
/* 120 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
/* 123 */ 0xff, 0xff, 0xff
};
	dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);

	/* override default values if set in config */
	if (state->config->deltaf) {
		tda10023_inittab[80] = (state->config->deltaf & 0xff);
		tda10023_inittab[83] = (state->config->deltaf >> 8);
	}

	if (state->config->output_mode)
		tda10023_inittab[95] = state->config->output_mode;

	tda10023_writetab(state, tda10023_inittab);

	return 0;
}

struct qam_params {
	u8 qam, lockthr, mseth, aref, agcrefnyq, eragnyq_thd;
};

static int tda10023_set_parameters(struct dvb_frontend *fe)
{
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	u32 delsys  = c->delivery_system;
	unsigned qam = c->modulation;
	bool is_annex_c;
	struct tda10023_state* state = fe->demodulator_priv;
	static const struct qam_params qam_params[] = {
		/* Modulation  QAM    LOCKTHR   MSETH   AREF AGCREFNYQ ERAGCNYQ_THD */
		[QPSK]    = { (5<<2),  0x78,    0x8c,   0x96,   0x78,   0x4c  },
		[QAM_16]  = { (0<<2),  0x87,    0xa2,   0x91,   0x8c,   0x57  },
		[QAM_32]  = { (1<<2),  0x64,    0x74,   0x96,   0x8c,   0x57  },
		[QAM_64]  = { (2<<2),  0x46,    0x43,   0x6a,   0x6a,   0x44  },
		[QAM_128] = { (3<<2),  0x36,    0x34,   0x7e,   0x78,   0x4c  },
		[QAM_256] = { (4<<2),  0x26,    0x23,   0x6c,   0x5c,   0x3c  },
	};

	switch (delsys) {
	case SYS_DVBC_ANNEX_A:
		is_annex_c = false;
		break;
	case SYS_DVBC_ANNEX_C:
		is_annex_c = true;
		break;
	default:
		return -EINVAL;
	}

	/*
	 * gcc optimizes the code below the same way as it would code:
	 *		 "if (qam > 5) return -EINVAL;"
	 * Yet, the code is clearer, as it shows what QAM standards are
	 * supported by the driver, and avoids the usage of magic numbers on
	 * it.
	 */
	switch (qam) {
	case QPSK:
	case QAM_16:
	case QAM_32:
	case QAM_64:
	case QAM_128:
	case QAM_256:
		break;
	default:
		return -EINVAL;
	}

	if (fe->ops.tuner_ops.set_params) {
		fe->ops.tuner_ops.set_params(fe);
		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	}

	tda10023_set_symbolrate(state, c->symbol_rate);
	tda10023_writereg(state, 0x05, qam_params[qam].lockthr);
	tda10023_writereg(state, 0x08, qam_params[qam].mseth);
	tda10023_writereg(state, 0x09, qam_params[qam].aref);
	tda10023_writereg(state, 0xb4, qam_params[qam].agcrefnyq);
	tda10023_writereg(state, 0xb6, qam_params[qam].eragnyq_thd);
#if 0
	tda10023_writereg(state, 0x04, (c->inversion ? 0x12 : 0x32));
	tda10023_writebit(state, 0x04, 0x60, (c->inversion ? 0 : 0x20));
#endif
	tda10023_writebit(state, 0x04, 0x40, 0x40);

	if (is_annex_c)
		tda10023_writebit(state, 0x3d, 0xfc, 0x03);
	else
		tda10023_writebit(state, 0x3d, 0xfc, 0x02);

	tda10023_setup_reg0(state, qam_params[qam].qam);

	return 0;
}

static int tda10023_read_status(struct dvb_frontend *fe,
				enum fe_status *status)
{
	struct tda10023_state* state = fe->demodulator_priv;
	int sync;

	*status = 0;

	//0x11[1] == CARLOCK -> Carrier locked
	//0x11[2] == FSYNC -> Frame synchronisation
	//0x11[3] == FEL -> Front End locked
	//0x11[6] == NODVB -> DVB Mode Information
	sync = tda10023_readreg (state, 0x11);

	if (sync & 2)
		*status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;

	if (sync & 4)
		*status |= FE_HAS_SYNC|FE_HAS_VITERBI;

	if (sync & 8)
		*status |= FE_HAS_LOCK;

	return 0;
}

static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
{
	struct tda10023_state* state = fe->demodulator_priv;
	u8 a,b,c;
	a=tda10023_readreg(state, 0x14);
	b=tda10023_readreg(state, 0x15);
	c=tda10023_readreg(state, 0x16)&0xf;
	tda10023_writebit (state, 0x10, 0xc0, 0x00);

	*ber = a | (b<<8)| (c<<16);
	return 0;
}

static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
	struct tda10023_state* state = fe->demodulator_priv;
	u8 ifgain=tda10023_readreg(state, 0x2f);

	u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
	// Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
	if (gain>0x90)
		gain=gain+2*(gain-0x90);
	if (gain>255)
		gain=255;

	*strength = (gain<<8)|gain;
	return 0;
}

static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct tda10023_state* state = fe->demodulator_priv;

	u8 quality = ~tda10023_readreg(state, 0x18);
	*snr = (quality << 8) | quality;
	return 0;
}

static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
	struct tda10023_state* state = fe->demodulator_priv;
	u8 a,b,c,d;
	a= tda10023_readreg (state, 0x74);
	b= tda10023_readreg (state, 0x75);
	c= tda10023_readreg (state, 0x76);
	d= tda10023_readreg (state, 0x77);
	*ucblocks = a | (b<<8)|(c<<16)|(d<<24);

	tda10023_writebit (state, 0x10, 0x20,0x00);
	tda10023_writebit (state, 0x10, 0x20,0x20);
	tda10023_writebit (state, 0x13, 0x01, 0x00);

	return 0;
}

static int tda10023_get_frontend(struct dvb_frontend *fe,
				 struct dtv_frontend_properties *p)
{
	struct tda10023_state* state = fe->demodulator_priv;
	int sync,inv;
	s8 afc = 0;

	sync = tda10023_readreg(state, 0x11);
	afc = tda10023_readreg(state, 0x19);
	inv = tda10023_readreg(state, 0x04);

	if (verbose) {
		/* AFC only valid when carrier has been recovered */
		printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
				  "DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
			state->frontend.dvb->num, afc,
		       -((s32)p->symbol_rate * afc) >> 10);
	}

	p->inversion = (inv&0x20?0:1);
	p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;

	p->fec_inner = FEC_NONE;
	p->frequency = ((p->frequency + 31250) / 62500) * 62500;

	if (sync & 2)
		p->frequency -= ((s32)p->symbol_rate * afc) >> 10;

	return 0;
}

static int tda10023_sleep(struct dvb_frontend* fe)
{
	struct tda10023_state* state = fe->demodulator_priv;

	tda10023_writereg (state, 0x1b, 0x02);  /* pdown ADC */
	tda10023_writereg (state, 0x00, 0x80);  /* standby */

	return 0;
}

static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
{
	struct tda10023_state* state = fe->demodulator_priv;

	if (enable) {
		lock_tuner(state);
	} else {
		unlock_tuner(state);
	}
	return 0;
}

static void tda10023_release(struct dvb_frontend* fe)
{
	struct tda10023_state* state = fe->demodulator_priv;
	kfree(state);
}

static const struct dvb_frontend_ops tda10023_ops;

struct dvb_frontend *tda10023_attach(const struct tda10023_config *config,
				     struct i2c_adapter *i2c,
				     u8 pwm)
{
	struct tda10023_state* state = NULL;

	/* allocate memory for the internal state */
	state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
	if (state == NULL) goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;

	/* wakeup if in standby */
	tda10023_writereg (state, 0x00, 0x33);
	/* check if the demod is there */
	if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
	state->pwm = pwm;
	state->reg0 = REG0_INIT_VAL;
	if (state->config->xtal) {
		state->xtal  = state->config->xtal;
		state->pll_m = state->config->pll_m;
		state->pll_p = state->config->pll_p;
		state->pll_n = state->config->pll_n;
	} else {
		/* set default values if not defined in config */
		state->xtal  = 28920000;
		state->pll_m = 8;
		state->pll_p = 4;
		state->pll_n = 1;
	}

	/* calc sysclk */
	state->sysclk = (state->xtal * state->pll_m / \
			(state->pll_n * state->pll_p));

	state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
	state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;

	dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
		__func__, state->xtal, state->pll_m, state->pll_p,
		state->pll_n);

	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}

static const struct dvb_frontend_ops tda10023_ops = {
	.delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
	.info = {
		.name = "Philips TDA10023 DVB-C",
		.frequency_min_hz =  47 * MHz,
		.frequency_max_hz = 862 * MHz,
		.frequency_stepsize_hz = 62500,
		.symbol_rate_min = 0,  /* set in tda10023_attach */
		.symbol_rate_max = 0,  /* set in tda10023_attach */
		.caps = 0x400 | //FE_CAN_QAM_4
			FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
			FE_CAN_QAM_128 | FE_CAN_QAM_256 |
			FE_CAN_FEC_AUTO
	},

	.release = tda10023_release,

	.init = tda10023_init,
	.sleep = tda10023_sleep,
	.i2c_gate_ctrl = tda10023_i2c_gate_ctrl,

	.set_frontend = tda10023_set_parameters,
	.get_frontend = tda10023_get_frontend,
	.read_status = tda10023_read_status,
	.read_ber = tda10023_read_ber,
	.read_signal_strength = tda10023_read_signal_strength,
	.read_snr = tda10023_read_snr,
	.read_ucblocks = tda10023_read_ucblocks,
};


MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
MODULE_AUTHOR("Georg Acher, Hartmut Birr");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(tda10023_attach);
Commit	Line	Data
74ba9207	1	// SPDX-License-Identifier: GPL-2.0-or-later
aa323ac8 HB	2	/*
	3	TDA10023 - DVB-C decoder
	4	(as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)
	5
	6	Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
	7	Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)
	8
	9	Remotely based on tda10021.c
	10	Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
	11	Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
	12	Support for TDA10021
	13
aa323ac8 HB	14	*/
	15
	16	#include <linux/delay.h>
	17	#include <linux/errno.h>
	18	#include <linux/init.h>
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/string.h>
	22	#include <linux/slab.h>
	23
	24	#include <asm/div64.h>
	25
fada1935	26	#include <media/dvb_frontend.h>
aa323ac8 HB	27	#include "tda1002x.h"
aa323ac8 HB	28
4388c3b4	29	#define REG0_INIT_VAL 0x23
aa323ac8 HB	30
	31	struct tda10023_state {
	32	struct i2c_adapter* i2c;
	33	/* configuration settings */
4388c3b4	34	const struct tda10023_config *config;
aa323ac8 HB	35	struct dvb_frontend frontend;
	36
	37	u8 pwm;
	38	u8 reg0;
aa323ac8	39
4388c3b4 AP	40	/* clock settings */
	41	u32 xtal;
	42	u8 pll_m;
	43	u8 pll_p;
	44	u8 pll_n;
	45	u32 sysclk;
	46	};
aa323ac8 HB	47
	48	#define dprintk(x...)
	49
	50	static int verbose;
	51
aa323ac8 HB	52	static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
	53	{
	54	u8 b0 [] = { reg };
	55	u8 b1 [] = { 0 };
	56	struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
	57	{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
	58	int ret;
	59
	60	ret = i2c_transfer (state->i2c, msg, 2);
c9fa2b1e OE	61	if (ret != 2) {
c9fa2b1e OE	62	int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
4bd69e7b	63	printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error (reg == 0x%02x, ret == %i)\n",
c9fa2b1e OE	64	num, __func__, reg, ret);
c9fa2b1e OE	65	}
aa323ac8 HB	66	return b1[0];
	67	}
	68
	69	static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
	70	{
	71	u8 buf[] = { reg, data };
	72	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	73	int ret;
	74
	75	ret = i2c_transfer (state->i2c, &msg, 1);
c9fa2b1e OE	76	if (ret != 1) {
c9fa2b1e OE	77	int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
4bd69e7b	78	printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
c9fa2b1e OE	79	num, __func__, reg, data, ret);
c9fa2b1e OE	80	}
aa323ac8 HB	81	return (ret != 1) ? -EREMOTEIO : 0;
	82	}
	83
	84
	85	static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
	86	{
	87	if (mask==0xff)
	88	return tda10023_writereg(state, reg, data);
	89	else {
	90	u8 val;
	91	val=tda10023_readreg(state,reg);
	92	val&=~mask;
	93	val\|=(data&mask);
	94	return tda10023_writereg(state, reg, val);
	95	}
	96	}
	97
	98	static void tda10023_writetab(struct tda10023_state* state, u8* tab)
	99	{
	100	u8 r,m,v;
	101	while (1) {
	102	r=*tab++;
	103	m=*tab++;
	104	v=*tab++;
	105	if (r==0xff) {
	106	if (m==0xff)
	107	break;
	108	else
	109	msleep(m);
	110	}
	111	else
	112	tda10023_writebit(state,r,m,v);
	113	}
	114	}
	115
	116	//get access to tuner
	117	static int lock_tuner(struct tda10023_state* state)
	118	{
	119	u8 buf[2] = { 0x0f, 0xc0 };
	120	struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
	121
	122	if(i2c_transfer(state->i2c, &msg, 1) != 1)
	123	{
	124	printk("tda10023: lock tuner fails\n");
	125	return -EREMOTEIO;
	126	}
	127	return 0;
	128	}
	129
	130	//release access from tuner
	131	static int unlock_tuner(struct tda10023_state* state)
	132	{
	133	u8 buf[2] = { 0x0f, 0x40 };
	134	struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
	135
	136	if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
	137	{
	138	printk("tda10023: unlock tuner fails\n");
	139	return -EREMOTEIO;
	140	}
	141	return 0;
	142	}
	143
	144	static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
145	{
146	reg0 \|= state->reg0 & 0x63;
147
148	tda10023_writereg (state, 0x00, reg0 & 0xfe);
149	tda10023_writereg (state, 0x00, reg0 \| 0x01);
150
151	state->reg0 = reg0;
152	return 0;
153	}
154
155	static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
156	{
157	s32 BDR;
158	s32 BDRI;
159	s16 SFIL=0;
160	u16 NDEC = 0;
161
4388c3b4 AP	162	/* avoid floating point operations multiplying syscloc and divider
	163	by 10 */
	164	u32 sysclk_x_10 = state->sysclk * 10;
	165
	166	if (sr < (u32)(sysclk_x_10/984)) {
aa323ac8 HB	167	NDEC=3;
aa323ac8 HB	168	SFIL=1;
4388c3b4	169	} else if (sr < (u32)(sysclk_x_10/640)) {
aa323ac8 HB	170	NDEC=3;
aa323ac8 HB	171	SFIL=0;
4388c3b4	172	} else if (sr < (u32)(sysclk_x_10/492)) {
aa323ac8 HB	173	NDEC=2;
aa323ac8 HB	174	SFIL=1;
4388c3b4	175	} else if (sr < (u32)(sysclk_x_10/320)) {
aa323ac8 HB	176	NDEC=2;
aa323ac8 HB	177	SFIL=0;
4388c3b4	178	} else if (sr < (u32)(sysclk_x_10/246)) {
aa323ac8 HB	179	NDEC=1;
aa323ac8 HB	180	SFIL=1;
4388c3b4	181	} else if (sr < (u32)(sysclk_x_10/160)) {
aa323ac8 HB	182	NDEC=1;
aa323ac8 HB	183	SFIL=0;
4388c3b4	184	} else if (sr < (u32)(sysclk_x_10/123)) {
aa323ac8 HB	185	NDEC=0;
	186	SFIL=1;
	187	}
	188
4388c3b4	189	BDRI = (state->sysclk)*16;
aa323ac8 HB	190	BDRI>>=NDEC;
	191	BDRI +=sr/2;
	192	BDRI /=sr;
	193
	194	if (BDRI>255)
	195	BDRI=255;
	196
	197	{
	198	u64 BDRX;
	199
	200	BDRX=1<<(24+NDEC);
	201	BDRX*=sr;
6e6a8b5a	202	do_div(BDRX, state->sysclk); /* BDRX/=SYSCLK; */
aa323ac8 HB	203
	204	BDR=(s32)BDRX;
	205	}
4388c3b4 AP	206	dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
4388c3b4 AP	207	sr, BDR, BDRI, NDEC);
aa323ac8 HB	208	tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
	209	tda10023_writereg (state, 0x0a, BDR&255);
	210	tda10023_writereg (state, 0x0b, (BDR>>8)&255);
	211	tda10023_writereg (state, 0x0c, (BDR>>16)&31);
	212	tda10023_writereg (state, 0x0d, BDRI);
	213	tda10023_writereg (state, 0x3d, (SFIL<<7));
	214	return 0;
	215	}
	216
	217	static int tda10023_init (struct dvb_frontend *fe)
	218	{
	219	struct tda10023_state* state = fe->demodulator_priv;
4388c3b4 AP	220	u8 tda10023_inittab[] = {
	221	/* reg mask val */
	222	/* 000 / 0x2a, 0xff, 0x02, / PLL3, Bypass, Power Down */
	223	/* 003 / 0xff, 0x64, 0x00, / Sleep 100ms */
	224	/* 006 / 0x2a, 0xff, 0x03, / PLL3, Bypass, Power Down */
	225	/* 009 / 0xff, 0x64, 0x00, / Sleep 100ms */
	226	/* PLL1 */
	227	/* 012 */ 0x28, 0xff, (state->pll_m-1),
	228	/* PLL2 */
	229	/* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)\|(state->pll_n-1),
	230	/* GPR FSAMPLING=1 */
	231	/* 018 */ 0x00, 0xff, REG0_INIT_VAL,
	232	/* 021 / 0x2a, 0xff, 0x08, / PLL3 PSACLK=1 */
	233	/* 024 / 0xff, 0x64, 0x00, / Sleep 100ms */
	234	/* 027 / 0x1f, 0xff, 0x00, / RESET */
	235	/* 030 / 0xff, 0x64, 0x00, / Sleep 100ms */
	236	/* 033 / 0xe6, 0x0c, 0x04, / RSCFG_IND */
	237	/* 036 / 0x10, 0xc0, 0x80, / DECDVBCFG1 PBER=1 */
	238
	239	/* 039 / 0x0e, 0xff, 0x82, / GAIN1 */
	240	/* 042 / 0x03, 0x08, 0x08, / CLKCONF DYN=1 */
	241	/* 045 / 0x2e, 0xbf, 0x30, / AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
	242	PPWMTUN=0 PPWMIF=0 */
	243	/* 048 / 0x01, 0xff, 0x30, / AGCREF */
	244	/* 051 / 0x1e, 0x84, 0x84, / CONTROL SACLK_ON=1 */
	245	/* 054 / 0x1b, 0xff, 0xc8, / ADC TWOS=1 */
	246	/* 057 / 0x3b, 0xff, 0xff, / IFMAX */
	247	/* 060 / 0x3c, 0xff, 0x00, / IFMIN */
	248	/* 063 / 0x34, 0xff, 0x00, / PWMREF */
	249	/* 066 / 0x35, 0xff, 0xff, / TUNMAX */
	250	/* 069 / 0x36, 0xff, 0x00, / TUNMIN */
	251	/* 072 / 0x06, 0xff, 0x7f, / EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
	252	/* 075 / 0x1c, 0x30, 0x30, / EQCONF2 STEPALGO=SGNALGO=1 */
	253	/* 078 / 0x37, 0xff, 0xf6, / DELTAF_LSB */
	254	/* 081 / 0x38, 0xff, 0xff, / DELTAF_MSB */
	255	/* 084 / 0x02, 0xff, 0x93, / AGCCONF1 IFS=1 KAGCIF=2 KAGCTUN=3 */
	256	/* 087 / 0x2d, 0xff, 0xf6, / SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
	257	/* 090 / 0x04, 0x10, 0x00, / SWRAMP=1 */
e7588866 AP	258	/* 093 / 0x12, 0xff, TDA10023_OUTPUT_MODE_PARALLEL_B, /
e7588866 AP	259	INTP1 POCLKP=1 FEL=1 MFS=0 */
4388c3b4 AP	260	/* 096 / 0x2b, 0x01, 0xa1, / INTS1 */
	261	/* 099 / 0x20, 0xff, 0x04, / INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
	262	/* 102 / 0x2c, 0xff, 0x0d, / INTP/S TRIP=0 TRIS=0 */
	263	/* 105 */ 0xc4, 0xff, 0x00,
	264	/* 108 */ 0xc3, 0x30, 0x00,
	265	/* 111 / 0xb5, 0xff, 0x19, / ERAGC_THD */
	266	/* 114 / 0x00, 0x03, 0x01, / GPR, CLBS soft reset */
	267	/* 117 / 0x00, 0x03, 0x03, / GPR, CLBS soft reset */
	268	/* 120 / 0xff, 0x64, 0x00, / Sleep 100ms */
	269	/* 123 */ 0xff, 0xff, 0xff
	270	};
	271	dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);
aa323ac8	272
4388c3b4 AP	273	/* override default values if set in config */
	274	if (state->config->deltaf) {
	275	tda10023_inittab[80] = (state->config->deltaf & 0xff);
	276	tda10023_inittab[83] = (state->config->deltaf >> 8);
	277	}
aa323ac8	278
e7588866 AP	279	if (state->config->output_mode)
	280	tda10023_inittab[95] = state->config->output_mode;
	281
aa323ac8 HB	282	tda10023_writetab(state, tda10023_inittab);
	283
	284	return 0;
	285	}
	286
37c52abd MCC	287	struct qam_params {
	288	u8 qam, lockthr, mseth, aref, agcrefnyq, eragnyq_thd;
	289	};
	290
787d92e1	291	static int tda10023_set_parameters(struct dvb_frontend *fe)
aa323ac8	292	{
74b4576e MCC	293	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	294	u32 delsys = c->delivery_system;
	295	unsigned qam = c->modulation;
	296	bool is_annex_c;
aa323ac8	297	struct tda10023_state* state = fe->demodulator_priv;
37c52abd MCC	298	static const struct qam_params qam_params[] = {
	299	/* Modulation QAM LOCKTHR MSETH AREF AGCREFNYQ ERAGCNYQ_THD */
	300	[QPSK] = { (5<<2), 0x78, 0x8c, 0x96, 0x78, 0x4c },
	301	[QAM_16] = { (0<<2), 0x87, 0xa2, 0x91, 0x8c, 0x57 },
	302	[QAM_32] = { (1<<2), 0x64, 0x74, 0x96, 0x8c, 0x57 },
	303	[QAM_64] = { (2<<2), 0x46, 0x43, 0x6a, 0x6a, 0x44 },
	304	[QAM_128] = { (3<<2), 0x36, 0x34, 0x7e, 0x78, 0x4c },
	305	[QAM_256] = { (4<<2), 0x26, 0x23, 0x6c, 0x5c, 0x3c },
aa323ac8	306	};
74b4576e MCC	307
	308	switch (delsys) {
	309	case SYS_DVBC_ANNEX_A:
	310	is_annex_c = false;
	311	break;
	312	case SYS_DVBC_ANNEX_C:
	313	is_annex_c = true;
	314	break;
	315	default:
	316	return -EINVAL;
	317	}
37c52abd MCC	318
37c52abd MCC	319	/*
5a13e40b	320	* gcc optimizes the code below the same way as it would code:
37c52abd MCC	321	* "if (qam > 5) return -EINVAL;"
	322	* Yet, the code is clearer, as it shows what QAM standards are
	323	* supported by the driver, and avoids the usage of magic numbers on
	324	* it.
	325	*/
	326	switch (qam) {
	327	case QPSK:
	328	case QAM_16:
	329	case QAM_32:
	330	case QAM_64:
	331	case QAM_128:
	332	case QAM_256:
	333	break;
	334	default:
aa323ac8	335	return -EINVAL;
37c52abd	336	}
aa323ac8 HB	337
aa323ac8 HB	338	if (fe->ops.tuner_ops.set_params) {
14d24d14	339	fe->ops.tuner_ops.set_params(fe);
aa323ac8 HB	340	if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	341	}
	342
74b4576e	343	tda10023_set_symbolrate(state, c->symbol_rate);
37c52abd MCC	344	tda10023_writereg(state, 0x05, qam_params[qam].lockthr);
	345	tda10023_writereg(state, 0x08, qam_params[qam].mseth);
	346	tda10023_writereg(state, 0x09, qam_params[qam].aref);
	347	tda10023_writereg(state, 0xb4, qam_params[qam].agcrefnyq);
	348	tda10023_writereg(state, 0xb6, qam_params[qam].eragnyq_thd);
37c52abd	349	#if 0
74b4576e MCC	350	tda10023_writereg(state, 0x04, (c->inversion ? 0x12 : 0x32));
74b4576e MCC	351	tda10023_writebit(state, 0x04, 0x60, (c->inversion ? 0 : 0x20));
37c52abd MCC	352	#endif
37c52abd MCC	353	tda10023_writebit(state, 0x04, 0x40, 0x40);
74b4576e MCC	354
	355	if (is_annex_c)
	356	tda10023_writebit(state, 0x3d, 0xfc, 0x03);
	357	else
	358	tda10023_writebit(state, 0x3d, 0xfc, 0x02);
	359
37c52abd	360	tda10023_setup_reg0(state, qam_params[qam].qam);
aa323ac8 HB	361
	362	return 0;
	363	}
	364
0df289a2 MCC	365	static int tda10023_read_status(struct dvb_frontend *fe,
0df289a2 MCC	366	enum fe_status *status)
aa323ac8 HB	367	{
	368	struct tda10023_state* state = fe->demodulator_priv;
	369	int sync;
	370
	371	*status = 0;
	372
	373	//0x11[1] == CARLOCK -> Carrier locked
	374	//0x11[2] == FSYNC -> Frame synchronisation
	375	//0x11[3] == FEL -> Front End locked
	376	//0x11[6] == NODVB -> DVB Mode Information
	377	sync = tda10023_readreg (state, 0x11);
	378
	379	if (sync & 2)
	380	*status \|= FE_HAS_SIGNAL\|FE_HAS_CARRIER;
	381
	382	if (sync & 4)
	383	*status \|= FE_HAS_SYNC\|FE_HAS_VITERBI;
	384
	385	if (sync & 8)
	386	*status \|= FE_HAS_LOCK;
	387
	388	return 0;
	389	}
	390
	391	static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
	392	{
	393	struct tda10023_state* state = fe->demodulator_priv;
	394	u8 a,b,c;
	395	a=tda10023_readreg(state, 0x14);
	396	b=tda10023_readreg(state, 0x15);
	397	c=tda10023_readreg(state, 0x16)&0xf;
	398	tda10023_writebit (state, 0x10, 0xc0, 0x00);
	399
	400	*ber = a \| (b<<8)\| (c<<16);
	401	return 0;
	402	}
	403
	404	static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
	405	{
	406	struct tda10023_state* state = fe->demodulator_priv;
	407	u8 ifgain=tda10023_readreg(state, 0x2f);
	408
	409	u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
	410	// Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
	411	if (gain>0x90)
	412	gain=gain+2*(gain-0x90);
	413	if (gain>255)
	414	gain=255;
	415
	416	*strength = (gain<<8)\|gain;
	417	return 0;
	418	}
	419
	420	static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
	421	{
	422	struct tda10023_state* state = fe->demodulator_priv;
	423
	424	u8 quality = ~tda10023_readreg(state, 0x18);
	425	*snr = (quality << 8) \| quality;
	426	return 0;
	427	}
	428
	429	static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
	430	{
431	struct tda10023_state* state = fe->demodulator_priv;
432	u8 a,b,c,d;
433	a= tda10023_readreg (state, 0x74);
434	b= tda10023_readreg (state, 0x75);
435	c= tda10023_readreg (state, 0x76);
436	d= tda10023_readreg (state, 0x77);
437	*ucblocks = a \| (b<<8)\|(c<<16)\|(d<<24);
438
439	tda10023_writebit (state, 0x10, 0x20,0x00);
440	tda10023_writebit (state, 0x10, 0x20,0x20);
441	tda10023_writebit (state, 0x13, 0x01, 0x00);
442
443	return 0;
444	}
445
7e3e68bc MCC	446	static int tda10023_get_frontend(struct dvb_frontend *fe,
7e3e68bc MCC	447	struct dtv_frontend_properties *p)
aa323ac8 HB	448	{
	449	struct tda10023_state* state = fe->demodulator_priv;
	450	int sync,inv;
	451	s8 afc = 0;
	452
	453	sync = tda10023_readreg(state, 0x11);
	454	afc = tda10023_readreg(state, 0x19);
	455	inv = tda10023_readreg(state, 0x04);
	456
	457	if (verbose) {
	458	/* AFC only valid when carrier has been recovered */
	459	printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
	460	"DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
	461	state->frontend.dvb->num, afc,
787d92e1	462	-((s32)p->symbol_rate * afc) >> 10);
aa323ac8 HB	463	}
	464
	465	p->inversion = (inv&0x20?0:1);
787d92e1	466	p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
aa323ac8	467
787d92e1	468	p->fec_inner = FEC_NONE;
aa323ac8 HB	469	p->frequency = ((p->frequency + 31250) / 62500) * 62500;
	470
	471	if (sync & 2)
787d92e1	472	p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
aa323ac8 HB	473
	474	return 0;
	475	}
	476
	477	static int tda10023_sleep(struct dvb_frontend* fe)
	478	{
	479	struct tda10023_state* state = fe->demodulator_priv;
	480
	481	tda10023_writereg (state, 0x1b, 0x02); /* pdown ADC */
	482	tda10023_writereg (state, 0x00, 0x80); /* standby */
	483
	484	return 0;
	485	}
	486
	487	static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
	488	{
	489	struct tda10023_state* state = fe->demodulator_priv;
	490
	491	if (enable) {
	492	lock_tuner(state);
	493	} else {
	494	unlock_tuner(state);
	495	}
	496	return 0;
	497	}
	498
	499	static void tda10023_release(struct dvb_frontend* fe)
	500	{
	501	struct tda10023_state* state = fe->demodulator_priv;
	502	kfree(state);
	503	}
	504
bd336e63	505	static const struct dvb_frontend_ops tda10023_ops;
aa323ac8	506
4388c3b4 AP	507	struct dvb_frontend tda10023_attach(const struct tda10023_config config,
4388c3b4 AP	508	struct i2c_adapter *i2c,
aa323ac8 HB	509	u8 pwm)
	510	{
	511	struct tda10023_state* state = NULL;
aa323ac8 HB	512
aa323ac8 HB	513	/* allocate memory for the internal state */
c9fa2b1e	514	state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
aa323ac8 HB	515	if (state == NULL) goto error;
	516
	517	/* setup the state */
	518	state->config = config;
	519	state->i2c = i2c;
aa323ac8	520
4388c3b4	521	/* wakeup if in standby */
aa323ac8 HB	522	tda10023_writereg (state, 0x00, 0x33);
	523	/* check if the demod is there */
	524	if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
	525
	526	/* create dvb_frontend */
	527	memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
4388c3b4 AP	528	state->pwm = pwm;
	529	state->reg0 = REG0_INIT_VAL;
	530	if (state->config->xtal) {
	531	state->xtal = state->config->xtal;
	532	state->pll_m = state->config->pll_m;
	533	state->pll_p = state->config->pll_p;
	534	state->pll_n = state->config->pll_n;
	535	} else {
	536	/* set default values if not defined in config */
	537	state->xtal = 28920000;
	538	state->pll_m = 8;
	539	state->pll_p = 4;
	540	state->pll_n = 1;
	541	}
	542
	543	/* calc sysclk */
	544	state->sysclk = (state->xtal * state->pll_m / \
	545	(state->pll_n * state->pll_p));
	546
	547	state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
	548	state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
	549
	550	dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
	551	__func__, state->xtal, state->pll_m, state->pll_p,
	552	state->pll_n);
	553
aa323ac8 HB	554	state->frontend.demodulator_priv = state;
	555	return &state->frontend;
	556
	557	error:
	558	kfree(state);
	559	return NULL;
	560	}
	561
bd336e63	562	static const struct dvb_frontend_ops tda10023_ops = {
787d92e1	563	.delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
aa323ac8 HB	564	.info = {
aa323ac8 HB	565	.name = "Philips TDA10023 DVB-C",
f1b1eabf MCC	566	.frequency_min_hz = 47 * MHz,
	567	.frequency_max_hz = 862 * MHz,
	568	.frequency_stepsize_hz = 62500,
4388c3b4 AP	569	.symbol_rate_min = 0, /* set in tda10023_attach */
4388c3b4 AP	570	.symbol_rate_max = 0, /* set in tda10023_attach */
aa323ac8 HB	571	.caps = 0x400 \| //FE_CAN_QAM_4
	572	FE_CAN_QAM_16 \| FE_CAN_QAM_32 \| FE_CAN_QAM_64 \|
	573	FE_CAN_QAM_128 \| FE_CAN_QAM_256 \|
	574	FE_CAN_FEC_AUTO
	575	},
	576
	577	.release = tda10023_release,
	578
	579	.init = tda10023_init,
	580	.sleep = tda10023_sleep,
	581	.i2c_gate_ctrl = tda10023_i2c_gate_ctrl,
	582
787d92e1 MCC	583	.set_frontend = tda10023_set_parameters,
787d92e1 MCC	584	.get_frontend = tda10023_get_frontend,
aa323ac8 HB	585	.read_status = tda10023_read_status,
	586	.read_ber = tda10023_read_ber,
	587	.read_signal_strength = tda10023_read_signal_strength,
	588	.read_snr = tda10023_read_snr,
	589	.read_ucblocks = tda10023_read_ucblocks,
	590	};
	591
	592
	593	MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
	594	MODULE_AUTHOR("Georg Acher, Hartmut Birr");
	595	MODULE_LICENSE("GPL");
	596
	597	EXPORT_SYMBOL(tda10023_attach);