Commit | Line | Data |
---|---|---|
c942fddf | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
17cce932 IL |
2 | /* |
3 | * stv0367_priv.h | |
4 | * | |
5 | * Driver for ST STV0367 DVB-T & DVB-C demodulator IC. | |
6 | * | |
7 | * Copyright (C) ST Microelectronics. | |
8 | * Copyright (C) 2010,2011 NetUP Inc. | |
9 | * Copyright (C) 2010,2011 Igor M. Liplianin <liplianin@netup.ru> | |
17cce932 IL |
10 | */ |
11 | /* Common driver error constants */ | |
12 | ||
13 | #ifndef STV0367_PRIV_H | |
14 | #define STV0367_PRIV_H | |
15 | ||
16 | #ifndef TRUE | |
17 | #define TRUE (1 == 1) | |
18 | #endif | |
19 | #ifndef FALSE | |
20 | #define FALSE (!TRUE) | |
21 | #endif | |
22 | ||
23 | #ifndef NULL | |
24 | #define NULL 0 | |
25 | #endif | |
26 | ||
27 | /* MACRO definitions */ | |
17cce932 IL |
28 | #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y)) |
29 | #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y)) | |
30 | #define INRANGE(X, Y, Z) \ | |
31 | ((((X) <= (Y)) && ((Y) <= (Z))) || \ | |
32 | (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0) | |
33 | ||
34 | #ifndef MAKEWORD | |
35 | #define MAKEWORD(X, Y) (((X) << 8) + (Y)) | |
36 | #endif | |
37 | ||
38 | #define LSB(X) (((X) & 0xff)) | |
39 | #define MSB(Y) (((Y) >> 8) & 0xff) | |
40 | #define MMSB(Y)(((Y) >> 16) & 0xff) | |
41 | ||
42 | enum stv0367_ter_signal_type { | |
43 | FE_TER_NOAGC = 0, | |
44 | FE_TER_AGCOK = 5, | |
45 | FE_TER_NOTPS = 6, | |
46 | FE_TER_TPSOK = 7, | |
47 | FE_TER_NOSYMBOL = 8, | |
48 | FE_TER_BAD_CPQ = 9, | |
49 | FE_TER_PRFOUNDOK = 10, | |
50 | FE_TER_NOPRFOUND = 11, | |
51 | FE_TER_LOCKOK = 12, | |
52 | FE_TER_NOLOCK = 13, | |
53 | FE_TER_SYMBOLOK = 15, | |
54 | FE_TER_CPAMPOK = 16, | |
55 | FE_TER_NOCPAMP = 17, | |
56 | FE_TER_SWNOK = 18 | |
57 | }; | |
58 | ||
59 | enum stv0367_ts_mode { | |
60 | STV0367_OUTPUTMODE_DEFAULT, | |
61 | STV0367_SERIAL_PUNCT_CLOCK, | |
62 | STV0367_SERIAL_CONT_CLOCK, | |
63 | STV0367_PARALLEL_PUNCT_CLOCK, | |
64 | STV0367_DVBCI_CLOCK | |
65 | }; | |
66 | ||
67 | enum stv0367_clk_pol { | |
68 | STV0367_CLOCKPOLARITY_DEFAULT, | |
69 | STV0367_RISINGEDGE_CLOCK, | |
70 | STV0367_FALLINGEDGE_CLOCK | |
71 | }; | |
72 | ||
73 | enum stv0367_ter_bw { | |
74 | FE_TER_CHAN_BW_6M = 6, | |
75 | FE_TER_CHAN_BW_7M = 7, | |
76 | FE_TER_CHAN_BW_8M = 8 | |
77 | }; | |
78 | ||
79 | #if 0 | |
80 | enum FE_TER_Rate_TPS { | |
81 | FE_TER_TPS_1_2 = 0, | |
82 | FE_TER_TPS_2_3 = 1, | |
83 | FE_TER_TPS_3_4 = 2, | |
84 | FE_TER_TPS_5_6 = 3, | |
85 | FE_TER_TPS_7_8 = 4 | |
86 | }; | |
87 | #endif | |
88 | ||
89 | enum stv0367_ter_mode { | |
90 | FE_TER_MODE_2K, | |
91 | FE_TER_MODE_8K, | |
92 | FE_TER_MODE_4K | |
93 | }; | |
94 | #if 0 | |
95 | enum FE_TER_Hierarchy_Alpha { | |
96 | FE_TER_HIER_ALPHA_NONE, /* Regular modulation */ | |
97 | FE_TER_HIER_ALPHA_1, /* Hierarchical modulation a = 1*/ | |
98 | FE_TER_HIER_ALPHA_2, /* Hierarchical modulation a = 2*/ | |
99 | FE_TER_HIER_ALPHA_4 /* Hierarchical modulation a = 4*/ | |
100 | }; | |
101 | #endif | |
102 | enum stv0367_ter_hierarchy { | |
103 | FE_TER_HIER_NONE, /*Hierarchy None*/ | |
104 | FE_TER_HIER_LOW_PRIO, /*Hierarchy : Low Priority*/ | |
105 | FE_TER_HIER_HIGH_PRIO, /*Hierarchy : High Priority*/ | |
106 | FE_TER_HIER_PRIO_ANY /*Hierarchy :Any*/ | |
107 | }; | |
108 | ||
109 | #if 0 | |
110 | enum fe_stv0367_ter_spec { | |
111 | FE_TER_INVERSION_NONE = 0, | |
112 | FE_TER_INVERSION = 1, | |
113 | FE_TER_INVERSION_AUTO = 2, | |
114 | FE_TER_INVERSION_UNK = 4 | |
115 | }; | |
116 | #endif | |
117 | ||
118 | enum stv0367_ter_if_iq_mode { | |
119 | FE_TER_NORMAL_IF_TUNER = 0, | |
120 | FE_TER_LONGPATH_IF_TUNER = 1, | |
121 | FE_TER_IQ_TUNER = 2 | |
122 | ||
123 | }; | |
124 | ||
125 | #if 0 | |
126 | enum FE_TER_FECRate { | |
127 | FE_TER_FEC_NONE = 0x00, /* no FEC rate specified */ | |
128 | FE_TER_FEC_ALL = 0xFF, /* Logical OR of all FECs */ | |
129 | FE_TER_FEC_1_2 = 1, | |
130 | FE_TER_FEC_2_3 = (1 << 1), | |
131 | FE_TER_FEC_3_4 = (1 << 2), | |
132 | FE_TER_FEC_4_5 = (1 << 3), | |
133 | FE_TER_FEC_5_6 = (1 << 4), | |
134 | FE_TER_FEC_6_7 = (1 << 5), | |
135 | FE_TER_FEC_7_8 = (1 << 6), | |
136 | FE_TER_FEC_8_9 = (1 << 7) | |
137 | }; | |
138 | ||
139 | enum FE_TER_Rate { | |
140 | FE_TER_FE_1_2 = 0, | |
141 | FE_TER_FE_2_3 = 1, | |
142 | FE_TER_FE_3_4 = 2, | |
143 | FE_TER_FE_5_6 = 3, | |
144 | FE_TER_FE_6_7 = 4, | |
145 | FE_TER_FE_7_8 = 5 | |
146 | }; | |
147 | #endif | |
148 | ||
149 | enum stv0367_ter_force { | |
150 | FE_TER_FORCENONE = 0, | |
151 | FE_TER_FORCE_M_G = 1 | |
152 | }; | |
153 | ||
154 | enum stv0367cab_mod { | |
155 | FE_CAB_MOD_QAM4, | |
156 | FE_CAB_MOD_QAM16, | |
157 | FE_CAB_MOD_QAM32, | |
158 | FE_CAB_MOD_QAM64, | |
159 | FE_CAB_MOD_QAM128, | |
160 | FE_CAB_MOD_QAM256, | |
161 | FE_CAB_MOD_QAM512, | |
162 | FE_CAB_MOD_QAM1024 | |
163 | }; | |
164 | #if 0 | |
165 | enum { | |
166 | FE_CAB_FEC_A = 1, /* J83 Annex A */ | |
167 | FE_CAB_FEC_B = (1 << 1),/* J83 Annex B */ | |
168 | FE_CAB_FEC_C = (1 << 2) /* J83 Annex C */ | |
169 | } FE_CAB_FECType_t; | |
170 | #endif | |
171 | struct stv0367_cab_signal_info { | |
172 | int locked; | |
173 | u32 frequency; /* kHz */ | |
174 | u32 symbol_rate; /* Mbds */ | |
175 | enum stv0367cab_mod modulation; | |
0df289a2 | 176 | enum fe_spectral_inversion spect_inv; |
17cce932 IL |
177 | s32 Power_dBmx10; /* Power of the RF signal (dBm x 10) */ |
178 | u32 CN_dBx10; /* Carrier to noise ratio (dB x 10) */ | |
179 | u32 BER; /* Bit error rate (x 10000000) */ | |
180 | }; | |
181 | ||
182 | enum stv0367_cab_signal_type { | |
183 | FE_CAB_NOTUNER, | |
184 | FE_CAB_NOAGC, | |
185 | FE_CAB_NOSIGNAL, | |
186 | FE_CAB_NOTIMING, | |
187 | FE_CAB_TIMINGOK, | |
188 | FE_CAB_NOCARRIER, | |
189 | FE_CAB_CARRIEROK, | |
190 | FE_CAB_NOBLIND, | |
191 | FE_CAB_BLINDOK, | |
192 | FE_CAB_NODEMOD, | |
193 | FE_CAB_DEMODOK, | |
194 | FE_CAB_DATAOK | |
195 | }; | |
196 | ||
197 | #endif |