Commit | Line | Data |
---|---|---|
74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | Driver for ST STV0299 demodulator | |
4 | ||
5 | Copyright (C) 2001-2002 Convergence Integrated Media GmbH | |
6 | <ralph@convergence.de>, | |
7 | <holger@convergence.de>, | |
8 | <js@convergence.de> | |
9 | ||
10 | ||
11 | Philips SU1278/SH | |
12 | ||
13 | Copyright (C) 2002 by Peter Schildmann <peter.schildmann@web.de> | |
14 | ||
15 | ||
16 | LG TDQF-S001F | |
17 | ||
18 | Copyright (C) 2002 Felix Domke <tmbinc@elitedvb.net> | |
19 | & Andreas Oberritter <obi@linuxtv.org> | |
20 | ||
21 | ||
22 | Support for Samsung TBMU24112IMB used on Technisat SkyStar2 rev. 2.6B | |
23 | ||
24 | Copyright (C) 2003 Vadim Catana <skystar@moldova.cc>: | |
25 | ||
26 | Support for Philips SU1278 on Technotrend hardware | |
27 | ||
28 | Copyright (C) 2004 Andrew de Quincey <adq_dvb@lidskialf.net> | |
29 | ||
1da177e4 LT |
30 | |
31 | */ | |
32 | ||
33 | #include <linux/init.h> | |
34 | #include <linux/kernel.h> | |
9056a23b | 35 | #include <linux/ktime.h> |
1da177e4 | 36 | #include <linux/module.h> |
1da177e4 LT |
37 | #include <linux/string.h> |
38 | #include <linux/slab.h> | |
4e57b681 | 39 | #include <linux/jiffies.h> |
1da177e4 LT |
40 | #include <asm/div64.h> |
41 | ||
fada1935 | 42 | #include <media/dvb_frontend.h> |
1da177e4 LT |
43 | #include "stv0299.h" |
44 | ||
45 | struct stv0299_state { | |
46 | struct i2c_adapter* i2c; | |
1da177e4 LT |
47 | const struct stv0299_config* config; |
48 | struct dvb_frontend frontend; | |
49 | ||
50 | u8 initialised:1; | |
51 | u32 tuner_frequency; | |
52 | u32 symbol_rate; | |
0df289a2 | 53 | enum fe_code_rate fec_inner; |
37650221 | 54 | int errmode; |
7876ad75 | 55 | u32 ucblocks; |
24fb0604 | 56 | u8 mcr_reg; |
1da177e4 LT |
57 | }; |
58 | ||
37650221 AQ |
59 | #define STATUS_BER 0 |
60 | #define STATUS_UCBLOCKS 1 | |
61 | ||
1da177e4 | 62 | static int debug; |
591ad98d | 63 | static int debug_legacy_dish_switch; |
1da177e4 LT |
64 | #define dprintk(args...) \ |
65 | do { \ | |
66 | if (debug) printk(KERN_DEBUG "stv0299: " args); \ | |
67 | } while (0) | |
68 | ||
69 | ||
70 | static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data) | |
71 | { | |
72 | int ret; | |
73 | u8 buf [] = { reg, data }; | |
74 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | |
75 | ||
76 | ret = i2c_transfer (state->i2c, &msg, 1); | |
77 | ||
78 | if (ret != 1) | |
4bd69e7b MCC |
79 | dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n", |
80 | __func__, reg, data, ret); | |
1da177e4 LT |
81 | |
82 | return (ret != 1) ? -EREMOTEIO : 0; | |
83 | } | |
84 | ||
2e4e98e7 | 85 | static int stv0299_write(struct dvb_frontend* fe, const u8 buf[], int len) |
1da177e4 | 86 | { |
9101e622 | 87 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 88 | |
c10d14d6 AQ |
89 | if (len != 2) |
90 | return -EINVAL; | |
91 | ||
92 | return stv0299_writeregI(state, buf[0], buf[1]); | |
1da177e4 LT |
93 | } |
94 | ||
95 | static u8 stv0299_readreg (struct stv0299_state* state, u8 reg) | |
96 | { | |
97 | int ret; | |
98 | u8 b0 [] = { reg }; | |
99 | u8 b1 [] = { 0 }; | |
100 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, | |
101 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; | |
102 | ||
103 | ret = i2c_transfer (state->i2c, msg, 2); | |
104 | ||
105 | if (ret != 2) | |
106 | dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", | |
271ddbf7 | 107 | __func__, reg, ret); |
1da177e4 LT |
108 | |
109 | return b1[0]; | |
110 | } | |
111 | ||
112 | static int stv0299_readregs (struct stv0299_state* state, u8 reg1, u8 *b, u8 len) | |
113 | { | |
114 | int ret; | |
115 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®1, .len = 1 }, | |
116 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b, .len = len } }; | |
117 | ||
118 | ret = i2c_transfer (state->i2c, msg, 2); | |
119 | ||
120 | if (ret != 2) | |
271ddbf7 | 121 | dprintk("%s: readreg error (ret == %i)\n", __func__, ret); |
1da177e4 LT |
122 | |
123 | return ret == 2 ? 0 : ret; | |
124 | } | |
125 | ||
0df289a2 | 126 | static int stv0299_set_FEC(struct stv0299_state *state, enum fe_code_rate fec) |
1da177e4 | 127 | { |
271ddbf7 | 128 | dprintk ("%s\n", __func__); |
1da177e4 LT |
129 | |
130 | switch (fec) { | |
131 | case FEC_AUTO: | |
132 | { | |
133 | return stv0299_writeregI (state, 0x31, 0x1f); | |
134 | } | |
135 | case FEC_1_2: | |
136 | { | |
137 | return stv0299_writeregI (state, 0x31, 0x01); | |
138 | } | |
139 | case FEC_2_3: | |
140 | { | |
141 | return stv0299_writeregI (state, 0x31, 0x02); | |
142 | } | |
143 | case FEC_3_4: | |
144 | { | |
145 | return stv0299_writeregI (state, 0x31, 0x04); | |
146 | } | |
147 | case FEC_5_6: | |
148 | { | |
149 | return stv0299_writeregI (state, 0x31, 0x08); | |
150 | } | |
151 | case FEC_7_8: | |
152 | { | |
153 | return stv0299_writeregI (state, 0x31, 0x10); | |
154 | } | |
155 | default: | |
156 | { | |
157 | return -EINVAL; | |
158 | } | |
159 | } | |
160 | } | |
161 | ||
0df289a2 | 162 | static enum fe_code_rate stv0299_get_fec(struct stv0299_state *state) |
1da177e4 | 163 | { |
0df289a2 MCC |
164 | static enum fe_code_rate fec_tab[] = { FEC_2_3, FEC_3_4, FEC_5_6, |
165 | FEC_7_8, FEC_1_2 }; | |
1da177e4 LT |
166 | u8 index; |
167 | ||
271ddbf7 | 168 | dprintk ("%s\n", __func__); |
1da177e4 LT |
169 | |
170 | index = stv0299_readreg (state, 0x1b); | |
171 | index &= 0x7; | |
172 | ||
173 | if (index > 4) | |
174 | return FEC_AUTO; | |
175 | ||
176 | return fec_tab [index]; | |
177 | } | |
178 | ||
179 | static int stv0299_wait_diseqc_fifo (struct stv0299_state* state, int timeout) | |
180 | { | |
181 | unsigned long start = jiffies; | |
182 | ||
271ddbf7 | 183 | dprintk ("%s\n", __func__); |
1da177e4 LT |
184 | |
185 | while (stv0299_readreg(state, 0x0a) & 1) { | |
186 | if (jiffies - start > timeout) { | |
271ddbf7 | 187 | dprintk ("%s: timeout!!\n", __func__); |
1da177e4 LT |
188 | return -ETIMEDOUT; |
189 | } | |
190 | msleep(10); | |
c2c1b415 | 191 | } |
1da177e4 LT |
192 | |
193 | return 0; | |
194 | } | |
195 | ||
196 | static int stv0299_wait_diseqc_idle (struct stv0299_state* state, int timeout) | |
197 | { | |
198 | unsigned long start = jiffies; | |
199 | ||
271ddbf7 | 200 | dprintk ("%s\n", __func__); |
1da177e4 LT |
201 | |
202 | while ((stv0299_readreg(state, 0x0a) & 3) != 2 ) { | |
203 | if (jiffies - start > timeout) { | |
271ddbf7 | 204 | dprintk ("%s: timeout!!\n", __func__); |
1da177e4 LT |
205 | return -ETIMEDOUT; |
206 | } | |
207 | msleep(10); | |
c2c1b415 | 208 | } |
1da177e4 LT |
209 | |
210 | return 0; | |
211 | } | |
212 | ||
213 | static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate) | |
214 | { | |
9101e622 | 215 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
216 | u64 big = srate; |
217 | u32 ratio; | |
218 | ||
219 | // check rate is within limits | |
220 | if ((srate < 1000000) || (srate > 45000000)) return -EINVAL; | |
221 | ||
222 | // calculate value to program | |
223 | big = big << 20; | |
224 | big += (state->config->mclk-1); // round correctly | |
225 | do_div(big, state->config->mclk); | |
226 | ratio = big << 4; | |
227 | ||
228 | return state->config->set_symbol_rate(fe, srate, ratio); | |
229 | } | |
230 | ||
231 | static int stv0299_get_symbolrate (struct stv0299_state* state) | |
232 | { | |
233 | u32 Mclk = state->config->mclk / 4096L; | |
234 | u32 srate; | |
235 | s32 offset; | |
236 | u8 sfr[3]; | |
237 | s8 rtf; | |
238 | ||
271ddbf7 | 239 | dprintk ("%s\n", __func__); |
1da177e4 LT |
240 | |
241 | stv0299_readregs (state, 0x1f, sfr, 3); | |
0402a6c2 | 242 | stv0299_readregs (state, 0x1a, (u8 *)&rtf, 1); |
1da177e4 LT |
243 | |
244 | srate = (sfr[0] << 8) | sfr[1]; | |
245 | srate *= Mclk; | |
246 | srate /= 16; | |
247 | srate += (sfr[2] >> 4) * Mclk / 256; | |
248 | offset = (s32) rtf * (srate / 4096L); | |
249 | offset /= 128; | |
250 | ||
271ddbf7 HH |
251 | dprintk ("%s : srate = %i\n", __func__, srate); |
252 | dprintk ("%s : ofset = %i\n", __func__, offset); | |
1da177e4 LT |
253 | |
254 | srate += offset; | |
255 | ||
256 | srate += 1000; | |
257 | srate /= 2000; | |
258 | srate *= 2000; | |
259 | ||
260 | return srate; | |
261 | } | |
262 | ||
263 | static int stv0299_send_diseqc_msg (struct dvb_frontend* fe, | |
264 | struct dvb_diseqc_master_cmd *m) | |
265 | { | |
9101e622 | 266 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
267 | u8 val; |
268 | int i; | |
269 | ||
271ddbf7 | 270 | dprintk ("%s\n", __func__); |
1da177e4 LT |
271 | |
272 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
273 | return -ETIMEDOUT; | |
274 | ||
275 | val = stv0299_readreg (state, 0x08); | |
276 | ||
277 | if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x6)) /* DiSEqC mode */ | |
278 | return -EREMOTEIO; | |
279 | ||
280 | for (i=0; i<m->msg_len; i++) { | |
281 | if (stv0299_wait_diseqc_fifo (state, 100) < 0) | |
282 | return -ETIMEDOUT; | |
283 | ||
284 | if (stv0299_writeregI (state, 0x09, m->msg[i])) | |
285 | return -EREMOTEIO; | |
286 | } | |
287 | ||
288 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
289 | return -ETIMEDOUT; | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
0df289a2 MCC |
294 | static int stv0299_send_diseqc_burst(struct dvb_frontend *fe, |
295 | enum fe_sec_mini_cmd burst) | |
1da177e4 | 296 | { |
9101e622 | 297 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
298 | u8 val; |
299 | ||
271ddbf7 | 300 | dprintk ("%s\n", __func__); |
1da177e4 LT |
301 | |
302 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
303 | return -ETIMEDOUT; | |
304 | ||
305 | val = stv0299_readreg (state, 0x08); | |
306 | ||
307 | if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x2)) /* burst mode */ | |
308 | return -EREMOTEIO; | |
309 | ||
310 | if (stv0299_writeregI (state, 0x09, burst == SEC_MINI_A ? 0x00 : 0xff)) | |
311 | return -EREMOTEIO; | |
312 | ||
313 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
314 | return -ETIMEDOUT; | |
315 | ||
316 | if (stv0299_writeregI (state, 0x08, val)) | |
317 | return -EREMOTEIO; | |
318 | ||
319 | return 0; | |
320 | } | |
321 | ||
0df289a2 MCC |
322 | static int stv0299_set_tone(struct dvb_frontend *fe, |
323 | enum fe_sec_tone_mode tone) | |
1da177e4 | 324 | { |
9101e622 | 325 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
326 | u8 val; |
327 | ||
328 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
329 | return -ETIMEDOUT; | |
330 | ||
331 | val = stv0299_readreg (state, 0x08); | |
332 | ||
333 | switch (tone) { | |
334 | case SEC_TONE_ON: | |
335 | return stv0299_writeregI (state, 0x08, val | 0x3); | |
336 | ||
337 | case SEC_TONE_OFF: | |
338 | return stv0299_writeregI (state, 0x08, (val & ~0x3) | 0x02); | |
339 | ||
340 | default: | |
341 | return -EINVAL; | |
342 | } | |
343 | } | |
344 | ||
0df289a2 MCC |
345 | static int stv0299_set_voltage(struct dvb_frontend *fe, |
346 | enum fe_sec_voltage voltage) | |
1da177e4 | 347 | { |
9101e622 | 348 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
349 | u8 reg0x08; |
350 | u8 reg0x0c; | |
351 | ||
271ddbf7 | 352 | dprintk("%s: %s\n", __func__, |
1da177e4 LT |
353 | voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : |
354 | voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??"); | |
355 | ||
356 | reg0x08 = stv0299_readreg (state, 0x08); | |
357 | reg0x0c = stv0299_readreg (state, 0x0c); | |
358 | ||
b95b0c98 | 359 | /* |
1da177e4 LT |
360 | * H/V switching over OP0, OP1 and OP2 are LNB power enable bits |
361 | */ | |
362 | reg0x0c &= 0x0f; | |
e84b133e | 363 | reg0x08 = (reg0x08 & 0x3f) | (state->config->lock_output << 6); |
1da177e4 LT |
364 | |
365 | switch (voltage) { | |
366 | case SEC_VOLTAGE_13: | |
e84b133e OE |
367 | if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0) |
368 | reg0x0c |= 0x10; /* OP1 off, OP0 on */ | |
369 | else | |
370 | reg0x0c |= 0x40; /* OP1 on, OP0 off */ | |
371 | break; | |
1da177e4 | 372 | case SEC_VOLTAGE_18: |
e84b133e OE |
373 | reg0x0c |= 0x50; /* OP1 on, OP0 on */ |
374 | break; | |
375 | case SEC_VOLTAGE_OFF: | |
376 | /* LNB power off! */ | |
377 | reg0x08 = 0x00; | |
378 | reg0x0c = 0x00; | |
379 | break; | |
1da177e4 LT |
380 | default: |
381 | return -EINVAL; | |
c2c1b415 | 382 | } |
e84b133e OE |
383 | |
384 | if (state->config->op0_off) | |
385 | reg0x0c &= ~0x10; | |
386 | ||
387 | stv0299_writeregI(state, 0x08, reg0x08); | |
388 | return stv0299_writeregI(state, 0x0c, reg0x0c); | |
1da177e4 LT |
389 | } |
390 | ||
400b7083 | 391 | static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long cmd) |
591ad98d JS |
392 | { |
393 | struct stv0299_state* state = fe->demodulator_priv; | |
394 | u8 reg0x08; | |
395 | u8 reg0x0c; | |
396 | u8 lv_mask = 0x40; | |
1da177e4 LT |
397 | u8 last = 1; |
398 | int i; | |
9056a23b TR |
399 | ktime_t nexttime; |
400 | ktime_t tv[10]; | |
1da177e4 | 401 | |
591ad98d JS |
402 | reg0x08 = stv0299_readreg (state, 0x08); |
403 | reg0x0c = stv0299_readreg (state, 0x0c); | |
404 | reg0x0c &= 0x0f; | |
405 | stv0299_writeregI (state, 0x08, (reg0x08 & 0x3f) | (state->config->lock_output << 6)); | |
406 | if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0) | |
407 | lv_mask = 0x10; | |
1da177e4 LT |
408 | |
409 | cmd = cmd << 1; | |
591ad98d | 410 | if (debug_legacy_dish_switch) |
271ddbf7 | 411 | printk ("%s switch command: 0x%04lx\n",__func__, cmd); |
591ad98d | 412 | |
6b3f9998 | 413 | nexttime = ktime_get_boottime(); |
591ad98d | 414 | if (debug_legacy_dish_switch) |
ee45ddc1 | 415 | tv[0] = nexttime; |
591ad98d | 416 | stv0299_writeregI (state, 0x0c, reg0x0c | 0x50); /* set LNB to 18V */ |
1da177e4 | 417 | |
83b75b04 | 418 | dvb_frontend_sleep_until(&nexttime, 32000); |
1da177e4 LT |
419 | |
420 | for (i=0; i<9; i++) { | |
591ad98d | 421 | if (debug_legacy_dish_switch) |
6b3f9998 | 422 | tv[i+1] = ktime_get_boottime(); |
1da177e4 | 423 | if((cmd & 0x01) != last) { |
591ad98d JS |
424 | /* set voltage to (last ? 13V : 18V) */ |
425 | stv0299_writeregI (state, 0x0c, reg0x0c | (last ? lv_mask : 0x50)); | |
1da177e4 LT |
426 | last = (last) ? 0 : 1; |
427 | } | |
428 | ||
429 | cmd = cmd >> 1; | |
430 | ||
431 | if (i != 8) | |
83b75b04 | 432 | dvb_frontend_sleep_until(&nexttime, 8000); |
591ad98d JS |
433 | } |
434 | if (debug_legacy_dish_switch) { | |
435 | printk ("%s(%d): switch delay (should be 32k followed by all 8k\n", | |
271ddbf7 | 436 | __func__, fe->dvb->num); |
83b75b04 | 437 | for (i = 1; i < 10; i++) |
9056a23b TR |
438 | printk("%d: %d\n", i, |
439 | (int) ktime_us_delta(tv[i], tv[i-1])); | |
1da177e4 LT |
440 | } |
441 | ||
442 | return 0; | |
443 | } | |
444 | ||
445 | static int stv0299_init (struct dvb_frontend* fe) | |
446 | { | |
9101e622 | 447 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 448 | int i; |
e84b133e OE |
449 | u8 reg; |
450 | u8 val; | |
1da177e4 LT |
451 | |
452 | dprintk("stv0299: init chip\n"); | |
453 | ||
24fb0604 MP |
454 | stv0299_writeregI(state, 0x02, 0x30 | state->mcr_reg); |
455 | msleep(50); | |
456 | ||
e84b133e OE |
457 | for (i = 0; ; i += 2) { |
458 | reg = state->config->inittab[i]; | |
459 | val = state->config->inittab[i+1]; | |
460 | if (reg == 0xff && val == 0xff) | |
461 | break; | |
462 | if (reg == 0x0c && state->config->op0_off) | |
463 | val &= ~0x10; | |
24fb0604 MP |
464 | if (reg == 0x2) |
465 | state->mcr_reg = val & 0xf; | |
e84b133e OE |
466 | stv0299_writeregI(state, reg, val); |
467 | } | |
1da177e4 | 468 | |
1da177e4 LT |
469 | return 0; |
470 | } | |
471 | ||
0df289a2 MCC |
472 | static int stv0299_read_status(struct dvb_frontend *fe, |
473 | enum fe_status *status) | |
1da177e4 | 474 | { |
9101e622 | 475 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
476 | |
477 | u8 signal = 0xff - stv0299_readreg (state, 0x18); | |
478 | u8 sync = stv0299_readreg (state, 0x1b); | |
479 | ||
271ddbf7 | 480 | dprintk ("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync); |
1da177e4 LT |
481 | *status = 0; |
482 | ||
483 | if (signal > 10) | |
484 | *status |= FE_HAS_SIGNAL; | |
485 | ||
486 | if (sync & 0x80) | |
487 | *status |= FE_HAS_CARRIER; | |
488 | ||
489 | if (sync & 0x10) | |
490 | *status |= FE_HAS_VITERBI; | |
491 | ||
492 | if (sync & 0x08) | |
493 | *status |= FE_HAS_SYNC; | |
494 | ||
495 | if ((sync & 0x98) == 0x98) | |
496 | *status |= FE_HAS_LOCK; | |
497 | ||
498 | return 0; | |
499 | } | |
500 | ||
501 | static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber) | |
502 | { | |
9101e622 | 503 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 504 | |
7876ad75 OE |
505 | if (state->errmode != STATUS_BER) |
506 | return -ENOSYS; | |
507 | ||
508 | *ber = stv0299_readreg(state, 0x1e) | (stv0299_readreg(state, 0x1d) << 8); | |
1da177e4 LT |
509 | |
510 | return 0; | |
511 | } | |
512 | ||
513 | static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |
514 | { | |
9101e622 | 515 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
516 | |
517 | s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8) | |
518 | | stv0299_readreg (state, 0x19)); | |
519 | ||
271ddbf7 | 520 | dprintk ("%s : FE_READ_SIGNAL_STRENGTH : AGC2I: 0x%02x%02x, signal=0x%04x\n", __func__, |
1da177e4 LT |
521 | stv0299_readreg (state, 0x18), |
522 | stv0299_readreg (state, 0x19), (int) signal); | |
523 | ||
524 | signal = signal * 5 / 4; | |
525 | *strength = (signal > 0xffff) ? 0xffff : (signal < 0) ? 0 : signal; | |
526 | ||
527 | return 0; | |
528 | } | |
529 | ||
530 | static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr) | |
531 | { | |
9101e622 | 532 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
533 | |
534 | s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8) | |
535 | | stv0299_readreg (state, 0x25)); | |
536 | xsnr = 3 * (xsnr - 0xa100); | |
537 | *snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr; | |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
542 | static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
543 | { | |
9101e622 | 544 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 545 | |
7876ad75 OE |
546 | if (state->errmode != STATUS_UCBLOCKS) |
547 | return -ENOSYS; | |
548 | ||
549 | state->ucblocks += stv0299_readreg(state, 0x1e); | |
550 | state->ucblocks += (stv0299_readreg(state, 0x1d) << 8); | |
551 | *ucblocks = state->ucblocks; | |
1da177e4 LT |
552 | |
553 | return 0; | |
554 | } | |
555 | ||
45f4a8ea | 556 | static int stv0299_set_frontend(struct dvb_frontend *fe) |
1da177e4 | 557 | { |
45f4a8ea | 558 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
9101e622 | 559 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
560 | int invval = 0; |
561 | ||
271ddbf7 | 562 | dprintk ("%s : FE_SET_FRONTEND\n", __func__); |
e4aab64c IL |
563 | if (state->config->set_ts_params) |
564 | state->config->set_ts_params(fe, 0); | |
1da177e4 LT |
565 | |
566 | // set the inversion | |
567 | if (p->inversion == INVERSION_OFF) invval = 0; | |
568 | else if (p->inversion == INVERSION_ON) invval = 1; | |
569 | else { | |
570 | printk("stv0299 does not support auto-inversion\n"); | |
571 | return -EINVAL; | |
572 | } | |
573 | if (state->config->invert) invval = (~invval) & 1; | |
574 | stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval); | |
575 | ||
dea74869 | 576 | if (fe->ops.tuner_ops.set_params) { |
14d24d14 | 577 | fe->ops.tuner_ops.set_params(fe); |
dea74869 | 578 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); |
53a8ee3e | 579 | } |
3528cc4e | 580 | |
45f4a8ea MCC |
581 | stv0299_set_FEC(state, p->fec_inner); |
582 | stv0299_set_symbolrate(fe, p->symbol_rate); | |
3528cc4e AQ |
583 | stv0299_writeregI(state, 0x22, 0x00); |
584 | stv0299_writeregI(state, 0x23, 0x00); | |
1da177e4 LT |
585 | |
586 | state->tuner_frequency = p->frequency; | |
45f4a8ea MCC |
587 | state->fec_inner = p->fec_inner; |
588 | state->symbol_rate = p->symbol_rate; | |
1da177e4 LT |
589 | |
590 | return 0; | |
591 | } | |
592 | ||
7e3e68bc MCC |
593 | static int stv0299_get_frontend(struct dvb_frontend *fe, |
594 | struct dtv_frontend_properties *p) | |
1da177e4 | 595 | { |
9101e622 | 596 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
597 | s32 derot_freq; |
598 | int invval; | |
599 | ||
600 | derot_freq = (s32)(s16) ((stv0299_readreg (state, 0x22) << 8) | |
601 | | stv0299_readreg (state, 0x23)); | |
602 | ||
603 | derot_freq *= (state->config->mclk >> 16); | |
604 | derot_freq += 500; | |
605 | derot_freq /= 1000; | |
606 | ||
607 | p->frequency += derot_freq; | |
608 | ||
609 | invval = stv0299_readreg (state, 0x0c) & 1; | |
610 | if (state->config->invert) invval = (~invval) & 1; | |
611 | p->inversion = invval ? INVERSION_ON : INVERSION_OFF; | |
612 | ||
45f4a8ea MCC |
613 | p->fec_inner = stv0299_get_fec(state); |
614 | p->symbol_rate = stv0299_get_symbolrate(state); | |
1da177e4 LT |
615 | |
616 | return 0; | |
617 | } | |
618 | ||
619 | static int stv0299_sleep(struct dvb_frontend* fe) | |
620 | { | |
9101e622 | 621 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 622 | |
24fb0604 | 623 | stv0299_writeregI(state, 0x02, 0xb0 | state->mcr_reg); |
1da177e4 LT |
624 | state->initialised = 0; |
625 | ||
626 | return 0; | |
627 | } | |
628 | ||
53a8ee3e AQ |
629 | static int stv0299_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) |
630 | { | |
631 | struct stv0299_state* state = fe->demodulator_priv; | |
632 | ||
633 | if (enable) { | |
a9686e0d | 634 | stv0299_writeregI(state, 0x05, 0xb5); |
53a8ee3e | 635 | } else { |
a9686e0d | 636 | stv0299_writeregI(state, 0x05, 0x35); |
53a8ee3e | 637 | } |
a9686e0d AQ |
638 | udelay(1); |
639 | return 0; | |
53a8ee3e AQ |
640 | } |
641 | ||
1da177e4 LT |
642 | static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
643 | { | |
9101e622 | 644 | struct stv0299_state* state = fe->demodulator_priv; |
5581e130 | 645 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
646 | |
647 | fesettings->min_delay_ms = state->config->min_delay_ms; | |
5581e130 MCC |
648 | if (p->symbol_rate < 10000000) { |
649 | fesettings->step_size = p->symbol_rate / 32000; | |
1da177e4 LT |
650 | fesettings->max_drift = 5000; |
651 | } else { | |
5581e130 MCC |
652 | fesettings->step_size = p->symbol_rate / 16000; |
653 | fesettings->max_drift = p->symbol_rate / 2000; | |
1da177e4 LT |
654 | } |
655 | return 0; | |
656 | } | |
657 | ||
658 | static void stv0299_release(struct dvb_frontend* fe) | |
659 | { | |
b8742700 | 660 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
661 | kfree(state); |
662 | } | |
663 | ||
bd336e63 | 664 | static const struct dvb_frontend_ops stv0299_ops; |
1da177e4 LT |
665 | |
666 | struct dvb_frontend* stv0299_attach(const struct stv0299_config* config, | |
667 | struct i2c_adapter* i2c) | |
668 | { | |
669 | struct stv0299_state* state = NULL; | |
670 | int id; | |
671 | ||
672 | /* allocate memory for the internal state */ | |
084e24ac | 673 | state = kzalloc(sizeof(struct stv0299_state), GFP_KERNEL); |
1da177e4 LT |
674 | if (state == NULL) goto error; |
675 | ||
676 | /* setup the state */ | |
677 | state->config = config; | |
678 | state->i2c = i2c; | |
1da177e4 LT |
679 | state->initialised = 0; |
680 | state->tuner_frequency = 0; | |
681 | state->symbol_rate = 0; | |
682 | state->fec_inner = 0; | |
37650221 | 683 | state->errmode = STATUS_BER; |
1da177e4 LT |
684 | |
685 | /* check if the demod is there */ | |
24fb0604 | 686 | stv0299_writeregI(state, 0x02, 0x30); /* standby off */ |
1da177e4 LT |
687 | msleep(200); |
688 | id = stv0299_readreg(state, 0x00); | |
689 | ||
690 | /* register 0x00 contains 0xa1 for STV0299 and STV0299B */ | |
691 | /* register 0x00 might contain 0x80 when returning from standby */ | |
692 | if (id != 0xa1 && id != 0x80) goto error; | |
693 | ||
694 | /* create dvb_frontend */ | |
dea74869 | 695 | memcpy(&state->frontend.ops, &stv0299_ops, sizeof(struct dvb_frontend_ops)); |
9101e622 | 696 | state->frontend.demodulator_priv = state; |
1da177e4 LT |
697 | return &state->frontend; |
698 | ||
699 | error: | |
700 | kfree(state); | |
701 | return NULL; | |
702 | } | |
703 | ||
bd336e63 | 704 | static const struct dvb_frontend_ops stv0299_ops = { |
45f4a8ea | 705 | .delsys = { SYS_DVBS }, |
1da177e4 LT |
706 | .info = { |
707 | .name = "ST STV0299 DVB-S", | |
f1b1eabf MCC |
708 | .frequency_min_hz = 950 * MHz, |
709 | .frequency_max_hz = 2150 * MHz, | |
710 | .frequency_stepsize_hz = 125 * kHz, | |
1da177e4 LT |
711 | .symbol_rate_min = 1000000, |
712 | .symbol_rate_max = 45000000, | |
713 | .symbol_rate_tolerance = 500, /* ppm */ | |
714 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
715 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | | |
716 | FE_CAN_QPSK | | |
717 | FE_CAN_FEC_AUTO | |
718 | }, | |
719 | ||
720 | .release = stv0299_release, | |
721 | ||
722 | .init = stv0299_init, | |
723 | .sleep = stv0299_sleep, | |
c10d14d6 | 724 | .write = stv0299_write, |
53a8ee3e | 725 | .i2c_gate_ctrl = stv0299_i2c_gate_ctrl, |
1da177e4 | 726 | |
45f4a8ea MCC |
727 | .set_frontend = stv0299_set_frontend, |
728 | .get_frontend = stv0299_get_frontend, | |
1da177e4 LT |
729 | .get_tune_settings = stv0299_get_tune_settings, |
730 | ||
731 | .read_status = stv0299_read_status, | |
732 | .read_ber = stv0299_read_ber, | |
733 | .read_signal_strength = stv0299_read_signal_strength, | |
734 | .read_snr = stv0299_read_snr, | |
735 | .read_ucblocks = stv0299_read_ucblocks, | |
736 | ||
737 | .diseqc_send_master_cmd = stv0299_send_diseqc_msg, | |
738 | .diseqc_send_burst = stv0299_send_diseqc_burst, | |
739 | .set_tone = stv0299_set_tone, | |
740 | .set_voltage = stv0299_set_voltage, | |
741 | .dishnetwork_send_legacy_command = stv0299_send_legacy_dish_cmd, | |
742 | }; | |
743 | ||
591ad98d JS |
744 | module_param(debug_legacy_dish_switch, int, 0444); |
745 | MODULE_PARM_DESC(debug_legacy_dish_switch, "Enable timing analysis for Dish Network legacy switches"); | |
746 | ||
1da177e4 LT |
747 | module_param(debug, int, 0644); |
748 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
749 | ||
750 | MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver"); | |
4bd69e7b | 751 | MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, Andreas Oberritter, Andrew de Quincey, Kenneth Aafly"); |
1da177e4 LT |
752 | MODULE_LICENSE("GPL"); |
753 | ||
1da177e4 | 754 | EXPORT_SYMBOL(stv0299_attach); |