Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM | |
3 | * | |
d9e54324 TP |
4 | * |
5 | * Copyright (C) 2007 Trent Piepho <xyzzy@speakeasy.org> | |
6 | * | |
1da177e4 LT |
7 | * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com> |
8 | * | |
9 | * Based on code from Jack Kelliher (kelliher@xmission.com) | |
10 | * Copyright (C) 2002 & pcHDTV, inc. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | */ | |
27 | ||
28 | /* | |
29 | * This driver needs two external firmware files. Please copy | |
30 | * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to | |
31 | * /usr/lib/hotplug/firmware/ or /lib/firmware/ | |
32 | * (depending on configuration of firmware hotplug). | |
33 | */ | |
34 | #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw" | |
35 | #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw" | |
36 | ||
37 | #include <linux/kernel.h> | |
38 | #include <linux/module.h> | |
1da177e4 LT |
39 | #include <linux/init.h> |
40 | #include <linux/delay.h> | |
4e57b681 TS |
41 | #include <linux/string.h> |
42 | #include <linux/slab.h> | |
1da177e4 LT |
43 | #include <asm/byteorder.h> |
44 | ||
b2fb7f55 | 45 | #include "dvb_math.h" |
1da177e4 | 46 | #include "dvb_frontend.h" |
1da177e4 LT |
47 | #include "or51132.h" |
48 | ||
49 | static int debug; | |
50 | #define dprintk(args...) \ | |
51 | do { \ | |
52 | if (debug) printk(KERN_DEBUG "or51132: " args); \ | |
53 | } while (0) | |
54 | ||
55 | ||
56 | struct or51132_state | |
57 | { | |
58 | struct i2c_adapter* i2c; | |
1da177e4 LT |
59 | |
60 | /* Configuration settings */ | |
61 | const struct or51132_config* config; | |
62 | ||
63 | struct dvb_frontend frontend; | |
64 | ||
65 | /* Demodulator private data */ | |
0df289a2 | 66 | enum fe_modulation current_modulation; |
b2fb7f55 | 67 | u32 snr; /* Result of last SNR calculation */ |
1da177e4 LT |
68 | |
69 | /* Tuner private data */ | |
70 | u32 current_frequency; | |
71 | }; | |
72 | ||
d9e54324 TP |
73 | |
74 | /* Write buffer to demod */ | |
75 | static int or51132_writebuf(struct or51132_state *state, const u8 *buf, int len) | |
1da177e4 LT |
76 | { |
77 | int err; | |
d9e54324 TP |
78 | struct i2c_msg msg = { .addr = state->config->demod_address, |
79 | .flags = 0, .buf = (u8*)buf, .len = len }; | |
1da177e4 | 80 | |
d9e54324 | 81 | /* msleep(20); */ /* doesn't appear to be necessary */ |
1da177e4 | 82 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { |
d9e54324 TP |
83 | printk(KERN_WARNING "or51132: I2C write (addr 0x%02x len %d) error: %d\n", |
84 | msg.addr, msg.len, err); | |
1da177e4 LT |
85 | return -EREMOTEIO; |
86 | } | |
1da177e4 LT |
87 | return 0; |
88 | } | |
89 | ||
d9e54324 TP |
90 | /* Write constant bytes, e.g. or51132_writebytes(state, 0x04, 0x42, 0x00); |
91 | Less code and more efficient that loading a buffer on the stack with | |
92 | the bytes to send and then calling or51132_writebuf() on that. */ | |
93 | #define or51132_writebytes(state, data...) \ | |
cbfa6f2a | 94 | ({ static const u8 _data[] = {data}; \ |
d9e54324 TP |
95 | or51132_writebuf(state, _data, sizeof(_data)); }) |
96 | ||
97 | /* Read data from demod into buffer. Returns 0 on success. */ | |
98 | static int or51132_readbuf(struct or51132_state *state, u8 *buf, int len) | |
1da177e4 LT |
99 | { |
100 | int err; | |
d9e54324 TP |
101 | struct i2c_msg msg = { .addr = state->config->demod_address, |
102 | .flags = I2C_M_RD, .buf = buf, .len = len }; | |
1da177e4 | 103 | |
d9e54324 | 104 | /* msleep(20); */ /* doesn't appear to be necessary */ |
1da177e4 | 105 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { |
d9e54324 TP |
106 | printk(KERN_WARNING "or51132: I2C read (addr 0x%02x len %d) error: %d\n", |
107 | msg.addr, msg.len, err); | |
1da177e4 LT |
108 | return -EREMOTEIO; |
109 | } | |
1da177e4 LT |
110 | return 0; |
111 | } | |
112 | ||
d9e54324 TP |
113 | /* Reads a 16-bit demod register. Returns <0 on error. */ |
114 | static int or51132_readreg(struct or51132_state *state, u8 reg) | |
115 | { | |
116 | u8 buf[2] = { 0x04, reg }; | |
117 | struct i2c_msg msg[2] = { | |
118 | {.addr = state->config->demod_address, .flags = 0, | |
119 | .buf = buf, .len = 2 }, | |
120 | {.addr = state->config->demod_address, .flags = I2C_M_RD, | |
121 | .buf = buf, .len = 2 }}; | |
122 | int err; | |
123 | ||
124 | if ((err = i2c_transfer(state->i2c, msg, 2)) != 2) { | |
125 | printk(KERN_WARNING "or51132: I2C error reading register %d: %d\n", | |
126 | reg, err); | |
127 | return -EREMOTEIO; | |
128 | } | |
18dcd55a | 129 | return buf[0] | (buf[1] << 8); |
d9e54324 TP |
130 | } |
131 | ||
1da177e4 LT |
132 | static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw) |
133 | { | |
b8742700 | 134 | struct or51132_state* state = fe->demodulator_priv; |
cbfa6f2a | 135 | static const u8 run_buf[] = {0x7F,0x01}; |
0ead0918 | 136 | u8 rec_buf[8]; |
1da177e4 LT |
137 | u32 firmwareAsize, firmwareBsize; |
138 | int i,ret; | |
139 | ||
140 | dprintk("Firmware is %Zd bytes\n",fw->size); | |
141 | ||
142 | /* Get size of firmware A and B */ | |
18dcd55a | 143 | firmwareAsize = le32_to_cpu(*((__le32*)fw->data)); |
1da177e4 | 144 | dprintk("FirmwareA is %i bytes\n",firmwareAsize); |
18dcd55a | 145 | firmwareBsize = le32_to_cpu(*((__le32*)(fw->data+4))); |
1da177e4 LT |
146 | dprintk("FirmwareB is %i bytes\n",firmwareBsize); |
147 | ||
148 | /* Upload firmware */ | |
d9e54324 | 149 | if ((ret = or51132_writebuf(state, &fw->data[8], firmwareAsize))) { |
1da177e4 LT |
150 | printk(KERN_WARNING "or51132: load_firmware error 1\n"); |
151 | return ret; | |
152 | } | |
d9e54324 TP |
153 | if ((ret = or51132_writebuf(state, &fw->data[8+firmwareAsize], |
154 | firmwareBsize))) { | |
1da177e4 LT |
155 | printk(KERN_WARNING "or51132: load_firmware error 2\n"); |
156 | return ret; | |
157 | } | |
1da177e4 | 158 | |
d9e54324 | 159 | if ((ret = or51132_writebuf(state, run_buf, 2))) { |
1da177e4 LT |
160 | printk(KERN_WARNING "or51132: load_firmware error 3\n"); |
161 | return ret; | |
162 | } | |
d9e54324 | 163 | if ((ret = or51132_writebuf(state, run_buf, 2))) { |
1da177e4 LT |
164 | printk(KERN_WARNING "or51132: load_firmware error 4\n"); |
165 | return ret; | |
166 | } | |
167 | ||
168 | /* 50ms for operation to begin */ | |
169 | msleep(50); | |
170 | ||
171 | /* Read back ucode version to besure we loaded correctly and are really up and running */ | |
172 | /* Get uCode version */ | |
d9e54324 | 173 | if ((ret = or51132_writebytes(state, 0x10, 0x10, 0x00))) { |
1da177e4 LT |
174 | printk(KERN_WARNING "or51132: load_firmware error a\n"); |
175 | return ret; | |
176 | } | |
d9e54324 | 177 | if ((ret = or51132_writebytes(state, 0x04, 0x17))) { |
1da177e4 LT |
178 | printk(KERN_WARNING "or51132: load_firmware error b\n"); |
179 | return ret; | |
180 | } | |
d9e54324 | 181 | if ((ret = or51132_writebytes(state, 0x00, 0x00))) { |
1da177e4 LT |
182 | printk(KERN_WARNING "or51132: load_firmware error c\n"); |
183 | return ret; | |
184 | } | |
d9e54324 | 185 | for (i=0;i<4;i++) { |
d147ed2a | 186 | /* Once upon a time, this command might have had something |
0ead0918 TP |
187 | to do with getting the firmware version, but it's |
188 | not used anymore: | |
189 | {0x04,0x00,0x30,0x00,i+1} */ | |
190 | /* Read 8 bytes, two bytes at a time */ | |
d9e54324 | 191 | if ((ret = or51132_readbuf(state, &rec_buf[i*2], 2))) { |
1da177e4 LT |
192 | printk(KERN_WARNING |
193 | "or51132: load_firmware error d - %d\n",i); | |
194 | return ret; | |
195 | } | |
196 | } | |
197 | ||
198 | printk(KERN_WARNING | |
199 | "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n", | |
200 | rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2], | |
201 | rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6], | |
202 | rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f, | |
203 | rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f); | |
204 | ||
d9e54324 | 205 | if ((ret = or51132_writebytes(state, 0x10, 0x00, 0x00))) { |
1da177e4 LT |
206 | printk(KERN_WARNING "or51132: load_firmware error e\n"); |
207 | return ret; | |
208 | } | |
209 | return 0; | |
210 | }; | |
211 | ||
212 | static int or51132_init(struct dvb_frontend* fe) | |
213 | { | |
214 | return 0; | |
215 | } | |
216 | ||
217 | static int or51132_read_ber(struct dvb_frontend* fe, u32* ber) | |
218 | { | |
219 | *ber = 0; | |
220 | return 0; | |
221 | } | |
222 | ||
223 | static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
224 | { | |
225 | *ucblocks = 0; | |
226 | return 0; | |
227 | } | |
228 | ||
229 | static int or51132_sleep(struct dvb_frontend* fe) | |
230 | { | |
231 | return 0; | |
232 | } | |
233 | ||
234 | static int or51132_setmode(struct dvb_frontend* fe) | |
235 | { | |
b8742700 | 236 | struct or51132_state* state = fe->demodulator_priv; |
d9e54324 TP |
237 | u8 cmd_buf1[3] = {0x04, 0x01, 0x5f}; |
238 | u8 cmd_buf2[3] = {0x1c, 0x00, 0 }; | |
1da177e4 LT |
239 | |
240 | dprintk("setmode %d\n",(int)state->current_modulation); | |
d9e54324 | 241 | |
1da177e4 | 242 | switch (state->current_modulation) { |
1da177e4 | 243 | case VSB_8: |
d9e54324 TP |
244 | /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high */ |
245 | cmd_buf1[2] = 0x50; | |
246 | /* REC MODE inv IF spectrum, Normal */ | |
247 | cmd_buf2[1] = 0x03; | |
248 | /* Channel MODE ATSC/VSB8 */ | |
249 | cmd_buf2[2] = 0x06; | |
1da177e4 | 250 | break; |
d9e54324 TP |
251 | /* All QAM modes are: |
252 | Auto-deinterleave; MPEGser, MPEG2tr, phase noise-high | |
253 | REC MODE Normal Carrier Lock */ | |
1da177e4 | 254 | case QAM_AUTO: |
1da177e4 | 255 | /* Channel MODE Auto QAM64/256 */ |
d9e54324 | 256 | cmd_buf2[2] = 0x4f; |
1da177e4 LT |
257 | break; |
258 | case QAM_256: | |
1da177e4 | 259 | /* Channel MODE QAM256 */ |
d9e54324 | 260 | cmd_buf2[2] = 0x45; |
1da177e4 LT |
261 | break; |
262 | case QAM_64: | |
1da177e4 | 263 | /* Channel MODE QAM64 */ |
d9e54324 | 264 | cmd_buf2[2] = 0x43; |
1da177e4 LT |
265 | break; |
266 | default: | |
d9e54324 TP |
267 | printk(KERN_WARNING |
268 | "or51132: setmode: Modulation set to unsupported value (%d)\n", | |
269 | state->current_modulation); | |
270 | return -EINVAL; | |
271 | } | |
272 | ||
273 | /* Set Receiver 1 register */ | |
274 | if (or51132_writebuf(state, cmd_buf1, 3)) { | |
275 | printk(KERN_WARNING "or51132: set_mode error 1\n"); | |
276 | return -EREMOTEIO; | |
277 | } | |
278 | dprintk("set #1 to %02x\n", cmd_buf1[2]); | |
279 | ||
280 | /* Set operation mode in Receiver 6 register */ | |
281 | if (or51132_writebuf(state, cmd_buf2, 3)) { | |
1da177e4 | 282 | printk(KERN_WARNING "or51132: set_mode error 2\n"); |
d9e54324 | 283 | return -EREMOTEIO; |
1da177e4 | 284 | } |
d9e54324 | 285 | dprintk("set #6 to 0x%02x%02x\n", cmd_buf2[1], cmd_buf2[2]); |
1da177e4 LT |
286 | |
287 | return 0; | |
288 | } | |
289 | ||
87184554 TP |
290 | /* Some modulations use the same firmware. This classifies modulations |
291 | by the firmware they use. */ | |
292 | #define MOD_FWCLASS_UNKNOWN 0 | |
293 | #define MOD_FWCLASS_VSB 1 | |
294 | #define MOD_FWCLASS_QAM 2 | |
0df289a2 | 295 | static int modulation_fw_class(enum fe_modulation modulation) |
87184554 TP |
296 | { |
297 | switch(modulation) { | |
298 | case VSB_8: | |
299 | return MOD_FWCLASS_VSB; | |
300 | case QAM_AUTO: | |
301 | case QAM_64: | |
302 | case QAM_256: | |
303 | return MOD_FWCLASS_QAM; | |
304 | default: | |
305 | return MOD_FWCLASS_UNKNOWN; | |
306 | } | |
307 | } | |
308 | ||
d8f7cc28 | 309 | static int or51132_set_parameters(struct dvb_frontend *fe) |
1da177e4 | 310 | { |
d8f7cc28 | 311 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 | 312 | int ret; |
b8742700 | 313 | struct or51132_state* state = fe->demodulator_priv; |
1da177e4 | 314 | const struct firmware *fw; |
87184554 TP |
315 | const char *fwname; |
316 | int clock_mode; | |
317 | ||
318 | /* Upload new firmware only if we need a different one */ | |
319 | if (modulation_fw_class(state->current_modulation) != | |
d8f7cc28 MCC |
320 | modulation_fw_class(p->modulation)) { |
321 | switch (modulation_fw_class(p->modulation)) { | |
87184554 | 322 | case MOD_FWCLASS_VSB: |
1da177e4 | 323 | dprintk("set_parameters VSB MODE\n"); |
87184554 TP |
324 | fwname = OR51132_VSB_FIRMWARE; |
325 | ||
1da177e4 | 326 | /* Set non-punctured clock for VSB */ |
87184554 | 327 | clock_mode = 0; |
1da177e4 | 328 | break; |
87184554 | 329 | case MOD_FWCLASS_QAM: |
1da177e4 | 330 | dprintk("set_parameters QAM MODE\n"); |
87184554 TP |
331 | fwname = OR51132_QAM_FIRMWARE; |
332 | ||
1da177e4 | 333 | /* Set punctured clock for QAM */ |
87184554 | 334 | clock_mode = 1; |
1da177e4 LT |
335 | break; |
336 | default: | |
87184554 | 337 | printk("or51132: Modulation type(%d) UNSUPPORTED\n", |
d8f7cc28 | 338 | p->modulation); |
1da177e4 | 339 | return -1; |
87184554 TP |
340 | } |
341 | printk("or51132: Waiting for firmware upload(%s)...\n", | |
342 | fwname); | |
e9785250 | 343 | ret = request_firmware(&fw, fwname, state->i2c->dev.parent); |
87184554 | 344 | if (ret) { |
4bd69e7b | 345 | printk(KERN_WARNING "or51132: No firmware uploaded(timeout or file not found?)\n"); |
87184554 TP |
346 | return ret; |
347 | } | |
1da177e4 LT |
348 | ret = or51132_load_firmware(fe, fw); |
349 | release_firmware(fw); | |
350 | if (ret) { | |
4bd69e7b | 351 | printk(KERN_WARNING "or51132: Writing firmware to device failed!\n"); |
1da177e4 LT |
352 | return ret; |
353 | } | |
354 | printk("or51132: Firmware upload complete.\n"); | |
87184554 TP |
355 | state->config->set_ts_params(fe, clock_mode); |
356 | } | |
357 | /* Change only if we are actually changing the modulation */ | |
d8f7cc28 MCC |
358 | if (state->current_modulation != p->modulation) { |
359 | state->current_modulation = p->modulation; | |
1da177e4 LT |
360 | or51132_setmode(fe); |
361 | } | |
362 | ||
dea74869 | 363 | if (fe->ops.tuner_ops.set_params) { |
14d24d14 | 364 | fe->ops.tuner_ops.set_params(fe); |
dea74869 | 365 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); |
44d92aa7 | 366 | } |
80e27e20 MM |
367 | |
368 | /* Set to current mode */ | |
369 | or51132_setmode(fe); | |
370 | ||
371 | /* Update current frequency */ | |
d8f7cc28 | 372 | state->current_frequency = p->frequency; |
1da177e4 LT |
373 | return 0; |
374 | } | |
375 | ||
7e3e68bc MCC |
376 | static int or51132_get_parameters(struct dvb_frontend* fe, |
377 | struct dtv_frontend_properties *p) | |
0dbbc0a7 TP |
378 | { |
379 | struct or51132_state* state = fe->demodulator_priv; | |
d9e54324 TP |
380 | int status; |
381 | int retry = 1; | |
0dbbc0a7 | 382 | |
d9e54324 | 383 | start: |
0dbbc0a7 | 384 | /* Receiver Status */ |
d9e54324 TP |
385 | if ((status = or51132_readreg(state, 0x00)) < 0) { |
386 | printk(KERN_WARNING "or51132: get_parameters: error reading receiver status\n"); | |
0dbbc0a7 TP |
387 | return -EREMOTEIO; |
388 | } | |
d9e54324 | 389 | switch(status&0xff) { |
d8f7cc28 MCC |
390 | case 0x06: |
391 | p->modulation = VSB_8; | |
392 | break; | |
393 | case 0x43: | |
394 | p->modulation = QAM_64; | |
395 | break; | |
396 | case 0x45: | |
397 | p->modulation = QAM_256; | |
398 | break; | |
399 | default: | |
400 | if (retry--) | |
401 | goto start; | |
402 | printk(KERN_WARNING "or51132: unknown status 0x%02x\n", | |
403 | status&0xff); | |
404 | return -EREMOTEIO; | |
0dbbc0a7 TP |
405 | } |
406 | ||
407 | /* FIXME: Read frequency from frontend, take AFC into account */ | |
d8f7cc28 | 408 | p->frequency = state->current_frequency; |
0dbbc0a7 TP |
409 | |
410 | /* FIXME: How to read inversion setting? Receiver 6 register? */ | |
d8f7cc28 | 411 | p->inversion = INVERSION_AUTO; |
0dbbc0a7 TP |
412 | |
413 | return 0; | |
414 | } | |
415 | ||
0df289a2 | 416 | static int or51132_read_status(struct dvb_frontend *fe, enum fe_status *status) |
1da177e4 | 417 | { |
b8742700 | 418 | struct or51132_state* state = fe->demodulator_priv; |
d9e54324 | 419 | int reg; |
1da177e4 LT |
420 | |
421 | /* Receiver Status */ | |
d9e54324 TP |
422 | if ((reg = or51132_readreg(state, 0x00)) < 0) { |
423 | printk(KERN_WARNING "or51132: read_status: error reading receiver status: %d\n", reg); | |
424 | *status = 0; | |
425 | return -EREMOTEIO; | |
1da177e4 | 426 | } |
271ddbf7 | 427 | dprintk("%s: read_status %04x\n", __func__, reg); |
d9e54324 TP |
428 | |
429 | if (reg & 0x0100) /* Receiver Lock */ | |
430 | *status = FE_HAS_SIGNAL|FE_HAS_CARRIER|FE_HAS_VITERBI| | |
431 | FE_HAS_SYNC|FE_HAS_LOCK; | |
432 | else | |
433 | *status = 0; | |
1da177e4 LT |
434 | return 0; |
435 | } | |
436 | ||
b2fb7f55 | 437 | /* Calculate SNR estimation (scaled by 2^24) |
1da177e4 | 438 | |
b2fb7f55 | 439 | 8-VSB SNR and QAM equations from Oren datasheets |
1da177e4 | 440 | |
b2fb7f55 RS |
441 | For 8-VSB: |
442 | SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K | |
443 | ||
444 | Where K = 0 if NTSC rejection filter is OFF; and | |
445 | K = 3 if NTSC rejection filter is ON | |
446 | ||
447 | For QAM64: | |
448 | SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) | |
1da177e4 | 449 | |
b2fb7f55 RS |
450 | For QAM256: |
451 | SNR[dB] = 10 * log10(907832426.314266 / MSE^2 ) | |
1da177e4 | 452 | |
b2fb7f55 RS |
453 | We re-write the snr equation as: |
454 | SNR * 2^24 = 10*(c - 2*intlog10(MSE)) | |
455 | Where for QAM256, c = log10(907832426.314266) * 2^24 | |
456 | and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */ | |
1da177e4 | 457 | |
b2fb7f55 RS |
458 | static u32 calculate_snr(u32 mse, u32 c) |
459 | { | |
460 | if (mse == 0) /* No signal */ | |
461 | return 0; | |
462 | ||
463 | mse = 2*intlog10(mse); | |
464 | if (mse > c) { | |
465 | /* Negative SNR, which is possible, but realisticly the | |
466 | demod will lose lock before the signal gets this bad. The | |
467 | API only allows for unsigned values, so just return 0 */ | |
468 | return 0; | |
469 | } | |
470 | return 10*(c - mse); | |
1da177e4 LT |
471 | } |
472 | ||
b2fb7f55 | 473 | static int or51132_read_snr(struct dvb_frontend* fe, u16* snr) |
1da177e4 | 474 | { |
b8742700 | 475 | struct or51132_state* state = fe->demodulator_priv; |
d9e54324 TP |
476 | int noise, reg; |
477 | u32 c, usK = 0; | |
478 | int retry = 1; | |
479 | ||
480 | start: | |
481 | /* SNR after Equalizer */ | |
482 | noise = or51132_readreg(state, 0x02); | |
483 | if (noise < 0) { | |
484 | printk(KERN_WARNING "or51132: read_snr: error reading equalizer\n"); | |
b2fb7f55 | 485 | return -EREMOTEIO; |
1da177e4 | 486 | } |
d9e54324 | 487 | dprintk("read_snr noise (%d)\n", noise); |
1da177e4 | 488 | |
b2fb7f55 RS |
489 | /* Read status, contains modulation type for QAM_AUTO and |
490 | NTSC filter for VSB */ | |
d9e54324 TP |
491 | reg = or51132_readreg(state, 0x00); |
492 | if (reg < 0) { | |
493 | printk(KERN_WARNING "or51132: read_snr: error reading receiver status\n"); | |
b2fb7f55 | 494 | return -EREMOTEIO; |
1da177e4 | 495 | } |
1da177e4 | 496 | |
d9e54324 | 497 | switch (reg&0xff) { |
b2fb7f55 | 498 | case 0x06: |
d9e54324 | 499 | if (reg & 0x1000) usK = 3 << 24; |
b2fb7f55 RS |
500 | /* Fall through to QAM64 case */ |
501 | case 0x43: | |
502 | c = 150204167; | |
503 | break; | |
504 | case 0x45: | |
505 | c = 150290396; | |
506 | break; | |
507 | default: | |
d9e54324 TP |
508 | printk(KERN_WARNING "or51132: unknown status 0x%02x\n", reg&0xff); |
509 | if (retry--) goto start; | |
b2fb7f55 RS |
510 | return -EREMOTEIO; |
511 | } | |
271ddbf7 | 512 | dprintk("%s: modulation %02x, NTSC rej O%s\n", __func__, |
d9e54324 | 513 | reg&0xff, reg&0x1000?"n":"ff"); |
b2fb7f55 RS |
514 | |
515 | /* Calculate SNR using noise, c, and NTSC rejection correction */ | |
516 | state->snr = calculate_snr(noise, c) - usK; | |
517 | *snr = (state->snr) >> 16; | |
518 | ||
271ddbf7 | 519 | dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __func__, noise, |
b2fb7f55 | 520 | state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16); |
1da177e4 LT |
521 | |
522 | return 0; | |
523 | } | |
524 | ||
b2fb7f55 | 525 | static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength) |
1da177e4 | 526 | { |
b2fb7f55 RS |
527 | /* Calculate Strength from SNR up to 35dB */ |
528 | /* Even though the SNR can go higher than 35dB, there is some comfort */ | |
529 | /* factor in having a range of strong signals that can show at 100% */ | |
530 | struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv; | |
531 | u16 snr; | |
532 | int ret; | |
1da177e4 | 533 | |
b2fb7f55 RS |
534 | ret = fe->ops.read_snr(fe, &snr); |
535 | if (ret != 0) | |
536 | return ret; | |
537 | /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */ | |
538 | /* scale the range 0 - 35*2^24 into 0 - 65535 */ | |
539 | if (state->snr >= 8960 * 0x10000) | |
540 | *strength = 0xffff; | |
541 | else | |
542 | *strength = state->snr / 8960; | |
1da177e4 LT |
543 | |
544 | return 0; | |
545 | } | |
546 | ||
547 | static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings) | |
548 | { | |
549 | fe_tune_settings->min_delay_ms = 500; | |
550 | fe_tune_settings->step_size = 0; | |
551 | fe_tune_settings->max_drift = 0; | |
552 | ||
553 | return 0; | |
554 | } | |
555 | ||
556 | static void or51132_release(struct dvb_frontend* fe) | |
557 | { | |
b8742700 | 558 | struct or51132_state* state = fe->demodulator_priv; |
1da177e4 LT |
559 | kfree(state); |
560 | } | |
561 | ||
bd336e63 | 562 | static const struct dvb_frontend_ops or51132_ops; |
1da177e4 LT |
563 | |
564 | struct dvb_frontend* or51132_attach(const struct or51132_config* config, | |
565 | struct i2c_adapter* i2c) | |
566 | { | |
567 | struct or51132_state* state = NULL; | |
568 | ||
569 | /* Allocate memory for the internal state */ | |
084e24ac | 570 | state = kzalloc(sizeof(struct or51132_state), GFP_KERNEL); |
1da177e4 | 571 | if (state == NULL) |
3473e342 | 572 | return NULL; |
1da177e4 LT |
573 | |
574 | /* Setup the state */ | |
575 | state->config = config; | |
576 | state->i2c = i2c; | |
1da177e4 LT |
577 | state->current_frequency = -1; |
578 | state->current_modulation = -1; | |
579 | ||
580 | /* Create dvb_frontend */ | |
dea74869 | 581 | memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops)); |
1da177e4 LT |
582 | state->frontend.demodulator_priv = state; |
583 | return &state->frontend; | |
1da177e4 LT |
584 | } |
585 | ||
bd336e63 | 586 | static const struct dvb_frontend_ops or51132_ops = { |
d8f7cc28 | 587 | .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B }, |
1da177e4 LT |
588 | .info = { |
589 | .name = "Oren OR51132 VSB/QAM Frontend", | |
1da177e4 LT |
590 | .frequency_min = 44000000, |
591 | .frequency_max = 958000000, | |
592 | .frequency_stepsize = 166666, | |
593 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
594 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
595 | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO | | |
596 | FE_CAN_8VSB | |
597 | }, | |
598 | ||
599 | .release = or51132_release, | |
600 | ||
601 | .init = or51132_init, | |
602 | .sleep = or51132_sleep, | |
603 | ||
d8f7cc28 MCC |
604 | .set_frontend = or51132_set_parameters, |
605 | .get_frontend = or51132_get_parameters, | |
1da177e4 LT |
606 | .get_tune_settings = or51132_get_tune_settings, |
607 | ||
608 | .read_status = or51132_read_status, | |
609 | .read_ber = or51132_read_ber, | |
610 | .read_signal_strength = or51132_read_signal_strength, | |
611 | .read_snr = or51132_read_snr, | |
612 | .read_ucblocks = or51132_read_ucblocks, | |
613 | }; | |
614 | ||
615 | module_param(debug, int, 0644); | |
616 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
617 | ||
618 | MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver"); | |
619 | MODULE_AUTHOR("Kirk Lapray"); | |
d9e54324 | 620 | MODULE_AUTHOR("Trent Piepho"); |
1da177e4 LT |
621 | MODULE_LICENSE("GPL"); |
622 | ||
623 | EXPORT_SYMBOL(or51132_attach); |