Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | NxtWave Communications - NXT6000 demodulator driver | |
3 | ||
4 | Copyright (C) 2002-2003 Florian Schirmer <jolt@tuxbox.org> | |
5 | Copyright (C) 2003 Paul Andreassen <paul@andreassen.com.au> | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/slab.h> | |
27 | ||
28 | #include "dvb_frontend.h" | |
29 | #include "nxt6000_priv.h" | |
30 | #include "nxt6000.h" | |
31 | ||
32 | ||
33 | ||
34 | struct nxt6000_state { | |
35 | struct i2c_adapter* i2c; | |
1da177e4 LT |
36 | /* configuration settings */ |
37 | const struct nxt6000_config* config; | |
38 | struct dvb_frontend frontend; | |
39 | }; | |
40 | ||
ff699e6b | 41 | static int debug; |
1da177e4 LT |
42 | #define dprintk if (debug) printk |
43 | ||
44 | static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data) | |
45 | { | |
46 | u8 buf[] = { reg, data }; | |
47 | struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 2 }; | |
48 | int ret; | |
49 | ||
50 | if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) | |
51 | dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret); | |
52 | ||
7464aa50 | 53 | return (ret != 1) ? -EIO : 0; |
1da177e4 LT |
54 | } |
55 | ||
56 | static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg) | |
57 | { | |
58 | int ret; | |
59 | u8 b0[] = { reg }; | |
60 | u8 b1[] = { 0 }; | |
61 | struct i2c_msg msgs[] = { | |
62 | {.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 1}, | |
63 | {.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1} | |
64 | }; | |
65 | ||
66 | ret = i2c_transfer(state->i2c, msgs, 2); | |
67 | ||
68 | if (ret != 2) | |
69 | dprintk("nxt6000: nxt6000_read error (reg: 0x%02X, ret: %d)\n", reg, ret); | |
70 | ||
71 | return b1[0]; | |
72 | } | |
73 | ||
74 | static void nxt6000_reset(struct nxt6000_state* state) | |
75 | { | |
76 | u8 val; | |
77 | ||
78 | val = nxt6000_readreg(state, OFDM_COR_CTL); | |
79 | ||
80 | nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT); | |
81 | nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT); | |
82 | } | |
83 | ||
80b5b745 | 84 | static int nxt6000_set_bandwidth(struct nxt6000_state *state, u32 bandwidth) |
1da177e4 LT |
85 | { |
86 | u16 nominal_rate; | |
87 | int result; | |
88 | ||
89 | switch (bandwidth) { | |
80b5b745 | 90 | case 6000000: |
1da177e4 LT |
91 | nominal_rate = 0x55B7; |
92 | break; | |
93 | ||
80b5b745 | 94 | case 7000000: |
1da177e4 LT |
95 | nominal_rate = 0x6400; |
96 | break; | |
97 | ||
80b5b745 | 98 | case 8000000: |
1da177e4 LT |
99 | nominal_rate = 0x7249; |
100 | break; | |
101 | ||
102 | default: | |
103 | return -EINVAL; | |
104 | } | |
105 | ||
106 | if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0) | |
107 | return result; | |
108 | ||
109 | return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF); | |
110 | } | |
111 | ||
0df289a2 MCC |
112 | static int nxt6000_set_guard_interval(struct nxt6000_state *state, |
113 | enum fe_guard_interval guard_interval) | |
1da177e4 LT |
114 | { |
115 | switch (guard_interval) { | |
116 | ||
117 | case GUARD_INTERVAL_1_32: | |
118 | return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); | |
119 | ||
120 | case GUARD_INTERVAL_1_16: | |
121 | return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); | |
122 | ||
123 | case GUARD_INTERVAL_AUTO: | |
124 | case GUARD_INTERVAL_1_8: | |
125 | return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); | |
126 | ||
127 | case GUARD_INTERVAL_1_4: | |
128 | return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03)); | |
129 | ||
130 | default: | |
131 | return -EINVAL; | |
132 | } | |
133 | } | |
134 | ||
0df289a2 MCC |
135 | static int nxt6000_set_inversion(struct nxt6000_state *state, |
136 | enum fe_spectral_inversion inversion) | |
1da177e4 LT |
137 | { |
138 | switch (inversion) { | |
139 | ||
140 | case INVERSION_OFF: | |
141 | return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00); | |
142 | ||
143 | case INVERSION_ON: | |
144 | return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV); | |
145 | ||
146 | default: | |
147 | return -EINVAL; | |
148 | ||
149 | } | |
150 | } | |
151 | ||
0df289a2 MCC |
152 | static int |
153 | nxt6000_set_transmission_mode(struct nxt6000_state *state, | |
154 | enum fe_transmit_mode transmission_mode) | |
1da177e4 LT |
155 | { |
156 | int result; | |
157 | ||
158 | switch (transmission_mode) { | |
159 | ||
160 | case TRANSMISSION_MODE_2K: | |
161 | if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0) | |
162 | return result; | |
163 | ||
164 | return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04)); | |
165 | ||
166 | case TRANSMISSION_MODE_8K: | |
167 | case TRANSMISSION_MODE_AUTO: | |
168 | if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0) | |
169 | return result; | |
170 | ||
171 | return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04)); | |
172 | ||
173 | default: | |
174 | return -EINVAL; | |
175 | ||
176 | } | |
177 | } | |
178 | ||
179 | static void nxt6000_setup(struct dvb_frontend* fe) | |
180 | { | |
b8742700 | 181 | struct nxt6000_state* state = fe->demodulator_priv; |
1da177e4 LT |
182 | |
183 | nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM); | |
184 | nxt6000_writereg(state, BER_CTRL, /*(1 << 2) | */ (0x01 << 1) | 0x01); | |
3a4a5711 JS |
185 | nxt6000_writereg(state, VIT_BERTIME_2, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits |
186 | nxt6000_writereg(state, VIT_BERTIME_1, 0x02); // | |
187 | nxt6000_writereg(state, VIT_BERTIME_0, 0x00); // | |
188 | nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts | |
189 | nxt6000_writereg(state, VIT_COR_CTL, 0x82); // Enable BER measurement | |
190 | nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC | 0x02 ); | |
1da177e4 LT |
191 | nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) | (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F)); |
192 | nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K | 0x02); | |
193 | nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST | INITIAL_AGC_BW); | |
194 | nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06); | |
195 | nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31); | |
196 | nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) | (0x02 << 3) | 0x04); | |
197 | nxt6000_writereg(state, CAS_FREQ, 0xBB); /* CHECKME */ | |
198 | nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2); | |
199 | nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256); | |
200 | nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49); | |
201 | nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72); | |
202 | nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5); | |
203 | nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) | (3 << 4) | 2); | |
204 | nxt6000_writereg(state, DIAG_CONFIG, TB_SET); | |
205 | ||
206 | if (state->config->clock_inversion) | |
207 | nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION); | |
208 | else | |
209 | nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0); | |
210 | ||
211 | nxt6000_writereg(state, TS_FORMAT, 0); | |
1da177e4 LT |
212 | } |
213 | ||
214 | static void nxt6000_dump_status(struct nxt6000_state *state) | |
215 | { | |
216 | u8 val; | |
217 | ||
218 | /* | |
219 | printk("RS_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, RS_COR_STAT)); | |
220 | printk("VIT_SYNC_STATUS: 0x%02X\n", nxt6000_readreg(fe, VIT_SYNC_STATUS)); | |
221 | printk("OFDM_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_COR_STAT)); | |
222 | printk("OFDM_SYR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_SYR_STAT)); | |
223 | printk("OFDM_TPS_RCVD_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_1)); | |
224 | printk("OFDM_TPS_RCVD_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_2)); | |
225 | printk("OFDM_TPS_RCVD_3: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_3)); | |
226 | printk("OFDM_TPS_RCVD_4: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_4)); | |
227 | printk("OFDM_TPS_RESERVED_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_1)); | |
228 | printk("OFDM_TPS_RESERVED_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_2)); | |
229 | */ | |
230 | printk("NXT6000 status:"); | |
231 | ||
232 | val = nxt6000_readreg(state, RS_COR_STAT); | |
233 | ||
234 | printk(" DATA DESCR LOCK: %d,", val & 0x01); | |
235 | printk(" DATA SYNC LOCK: %d,", (val >> 1) & 0x01); | |
236 | ||
237 | val = nxt6000_readreg(state, VIT_SYNC_STATUS); | |
238 | ||
239 | printk(" VITERBI LOCK: %d,", (val >> 7) & 0x01); | |
240 | ||
241 | switch ((val >> 4) & 0x07) { | |
242 | ||
243 | case 0x00: | |
244 | printk(" VITERBI CODERATE: 1/2,"); | |
245 | break; | |
246 | ||
247 | case 0x01: | |
248 | printk(" VITERBI CODERATE: 2/3,"); | |
249 | break; | |
250 | ||
251 | case 0x02: | |
252 | printk(" VITERBI CODERATE: 3/4,"); | |
253 | break; | |
254 | ||
255 | case 0x03: | |
256 | printk(" VITERBI CODERATE: 5/6,"); | |
257 | break; | |
258 | ||
259 | case 0x04: | |
260 | printk(" VITERBI CODERATE: 7/8,"); | |
261 | break; | |
262 | ||
263 | default: | |
264 | printk(" VITERBI CODERATE: Reserved,"); | |
265 | ||
266 | } | |
267 | ||
268 | val = nxt6000_readreg(state, OFDM_COR_STAT); | |
269 | ||
270 | printk(" CHCTrack: %d,", (val >> 7) & 0x01); | |
271 | printk(" TPSLock: %d,", (val >> 6) & 0x01); | |
272 | printk(" SYRLock: %d,", (val >> 5) & 0x01); | |
273 | printk(" AGCLock: %d,", (val >> 4) & 0x01); | |
274 | ||
275 | switch (val & 0x0F) { | |
276 | ||
277 | case 0x00: | |
278 | printk(" CoreState: IDLE,"); | |
279 | break; | |
280 | ||
281 | case 0x02: | |
282 | printk(" CoreState: WAIT_AGC,"); | |
283 | break; | |
284 | ||
285 | case 0x03: | |
286 | printk(" CoreState: WAIT_SYR,"); | |
287 | break; | |
288 | ||
289 | case 0x04: | |
290 | printk(" CoreState: WAIT_PPM,"); | |
291 | break; | |
292 | ||
293 | case 0x01: | |
294 | printk(" CoreState: WAIT_TRL,"); | |
295 | break; | |
296 | ||
297 | case 0x05: | |
298 | printk(" CoreState: WAIT_TPS,"); | |
299 | break; | |
300 | ||
301 | case 0x06: | |
302 | printk(" CoreState: MONITOR_TPS,"); | |
303 | break; | |
304 | ||
305 | default: | |
306 | printk(" CoreState: Reserved,"); | |
307 | ||
308 | } | |
309 | ||
310 | val = nxt6000_readreg(state, OFDM_SYR_STAT); | |
311 | ||
312 | printk(" SYRLock: %d,", (val >> 4) & 0x01); | |
313 | printk(" SYRMode: %s,", (val >> 2) & 0x01 ? "8K" : "2K"); | |
314 | ||
315 | switch ((val >> 4) & 0x03) { | |
316 | ||
317 | case 0x00: | |
318 | printk(" SYRGuard: 1/32,"); | |
319 | break; | |
320 | ||
321 | case 0x01: | |
322 | printk(" SYRGuard: 1/16,"); | |
323 | break; | |
324 | ||
325 | case 0x02: | |
326 | printk(" SYRGuard: 1/8,"); | |
327 | break; | |
328 | ||
329 | case 0x03: | |
330 | printk(" SYRGuard: 1/4,"); | |
331 | break; | |
332 | } | |
333 | ||
334 | val = nxt6000_readreg(state, OFDM_TPS_RCVD_3); | |
335 | ||
336 | switch ((val >> 4) & 0x07) { | |
337 | ||
338 | case 0x00: | |
339 | printk(" TPSLP: 1/2,"); | |
340 | break; | |
341 | ||
342 | case 0x01: | |
343 | printk(" TPSLP: 2/3,"); | |
344 | break; | |
345 | ||
346 | case 0x02: | |
347 | printk(" TPSLP: 3/4,"); | |
348 | break; | |
349 | ||
350 | case 0x03: | |
351 | printk(" TPSLP: 5/6,"); | |
352 | break; | |
353 | ||
354 | case 0x04: | |
355 | printk(" TPSLP: 7/8,"); | |
356 | break; | |
357 | ||
358 | default: | |
359 | printk(" TPSLP: Reserved,"); | |
360 | ||
361 | } | |
362 | ||
363 | switch (val & 0x07) { | |
364 | ||
365 | case 0x00: | |
366 | printk(" TPSHP: 1/2,"); | |
367 | break; | |
368 | ||
369 | case 0x01: | |
370 | printk(" TPSHP: 2/3,"); | |
371 | break; | |
372 | ||
373 | case 0x02: | |
374 | printk(" TPSHP: 3/4,"); | |
375 | break; | |
376 | ||
377 | case 0x03: | |
378 | printk(" TPSHP: 5/6,"); | |
379 | break; | |
380 | ||
381 | case 0x04: | |
382 | printk(" TPSHP: 7/8,"); | |
383 | break; | |
384 | ||
385 | default: | |
386 | printk(" TPSHP: Reserved,"); | |
387 | ||
388 | } | |
389 | ||
390 | val = nxt6000_readreg(state, OFDM_TPS_RCVD_4); | |
391 | ||
392 | printk(" TPSMode: %s,", val & 0x01 ? "8K" : "2K"); | |
393 | ||
394 | switch ((val >> 4) & 0x03) { | |
395 | ||
396 | case 0x00: | |
397 | printk(" TPSGuard: 1/32,"); | |
398 | break; | |
399 | ||
400 | case 0x01: | |
401 | printk(" TPSGuard: 1/16,"); | |
402 | break; | |
403 | ||
404 | case 0x02: | |
405 | printk(" TPSGuard: 1/8,"); | |
406 | break; | |
407 | ||
408 | case 0x03: | |
409 | printk(" TPSGuard: 1/4,"); | |
410 | break; | |
411 | ||
412 | } | |
413 | ||
414 | /* Strange magic required to gain access to RF_AGC_STATUS */ | |
415 | nxt6000_readreg(state, RF_AGC_VAL_1); | |
416 | val = nxt6000_readreg(state, RF_AGC_STATUS); | |
417 | val = nxt6000_readreg(state, RF_AGC_STATUS); | |
418 | ||
419 | printk(" RF AGC LOCK: %d,", (val >> 4) & 0x01); | |
420 | printk("\n"); | |
421 | } | |
422 | ||
0df289a2 | 423 | static int nxt6000_read_status(struct dvb_frontend *fe, enum fe_status *status) |
1da177e4 LT |
424 | { |
425 | u8 core_status; | |
b8742700 | 426 | struct nxt6000_state* state = fe->demodulator_priv; |
1da177e4 LT |
427 | |
428 | *status = 0; | |
429 | ||
430 | core_status = nxt6000_readreg(state, OFDM_COR_STAT); | |
431 | ||
432 | if (core_status & AGCLOCKED) | |
433 | *status |= FE_HAS_SIGNAL; | |
434 | ||
435 | if (nxt6000_readreg(state, OFDM_SYR_STAT) & GI14_SYR_LOCK) | |
436 | *status |= FE_HAS_CARRIER; | |
437 | ||
438 | if (nxt6000_readreg(state, VIT_SYNC_STATUS) & VITINSYNC) | |
439 | *status |= FE_HAS_VITERBI; | |
440 | ||
441 | if (nxt6000_readreg(state, RS_COR_STAT) & RSCORESTATUS) | |
442 | *status |= FE_HAS_SYNC; | |
443 | ||
444 | if ((core_status & TPSLOCKED) && (*status == (FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))) | |
445 | *status |= FE_HAS_LOCK; | |
446 | ||
447 | if (debug) | |
448 | nxt6000_dump_status(state); | |
449 | ||
450 | return 0; | |
451 | } | |
452 | ||
453 | static int nxt6000_init(struct dvb_frontend* fe) | |
454 | { | |
b8742700 | 455 | struct nxt6000_state* state = fe->demodulator_priv; |
1da177e4 LT |
456 | |
457 | nxt6000_reset(state); | |
458 | nxt6000_setup(fe); | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
80b5b745 | 463 | static int nxt6000_set_frontend(struct dvb_frontend *fe) |
1da177e4 | 464 | { |
80b5b745 | 465 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
b8742700 | 466 | struct nxt6000_state* state = fe->demodulator_priv; |
1da177e4 LT |
467 | int result; |
468 | ||
dea74869 | 469 | if (fe->ops.tuner_ops.set_params) { |
14d24d14 | 470 | fe->ops.tuner_ops.set_params(fe); |
dea74869 | 471 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); |
605ee41c | 472 | } |
1da177e4 | 473 | |
80b5b745 MCC |
474 | result = nxt6000_set_bandwidth(state, p->bandwidth_hz); |
475 | if (result < 0) | |
1da177e4 | 476 | return result; |
80b5b745 MCC |
477 | |
478 | result = nxt6000_set_guard_interval(state, p->guard_interval); | |
479 | if (result < 0) | |
1da177e4 | 480 | return result; |
80b5b745 MCC |
481 | |
482 | result = nxt6000_set_transmission_mode(state, p->transmission_mode); | |
483 | if (result < 0) | |
1da177e4 | 484 | return result; |
80b5b745 MCC |
485 | |
486 | result = nxt6000_set_inversion(state, p->inversion); | |
487 | if (result < 0) | |
1da177e4 LT |
488 | return result; |
489 | ||
115eea4e | 490 | msleep(500); |
1da177e4 LT |
491 | return 0; |
492 | } | |
493 | ||
494 | static void nxt6000_release(struct dvb_frontend* fe) | |
495 | { | |
b8742700 | 496 | struct nxt6000_state* state = fe->demodulator_priv; |
1da177e4 LT |
497 | kfree(state); |
498 | } | |
499 | ||
3a4a5711 JS |
500 | static int nxt6000_read_snr(struct dvb_frontend* fe, u16* snr) |
501 | { | |
b8742700 | 502 | struct nxt6000_state* state = fe->demodulator_priv; |
3a4a5711 JS |
503 | |
504 | *snr = nxt6000_readreg( state, OFDM_CHC_SNR) / 8; | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
509 | static int nxt6000_read_ber(struct dvb_frontend* fe, u32* ber) | |
510 | { | |
b8742700 | 511 | struct nxt6000_state* state = fe->demodulator_priv; |
3a4a5711 JS |
512 | |
513 | nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 ); | |
514 | ||
515 | *ber = (nxt6000_readreg( state, VIT_BER_1 ) << 8 ) | | |
516 | nxt6000_readreg( state, VIT_BER_0 ); | |
517 | ||
518 | nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts | |
519 | ||
520 | return 0; | |
521 | } | |
522 | ||
523 | static int nxt6000_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength) | |
524 | { | |
b8742700 | 525 | struct nxt6000_state* state = fe->demodulator_priv; |
3a4a5711 JS |
526 | |
527 | *signal_strength = (short) (511 - | |
528 | (nxt6000_readreg(state, AGC_GAIN_1) + | |
529 | ((nxt6000_readreg(state, AGC_GAIN_2) & 0x03) << 8))); | |
530 | ||
531 | return 0; | |
532 | } | |
533 | ||
115eea4e SO |
534 | static int nxt6000_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune) |
535 | { | |
536 | tune->min_delay_ms = 500; | |
537 | return 0; | |
538 | } | |
539 | ||
605ee41c AQ |
540 | static int nxt6000_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) |
541 | { | |
542 | struct nxt6000_state* state = fe->demodulator_priv; | |
543 | ||
544 | if (enable) { | |
545 | return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01); | |
546 | } else { | |
547 | return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00); | |
548 | } | |
549 | } | |
550 | ||
1da177e4 LT |
551 | static struct dvb_frontend_ops nxt6000_ops; |
552 | ||
553 | struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config, | |
554 | struct i2c_adapter* i2c) | |
555 | { | |
556 | struct nxt6000_state* state = NULL; | |
557 | ||
558 | /* allocate memory for the internal state */ | |
084e24ac | 559 | state = kzalloc(sizeof(struct nxt6000_state), GFP_KERNEL); |
1da177e4 LT |
560 | if (state == NULL) goto error; |
561 | ||
562 | /* setup the state */ | |
563 | state->config = config; | |
564 | state->i2c = i2c; | |
1da177e4 LT |
565 | |
566 | /* check if the demod is there */ | |
567 | if (nxt6000_readreg(state, OFDM_MSC_REV) != NXT6000ASICDEVICE) goto error; | |
568 | ||
569 | /* create dvb_frontend */ | |
dea74869 | 570 | memcpy(&state->frontend.ops, &nxt6000_ops, sizeof(struct dvb_frontend_ops)); |
1da177e4 LT |
571 | state->frontend.demodulator_priv = state; |
572 | return &state->frontend; | |
573 | ||
574 | error: | |
575 | kfree(state); | |
576 | return NULL; | |
577 | } | |
578 | ||
579 | static struct dvb_frontend_ops nxt6000_ops = { | |
80b5b745 | 580 | .delsys = { SYS_DVBT }, |
1da177e4 LT |
581 | .info = { |
582 | .name = "NxtWave NXT6000 DVB-T", | |
1da177e4 LT |
583 | .frequency_min = 0, |
584 | .frequency_max = 863250000, | |
585 | .frequency_stepsize = 62500, | |
586 | /*.frequency_tolerance = *//* FIXME: 12% of SR */ | |
587 | .symbol_rate_min = 0, /* FIXME */ | |
588 | .symbol_rate_max = 9360000, /* FIXME */ | |
589 | .symbol_rate_tolerance = 4000, | |
590 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
50c25fff MK |
591 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | |
592 | FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | | |
593 | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | | |
594 | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO | | |
595 | FE_CAN_HIERARCHY_AUTO, | |
1da177e4 LT |
596 | }, |
597 | ||
598 | .release = nxt6000_release, | |
599 | ||
600 | .init = nxt6000_init, | |
605ee41c | 601 | .i2c_gate_ctrl = nxt6000_i2c_gate_ctrl, |
1da177e4 | 602 | |
115eea4e SO |
603 | .get_tune_settings = nxt6000_fe_get_tune_settings, |
604 | ||
80b5b745 | 605 | .set_frontend = nxt6000_set_frontend, |
1da177e4 LT |
606 | |
607 | .read_status = nxt6000_read_status, | |
3a4a5711 JS |
608 | .read_ber = nxt6000_read_ber, |
609 | .read_signal_strength = nxt6000_read_signal_strength, | |
610 | .read_snr = nxt6000_read_snr, | |
1da177e4 LT |
611 | }; |
612 | ||
613 | module_param(debug, int, 0644); | |
614 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
615 | ||
616 | MODULE_DESCRIPTION("NxtWave NXT6000 DVB-T demodulator driver"); | |
617 | MODULE_AUTHOR("Florian Schirmer"); | |
618 | MODULE_LICENSE("GPL"); | |
619 | ||
620 | EXPORT_SYMBOL(nxt6000_attach); |