[linux-block.git] / drivers / media / dvb-frontends / nxt6000.c

/*
	NxtWave Communications - NXT6000 demodulator driver

    Copyright (C) 2002-2003 Florian Schirmer <jolt@tuxbox.org>
    Copyright (C) 2003 Paul Andreassen <paul@andreassen.com.au>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>

#include <media/dvb_frontend.h>
#include "nxt6000_priv.h"
#include "nxt6000.h"


struct nxt6000_state {
	struct i2c_adapter* i2c;
	/* configuration settings */
	const struct nxt6000_config* config;
	struct dvb_frontend frontend;
};

static int debug;
#define dprintk(fmt, arg...) do {					\
	if (debug)							\
		printk(KERN_DEBUG pr_fmt("%s: " fmt),			\
		       __func__, ##arg);				\
} while (0)

static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 2 };
	int ret;

	if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1)
		dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret);

	return (ret != 1) ? -EIO : 0;
}

static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg)
{
	int ret;
	u8 b0[] = { reg };
	u8 b1[] = { 0 };
	struct i2c_msg msgs[] = {
		{.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 1},
		{.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1}
	};

	ret = i2c_transfer(state->i2c, msgs, 2);

	if (ret != 2)
		dprintk("nxt6000: nxt6000_read error (reg: 0x%02X, ret: %d)\n", reg, ret);

	return b1[0];
}

static void nxt6000_reset(struct nxt6000_state* state)
{
	u8 val;

	val = nxt6000_readreg(state, OFDM_COR_CTL);

	nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT);
	nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT);
}

static int nxt6000_set_bandwidth(struct nxt6000_state *state, u32 bandwidth)
{
	u16 nominal_rate;
	int result;

	switch (bandwidth) {
	case 6000000:
		nominal_rate = 0x55B7;
		break;

	case 7000000:
		nominal_rate = 0x6400;
		break;

	case 8000000:
		nominal_rate = 0x7249;
		break;

	default:
		return -EINVAL;
	}

	if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0)
		return result;

	return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF);
}

static int nxt6000_set_guard_interval(struct nxt6000_state *state,
				      enum fe_guard_interval guard_interval)
{
	switch (guard_interval) {

	case GUARD_INTERVAL_1_32:
		return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));

	case GUARD_INTERVAL_1_16:
		return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));

	case GUARD_INTERVAL_AUTO:
	case GUARD_INTERVAL_1_8:
		return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));

	case GUARD_INTERVAL_1_4:
		return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));

	default:
		return -EINVAL;
	}
}

static int nxt6000_set_inversion(struct nxt6000_state *state,
				 enum fe_spectral_inversion inversion)
{
	switch (inversion) {

	case INVERSION_OFF:
		return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00);

	case INVERSION_ON:
		return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV);

	default:
		return -EINVAL;

	}
}

static int
nxt6000_set_transmission_mode(struct nxt6000_state *state,
			      enum fe_transmit_mode transmission_mode)
{
	int result;

	switch (transmission_mode) {

	case TRANSMISSION_MODE_2K:
		if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
			return result;

		return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));

	case TRANSMISSION_MODE_8K:
	case TRANSMISSION_MODE_AUTO:
		if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
			return result;

		return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));

	default:
		return -EINVAL;

	}
}

static void nxt6000_setup(struct dvb_frontend* fe)
{
	struct nxt6000_state* state = fe->demodulator_priv;

	nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM);
	nxt6000_writereg(state, BER_CTRL, /*(1 << 2) | */ (0x01 << 1) | 0x01);
	nxt6000_writereg(state, VIT_BERTIME_2, 0x00);  // BER Timer = 0x000200 * 256 = 131072 bits
	nxt6000_writereg(state, VIT_BERTIME_1, 0x02);  //
	nxt6000_writereg(state, VIT_BERTIME_0, 0x00);  //
	nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts
	nxt6000_writereg(state, VIT_COR_CTL, 0x82);   // Enable BER measurement
	nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC | 0x02 );
	nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) | (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F));
	nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K | 0x02);
	nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST | INITIAL_AGC_BW);
	nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06);
	nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31);
	nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) | (0x02 << 3) | 0x04);
	nxt6000_writereg(state, CAS_FREQ, 0xBB);	/* CHECKME */
	nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2);
	nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256);
	nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49);
	nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72);
	nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5);
	nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) | (3 << 4) | 2);
	nxt6000_writereg(state, DIAG_CONFIG, TB_SET);

	if (state->config->clock_inversion)
		nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION);
	else
		nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0);

	nxt6000_writereg(state, TS_FORMAT, 0);
}

static void nxt6000_dump_status(struct nxt6000_state *state)
{
	u8 val;

#if 0
	pr_info("RS_COR_STAT: 0x%02X\n",
		nxt6000_readreg(fe, RS_COR_STAT));
	pr_info("VIT_SYNC_STATUS: 0x%02X\n",
		nxt6000_readreg(fe, VIT_SYNC_STATUS));
	pr_info("OFDM_COR_STAT: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_COR_STAT));
	pr_info("OFDM_SYR_STAT: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_SYR_STAT));
	pr_info("OFDM_TPS_RCVD_1: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_TPS_RCVD_1));
	pr_info("OFDM_TPS_RCVD_2: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_TPS_RCVD_2));
	pr_info("OFDM_TPS_RCVD_3: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_TPS_RCVD_3));
	pr_info("OFDM_TPS_RCVD_4: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_TPS_RCVD_4));
	pr_info("OFDM_TPS_RESERVED_1: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_TPS_RESERVED_1));
	pr_info("OFDM_TPS_RESERVED_2: 0x%02X\n",
		nxt6000_readreg(fe, OFDM_TPS_RESERVED_2));
#endif
	pr_info("NXT6000 status:");

	val = nxt6000_readreg(state, RS_COR_STAT);

	pr_cont(" DATA DESCR LOCK: %d,", val & 0x01);
	pr_cont(" DATA SYNC LOCK: %d,", (val >> 1) & 0x01);

	val = nxt6000_readreg(state, VIT_SYNC_STATUS);

	pr_cont(" VITERBI LOCK: %d,", (val >> 7) & 0x01);

	switch ((val >> 4) & 0x07) {

	case 0x00:
		pr_cont(" VITERBI CODERATE: 1/2,");
		break;

	case 0x01:
		pr_cont(" VITERBI CODERATE: 2/3,");
		break;

	case 0x02:
		pr_cont(" VITERBI CODERATE: 3/4,");
		break;

	case 0x03:
		pr_cont(" VITERBI CODERATE: 5/6,");
		break;

	case 0x04:
		pr_cont(" VITERBI CODERATE: 7/8,");
		break;

	default:
		pr_cont(" VITERBI CODERATE: Reserved,");

	}

	val = nxt6000_readreg(state, OFDM_COR_STAT);

	pr_cont(" CHCTrack: %d,", (val >> 7) & 0x01);
	pr_cont(" TPSLock: %d,", (val >> 6) & 0x01);
	pr_cont(" SYRLock: %d,", (val >> 5) & 0x01);
	pr_cont(" AGCLock: %d,", (val >> 4) & 0x01);

	switch (val & 0x0F) {

	case 0x00:
		pr_cont(" CoreState: IDLE,");
		break;

	case 0x02:
		pr_cont(" CoreState: WAIT_AGC,");
		break;

	case 0x03:
		pr_cont(" CoreState: WAIT_SYR,");
		break;

	case 0x04:
		pr_cont(" CoreState: WAIT_PPM,");
		break;

	case 0x01:
		pr_cont(" CoreState: WAIT_TRL,");
		break;

	case 0x05:
		pr_cont(" CoreState: WAIT_TPS,");
		break;

	case 0x06:
		pr_cont(" CoreState: MONITOR_TPS,");
		break;

	default:
		pr_cont(" CoreState: Reserved,");

	}

	val = nxt6000_readreg(state, OFDM_SYR_STAT);

	pr_cont(" SYRLock: %d,", (val >> 4) & 0x01);
	pr_cont(" SYRMode: %s,", (val >> 2) & 0x01 ? "8K" : "2K");

	switch ((val >> 4) & 0x03) {

	case 0x00:
		pr_cont(" SYRGuard: 1/32,");
		break;

	case 0x01:
		pr_cont(" SYRGuard: 1/16,");
		break;

	case 0x02:
		pr_cont(" SYRGuard: 1/8,");
		break;

	case 0x03:
		pr_cont(" SYRGuard: 1/4,");
		break;
	}

	val = nxt6000_readreg(state, OFDM_TPS_RCVD_3);

	switch ((val >> 4) & 0x07) {

	case 0x00:
		pr_cont(" TPSLP: 1/2,");
		break;

	case 0x01:
		pr_cont(" TPSLP: 2/3,");
		break;

	case 0x02:
		pr_cont(" TPSLP: 3/4,");
		break;

	case 0x03:
		pr_cont(" TPSLP: 5/6,");
		break;

	case 0x04:
		pr_cont(" TPSLP: 7/8,");
		break;

	default:
		pr_cont(" TPSLP: Reserved,");

	}

	switch (val & 0x07) {

	case 0x00:
		pr_cont(" TPSHP: 1/2,");
		break;

	case 0x01:
		pr_cont(" TPSHP: 2/3,");
		break;

	case 0x02:
		pr_cont(" TPSHP: 3/4,");
		break;

	case 0x03:
		pr_cont(" TPSHP: 5/6,");
		break;

	case 0x04:
		pr_cont(" TPSHP: 7/8,");
		break;

	default:
		pr_cont(" TPSHP: Reserved,");

	}

	val = nxt6000_readreg(state, OFDM_TPS_RCVD_4);

	pr_cont(" TPSMode: %s,", val & 0x01 ? "8K" : "2K");

	switch ((val >> 4) & 0x03) {

	case 0x00:
		pr_cont(" TPSGuard: 1/32,");
		break;

	case 0x01:
		pr_cont(" TPSGuard: 1/16,");
		break;

	case 0x02:
		pr_cont(" TPSGuard: 1/8,");
		break;

	case 0x03:
		pr_cont(" TPSGuard: 1/4,");
		break;

	}

	/* Strange magic required to gain access to RF_AGC_STATUS */
	nxt6000_readreg(state, RF_AGC_VAL_1);
	val = nxt6000_readreg(state, RF_AGC_STATUS);
	val = nxt6000_readreg(state, RF_AGC_STATUS);

	pr_cont(" RF AGC LOCK: %d,", (val >> 4) & 0x01);
	pr_cont("\n");
}

static int nxt6000_read_status(struct dvb_frontend *fe, enum fe_status *status)
{
	u8 core_status;
	struct nxt6000_state* state = fe->demodulator_priv;

	*status = 0;

	core_status = nxt6000_readreg(state, OFDM_COR_STAT);

	if (core_status & AGCLOCKED)
		*status |= FE_HAS_SIGNAL;

	if (nxt6000_readreg(state, OFDM_SYR_STAT) & GI14_SYR_LOCK)
		*status |= FE_HAS_CARRIER;

	if (nxt6000_readreg(state, VIT_SYNC_STATUS) & VITINSYNC)
		*status |= FE_HAS_VITERBI;

	if (nxt6000_readreg(state, RS_COR_STAT) & RSCORESTATUS)
		*status |= FE_HAS_SYNC;

	if ((core_status & TPSLOCKED) && (*status == (FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)))
		*status |= FE_HAS_LOCK;

	if (debug)
		nxt6000_dump_status(state);

	return 0;
}

static int nxt6000_init(struct dvb_frontend* fe)
{
	struct nxt6000_state* state = fe->demodulator_priv;

	nxt6000_reset(state);
	nxt6000_setup(fe);

	return 0;
}

static int nxt6000_set_frontend(struct dvb_frontend *fe)
{
	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
	struct nxt6000_state* state = fe->demodulator_priv;
	int result;

	if (fe->ops.tuner_ops.set_params) {
		fe->ops.tuner_ops.set_params(fe);
		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	}

	result = nxt6000_set_bandwidth(state, p->bandwidth_hz);
	if (result < 0)
		return result;

	result = nxt6000_set_guard_interval(state, p->guard_interval);
	if (result < 0)
		return result;

	result = nxt6000_set_transmission_mode(state, p->transmission_mode);
	if (result < 0)
		return result;

	result = nxt6000_set_inversion(state, p->inversion);
	if (result < 0)
		return result;

	msleep(500);
	return 0;
}

static void nxt6000_release(struct dvb_frontend* fe)
{
	struct nxt6000_state* state = fe->demodulator_priv;
	kfree(state);
}

static int nxt6000_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct nxt6000_state* state = fe->demodulator_priv;

	*snr = nxt6000_readreg( state, OFDM_CHC_SNR) / 8;

	return 0;
}

static int nxt6000_read_ber(struct dvb_frontend* fe, u32* ber)
{
	struct nxt6000_state* state = fe->demodulator_priv;

	nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 );

	*ber = (nxt6000_readreg( state, VIT_BER_1 ) << 8 ) |
		nxt6000_readreg( state, VIT_BER_0 );

	nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts

	return 0;
}

static int nxt6000_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
{
	struct nxt6000_state* state = fe->demodulator_priv;

	*signal_strength = (short) (511 -
		(nxt6000_readreg(state, AGC_GAIN_1) +
		((nxt6000_readreg(state, AGC_GAIN_2) & 0x03) << 8)));

	return 0;
}

static int nxt6000_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
{
	tune->min_delay_ms = 500;
	return 0;
}

static int nxt6000_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
{
	struct nxt6000_state* state = fe->demodulator_priv;

	if (enable) {
		return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01);
	} else {
		return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00);
	}
}

static const struct dvb_frontend_ops nxt6000_ops;

struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
				    struct i2c_adapter* i2c)
{
	struct nxt6000_state* state = NULL;

	/* allocate memory for the internal state */
	state = kzalloc(sizeof(struct nxt6000_state), GFP_KERNEL);
	if (state == NULL) goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;

	/* check if the demod is there */
	if (nxt6000_readreg(state, OFDM_MSC_REV) != NXT6000ASICDEVICE) goto error;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &nxt6000_ops, sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}

static const struct dvb_frontend_ops nxt6000_ops = {
	.delsys = { SYS_DVBT },
	.info = {
		.name = "NxtWave NXT6000 DVB-T",
		.frequency_min_hz = 0,
		.frequency_max_hz = 863250 * kHz,
		.frequency_stepsize_hz = 62500,
		/*.frequency_tolerance = *//* FIXME: 12% of SR */
		.symbol_rate_min = 0,	/* FIXME */
		.symbol_rate_max = 9360000,	/* FIXME */
		.symbol_rate_tolerance = 4000,
		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
			FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
			FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
			FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
			FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
			FE_CAN_HIERARCHY_AUTO,
	},

	.release = nxt6000_release,

	.init = nxt6000_init,
	.i2c_gate_ctrl = nxt6000_i2c_gate_ctrl,

	.get_tune_settings = nxt6000_fe_get_tune_settings,

	.set_frontend = nxt6000_set_frontend,

	.read_status = nxt6000_read_status,
	.read_ber = nxt6000_read_ber,
	.read_signal_strength = nxt6000_read_signal_strength,
	.read_snr = nxt6000_read_snr,
};

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");

MODULE_DESCRIPTION("NxtWave NXT6000 DVB-T demodulator driver");
MODULE_AUTHOR("Florian Schirmer");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(nxt6000_attach);
Commit	Line	Data
1da177e4 LT	1	/*
	2	NxtWave Communications - NXT6000 demodulator driver
	3
	4	Copyright (C) 2002-2003 Florian Schirmer <jolt@tuxbox.org>
	5	Copyright (C) 2003 Paul Andreassen <paul@andreassen.com.au>
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
cc5ad2b6 MCC	22	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
cc5ad2b6 MCC	23
1da177e4 LT	24	#include <linux/init.h>
	25	#include <linux/kernel.h>
	26	#include <linux/module.h>
	27	#include <linux/string.h>
	28	#include <linux/slab.h>
	29
fada1935	30	#include <media/dvb_frontend.h>
1da177e4 LT	31	#include "nxt6000_priv.h"
	32	#include "nxt6000.h"
	33
	34
	35
	36	struct nxt6000_state {
	37	struct i2c_adapter* i2c;
1da177e4 LT	38	/* configuration settings */
	39	const struct nxt6000_config* config;
	40	struct dvb_frontend frontend;
	41	};
	42
ff699e6b	43	static int debug;
cc5ad2b6 MCC	44	#define dprintk(fmt, arg...) do { \
	45	if (debug) \
	46	printk(KERN_DEBUG pr_fmt("%s: " fmt), \
	47	__func__, ##arg); \
	48	} while (0)
1da177e4 LT	49
	50	static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data)
	51	{
	52	u8 buf[] = { reg, data };
	53	struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 2 };
	54	int ret;
	55
	56	if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1)
	57	dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret);
	58
7464aa50	59	return (ret != 1) ? -EIO : 0;
1da177e4 LT	60	}
	61
	62	static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg)
	63	{
	64	int ret;
	65	u8 b0[] = { reg };
	66	u8 b1[] = { 0 };
	67	struct i2c_msg msgs[] = {
	68	{.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 1},
	69	{.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1}
	70	};
	71
	72	ret = i2c_transfer(state->i2c, msgs, 2);
	73
	74	if (ret != 2)
	75	dprintk("nxt6000: nxt6000_read error (reg: 0x%02X, ret: %d)\n", reg, ret);
	76
	77	return b1[0];
	78	}
	79
	80	static void nxt6000_reset(struct nxt6000_state* state)
	81	{
	82	u8 val;
	83
	84	val = nxt6000_readreg(state, OFDM_COR_CTL);
	85
	86	nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT);
	87	nxt6000_writereg(state, OFDM_COR_CTL, val \| COREACT);
	88	}
	89
80b5b745	90	static int nxt6000_set_bandwidth(struct nxt6000_state *state, u32 bandwidth)
1da177e4 LT	91	{
	92	u16 nominal_rate;
	93	int result;
	94
	95	switch (bandwidth) {
80b5b745	96	case 6000000:
1da177e4 LT	97	nominal_rate = 0x55B7;
	98	break;
	99
80b5b745	100	case 7000000:
1da177e4 LT	101	nominal_rate = 0x6400;
	102	break;
	103
80b5b745	104	case 8000000:
1da177e4 LT	105	nominal_rate = 0x7249;
	106	break;
	107
	108	default:
	109	return -EINVAL;
	110	}
	111
	112	if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0)
	113	return result;
	114
	115	return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF);
	116	}
	117
0df289a2 MCC	118	static int nxt6000_set_guard_interval(struct nxt6000_state *state,
0df289a2 MCC	119	enum fe_guard_interval guard_interval)
1da177e4 LT	120	{
	121	switch (guard_interval) {
	122
	123	case GUARD_INTERVAL_1_32:
	124	return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 \| (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
	125
	126	case GUARD_INTERVAL_1_16:
	127	return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 \| (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
	128
	129	case GUARD_INTERVAL_AUTO:
	130	case GUARD_INTERVAL_1_8:
	131	return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 \| (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
	132
	133	case GUARD_INTERVAL_1_4:
	134	return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 \| (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
	135
	136	default:
	137	return -EINVAL;
	138	}
	139	}
	140
0df289a2 MCC	141	static int nxt6000_set_inversion(struct nxt6000_state *state,
0df289a2 MCC	142	enum fe_spectral_inversion inversion)
1da177e4 LT	143	{
	144	switch (inversion) {
	145
	146	case INVERSION_OFF:
	147	return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00);
	148
	149	case INVERSION_ON:
	150	return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV);
	151
	152	default:
	153	return -EINVAL;
	154
	155	}
	156	}
	157
0df289a2 MCC	158	static int
	159	nxt6000_set_transmission_mode(struct nxt6000_state *state,
	160	enum fe_transmit_mode transmission_mode)
1da177e4 LT	161	{
	162	int result;
	163
	164	switch (transmission_mode) {
	165
	166	case TRANSMISSION_MODE_2K:
	167	if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 \| (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
	168	return result;
	169
	170	return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) \| (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
	171
	172	case TRANSMISSION_MODE_8K:
	173	case TRANSMISSION_MODE_AUTO:
	174	if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 \| (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
	175	return result;
	176
	177	return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) \| (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
	178
	179	default:
	180	return -EINVAL;
	181
	182	}
	183	}
	184
	185	static void nxt6000_setup(struct dvb_frontend* fe)
	186	{
b8742700	187	struct nxt6000_state* state = fe->demodulator_priv;
1da177e4 LT	188
	189	nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM);
	190	nxt6000_writereg(state, BER_CTRL, /(1 << 2) \| / (0x01 << 1) \| 0x01);
3a4a5711 JS	191	nxt6000_writereg(state, VIT_BERTIME_2, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits
	192	nxt6000_writereg(state, VIT_BERTIME_1, 0x02); //
	193	nxt6000_writereg(state, VIT_BERTIME_0, 0x00); //
	194	nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts
	195	nxt6000_writereg(state, VIT_COR_CTL, 0x82); // Enable BER measurement
	196	nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC \| 0x02 );
1da177e4 LT	197	nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) \| (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F));
	198	nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K \| 0x02);
	199	nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST \| INITIAL_AGC_BW);
	200	nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06);
	201	nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31);
	202	nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) \| (0x02 << 3) \| 0x04);
	203	nxt6000_writereg(state, CAS_FREQ, 0xBB); /* CHECKME */
	204	nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2);
	205	nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256);
	206	nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49);
	207	nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72);
	208	nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5);
	209	nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) \| (3 << 4) \| 2);
	210	nxt6000_writereg(state, DIAG_CONFIG, TB_SET);
	211
	212	if (state->config->clock_inversion)
	213	nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION);
	214	else
	215	nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0);
	216
	217	nxt6000_writereg(state, TS_FORMAT, 0);
1da177e4 LT	218	}
	219
	220	static void nxt6000_dump_status(struct nxt6000_state *state)
	221	{
	222	u8 val;
	223
cc5ad2b6 MCC	224	#if 0
	225	pr_info("RS_COR_STAT: 0x%02X\n",
	226	nxt6000_readreg(fe, RS_COR_STAT));
	227	pr_info("VIT_SYNC_STATUS: 0x%02X\n",
	228	nxt6000_readreg(fe, VIT_SYNC_STATUS));
	229	pr_info("OFDM_COR_STAT: 0x%02X\n",
	230	nxt6000_readreg(fe, OFDM_COR_STAT));
	231	pr_info("OFDM_SYR_STAT: 0x%02X\n",
	232	nxt6000_readreg(fe, OFDM_SYR_STAT));
	233	pr_info("OFDM_TPS_RCVD_1: 0x%02X\n",
	234	nxt6000_readreg(fe, OFDM_TPS_RCVD_1));
	235	pr_info("OFDM_TPS_RCVD_2: 0x%02X\n",
	236	nxt6000_readreg(fe, OFDM_TPS_RCVD_2));
	237	pr_info("OFDM_TPS_RCVD_3: 0x%02X\n",
	238	nxt6000_readreg(fe, OFDM_TPS_RCVD_3));
	239	pr_info("OFDM_TPS_RCVD_4: 0x%02X\n",
	240	nxt6000_readreg(fe, OFDM_TPS_RCVD_4));
	241	pr_info("OFDM_TPS_RESERVED_1: 0x%02X\n",
	242	nxt6000_readreg(fe, OFDM_TPS_RESERVED_1));
	243	pr_info("OFDM_TPS_RESERVED_2: 0x%02X\n",
	244	nxt6000_readreg(fe, OFDM_TPS_RESERVED_2));
	245	#endif
	246	pr_info("NXT6000 status:");
1da177e4 LT	247
	248	val = nxt6000_readreg(state, RS_COR_STAT);
	249
cc5ad2b6 MCC	250	pr_cont(" DATA DESCR LOCK: %d,", val & 0x01);
cc5ad2b6 MCC	251	pr_cont(" DATA SYNC LOCK: %d,", (val >> 1) & 0x01);
1da177e4 LT	252
	253	val = nxt6000_readreg(state, VIT_SYNC_STATUS);
	254
cc5ad2b6	255	pr_cont(" VITERBI LOCK: %d,", (val >> 7) & 0x01);
1da177e4 LT	256
	257	switch ((val >> 4) & 0x07) {
	258
	259	case 0x00:
cc5ad2b6	260	pr_cont(" VITERBI CODERATE: 1/2,");
1da177e4 LT	261	break;
	262
	263	case 0x01:
cc5ad2b6	264	pr_cont(" VITERBI CODERATE: 2/3,");
1da177e4 LT	265	break;
	266
	267	case 0x02:
cc5ad2b6	268	pr_cont(" VITERBI CODERATE: 3/4,");
1da177e4 LT	269	break;
	270
	271	case 0x03:
cc5ad2b6	272	pr_cont(" VITERBI CODERATE: 5/6,");
1da177e4 LT	273	break;
	274
	275	case 0x04:
cc5ad2b6	276	pr_cont(" VITERBI CODERATE: 7/8,");
1da177e4 LT	277	break;
	278
	279	default:
cc5ad2b6	280	pr_cont(" VITERBI CODERATE: Reserved,");
1da177e4 LT	281
	282	}
	283
	284	val = nxt6000_readreg(state, OFDM_COR_STAT);
	285
cc5ad2b6 MCC	286	pr_cont(" CHCTrack: %d,", (val >> 7) & 0x01);
	287	pr_cont(" TPSLock: %d,", (val >> 6) & 0x01);
	288	pr_cont(" SYRLock: %d,", (val >> 5) & 0x01);
	289	pr_cont(" AGCLock: %d,", (val >> 4) & 0x01);
1da177e4 LT	290
	291	switch (val & 0x0F) {
	292
	293	case 0x00:
cc5ad2b6	294	pr_cont(" CoreState: IDLE,");
1da177e4 LT	295	break;
	296
	297	case 0x02:
cc5ad2b6	298	pr_cont(" CoreState: WAIT_AGC,");
1da177e4 LT	299	break;
	300
	301	case 0x03:
cc5ad2b6	302	pr_cont(" CoreState: WAIT_SYR,");
1da177e4 LT	303	break;
	304
	305	case 0x04:
cc5ad2b6	306	pr_cont(" CoreState: WAIT_PPM,");
1da177e4 LT	307	break;
	308
	309	case 0x01:
cc5ad2b6	310	pr_cont(" CoreState: WAIT_TRL,");
1da177e4 LT	311	break;
	312
	313	case 0x05:
cc5ad2b6	314	pr_cont(" CoreState: WAIT_TPS,");
1da177e4 LT	315	break;
	316
	317	case 0x06:
cc5ad2b6	318	pr_cont(" CoreState: MONITOR_TPS,");
1da177e4 LT	319	break;
	320
	321	default:
cc5ad2b6	322	pr_cont(" CoreState: Reserved,");
1da177e4 LT	323
	324	}
	325
	326	val = nxt6000_readreg(state, OFDM_SYR_STAT);
	327
cc5ad2b6 MCC	328	pr_cont(" SYRLock: %d,", (val >> 4) & 0x01);
cc5ad2b6 MCC	329	pr_cont(" SYRMode: %s,", (val >> 2) & 0x01 ? "8K" : "2K");
1da177e4 LT	330
	331	switch ((val >> 4) & 0x03) {
	332
	333	case 0x00:
cc5ad2b6	334	pr_cont(" SYRGuard: 1/32,");
1da177e4 LT	335	break;
	336
	337	case 0x01:
cc5ad2b6	338	pr_cont(" SYRGuard: 1/16,");
1da177e4 LT	339	break;
	340
	341	case 0x02:
cc5ad2b6	342	pr_cont(" SYRGuard: 1/8,");
1da177e4 LT	343	break;
	344
	345	case 0x03:
cc5ad2b6	346	pr_cont(" SYRGuard: 1/4,");
1da177e4 LT	347	break;
	348	}
	349
	350	val = nxt6000_readreg(state, OFDM_TPS_RCVD_3);
	351
	352	switch ((val >> 4) & 0x07) {
	353
	354	case 0x00:
cc5ad2b6	355	pr_cont(" TPSLP: 1/2,");
1da177e4 LT	356	break;
	357
	358	case 0x01:
cc5ad2b6	359	pr_cont(" TPSLP: 2/3,");
1da177e4 LT	360	break;
	361
	362	case 0x02:
cc5ad2b6	363	pr_cont(" TPSLP: 3/4,");
1da177e4 LT	364	break;
	365
	366	case 0x03:
cc5ad2b6	367	pr_cont(" TPSLP: 5/6,");
1da177e4 LT	368	break;
	369
	370	case 0x04:
cc5ad2b6	371	pr_cont(" TPSLP: 7/8,");
1da177e4 LT	372	break;
	373
	374	default:
cc5ad2b6	375	pr_cont(" TPSLP: Reserved,");
1da177e4 LT	376
	377	}
	378
	379	switch (val & 0x07) {
	380
	381	case 0x00:
cc5ad2b6	382	pr_cont(" TPSHP: 1/2,");
1da177e4 LT	383	break;
	384
	385	case 0x01:
cc5ad2b6	386	pr_cont(" TPSHP: 2/3,");
1da177e4 LT	387	break;
	388
	389	case 0x02:
cc5ad2b6	390	pr_cont(" TPSHP: 3/4,");
1da177e4 LT	391	break;
	392
	393	case 0x03:
cc5ad2b6	394	pr_cont(" TPSHP: 5/6,");
1da177e4 LT	395	break;
	396
	397	case 0x04:
cc5ad2b6	398	pr_cont(" TPSHP: 7/8,");
1da177e4 LT	399	break;
	400
	401	default:
cc5ad2b6	402	pr_cont(" TPSHP: Reserved,");
1da177e4 LT	403
	404	}
	405
	406	val = nxt6000_readreg(state, OFDM_TPS_RCVD_4);
	407
cc5ad2b6	408	pr_cont(" TPSMode: %s,", val & 0x01 ? "8K" : "2K");
1da177e4 LT	409
	410	switch ((val >> 4) & 0x03) {
	411
	412	case 0x00:
cc5ad2b6	413	pr_cont(" TPSGuard: 1/32,");
1da177e4 LT	414	break;
	415
	416	case 0x01:
cc5ad2b6	417	pr_cont(" TPSGuard: 1/16,");
1da177e4 LT	418	break;
	419
	420	case 0x02:
cc5ad2b6	421	pr_cont(" TPSGuard: 1/8,");
1da177e4 LT	422	break;
	423
	424	case 0x03:
cc5ad2b6	425	pr_cont(" TPSGuard: 1/4,");
1da177e4 LT	426	break;
	427
	428	}
	429
	430	/* Strange magic required to gain access to RF_AGC_STATUS */
	431	nxt6000_readreg(state, RF_AGC_VAL_1);
	432	val = nxt6000_readreg(state, RF_AGC_STATUS);
	433	val = nxt6000_readreg(state, RF_AGC_STATUS);
	434
cc5ad2b6 MCC	435	pr_cont(" RF AGC LOCK: %d,", (val >> 4) & 0x01);
cc5ad2b6 MCC	436	pr_cont("\n");
1da177e4 LT	437	}
1da177e4 LT	438
0df289a2	439	static int nxt6000_read_status(struct dvb_frontend fe, enum fe_status status)
1da177e4 LT	440	{
1da177e4 LT	441	u8 core_status;
b8742700	442	struct nxt6000_state* state = fe->demodulator_priv;
1da177e4 LT	443
	444	*status = 0;
	445
	446	core_status = nxt6000_readreg(state, OFDM_COR_STAT);
	447
	448	if (core_status & AGCLOCKED)
	449	*status \|= FE_HAS_SIGNAL;
	450
	451	if (nxt6000_readreg(state, OFDM_SYR_STAT) & GI14_SYR_LOCK)
	452	*status \|= FE_HAS_CARRIER;
	453
	454	if (nxt6000_readreg(state, VIT_SYNC_STATUS) & VITINSYNC)
	455	*status \|= FE_HAS_VITERBI;
	456
	457	if (nxt6000_readreg(state, RS_COR_STAT) & RSCORESTATUS)
	458	*status \|= FE_HAS_SYNC;
	459
	460	if ((core_status & TPSLOCKED) && (*status == (FE_HAS_SIGNAL \| FE_HAS_CARRIER \| FE_HAS_VITERBI \| FE_HAS_SYNC)))
	461	*status \|= FE_HAS_LOCK;
	462
	463	if (debug)
	464	nxt6000_dump_status(state);
	465
	466	return 0;
	467	}
	468
	469	static int nxt6000_init(struct dvb_frontend* fe)
	470	{
b8742700	471	struct nxt6000_state* state = fe->demodulator_priv;
1da177e4 LT	472
	473	nxt6000_reset(state);
	474	nxt6000_setup(fe);
	475
	476	return 0;
	477	}
	478
80b5b745	479	static int nxt6000_set_frontend(struct dvb_frontend *fe)
1da177e4	480	{
80b5b745	481	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
b8742700	482	struct nxt6000_state* state = fe->demodulator_priv;
1da177e4 LT	483	int result;
1da177e4 LT	484
dea74869	485	if (fe->ops.tuner_ops.set_params) {
14d24d14	486	fe->ops.tuner_ops.set_params(fe);
dea74869	487	if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
605ee41c	488	}
1da177e4	489
80b5b745 MCC	490	result = nxt6000_set_bandwidth(state, p->bandwidth_hz);
80b5b745 MCC	491	if (result < 0)
1da177e4	492	return result;
80b5b745 MCC	493
	494	result = nxt6000_set_guard_interval(state, p->guard_interval);
	495	if (result < 0)
1da177e4	496	return result;
80b5b745 MCC	497
	498	result = nxt6000_set_transmission_mode(state, p->transmission_mode);
	499	if (result < 0)
1da177e4	500	return result;
80b5b745 MCC	501
	502	result = nxt6000_set_inversion(state, p->inversion);
	503	if (result < 0)
1da177e4 LT	504	return result;
1da177e4 LT	505
115eea4e	506	msleep(500);
1da177e4 LT	507	return 0;
	508	}
	509
	510	static void nxt6000_release(struct dvb_frontend* fe)
	511	{
b8742700	512	struct nxt6000_state* state = fe->demodulator_priv;
1da177e4 LT	513	kfree(state);
	514	}
	515
3a4a5711 JS	516	static int nxt6000_read_snr(struct dvb_frontend* fe, u16* snr)
3a4a5711 JS	517	{
b8742700	518	struct nxt6000_state* state = fe->demodulator_priv;
3a4a5711 JS	519
	520	*snr = nxt6000_readreg( state, OFDM_CHC_SNR) / 8;
	521
	522	return 0;
	523	}
	524
	525	static int nxt6000_read_ber(struct dvb_frontend* fe, u32* ber)
	526	{
b8742700	527	struct nxt6000_state* state = fe->demodulator_priv;
3a4a5711 JS	528
	529	nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 );
	530
	531	*ber = (nxt6000_readreg( state, VIT_BER_1 ) << 8 ) \|
	532	nxt6000_readreg( state, VIT_BER_0 );
	533
	534	nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts
	535
	536	return 0;
	537	}
	538
	539	static int nxt6000_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
	540	{
b8742700	541	struct nxt6000_state* state = fe->demodulator_priv;
3a4a5711 JS	542
	543	*signal_strength = (short) (511 -
	544	(nxt6000_readreg(state, AGC_GAIN_1) +
	545	((nxt6000_readreg(state, AGC_GAIN_2) & 0x03) << 8)));
	546
	547	return 0;
	548	}
	549
115eea4e SO	550	static int nxt6000_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
	551	{
	552	tune->min_delay_ms = 500;
	553	return 0;
	554	}
	555
605ee41c AQ	556	static int nxt6000_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
	557	{
	558	struct nxt6000_state* state = fe->demodulator_priv;
	559
	560	if (enable) {
	561	return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01);
	562	} else {
	563	return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00);
	564	}
	565	}
	566
bd336e63	567	static const struct dvb_frontend_ops nxt6000_ops;
1da177e4 LT	568
	569	struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
	570	struct i2c_adapter* i2c)
	571	{
	572	struct nxt6000_state* state = NULL;
	573
	574	/* allocate memory for the internal state */
084e24ac	575	state = kzalloc(sizeof(struct nxt6000_state), GFP_KERNEL);
1da177e4 LT	576	if (state == NULL) goto error;
	577
	578	/* setup the state */
	579	state->config = config;
	580	state->i2c = i2c;
1da177e4 LT	581
	582	/* check if the demod is there */
	583	if (nxt6000_readreg(state, OFDM_MSC_REV) != NXT6000ASICDEVICE) goto error;
	584
	585	/* create dvb_frontend */
dea74869	586	memcpy(&state->frontend.ops, &nxt6000_ops, sizeof(struct dvb_frontend_ops));
1da177e4 LT	587	state->frontend.demodulator_priv = state;
	588	return &state->frontend;
	589
	590	error:
	591	kfree(state);
	592	return NULL;
	593	}
	594
bd336e63	595	static const struct dvb_frontend_ops nxt6000_ops = {
80b5b745	596	.delsys = { SYS_DVBT },
1da177e4 LT	597	.info = {
1da177e4 LT	598	.name = "NxtWave NXT6000 DVB-T",
f1b1eabf MCC	599	.frequency_min_hz = 0,
	600	.frequency_max_hz = 863250 * kHz,
	601	.frequency_stepsize_hz = 62500,
1da177e4 LT	602	/.frequency_tolerance = //* FIXME: 12% of SR */
	603	.symbol_rate_min = 0, /* FIXME */
	604	.symbol_rate_max = 9360000, /* FIXME */
	605	.symbol_rate_tolerance = 4000,
	606	.caps = FE_CAN_FEC_1_2 \| FE_CAN_FEC_2_3 \| FE_CAN_FEC_3_4 \|
50c25fff MK	607	FE_CAN_FEC_4_5 \| FE_CAN_FEC_5_6 \| FE_CAN_FEC_6_7 \|
	608	FE_CAN_FEC_7_8 \| FE_CAN_FEC_8_9 \| FE_CAN_FEC_AUTO \|
	609	FE_CAN_QAM_16 \| FE_CAN_QAM_64 \| FE_CAN_QAM_AUTO \|
	610	FE_CAN_TRANSMISSION_MODE_AUTO \| FE_CAN_GUARD_INTERVAL_AUTO \|
	611	FE_CAN_HIERARCHY_AUTO,
1da177e4 LT	612	},
	613
	614	.release = nxt6000_release,
	615
	616	.init = nxt6000_init,
605ee41c	617	.i2c_gate_ctrl = nxt6000_i2c_gate_ctrl,
1da177e4	618
115eea4e SO	619	.get_tune_settings = nxt6000_fe_get_tune_settings,
115eea4e SO	620
80b5b745	621	.set_frontend = nxt6000_set_frontend,
1da177e4 LT	622
1da177e4 LT	623	.read_status = nxt6000_read_status,
3a4a5711 JS	624	.read_ber = nxt6000_read_ber,
	625	.read_signal_strength = nxt6000_read_signal_strength,
	626	.read_snr = nxt6000_read_snr,
1da177e4 LT	627	};
	628
	629	module_param(debug, int, 0644);
	630	MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
	631
	632	MODULE_DESCRIPTION("NxtWave NXT6000 DVB-T demodulator driver");
	633	MODULE_AUTHOR("Florian Schirmer");
	634	MODULE_LICENSE("GPL");
	635
	636	EXPORT_SYMBOL(nxt6000_attach);