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Merge tag 'v4.10-rc1' into docs-next
[linux-block.git] / drivers / media / dvb-frontends / dvb-pll.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * descriptions + helper functions for simple dvb plls.
3 *
4 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
5479a582
MCC		 21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
5a0e3ad6 23#include <linux/slab.h>
1da177e4
LT		 24#include <linux/module.h>
25#include <linux/dvb/frontend.h>
26#include <asm/types.h>
27
28#include "dvb-pll.h"
29
5479a582
MCC		 30#define dprintk(fmt, arg...) \
31 printk(KERN_DEBUG pr_fmt("%s: " fmt), __func__, ##arg)
32
05a4611b
MK		 33struct dvb_pll_priv {
34 /* pll number */
35 int nr;
36
37 /* i2c details */
38 int pll_i2c_address;
39 struct i2c_adapter *i2c;
40
41 /* the PLL descriptor */
548146fb 42 const struct dvb_pll_desc *pll_desc;
05a4611b
MK		 43
44 /* cached frequency/bandwidth */
45 u32 frequency;
46 u32 bandwidth;
47};
48
ff3e7dd5 49#define DVB_PLL_MAX 64
05a4611b
MK		 50
51static unsigned int dvb_pll_devcount;
52
ff699e6b 53static int debug;
05a4611b
MK		 54module_param(debug, int, 0644);
55MODULE_PARM_DESC(debug, "enable verbose debug messages");
56
704e39bf
MK		 57static unsigned int id[DVB_PLL_MAX] =
58 { [ 0 ... (DVB_PLL_MAX-1) ] = DVB_PLL_UNDEFINED };
59module_param_array(id, int, NULL, 0644);
60MODULE_PARM_DESC(id, "force pll id to use (DEBUG ONLY)");
61
05a4611b
MK		 62/* ----------------------------------------------------------- */
63
47a9991e 64struct dvb_pll_desc {
548146fb 65 const char *name;
47a9991e
MK		 66 u32 min;
67 u32 max;
68 u32 iffreq;
80d8d498 69 void (*set)(struct dvb_frontend *fe, u8 *buf);
47a9991e 70 u8 *initdata;
2b74334d 71 u8 *initdata2;
47a9991e
MK		 72 u8 *sleepdata;
73 int count;
74 struct {
75 u32 limit;
76 u32 stepsize;
77 u8 config;
78 u8 cb;
548146fb 79 } entries[];
47a9991e
MK		 80};
81
1da177e4
LT		 82/* ----------------------------------------------------------- */
83/* descriptions */
84
548146fb 85static const struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
1da177e4
LT		 86 .name = "Thomson dtt7579",
87 .min = 177000000,
88 .max = 858000000,
df78cb0a 89 .iffreq= 36166667,
d519dcf6
TP		 90 .sleepdata = (u8[]){ 2, 0xb4, 0x03 },
91 .count = 4,
1da177e4 92 .entries = {
df78cb0a
TP		 93 { 443250000, 166667, 0xb4, 0x02 },
94 { 542000000, 166667, 0xb4, 0x08 },
95 { 771000000, 166667, 0xbc, 0x08 },
96 { 999999999, 166667, 0xf4, 0x08 },
1da177e4
LT		 97 },
98};
1da177e4 99
80d8d498 100static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf)
1da177e4 101{
80d8d498
MCC		 102 u32 bw = fe->dtv_property_cache.bandwidth_hz;
103 if (bw == 7000000)
1da177e4
LT		 104 buf[3] |= 0x10;
105}
106
548146fb 107static const struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
1da177e4
LT		 108 .name = "Thomson dtt759x",
109 .min = 177000000,
110 .max = 896000000,
77d67504 111 .set = thomson_dtt759x_bw,
df78cb0a 112 .iffreq= 36166667,
d519dcf6
TP		 113 .sleepdata = (u8[]){ 2, 0x84, 0x03 },
114 .count = 5,
1da177e4 115 .entries = {
df78cb0a
TP		 116 { 264000000, 166667, 0xb4, 0x02 },
117 { 470000000, 166667, 0xbc, 0x02 },
118 { 735000000, 166667, 0xbc, 0x08 },
119 { 835000000, 166667, 0xf4, 0x08 },
120 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT		 121 },
122};
1da177e4 123
5fb67074
PC		 124static void thomson_dtt7520x_bw(struct dvb_frontend *fe, u8 *buf)
125{
126 u32 bw = fe->dtv_property_cache.bandwidth_hz;
127 if (bw == 8000000)
128 buf[3] ^= 0x10;
129}
130
548146fb 131static const struct dvb_pll_desc dvb_pll_thomson_dtt7520x = {
5fb67074
PC		 132 .name = "Thomson dtt7520x",
133 .min = 185000000,
134 .max = 900000000,
135 .set = thomson_dtt7520x_bw,
136 .iffreq = 36166667,
137 .count = 7,
138 .entries = {
139 { 305000000, 166667, 0xb4, 0x12 },
140 { 405000000, 166667, 0xbc, 0x12 },
141 { 445000000, 166667, 0xbc, 0x12 },
142 { 465000000, 166667, 0xf4, 0x18 },
143 { 735000000, 166667, 0xfc, 0x18 },
144 { 835000000, 166667, 0xbc, 0x18 },
145 { 999999999, 166667, 0xfc, 0x18 },
146 },
147};
148
548146fb 149static const struct dvb_pll_desc dvb_pll_lg_z201 = {
1da177e4
LT		 150 .name = "LG z201",
151 .min = 174000000,
152 .max = 862000000,
df78cb0a 153 .iffreq= 36166667,
d519dcf6
TP		 154 .sleepdata = (u8[]){ 2, 0xbc, 0x03 },
155 .count = 5,
1da177e4 156 .entries = {
df78cb0a
TP		 157 { 157500000, 166667, 0xbc, 0x01 },
158 { 443250000, 166667, 0xbc, 0x02 },
159 { 542000000, 166667, 0xbc, 0x04 },
160 { 830000000, 166667, 0xf4, 0x04 },
161 { 999999999, 166667, 0xfc, 0x04 },
1da177e4
LT		 162 },
163};
1da177e4 164
548146fb 165static const struct dvb_pll_desc dvb_pll_unknown_1 = {
1da177e4
LT		 166 .name = "unknown 1", /* used by dntv live dvb-t */
167 .min = 174000000,
168 .max = 862000000,
df78cb0a 169 .iffreq= 36166667,
1da177e4
LT		 170 .count = 9,
171 .entries = {
df78cb0a
TP		 172 { 150000000, 166667, 0xb4, 0x01 },
173 { 173000000, 166667, 0xbc, 0x01 },
174 { 250000000, 166667, 0xb4, 0x02 },
175 { 400000000, 166667, 0xbc, 0x02 },
176 { 420000000, 166667, 0xf4, 0x02 },
177 { 470000000, 166667, 0xfc, 0x02 },
178 { 600000000, 166667, 0xbc, 0x08 },
179 { 730000000, 166667, 0xf4, 0x08 },
180 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT		 181 },
182};
1da177e4 183
776338e1
JS		 184/* Infineon TUA6010XS
185 * used in Thomson Cable Tuner
186 */
548146fb 187static const struct dvb_pll_desc dvb_pll_tua6010xs = {
776338e1
JS		 188 .name = "Infineon TUA6010XS",
189 .min = 44250000,
190 .max = 858000000,
df78cb0a 191 .iffreq= 36125000,
776338e1
JS		 192 .count = 3,
193 .entries = {
df78cb0a
TP		 194 { 115750000, 62500, 0x8e, 0x03 },
195 { 403250000, 62500, 0x8e, 0x06 },
196 { 999999999, 62500, 0x8e, 0x85 },
776338e1
JS		 197 },
198};
776338e1
JS		 199
200/* Panasonic env57h1xd5 (some Philips PLL ?) */
548146fb 201static const struct dvb_pll_desc dvb_pll_env57h1xd5 = {
776338e1
JS		 202 .name = "Panasonic ENV57H1XD5",
203 .min = 44250000,
204 .max = 858000000,
df78cb0a 205 .iffreq= 36125000,
776338e1
JS		 206 .count = 4,
207 .entries = {
df78cb0a
TP		 208 { 153000000, 166667, 0xc2, 0x41 },
209 { 470000000, 166667, 0xc2, 0x42 },
210 { 526000000, 166667, 0xc2, 0x84 },
211 { 999999999, 166667, 0xc2, 0xa4 },
776338e1
JS		 212 },
213};
776338e1
JS		 214
215/* Philips TDA6650/TDA6651
216 * used in Panasonic ENV77H11D5
217 */
80d8d498 218static void tda665x_bw(struct dvb_frontend *fe, u8 *buf)
776338e1 219{
80d8d498
MCC		 220 u32 bw = fe->dtv_property_cache.bandwidth_hz;
221 if (bw == 8000000)
776338e1
JS		 222 buf[3] |= 0x08;
223}
224
548146fb 225static const struct dvb_pll_desc dvb_pll_tda665x = {
776338e1
JS		 226 .name = "Philips TDA6650/TDA6651",
227 .min = 44250000,
228 .max = 858000000,
77d67504 229 .set = tda665x_bw,
df78cb0a 230 .iffreq= 36166667,
fbfee868 231 .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab },
776338e1
JS		 232 .count = 12,
233 .entries = {
df78cb0a
TP		 234 { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ },
235 { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
236 { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
237 { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
238 { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ },
239 { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ },
240 { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
241 { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
242 { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ },
243 { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ },
244 { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
245 { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ },
776338e1
JS		 246 }
247};
776338e1
JS		 248
249/* Infineon TUA6034
250 * used in LG TDTP E102P
251 */
80d8d498 252static void tua6034_bw(struct dvb_frontend *fe, u8 *buf)
776338e1 253{
80d8d498
MCC		 254 u32 bw = fe->dtv_property_cache.bandwidth_hz;
255 if (bw == 7000000)
776338e1
JS		 256 buf[3] |= 0x08;
257}
258
548146fb 259static const struct dvb_pll_desc dvb_pll_tua6034 = {
776338e1
JS		 260 .name = "Infineon TUA6034",
261 .min = 44250000,
262 .max = 858000000,
df78cb0a 263 .iffreq= 36166667,
776338e1 264 .count = 3,
77d67504 265 .set = tua6034_bw,
776338e1 266 .entries = {
df78cb0a
TP		 267 { 174500000, 62500, 0xce, 0x01 },
268 { 230000000, 62500, 0xce, 0x02 },
269 { 999999999, 62500, 0xce, 0x04 },
776338e1
JS		 270 },
271};
776338e1 272
0589b8e4
PB		 273/* ALPS TDED4
274 * used in Nebula-Cards and USB boxes
275 */
80d8d498 276static void tded4_bw(struct dvb_frontend *fe, u8 *buf)
0589b8e4 277{
80d8d498
MCC		 278 u32 bw = fe->dtv_property_cache.bandwidth_hz;
279 if (bw == 8000000)
0589b8e4
PB		 280 buf[3] |= 0x04;
281}
282
548146fb 283static const struct dvb_pll_desc dvb_pll_tded4 = {
0589b8e4
PB		 284 .name = "ALPS TDED4",
285 .min = 47000000,
286 .max = 863000000,
df78cb0a 287 .iffreq= 36166667,
77d67504 288 .set = tded4_bw,
0589b8e4
PB		 289 .count = 4,
290 .entries = {
df78cb0a
TP		 291 { 153000000, 166667, 0x85, 0x01 },
292 { 470000000, 166667, 0x85, 0x02 },
293 { 823000000, 166667, 0x85, 0x08 },
294 { 999999999, 166667, 0x85, 0x88 },
0589b8e4
PB		 295 }
296};
0589b8e4 297
147418c9
KL		 298/* ALPS TDHU2
299 * used in AverTVHD MCE A180
300 */
548146fb 301static const struct dvb_pll_desc dvb_pll_tdhu2 = {
147418c9
KL		 302 .name = "ALPS TDHU2",
303 .min = 54000000,
304 .max = 864000000,
df78cb0a 305 .iffreq= 44000000,
147418c9
KL		 306 .count = 4,
307 .entries = {
df78cb0a
TP		 308 { 162000000, 62500, 0x85, 0x01 },
309 { 426000000, 62500, 0x85, 0x02 },
310 { 782000000, 62500, 0x85, 0x08 },
311 { 999999999, 62500, 0x85, 0x88 },
147418c9
KL		 312 }
313};
147418c9 314
d76a6179 315/* Samsung TBMV30111IN / TBMV30712IN1
147418c9
KL		 316 * used in Air2PC ATSC - 2nd generation (nxt2002)
317 */
548146fb 318static const struct dvb_pll_desc dvb_pll_samsung_tbmv = {
28f3d4b3 319 .name = "Samsung TBMV30111IN / TBMV30712IN1",
147418c9
KL		 320 .min = 54000000,
321 .max = 860000000,
df78cb0a 322 .iffreq= 44000000,
17c37efb 323 .count = 6,
147418c9 324 .entries = {
df78cb0a
TP		 325 { 172000000, 166667, 0xb4, 0x01 },
326 { 214000000, 166667, 0xb4, 0x02 },
327 { 467000000, 166667, 0xbc, 0x02 },
328 { 721000000, 166667, 0xbc, 0x08 },
329 { 841000000, 166667, 0xf4, 0x08 },
330 { 999999999, 166667, 0xfc, 0x02 },
147418c9
KL		 331 }
332};
147418c9 333
f8bf134d
RP		 334/*
335 * Philips SD1878 Tuner.
336 */
548146fb 337static const struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
f8bf134d
RP		 338 .name = "Philips SD1878",
339 .min = 950000,
340 .max = 2150000,
df78cb0a 341 .iffreq= 249, /* zero-IF, offset 249 is to round up */
f8bf134d
RP		 342 .count = 4,
343 .entries = {
df78cb0a 344 { 1250000, 500, 0xc4, 0x00},
b3332a98 345 { 1450000, 500, 0xc4, 0x40},
df78cb0a
TP		 346 { 2050000, 500, 0xc4, 0x80},
347 { 2150000, 500, 0xc4, 0xc0},
f8bf134d
RP		 348 },
349};
f8bf134d 350
80d8d498 351static void opera1_bw(struct dvb_frontend *fe, u8 *buf)
941491f3 352{
80d8d498 353 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
2b74334d 354 struct dvb_pll_priv *priv = fe->tuner_priv;
80d8d498 355 u32 b_w = (c->symbol_rate * 27) / 32000;
2b74334d
MP		 356 struct i2c_msg msg = {
357 .addr = priv->pll_i2c_address,
358 .flags = 0,
359 .buf = buf,
360 .len = 4
361 };
362 int result;
363 u8 lpf;
364
365 if (fe->ops.i2c_gate_ctrl)
366 fe->ops.i2c_gate_ctrl(fe, 1);
367
368 result = i2c_transfer(priv->i2c, &msg, 1);
369 if (result != 1)
5479a582 370 pr_err("%s: i2c_transfer failed:%d",
2b74334d
MP		 371 __func__, result);
372
373 if (b_w <= 10000)
374 lpf = 0xc;
375 else if (b_w <= 12000)
376 lpf = 0x2;
377 else if (b_w <= 14000)
378 lpf = 0xa;
379 else if (b_w <= 16000)
380 lpf = 0x6;
381 else if (b_w <= 18000)
382 lpf = 0xe;
383 else if (b_w <= 20000)
384 lpf = 0x1;
385 else if (b_w <= 22000)
386 lpf = 0x9;
387 else if (b_w <= 24000)
388 lpf = 0x5;
389 else if (b_w <= 26000)
390 lpf = 0xd;
391 else if (b_w <= 28000)
392 lpf = 0x3;
393 else
394 lpf = 0xb;
395 buf[2] ^= 0x1c; /* Flip bits 3-5 */
396 /* Set lpf */
397 buf[2] |= ((lpf >> 2) & 0x3) << 3;
398 buf[3] |= (lpf & 0x3) << 2;
399
400 return;
941491f3
MG		 401}
402
548146fb 403static const struct dvb_pll_desc dvb_pll_opera1 = {
941491f3
MG		 404 .name = "Opera Tuner",
405 .min = 900000,
406 .max = 2250000,
2b74334d
MP		 407 .initdata = (u8[]){ 4, 0x08, 0xe5, 0xe1, 0x00 },
408 .initdata2 = (u8[]){ 4, 0x08, 0xe5, 0xe5, 0x00 },
941491f3 409 .iffreq= 0,
77d67504 410 .set = opera1_bw,
941491f3
MG		 411 .count = 8,
412 .entries = {
2b74334d
MP		 413 { 1064000, 500, 0xf9, 0xc2 },
414 { 1169000, 500, 0xf9, 0xe2 },
415 { 1299000, 500, 0xf9, 0x20 },
416 { 1444000, 500, 0xf9, 0x40 },
417 { 1606000, 500, 0xf9, 0x60 },
418 { 1777000, 500, 0xf9, 0x80 },
419 { 1941000, 500, 0xf9, 0xa0 },
420 { 2250000, 500, 0xf9, 0xc0 },
941491f3
MG		 421 }
422};
47a9991e 423
80d8d498 424static void samsung_dtos403ih102a_set(struct dvb_frontend *fe, u8 *buf)
139dfeb2
AP		 425{
426 struct dvb_pll_priv *priv = fe->tuner_priv;
427 struct i2c_msg msg = {
428 .addr = priv->pll_i2c_address,
429 .flags = 0,
430 .buf = buf,
431 .len = 4
432 };
433 int result;
434
435 if (fe->ops.i2c_gate_ctrl)
436 fe->ops.i2c_gate_ctrl(fe, 1);
437
438 result = i2c_transfer(priv->i2c, &msg, 1);
439 if (result != 1)
5479a582 440 pr_err("%s: i2c_transfer failed:%d",
139dfeb2
AP		 441 __func__, result);
442
443 buf[2] = 0x9e;
444 buf[3] = 0x90;
445
446 return;
447}
448
449/* unknown pll used in Samsung DTOS403IH102A DVB-C tuner */
548146fb 450static const struct dvb_pll_desc dvb_pll_samsung_dtos403ih102a = {
139dfeb2
AP		 451 .name = "Samsung DTOS403IH102A",
452 .min = 44250000,
453 .max = 858000000,
454 .iffreq = 36125000,
455 .count = 8,
456 .set = samsung_dtos403ih102a_set,
457 .entries = {
458 { 135000000, 62500, 0xbe, 0x01 },
459 { 177000000, 62500, 0xf6, 0x01 },
460 { 370000000, 62500, 0xbe, 0x02 },
461 { 450000000, 62500, 0xf6, 0x02 },
462 { 466000000, 62500, 0xfe, 0x02 },
463 { 538000000, 62500, 0xbe, 0x08 },
464 { 826000000, 62500, 0xf6, 0x08 },
465 { 999999999, 62500, 0xfe, 0x08 },
466 }
467};
468
a104ed07 469/* Samsung TDTC9251DH0 DVB-T NIM, as used on AirStar 2 */
548146fb 470static const struct dvb_pll_desc dvb_pll_samsung_tdtc9251dh0 = {
a104ed07
TP		 471 .name = "Samsung TDTC9251DH0",
472 .min = 48000000,
473 .max = 863000000,
474 .iffreq = 36166667,
475 .count = 3,
476 .entries = {
477 { 157500000, 166667, 0xcc, 0x09 },
478 { 443000000, 166667, 0xcc, 0x0a },
479 { 863000000, 166667, 0xcc, 0x08 },
480 }
481};
482
f52c4853 483/* Samsung TBDU18132 DVB-S NIM with TSA5059 PLL, used in SkyStar2 DVB-S 2.3 */
548146fb 484static const struct dvb_pll_desc dvb_pll_samsung_tbdu18132 = {
f52c4853
TP		 485 .name = "Samsung TBDU18132",
486 .min = 950000,
487 .max = 2150000, /* guesses */
488 .iffreq = 0,
489 .count = 2,
490 .entries = {
491 { 1550000, 125, 0x84, 0x82 },
492 { 4095937, 125, 0x84, 0x80 },
493 }
494 /* TSA5059 PLL has a 17 bit divisor rather than the 15 bits supported
495 * by this driver. The two extra bits are 0x60 in the third byte. 15
496 * bits is enough for over 4 GHz, which is enough to cover the range
497 * of this tuner. We could use the additional divisor bits by adding
498 * more entries, e.g.
499 { 0x0ffff * 125 + 125/2, 125, 0x84 | 0x20, },
500 { 0x17fff * 125 + 125/2, 125, 0x84 | 0x40, },
501 { 0x1ffff * 125 + 125/2, 125, 0x84 | 0x60, }, */
502};
503
9d5d75a9 504/* Samsung TBMU24112 DVB-S NIM with SL1935 zero-IF tuner */
548146fb 505static const struct dvb_pll_desc dvb_pll_samsung_tbmu24112 = {
9d5d75a9
TP		 506 .name = "Samsung TBMU24112",
507 .min = 950000,
508 .max = 2150000, /* guesses */
509 .iffreq = 0,
510 .count = 2,
511 .entries = {
512 { 1500000, 125, 0x84, 0x18 },
513 { 9999999, 125, 0x84, 0x08 },
514 }
515};
516
d799ce57
TP		 517/* Alps TDEE4 DVB-C NIM, used on Cablestar 2 */
518/* byte 4 : 1 * * AGD R3 R2 R1 R0
519 * byte 5 : C1 * RE RTS BS4 BS3 BS2 BS1
520 * AGD = 1, R3 R2 R1 R0 = 0 1 0 1 => byte 4 = 1**10101 = 0x95
521 * Range(MHz) C1 * RE RTS BS4 BS3 BS2 BS1 Byte 5
522 * 47 - 153 0 * 0 0 0 0 0 1 0x01
523 * 153 - 430 0 * 0 0 0 0 1 0 0x02
524 * 430 - 822 0 * 0 0 1 0 0 0 0x08
525 * 822 - 862 1 * 0 0 1 0 0 0 0x88 */
548146fb 526static const struct dvb_pll_desc dvb_pll_alps_tdee4 = {
d799ce57
TP		 527 .name = "ALPS TDEE4",
528 .min = 47000000,
529 .max = 862000000,
530 .iffreq = 36125000,
531 .count = 4,
532 .entries = {
533 { 153000000, 62500, 0x95, 0x01 },
534 { 430000000, 62500, 0x95, 0x02 },
535 { 822000000, 62500, 0x95, 0x08 },
536 { 999999999, 62500, 0x95, 0x88 },
537 }
538};
539
47a9991e
MK		 540/* ----------------------------------------------------------- */
541
548146fb 542static const struct dvb_pll_desc *pll_list[] = {
47a9991e
MK		 543 [DVB_PLL_UNDEFINED] = NULL,
544 [DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579,
545 [DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x,
5fb67074 546 [DVB_PLL_THOMSON_DTT7520X] = &dvb_pll_thomson_dtt7520x,
47a9991e 547 [DVB_PLL_LG_Z201] = &dvb_pll_lg_z201,
47a9991e
MK		 548 [DVB_PLL_UNKNOWN_1] = &dvb_pll_unknown_1,
549 [DVB_PLL_TUA6010XS] = &dvb_pll_tua6010xs,
550 [DVB_PLL_ENV57H1XD5] = &dvb_pll_env57h1xd5,
551 [DVB_PLL_TUA6034] = &dvb_pll_tua6034,
47a9991e 552 [DVB_PLL_TDA665X] = &dvb_pll_tda665x,
47a9991e 553 [DVB_PLL_TDED4] = &dvb_pll_tded4,
d799ce57 554 [DVB_PLL_TDEE4] = &dvb_pll_alps_tdee4,
47a9991e
MK		 555 [DVB_PLL_TDHU2] = &dvb_pll_tdhu2,
556 [DVB_PLL_SAMSUNG_TBMV] = &dvb_pll_samsung_tbmv,
557 [DVB_PLL_PHILIPS_SD1878_TDA8261] = &dvb_pll_philips_sd1878_tda8261,
47a9991e 558 [DVB_PLL_OPERA1] = &dvb_pll_opera1,
139dfeb2 559 [DVB_PLL_SAMSUNG_DTOS403IH102A] = &dvb_pll_samsung_dtos403ih102a,
a104ed07 560 [DVB_PLL_SAMSUNG_TDTC9251DH0] = &dvb_pll_samsung_tdtc9251dh0,
f52c4853 561 [DVB_PLL_SAMSUNG_TBDU18132] = &dvb_pll_samsung_tbdu18132,
9d5d75a9 562 [DVB_PLL_SAMSUNG_TBMU24112] = &dvb_pll_samsung_tbmu24112,
47a9991e
MK		 563};
564
1da177e4
LT		 565/* ----------------------------------------------------------- */
566/* code */
567
5d7802b2 568static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
80d8d498 569 const u32 frequency)
1da177e4 570{
5d7802b2 571 struct dvb_pll_priv *priv = fe->tuner_priv;
548146fb 572 const struct dvb_pll_desc *desc = priv->pll_desc;
1da177e4
LT		 573 u32 div;
574 int i;
575
80d8d498 576 if (frequency && (frequency < desc->min || frequency > desc->max))
77d67504 577 return -EINVAL;
1da177e4
LT		 578
579 for (i = 0; i < desc->count; i++) {
80d8d498 580 if (frequency > desc->entries[i].limit)
1da177e4
LT		 581 continue;
582 break;
583 }
77d67504 584
1da177e4 585 if (debug)
5479a582 586 dprintk("pll: %s: freq=%d | i=%d/%d\n", desc->name,
80d8d498 587 frequency, i, desc->count);
272bc4db
AQ		 588 if (i == desc->count)
589 return -EINVAL;
1da177e4 590
80d8d498 591 div = (frequency + desc->iffreq +
77d67504 592 desc->entries[i].stepsize/2) / desc->entries[i].stepsize;
1da177e4
LT		 593 buf[0] = div >> 8;
594 buf[1] = div & 0xff;
ab66b22f
MK		 595 buf[2] = desc->entries[i].config;
596 buf[3] = desc->entries[i].cb;
1da177e4 597
77d67504 598 if (desc->set)
80d8d498 599 desc->set(fe, buf);
1da177e4
LT		 600
601 if (debug)
5479a582 602 dprintk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
1da177e4
LT		 603 desc->name, div, buf[0], buf[1], buf[2], buf[3]);
604
89faeefc 605 // calculate the frequency we set it to
df78cb0a 606 return (div * desc->entries[i].stepsize) - desc->iffreq;
1da177e4 607}
1da177e4 608
f2709c20
MCC		 609static void dvb_pll_release(struct dvb_frontend *fe)
610{
611 kfree(fe->tuner_priv);
612 fe->tuner_priv = NULL;
613}
614
272bc4db
AQ		 615static int dvb_pll_sleep(struct dvb_frontend *fe)
616{
617 struct dvb_pll_priv *priv = fe->tuner_priv;
272bc4db 618
c162dff6
CP		 619 if (priv->i2c == NULL)
620 return -EINVAL;
621
d519dcf6
TP		 622 if (priv->pll_desc->sleepdata) {
623 struct i2c_msg msg = { .flags = 0,
624 .addr = priv->pll_i2c_address,
625 .buf = priv->pll_desc->sleepdata + 1,
626 .len = priv->pll_desc->sleepdata[0] };
272bc4db 627
d519dcf6 628 int result;
272bc4db 629
d519dcf6
TP		 630 if (fe->ops.i2c_gate_ctrl)
631 fe->ops.i2c_gate_ctrl(fe, 1);
632 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
633 return result;
634 }
635 return 0;
272bc4db 636 }
d519dcf6
TP		 637 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
638 return -EINVAL;
272bc4db
AQ		 639}
640
14d24d14 641static int dvb_pll_set_params(struct dvb_frontend *fe)
272bc4db 642{
80d8d498 643 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
272bc4db
AQ		 644 struct dvb_pll_priv *priv = fe->tuner_priv;
645 u8 buf[4];
646 struct i2c_msg msg =
47ae9ae8
MK		 647 { .addr = priv->pll_i2c_address, .flags = 0,
648 .buf = buf, .len = sizeof(buf) };
272bc4db 649 int result;
77d67504 650 u32 frequency = 0;
272bc4db
AQ		 651
652 if (priv->i2c == NULL)
653 return -EINVAL;
654
80d8d498
MCC		 655 result = dvb_pll_configure(fe, buf, c->frequency);
656 if (result < 0)
272bc4db 657 return result;
89faeefc
MK		 658 else
659 frequency = result;
272bc4db 660
dea74869
PB		 661 if (fe->ops.i2c_gate_ctrl)
662 fe->ops.i2c_gate_ctrl(fe, 1);
272bc4db
AQ		 663 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
664 return result;
665 }
666
89faeefc 667 priv->frequency = frequency;
c6f56e7d 668 priv->bandwidth = c->bandwidth_hz;
272bc4db
AQ		 669
670 return 0;
671}
672
47ae9ae8 673static int dvb_pll_calc_regs(struct dvb_frontend *fe,
47ae9ae8 674 u8 *buf, int buf_len)
272bc4db 675{
249fa0b0 676 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
272bc4db
AQ		 677 struct dvb_pll_priv *priv = fe->tuner_priv;
678 int result;
77d67504 679 u32 frequency = 0;
272bc4db
AQ		 680
681 if (buf_len < 5)
682 return -EINVAL;
683
249fa0b0 684 result = dvb_pll_configure(fe, buf + 1, c->frequency);
80d8d498 685 if (result < 0)
272bc4db 686 return result;
89faeefc
MK		 687 else
688 frequency = result;
689
272bc4db
AQ		 690 buf[0] = priv->pll_i2c_address;
691
89faeefc 692 priv->frequency = frequency;
249fa0b0 693 priv->bandwidth = c->bandwidth_hz;
272bc4db
AQ		 694
695 return 5;
696}
697
698static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency)
699{
700 struct dvb_pll_priv *priv = fe->tuner_priv;
701 *frequency = priv->frequency;
702 return 0;
703}
704
705static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
706{
707 struct dvb_pll_priv *priv = fe->tuner_priv;
708 *bandwidth = priv->bandwidth;
709 return 0;
710}
711
26aed922
TP		 712static int dvb_pll_init(struct dvb_frontend *fe)
713{
714 struct dvb_pll_priv *priv = fe->tuner_priv;
715
716 if (priv->i2c == NULL)
717 return -EINVAL;
718
719 if (priv->pll_desc->initdata) {
720 struct i2c_msg msg = { .flags = 0,
721 .addr = priv->pll_i2c_address,
722 .buf = priv->pll_desc->initdata + 1,
723 .len = priv->pll_desc->initdata[0] };
724
725 int result;
726 if (fe->ops.i2c_gate_ctrl)
727 fe->ops.i2c_gate_ctrl(fe, 1);
2b74334d
MP		 728 result = i2c_transfer(priv->i2c, &msg, 1);
729 if (result != 1)
26aed922 730 return result;
2b74334d
MP		 731 if (priv->pll_desc->initdata2) {
732 msg.buf = priv->pll_desc->initdata2 + 1;
733 msg.len = priv->pll_desc->initdata2[0];
734 if (fe->ops.i2c_gate_ctrl)
735 fe->ops.i2c_gate_ctrl(fe, 1);
736 result = i2c_transfer(priv->i2c, &msg, 1);
737 if (result != 1)
738 return result;
26aed922
TP		 739 }
740 return 0;
741 }
742 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
743 return -EINVAL;
744}
745
14c4bf3c 746static const struct dvb_tuner_ops dvb_pll_tuner_ops = {
f2709c20 747 .release = dvb_pll_release,
272bc4db 748 .sleep = dvb_pll_sleep,
d519dcf6 749 .init = dvb_pll_init,
272bc4db 750 .set_params = dvb_pll_set_params,
bd4956b8 751 .calc_regs = dvb_pll_calc_regs,
272bc4db
AQ		 752 .get_frequency = dvb_pll_get_frequency,
753 .get_bandwidth = dvb_pll_get_bandwidth,
754};
755
47ae9ae8
MK		 756struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
757 struct i2c_adapter *i2c,
47a9991e 758 unsigned int pll_desc_id)
272bc4db 759{
061b623c 760 u8 b1 [] = { 0 };
47ae9ae8
MK		 761 struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD,
762 .buf = b1, .len = 1 };
272bc4db 763 struct dvb_pll_priv *priv = NULL;
061b623c 764 int ret;
548146fb 765 const struct dvb_pll_desc *desc;
47a9991e 766
704e39bf
MK		 767 if ((id[dvb_pll_devcount] > DVB_PLL_UNDEFINED) &&
768 (id[dvb_pll_devcount] < ARRAY_SIZE(pll_list)))
769 pll_desc_id = id[dvb_pll_devcount];
770
47a9991e
MK		 771 BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list));
772
773 desc = pll_list[pll_desc_id];
061b623c 774
55c05b6d
AQ		 775 if (i2c != NULL) {
776 if (fe->ops.i2c_gate_ctrl)
777 fe->ops.i2c_gate_ctrl(fe, 1);
778
95faba22
AQ		 779 ret = i2c_transfer (i2c, &msg, 1);
780 if (ret != 1)
2bfe031d 781 return NULL;
55c05b6d
AQ		 782 if (fe->ops.i2c_gate_ctrl)
783 fe->ops.i2c_gate_ctrl(fe, 0);
784 }
272bc4db
AQ		 785
786 priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL);
787 if (priv == NULL)
2bfe031d 788 return NULL;
272bc4db
AQ		 789
790 priv->pll_i2c_address = pll_addr;
791 priv->i2c = i2c;
792 priv->pll_desc = desc;
a27e5e76 793 priv->nr = dvb_pll_devcount++;
272bc4db 794
47ae9ae8
MK		 795 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops,
796 sizeof(struct dvb_tuner_ops));
797
982dd1bd
TP		 798 strncpy(fe->ops.tuner_ops.info.name, desc->name,
799 sizeof(fe->ops.tuner_ops.info.name));
dea74869 800 fe->ops.tuner_ops.info.frequency_min = desc->min;
0d84a62b 801 fe->ops.tuner_ops.info.frequency_max = desc->max;
d519dcf6
TP		 802 if (!desc->initdata)
803 fe->ops.tuner_ops.init = NULL;
804 if (!desc->sleepdata)
805 fe->ops.tuner_ops.sleep = NULL;
272bc4db
AQ		 806
807 fe->tuner_priv = priv;
a27e5e76 808
8528fa41 809 if ((debug) || (id[priv->nr] == pll_desc_id)) {
5479a582 810 dprintk("dvb-pll[%d]", priv->nr);
a27e5e76 811 if (i2c != NULL)
5479a582
MCC		 812 pr_cont(" %d-%04x", i2c_adapter_id(i2c), pll_addr);
813 pr_cont(": id# %d (%s) attached, %s\n", pll_desc_id, desc->name,
704e39bf
MK		 814 id[priv->nr] == pll_desc_id ?
815 "insmod option" : "autodetected");
4562fbea 816 }
a27e5e76 817
2bfe031d 818 return fe;
272bc4db
AQ		 819}
820EXPORT_SYMBOL(dvb_pll_attach);
821
1da177e4
LT		 822MODULE_DESCRIPTION("dvb pll library");
823MODULE_AUTHOR("Gerd Knorr");
824MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)