Commit | Line | Data |
---|---|---|
b79cb653 | 1 | /* |
ca06fa79 PB |
2 | * Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver |
3 | * | |
6d897616 | 4 | * Copyright (C) 2005 Steven Toth <stoth@linuxtv.org> |
ca06fa79 PB |
5 | * |
6 | * Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc> | |
7 | * | |
8 | * Support for CX24123/CX24113-NIM by Patrick Boettcher <pb@linuxtv.org> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
ca06fa79 | 19 | */ |
b79cb653 ST |
20 | |
21 | #include <linux/slab.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
b79cb653 | 24 | #include <linux/init.h> |
752a62b2 | 25 | #include <asm/div64.h> |
b79cb653 | 26 | |
fada1935 | 27 | #include <media/dvb_frontend.h> |
b79cb653 ST |
28 | #include "cx24123.h" |
29 | ||
a74b51fc VC |
30 | #define XTAL 10111000 |
31 | ||
70047f9c | 32 | static int force_band; |
93504abf ST |
33 | module_param(force_band, int, 0644); |
34 | MODULE_PARM_DESC(force_band, "Force a specific band select "\ | |
35 | "(1-9, default:off)."); | |
36 | ||
b79cb653 | 37 | static int debug; |
93504abf ST |
38 | module_param(debug, int, 0644); |
39 | MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); | |
ca06fa79 PB |
40 | |
41 | #define info(args...) do { printk(KERN_INFO "CX24123: " args); } while (0) | |
42 | #define err(args...) do { printk(KERN_ERR "CX24123: " args); } while (0) | |
43 | ||
b79cb653 ST |
44 | #define dprintk(args...) \ |
45 | do { \ | |
ca06fa79 PB |
46 | if (debug) { \ |
47 | printk(KERN_DEBUG "CX24123: %s: ", __func__); \ | |
48 | printk(args); \ | |
49 | } \ | |
b79cb653 ST |
50 | } while (0) |
51 | ||
93504abf ST |
52 | struct cx24123_state { |
53 | struct i2c_adapter *i2c; | |
54 | const struct cx24123_config *config; | |
b79cb653 ST |
55 | |
56 | struct dvb_frontend frontend; | |
57 | ||
b79cb653 ST |
58 | /* Some PLL specifics for tuning */ |
59 | u32 VCAarg; | |
60 | u32 VGAarg; | |
61 | u32 bandselectarg; | |
62 | u32 pllarg; | |
a74b51fc | 63 | u32 FILTune; |
b79cb653 | 64 | |
ca06fa79 PB |
65 | struct i2c_adapter tuner_i2c_adapter; |
66 | ||
67 | u8 demod_rev; | |
68 | ||
b79cb653 ST |
69 | /* The Demod/Tuner can't easily provide these, we cache them */ |
70 | u32 currentfreq; | |
71 | u32 currentsymbolrate; | |
72 | }; | |
73 | ||
e3b152bc | 74 | /* Various tuner defaults need to be established for a given symbol rate Sps */ |
93504abf | 75 | static struct cx24123_AGC_val { |
e3b152bc JS |
76 | u32 symbolrate_low; |
77 | u32 symbolrate_high; | |
e3b152bc JS |
78 | u32 VCAprogdata; |
79 | u32 VGAprogdata; | |
a74b51fc | 80 | u32 FILTune; |
e3b152bc JS |
81 | } cx24123_AGC_vals[] = |
82 | { | |
83 | { | |
84 | .symbolrate_low = 1000000, | |
85 | .symbolrate_high = 4999999, | |
a74b51fc VC |
86 | /* the specs recommend other values for VGA offsets, |
87 | but tests show they are wrong */ | |
0e4558ab YP |
88 | .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0, |
89 | .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07, | |
90 | .FILTune = 0x27f /* 0.41 V */ | |
e3b152bc JS |
91 | }, |
92 | { | |
93 | .symbolrate_low = 5000000, | |
94 | .symbolrate_high = 14999999, | |
0e4558ab YP |
95 | .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0, |
96 | .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f, | |
a74b51fc | 97 | .FILTune = 0x317 /* 0.90 V */ |
e3b152bc JS |
98 | }, |
99 | { | |
100 | .symbolrate_low = 15000000, | |
101 | .symbolrate_high = 45000000, | |
0e4558ab YP |
102 | .VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180, |
103 | .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f, | |
104 | .FILTune = 0x145 /* 2.70 V */ | |
e3b152bc JS |
105 | }, |
106 | }; | |
107 | ||
108 | /* | |
109 | * Various tuner defaults need to be established for a given frequency kHz. | |
110 | * fixme: The bounds on the bands do not match the doc in real life. | |
111 | * fixme: Some of them have been moved, other might need adjustment. | |
112 | */ | |
93504abf | 113 | static struct cx24123_bandselect_val { |
e3b152bc JS |
114 | u32 freq_low; |
115 | u32 freq_high; | |
e3b152bc | 116 | u32 VCOdivider; |
e3b152bc JS |
117 | u32 progdata; |
118 | } cx24123_bandselect_vals[] = | |
119 | { | |
70047f9c | 120 | /* band 1 */ |
e3b152bc JS |
121 | { |
122 | .freq_low = 950000, | |
e3b152bc | 123 | .freq_high = 1074999, |
e3b152bc | 124 | .VCOdivider = 4, |
70047f9c | 125 | .progdata = (0 << 19) | (0 << 9) | 0x40, |
e3b152bc | 126 | }, |
70047f9c YP |
127 | |
128 | /* band 2 */ | |
e3b152bc JS |
129 | { |
130 | .freq_low = 1075000, | |
70047f9c YP |
131 | .freq_high = 1177999, |
132 | .VCOdivider = 4, | |
133 | .progdata = (0 << 19) | (0 << 9) | 0x80, | |
e3b152bc | 134 | }, |
70047f9c YP |
135 | |
136 | /* band 3 */ | |
e3b152bc | 137 | { |
70047f9c YP |
138 | .freq_low = 1178000, |
139 | .freq_high = 1295999, | |
e3b152bc | 140 | .VCOdivider = 2, |
70047f9c | 141 | .progdata = (0 << 19) | (1 << 9) | 0x01, |
e3b152bc | 142 | }, |
70047f9c YP |
143 | |
144 | /* band 4 */ | |
e3b152bc | 145 | { |
70047f9c YP |
146 | .freq_low = 1296000, |
147 | .freq_high = 1431999, | |
e3b152bc | 148 | .VCOdivider = 2, |
70047f9c | 149 | .progdata = (0 << 19) | (1 << 9) | 0x02, |
e3b152bc | 150 | }, |
70047f9c YP |
151 | |
152 | /* band 5 */ | |
e3b152bc | 153 | { |
70047f9c YP |
154 | .freq_low = 1432000, |
155 | .freq_high = 1575999, | |
e3b152bc | 156 | .VCOdivider = 2, |
70047f9c | 157 | .progdata = (0 << 19) | (1 << 9) | 0x04, |
e3b152bc | 158 | }, |
70047f9c YP |
159 | |
160 | /* band 6 */ | |
e3b152bc | 161 | { |
70047f9c | 162 | .freq_low = 1576000, |
e3b152bc | 163 | .freq_high = 1717999, |
e3b152bc | 164 | .VCOdivider = 2, |
70047f9c | 165 | .progdata = (0 << 19) | (1 << 9) | 0x08, |
e3b152bc | 166 | }, |
70047f9c YP |
167 | |
168 | /* band 7 */ | |
e3b152bc JS |
169 | { |
170 | .freq_low = 1718000, | |
171 | .freq_high = 1855999, | |
e3b152bc | 172 | .VCOdivider = 2, |
70047f9c | 173 | .progdata = (0 << 19) | (1 << 9) | 0x10, |
e3b152bc | 174 | }, |
70047f9c YP |
175 | |
176 | /* band 8 */ | |
e3b152bc JS |
177 | { |
178 | .freq_low = 1856000, | |
179 | .freq_high = 2035999, | |
e3b152bc | 180 | .VCOdivider = 2, |
70047f9c | 181 | .progdata = (0 << 19) | (1 << 9) | 0x20, |
e3b152bc | 182 | }, |
70047f9c YP |
183 | |
184 | /* band 9 */ | |
e3b152bc JS |
185 | { |
186 | .freq_low = 2036000, | |
70047f9c | 187 | .freq_high = 2150000, |
e3b152bc | 188 | .VCOdivider = 2, |
70047f9c | 189 | .progdata = (0 << 19) | (1 << 9) | 0x40, |
e3b152bc JS |
190 | }, |
191 | }; | |
192 | ||
b79cb653 ST |
193 | static struct { |
194 | u8 reg; | |
195 | u8 data; | |
196 | } cx24123_regdata[] = | |
197 | { | |
198 | {0x00, 0x03}, /* Reset system */ | |
199 | {0x00, 0x00}, /* Clear reset */ | |
0e4558ab YP |
200 | {0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */ |
201 | {0x04, 0x10}, /* MPEG */ | |
202 | {0x05, 0x04}, /* MPEG */ | |
203 | {0x06, 0x31}, /* MPEG (default) */ | |
204 | {0x0b, 0x00}, /* Freq search start point (default) */ | |
205 | {0x0c, 0x00}, /* Demodulator sample gain (default) */ | |
d93f8860 | 206 | {0x0d, 0x7f}, /* Force driver to shift until the maximum (+-10 MHz) */ |
0e4558ab YP |
207 | {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */ |
208 | {0x0f, 0xfe}, /* FEC search mask (all supported codes) */ | |
209 | {0x10, 0x01}, /* Default search inversion, no repeat (default) */ | |
210 | {0x16, 0x00}, /* Enable reading of frequency */ | |
211 | {0x17, 0x01}, /* Enable EsNO Ready Counter */ | |
212 | {0x1c, 0x80}, /* Enable error counter */ | |
213 | {0x20, 0x00}, /* Tuner burst clock rate = 500KHz */ | |
214 | {0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */ | |
215 | {0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */ | |
216 | {0x29, 0x00}, /* DiSEqC LNB_DC off */ | |
217 | {0x2a, 0xb0}, /* DiSEqC Parameters (default) */ | |
218 | {0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */ | |
219 | {0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */ | |
b79cb653 ST |
220 | {0x2d, 0x00}, |
221 | {0x2e, 0x00}, | |
222 | {0x2f, 0x00}, | |
223 | {0x30, 0x00}, | |
224 | {0x31, 0x00}, | |
0e4558ab YP |
225 | {0x32, 0x8c}, /* DiSEqC Parameters (default) */ |
226 | {0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */ | |
b79cb653 | 227 | {0x34, 0x00}, |
0e4558ab YP |
228 | {0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */ |
229 | {0x36, 0x02}, /* DiSEqC Parameters (default) */ | |
230 | {0x37, 0x3a}, /* DiSEqC Parameters (default) */ | |
231 | {0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */ | |
232 | {0x44, 0x00}, /* Constellation (default) */ | |
233 | {0x45, 0x00}, /* Symbol count (default) */ | |
234 | {0x46, 0x0d}, /* Symbol rate estimator on (default) */ | |
18c053b3 | 235 | {0x56, 0xc1}, /* Error Counter = Viterbi BER */ |
0e4558ab | 236 | {0x57, 0xff}, /* Error Counter Window (default) */ |
d93f8860 | 237 | {0x5c, 0x20}, /* Acquisition AFC Expiration window (default is 0x10) */ |
0e4558ab | 238 | {0x67, 0x83}, /* Non-DCII symbol clock */ |
b79cb653 ST |
239 | }; |
240 | ||
ca06fa79 PB |
241 | static int cx24123_i2c_writereg(struct cx24123_state *state, |
242 | u8 i2c_addr, int reg, int data) | |
b79cb653 ST |
243 | { |
244 | u8 buf[] = { reg, data }; | |
ca06fa79 PB |
245 | struct i2c_msg msg = { |
246 | .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2 | |
247 | }; | |
b79cb653 ST |
248 | int err; |
249 | ||
ca06fa79 | 250 | /* printk(KERN_DEBUG "wr(%02x): %02x %02x\n", i2c_addr, reg, data); */ |
caf970e0 | 251 | |
93504abf ST |
252 | err = i2c_transfer(state->i2c, &msg, 1); |
253 | if (err != 1) { | |
4bd69e7b MCC |
254 | printk("%s: writereg error(err == %i, reg == 0x%02x, data == 0x%02x)\n", |
255 | __func__, err, reg, data); | |
ca06fa79 | 256 | return err; |
b79cb653 ST |
257 | } |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
ca06fa79 | 262 | static int cx24123_i2c_readreg(struct cx24123_state *state, u8 i2c_addr, u8 reg) |
b79cb653 ST |
263 | { |
264 | int ret; | |
ca06fa79 | 265 | u8 b = 0; |
b79cb653 | 266 | struct i2c_msg msg[] = { |
ca06fa79 PB |
267 | { .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 }, |
268 | { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &b, .len = 1 } | |
b79cb653 ST |
269 | }; |
270 | ||
271 | ret = i2c_transfer(state->i2c, msg, 2); | |
272 | ||
273 | if (ret != 2) { | |
ca06fa79 | 274 | err("%s: reg=0x%x (error=%d)\n", __func__, reg, ret); |
b79cb653 ST |
275 | return ret; |
276 | } | |
277 | ||
ca06fa79 | 278 | /* printk(KERN_DEBUG "rd(%02x): %02x %02x\n", i2c_addr, reg, b); */ |
caf970e0 | 279 | |
ca06fa79 | 280 | return b; |
b79cb653 ST |
281 | } |
282 | ||
ca06fa79 PB |
283 | #define cx24123_readreg(state, reg) \ |
284 | cx24123_i2c_readreg(state, state->config->demod_address, reg) | |
285 | #define cx24123_writereg(state, reg, val) \ | |
286 | cx24123_i2c_writereg(state, state->config->demod_address, reg, val) | |
287 | ||
93504abf | 288 | static int cx24123_set_inversion(struct cx24123_state *state, |
0df289a2 | 289 | enum fe_spectral_inversion inversion) |
b79cb653 | 290 | { |
0e4558ab YP |
291 | u8 nom_reg = cx24123_readreg(state, 0x0e); |
292 | u8 auto_reg = cx24123_readreg(state, 0x10); | |
293 | ||
b79cb653 ST |
294 | switch (inversion) { |
295 | case INVERSION_OFF: | |
ca06fa79 | 296 | dprintk("inversion off\n"); |
0e4558ab YP |
297 | cx24123_writereg(state, 0x0e, nom_reg & ~0x80); |
298 | cx24123_writereg(state, 0x10, auto_reg | 0x80); | |
b79cb653 ST |
299 | break; |
300 | case INVERSION_ON: | |
ca06fa79 | 301 | dprintk("inversion on\n"); |
0e4558ab YP |
302 | cx24123_writereg(state, 0x0e, nom_reg | 0x80); |
303 | cx24123_writereg(state, 0x10, auto_reg | 0x80); | |
b79cb653 ST |
304 | break; |
305 | case INVERSION_AUTO: | |
ca06fa79 | 306 | dprintk("inversion auto\n"); |
0e4558ab | 307 | cx24123_writereg(state, 0x10, auto_reg & ~0x80); |
b79cb653 ST |
308 | break; |
309 | default: | |
310 | return -EINVAL; | |
311 | } | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
93504abf | 316 | static int cx24123_get_inversion(struct cx24123_state *state, |
0df289a2 | 317 | enum fe_spectral_inversion *inversion) |
b79cb653 ST |
318 | { |
319 | u8 val; | |
320 | ||
321 | val = cx24123_readreg(state, 0x1b) >> 7; | |
322 | ||
caf970e0 | 323 | if (val == 0) { |
ca06fa79 | 324 | dprintk("read inversion off\n"); |
e3b152bc | 325 | *inversion = INVERSION_OFF; |
caf970e0 | 326 | } else { |
ca06fa79 | 327 | dprintk("read inversion on\n"); |
e3b152bc | 328 | *inversion = INVERSION_ON; |
caf970e0 | 329 | } |
b79cb653 ST |
330 | |
331 | return 0; | |
332 | } | |
333 | ||
0df289a2 | 334 | static int cx24123_set_fec(struct cx24123_state *state, enum fe_code_rate fec) |
b79cb653 | 335 | { |
0e4558ab YP |
336 | u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07; |
337 | ||
830e4b55 | 338 | if (((int)fec < FEC_NONE) || (fec > FEC_AUTO)) |
e3b152bc | 339 | fec = FEC_AUTO; |
b79cb653 | 340 | |
d12a9b91 | 341 | /* Set the soft decision threshold */ |
93504abf ST |
342 | if (fec == FEC_1_2) |
343 | cx24123_writereg(state, 0x43, | |
344 | cx24123_readreg(state, 0x43) | 0x01); | |
d12a9b91 | 345 | else |
93504abf ST |
346 | cx24123_writereg(state, 0x43, |
347 | cx24123_readreg(state, 0x43) & ~0x01); | |
d12a9b91 | 348 | |
b79cb653 | 349 | switch (fec) { |
b79cb653 | 350 | case FEC_1_2: |
ca06fa79 | 351 | dprintk("set FEC to 1/2\n"); |
0e4558ab YP |
352 | cx24123_writereg(state, 0x0e, nom_reg | 0x01); |
353 | cx24123_writereg(state, 0x0f, 0x02); | |
354 | break; | |
b79cb653 | 355 | case FEC_2_3: |
ca06fa79 | 356 | dprintk("set FEC to 2/3\n"); |
0e4558ab YP |
357 | cx24123_writereg(state, 0x0e, nom_reg | 0x02); |
358 | cx24123_writereg(state, 0x0f, 0x04); | |
359 | break; | |
b79cb653 | 360 | case FEC_3_4: |
ca06fa79 | 361 | dprintk("set FEC to 3/4\n"); |
0e4558ab YP |
362 | cx24123_writereg(state, 0x0e, nom_reg | 0x03); |
363 | cx24123_writereg(state, 0x0f, 0x08); | |
364 | break; | |
365 | case FEC_4_5: | |
ca06fa79 | 366 | dprintk("set FEC to 4/5\n"); |
0e4558ab YP |
367 | cx24123_writereg(state, 0x0e, nom_reg | 0x04); |
368 | cx24123_writereg(state, 0x0f, 0x10); | |
369 | break; | |
370 | case FEC_5_6: | |
ca06fa79 | 371 | dprintk("set FEC to 5/6\n"); |
0e4558ab YP |
372 | cx24123_writereg(state, 0x0e, nom_reg | 0x05); |
373 | cx24123_writereg(state, 0x0f, 0x20); | |
374 | break; | |
375 | case FEC_6_7: | |
ca06fa79 | 376 | dprintk("set FEC to 6/7\n"); |
0e4558ab YP |
377 | cx24123_writereg(state, 0x0e, nom_reg | 0x06); |
378 | cx24123_writereg(state, 0x0f, 0x40); | |
379 | break; | |
380 | case FEC_7_8: | |
ca06fa79 | 381 | dprintk("set FEC to 7/8\n"); |
0e4558ab YP |
382 | cx24123_writereg(state, 0x0e, nom_reg | 0x07); |
383 | cx24123_writereg(state, 0x0f, 0x80); | |
384 | break; | |
b79cb653 | 385 | case FEC_AUTO: |
ca06fa79 | 386 | dprintk("set FEC to auto\n"); |
0e4558ab YP |
387 | cx24123_writereg(state, 0x0f, 0xfe); |
388 | break; | |
b79cb653 ST |
389 | default: |
390 | return -EOPNOTSUPP; | |
391 | } | |
0e4558ab YP |
392 | |
393 | return 0; | |
b79cb653 ST |
394 | } |
395 | ||
0df289a2 | 396 | static int cx24123_get_fec(struct cx24123_state *state, enum fe_code_rate *fec) |
b79cb653 | 397 | { |
e3b152bc | 398 | int ret; |
b79cb653 | 399 | |
93504abf | 400 | ret = cx24123_readreg(state, 0x1b); |
e3b152bc JS |
401 | if (ret < 0) |
402 | return ret; | |
a74b51fc VC |
403 | ret = ret & 0x07; |
404 | ||
405 | switch (ret) { | |
b79cb653 | 406 | case 1: |
e3b152bc JS |
407 | *fec = FEC_1_2; |
408 | break; | |
a74b51fc | 409 | case 2: |
e3b152bc JS |
410 | *fec = FEC_2_3; |
411 | break; | |
a74b51fc | 412 | case 3: |
e3b152bc JS |
413 | *fec = FEC_3_4; |
414 | break; | |
a74b51fc | 415 | case 4: |
e3b152bc JS |
416 | *fec = FEC_4_5; |
417 | break; | |
a74b51fc | 418 | case 5: |
e3b152bc JS |
419 | *fec = FEC_5_6; |
420 | break; | |
a74b51fc VC |
421 | case 6: |
422 | *fec = FEC_6_7; | |
423 | break; | |
b79cb653 | 424 | case 7: |
e3b152bc JS |
425 | *fec = FEC_7_8; |
426 | break; | |
b79cb653 | 427 | default: |
0e4558ab YP |
428 | /* this can happen when there's no lock */ |
429 | *fec = FEC_NONE; | |
b79cb653 ST |
430 | } |
431 | ||
e3b152bc | 432 | return 0; |
b79cb653 ST |
433 | } |
434 | ||
0e4558ab YP |
435 | /* Approximation of closest integer of log2(a/b). It actually gives the |
436 | lowest integer i such that 2^i >= round(a/b) */ | |
437 | static u32 cx24123_int_log2(u32 a, u32 b) | |
438 | { | |
439 | u32 exp, nearest = 0; | |
440 | u32 div = a / b; | |
93504abf ST |
441 | if (a % b >= b / 2) |
442 | ++div; | |
443 | if (div < (1 << 31)) { | |
444 | for (exp = 1; div > exp; nearest++) | |
0e4558ab YP |
445 | exp += exp; |
446 | } | |
447 | return nearest; | |
448 | } | |
449 | ||
93504abf | 450 | static int cx24123_set_symbolrate(struct cx24123_state *state, u32 srate) |
b79cb653 | 451 | { |
752a62b2 MCC |
452 | u64 tmp; |
453 | u32 sample_rate, ratio, sample_gain; | |
a74b51fc VC |
454 | u8 pll_mult; |
455 | ||
456 | /* check if symbol rate is within limits */ | |
dea74869 PB |
457 | if ((srate > state->frontend.ops.info.symbol_rate_max) || |
458 | (srate < state->frontend.ops.info.symbol_rate_min)) | |
1ebcad77 | 459 | return -EOPNOTSUPP; |
a74b51fc VC |
460 | |
461 | /* choose the sampling rate high enough for the required operation, | |
462 | while optimizing the power consumed by the demodulator */ | |
463 | if (srate < (XTAL*2)/2) | |
464 | pll_mult = 2; | |
465 | else if (srate < (XTAL*3)/2) | |
466 | pll_mult = 3; | |
467 | else if (srate < (XTAL*4)/2) | |
468 | pll_mult = 4; | |
469 | else if (srate < (XTAL*5)/2) | |
470 | pll_mult = 5; | |
471 | else if (srate < (XTAL*6)/2) | |
472 | pll_mult = 6; | |
473 | else if (srate < (XTAL*7)/2) | |
474 | pll_mult = 7; | |
475 | else if (srate < (XTAL*8)/2) | |
476 | pll_mult = 8; | |
477 | else | |
478 | pll_mult = 9; | |
479 | ||
480 | ||
481 | sample_rate = pll_mult * XTAL; | |
b79cb653 | 482 | |
752a62b2 | 483 | /* SYSSymbolRate[21:0] = (srate << 23) / sample_rate */ |
a74b51fc | 484 | |
752a62b2 MCC |
485 | tmp = ((u64)srate) << 23; |
486 | do_div(tmp, sample_rate); | |
487 | ratio = (u32) tmp; | |
a74b51fc VC |
488 | |
489 | cx24123_writereg(state, 0x01, pll_mult * 6); | |
490 | ||
93504abf ST |
491 | cx24123_writereg(state, 0x08, (ratio >> 16) & 0x3f); |
492 | cx24123_writereg(state, 0x09, (ratio >> 8) & 0xff); | |
493 | cx24123_writereg(state, 0x0a, ratio & 0xff); | |
a74b51fc | 494 | |
0e4558ab YP |
495 | /* also set the demodulator sample gain */ |
496 | sample_gain = cx24123_int_log2(sample_rate, srate); | |
497 | tmp = cx24123_readreg(state, 0x0c) & ~0xe0; | |
498 | cx24123_writereg(state, 0x0c, tmp | sample_gain << 5); | |
499 | ||
ca06fa79 PB |
500 | dprintk("srate=%d, ratio=0x%08x, sample_rate=%i sample_gain=%d\n", |
501 | srate, ratio, sample_rate, sample_gain); | |
b79cb653 ST |
502 | |
503 | return 0; | |
504 | } | |
505 | ||
506 | /* | |
93504abf ST |
507 | * Based on the required frequency and symbolrate, the tuner AGC has |
508 | * to be configured and the correct band selected. | |
509 | * Calculate those values. | |
b79cb653 | 510 | */ |
a73efc05 | 511 | static int cx24123_pll_calculate(struct dvb_frontend *fe) |
b79cb653 | 512 | { |
a73efc05 | 513 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
b79cb653 | 514 | struct cx24123_state *state = fe->demodulator_priv; |
e3b152bc JS |
515 | u32 ndiv = 0, adiv = 0, vco_div = 0; |
516 | int i = 0; | |
a74b51fc | 517 | int pump = 2; |
70047f9c | 518 | int band = 0; |
0496daa7 | 519 | int num_bands = ARRAY_SIZE(cx24123_bandselect_vals); |
93504abf ST |
520 | struct cx24123_bandselect_val *bsv = NULL; |
521 | struct cx24123_AGC_val *agcv = NULL; | |
b79cb653 ST |
522 | |
523 | /* Defaults for low freq, low rate */ | |
524 | state->VCAarg = cx24123_AGC_vals[0].VCAprogdata; | |
525 | state->VGAarg = cx24123_AGC_vals[0].VGAprogdata; | |
526 | state->bandselectarg = cx24123_bandselect_vals[0].progdata; | |
527 | vco_div = cx24123_bandselect_vals[0].VCOdivider; | |
528 | ||
93504abf ST |
529 | /* For the given symbol rate, determine the VCA, VGA and |
530 | * FILTUNE programming bits */ | |
531 | for (i = 0; i < ARRAY_SIZE(cx24123_AGC_vals); i++) { | |
532 | agcv = &cx24123_AGC_vals[i]; | |
a73efc05 MCC |
533 | if ((agcv->symbolrate_low <= p->symbol_rate) && |
534 | (agcv->symbolrate_high >= p->symbol_rate)) { | |
93504abf ST |
535 | state->VCAarg = agcv->VCAprogdata; |
536 | state->VGAarg = agcv->VGAprogdata; | |
537 | state->FILTune = agcv->FILTune; | |
b79cb653 ST |
538 | } |
539 | } | |
540 | ||
70047f9c | 541 | /* determine the band to use */ |
93504abf ST |
542 | if (force_band < 1 || force_band > num_bands) { |
543 | for (i = 0; i < num_bands; i++) { | |
544 | bsv = &cx24123_bandselect_vals[i]; | |
545 | if ((bsv->freq_low <= p->frequency) && | |
546 | (bsv->freq_high >= p->frequency)) | |
70047f9c | 547 | band = i; |
b79cb653 | 548 | } |
93504abf | 549 | } else |
70047f9c YP |
550 | band = force_band - 1; |
551 | ||
552 | state->bandselectarg = cx24123_bandselect_vals[band].progdata; | |
553 | vco_div = cx24123_bandselect_vals[band].VCOdivider; | |
554 | ||
555 | /* determine the charge pump current */ | |
93504abf ST |
556 | if (p->frequency < (cx24123_bandselect_vals[band].freq_low + |
557 | cx24123_bandselect_vals[band].freq_high) / 2) | |
70047f9c YP |
558 | pump = 0x01; |
559 | else | |
560 | pump = 0x02; | |
b79cb653 ST |
561 | |
562 | /* Determine the N/A dividers for the requested lband freq (in kHz). */ | |
93504abf ST |
563 | /* Note: the reference divider R=10, frequency is in KHz, |
564 | * XTAL is in Hz */ | |
565 | ndiv = (((p->frequency * vco_div * 10) / | |
566 | (2 * XTAL / 1000)) / 32) & 0x1ff; | |
567 | adiv = (((p->frequency * vco_div * 10) / | |
568 | (2 * XTAL / 1000)) % 32) & 0x1f; | |
b79cb653 | 569 | |
9b5a4a67 ST |
570 | if (adiv == 0 && ndiv > 0) |
571 | ndiv--; | |
b79cb653 | 572 | |
93504abf ST |
573 | /* control bits 11, refdiv 11, charge pump polarity 1, |
574 | * charge pump current, ndiv, adiv */ | |
575 | state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | | |
576 | (pump << 14) | (ndiv << 5) | adiv; | |
b79cb653 ST |
577 | |
578 | return 0; | |
579 | } | |
580 | ||
581 | /* | |
582 | * Tuner data is 21 bits long, must be left-aligned in data. | |
93504abf ST |
583 | * Tuner cx24109 is written through a dedicated 3wire interface |
584 | * on the demod chip. | |
b79cb653 | 585 | */ |
31b4f32c | 586 | static int cx24123_pll_writereg(struct dvb_frontend *fe, u32 data) |
b79cb653 ST |
587 | { |
588 | struct cx24123_state *state = fe->demodulator_priv; | |
0144f314 | 589 | unsigned long timeout; |
b79cb653 | 590 | |
ca06fa79 | 591 | dprintk("pll writereg called, data=0x%08x\n", data); |
caf970e0 | 592 | |
b79cb653 ST |
593 | /* align the 21 bytes into to bit23 boundary */ |
594 | data = data << 3; | |
595 | ||
596 | /* Reset the demod pll word length to 0x15 bits */ | |
597 | cx24123_writereg(state, 0x21, 0x15); | |
598 | ||
b79cb653 | 599 | /* write the msb 8 bits, wait for the send to be completed */ |
0144f314 | 600 | timeout = jiffies + msecs_to_jiffies(40); |
e3b152bc | 601 | cx24123_writereg(state, 0x22, (data >> 16) & 0xff); |
0144f314 ST |
602 | while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { |
603 | if (time_after(jiffies, timeout)) { | |
ca06fa79 PB |
604 | err("%s: demodulator is not responding, "\ |
605 | "possibly hung, aborting.\n", __func__); | |
b79cb653 ST |
606 | return -EREMOTEIO; |
607 | } | |
0144f314 | 608 | msleep(10); |
b79cb653 ST |
609 | } |
610 | ||
b79cb653 | 611 | /* send another 8 bytes, wait for the send to be completed */ |
0144f314 | 612 | timeout = jiffies + msecs_to_jiffies(40); |
93504abf | 613 | cx24123_writereg(state, 0x22, (data >> 8) & 0xff); |
0144f314 ST |
614 | while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { |
615 | if (time_after(jiffies, timeout)) { | |
ca06fa79 PB |
616 | err("%s: demodulator is not responding, "\ |
617 | "possibly hung, aborting.\n", __func__); | |
b79cb653 ST |
618 | return -EREMOTEIO; |
619 | } | |
0144f314 | 620 | msleep(10); |
b79cb653 ST |
621 | } |
622 | ||
93504abf ST |
623 | /* send the lower 5 bits of this byte, padded with 3 LBB, |
624 | * wait for the send to be completed */ | |
0144f314 | 625 | timeout = jiffies + msecs_to_jiffies(40); |
93504abf | 626 | cx24123_writereg(state, 0x22, (data) & 0xff); |
0144f314 ST |
627 | while ((cx24123_readreg(state, 0x20) & 0x80)) { |
628 | if (time_after(jiffies, timeout)) { | |
ca06fa79 PB |
629 | err("%s: demodulator is not responding," \ |
630 | "possibly hung, aborting.\n", __func__); | |
b79cb653 ST |
631 | return -EREMOTEIO; |
632 | } | |
0144f314 | 633 | msleep(10); |
b79cb653 ST |
634 | } |
635 | ||
636 | /* Trigger the demod to configure the tuner */ | |
637 | cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2); | |
638 | cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd); | |
639 | ||
640 | return 0; | |
641 | } | |
642 | ||
a73efc05 | 643 | static int cx24123_pll_tune(struct dvb_frontend *fe) |
b79cb653 | 644 | { |
a73efc05 | 645 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
b79cb653 | 646 | struct cx24123_state *state = fe->demodulator_priv; |
a74b51fc VC |
647 | u8 val; |
648 | ||
649 | dprintk("frequency=%i\n", p->frequency); | |
b79cb653 | 650 | |
a73efc05 | 651 | if (cx24123_pll_calculate(fe) != 0) { |
f8d5219d | 652 | err("%s: cx24123_pll_calculate failed\n", __func__); |
b79cb653 ST |
653 | return -EINVAL; |
654 | } | |
655 | ||
656 | /* Write the new VCO/VGA */ | |
31b4f32c MCC |
657 | cx24123_pll_writereg(fe, state->VCAarg); |
658 | cx24123_pll_writereg(fe, state->VGAarg); | |
b79cb653 ST |
659 | |
660 | /* Write the new bandselect and pll args */ | |
31b4f32c MCC |
661 | cx24123_pll_writereg(fe, state->bandselectarg); |
662 | cx24123_pll_writereg(fe, state->pllarg); | |
b79cb653 | 663 | |
a74b51fc VC |
664 | /* set the FILTUNE voltage */ |
665 | val = cx24123_readreg(state, 0x28) & ~0x3; | |
666 | cx24123_writereg(state, 0x27, state->FILTune >> 2); | |
667 | cx24123_writereg(state, 0x28, val | (state->FILTune & 0x3)); | |
668 | ||
ca06fa79 PB |
669 | dprintk("pll tune VCA=%d, band=%d, pll=%d\n", state->VCAarg, |
670 | state->bandselectarg, state->pllarg); | |
caf970e0 | 671 | |
b79cb653 ST |
672 | return 0; |
673 | } | |
674 | ||
ca06fa79 PB |
675 | |
676 | /* | |
677 | * 0x23: | |
678 | * [7:7] = BTI enabled | |
679 | * [6:6] = I2C repeater enabled | |
680 | * [5:5] = I2C repeater start | |
681 | * [0:0] = BTI start | |
682 | */ | |
683 | ||
684 | /* mode == 1 -> i2c-repeater, 0 -> bti */ | |
685 | static int cx24123_repeater_mode(struct cx24123_state *state, u8 mode, u8 start) | |
686 | { | |
687 | u8 r = cx24123_readreg(state, 0x23) & 0x1e; | |
688 | if (mode) | |
689 | r |= (1 << 6) | (start << 5); | |
690 | else | |
691 | r |= (1 << 7) | (start); | |
692 | return cx24123_writereg(state, 0x23, r); | |
693 | } | |
694 | ||
93504abf | 695 | static int cx24123_initfe(struct dvb_frontend *fe) |
b79cb653 ST |
696 | { |
697 | struct cx24123_state *state = fe->demodulator_priv; | |
698 | int i; | |
699 | ||
ca06fa79 | 700 | dprintk("init frontend\n"); |
caf970e0 | 701 | |
b79cb653 | 702 | /* Configure the demod to a good set of defaults */ |
0496daa7 | 703 | for (i = 0; i < ARRAY_SIZE(cx24123_regdata); i++) |
93504abf ST |
704 | cx24123_writereg(state, cx24123_regdata[i].reg, |
705 | cx24123_regdata[i].data); | |
b79cb653 | 706 | |
ef76856d | 707 | /* Set the LNB polarity */ |
93504abf ST |
708 | if (state->config->lnb_polarity) |
709 | cx24123_writereg(state, 0x32, | |
710 | cx24123_readreg(state, 0x32) | 0x02); | |
ef76856d | 711 | |
ca06fa79 | 712 | if (state->config->dont_use_pll) |
93504abf | 713 | cx24123_repeater_mode(state, 1, 0); |
ca06fa79 | 714 | |
b79cb653 ST |
715 | return 0; |
716 | } | |
717 | ||
93504abf | 718 | static int cx24123_set_voltage(struct dvb_frontend *fe, |
0df289a2 | 719 | enum fe_sec_voltage voltage) |
b79cb653 ST |
720 | { |
721 | struct cx24123_state *state = fe->demodulator_priv; | |
722 | u8 val; | |
723 | ||
cd20ca9f | 724 | val = cx24123_readreg(state, 0x29) & ~0x40; |
1c956a3a | 725 | |
cd20ca9f AQ |
726 | switch (voltage) { |
727 | case SEC_VOLTAGE_13: | |
ca06fa79 | 728 | dprintk("setting voltage 13V\n"); |
ccd214b2 | 729 | return cx24123_writereg(state, 0x29, val & 0x7f); |
cd20ca9f | 730 | case SEC_VOLTAGE_18: |
ca06fa79 | 731 | dprintk("setting voltage 18V\n"); |
ccd214b2 | 732 | return cx24123_writereg(state, 0x29, val | 0x80); |
ef76856d YP |
733 | case SEC_VOLTAGE_OFF: |
734 | /* already handled in cx88-dvb */ | |
735 | return 0; | |
cd20ca9f AQ |
736 | default: |
737 | return -EINVAL; | |
2028c71d | 738 | } |
1c956a3a VC |
739 | |
740 | return 0; | |
b79cb653 ST |
741 | } |
742 | ||
dce1dfc2 YP |
743 | /* wait for diseqc queue to become ready (or timeout) */ |
744 | static void cx24123_wait_for_diseqc(struct cx24123_state *state) | |
745 | { | |
746 | unsigned long timeout = jiffies + msecs_to_jiffies(200); | |
747 | while (!(cx24123_readreg(state, 0x29) & 0x40)) { | |
93504abf | 748 | if (time_after(jiffies, timeout)) { |
ca06fa79 PB |
749 | err("%s: diseqc queue not ready, " \ |
750 | "command may be lost.\n", __func__); | |
dce1dfc2 YP |
751 | break; |
752 | } | |
753 | msleep(10); | |
754 | } | |
755 | } | |
756 | ||
93504abf ST |
757 | static int cx24123_send_diseqc_msg(struct dvb_frontend *fe, |
758 | struct dvb_diseqc_master_cmd *cmd) | |
b79cb653 | 759 | { |
a74b51fc | 760 | struct cx24123_state *state = fe->demodulator_priv; |
cd20ca9f | 761 | int i, val, tone; |
a74b51fc | 762 | |
ca06fa79 | 763 | dprintk("\n"); |
b79cb653 | 764 | |
cd20ca9f AQ |
765 | /* stop continuous tone if enabled */ |
766 | tone = cx24123_readreg(state, 0x29); | |
767 | if (tone & 0x10) | |
768 | cx24123_writereg(state, 0x29, tone & ~0x50); | |
a74b51fc | 769 | |
dce1dfc2 YP |
770 | /* wait for diseqc queue ready */ |
771 | cx24123_wait_for_diseqc(state); | |
772 | ||
a74b51fc | 773 | /* select tone mode */ |
cd20ca9f | 774 | cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb); |
a74b51fc VC |
775 | |
776 | for (i = 0; i < cmd->msg_len; i++) | |
777 | cx24123_writereg(state, 0x2C + i, cmd->msg[i]); | |
778 | ||
779 | val = cx24123_readreg(state, 0x29); | |
93504abf ST |
780 | cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40) | |
781 | ((cmd->msg_len-3) & 3)); | |
a74b51fc | 782 | |
dce1dfc2 YP |
783 | /* wait for diseqc message to finish sending */ |
784 | cx24123_wait_for_diseqc(state); | |
a74b51fc | 785 | |
cd20ca9f | 786 | /* restart continuous tone if enabled */ |
93504abf | 787 | if (tone & 0x10) |
cd20ca9f | 788 | cx24123_writereg(state, 0x29, tone & ~0x40); |
cd20ca9f | 789 | |
a74b51fc VC |
790 | return 0; |
791 | } | |
792 | ||
93504abf | 793 | static int cx24123_diseqc_send_burst(struct dvb_frontend *fe, |
0df289a2 | 794 | enum fe_sec_mini_cmd burst) |
a74b51fc VC |
795 | { |
796 | struct cx24123_state *state = fe->demodulator_priv; | |
cd20ca9f | 797 | int val, tone; |
a74b51fc | 798 | |
ca06fa79 | 799 | dprintk("\n"); |
a74b51fc | 800 | |
cd20ca9f AQ |
801 | /* stop continuous tone if enabled */ |
802 | tone = cx24123_readreg(state, 0x29); | |
803 | if (tone & 0x10) | |
804 | cx24123_writereg(state, 0x29, tone & ~0x50); | |
a74b51fc | 805 | |
cd20ca9f | 806 | /* wait for diseqc queue ready */ |
dce1dfc2 YP |
807 | cx24123_wait_for_diseqc(state); |
808 | ||
a74b51fc | 809 | /* select tone mode */ |
cd20ca9f AQ |
810 | cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) | 0x4); |
811 | msleep(30); | |
a74b51fc | 812 | val = cx24123_readreg(state, 0x29); |
a74b51fc VC |
813 | if (burst == SEC_MINI_A) |
814 | cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x00)); | |
815 | else if (burst == SEC_MINI_B) | |
816 | cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x08)); | |
817 | else | |
818 | return -EINVAL; | |
819 | ||
dce1dfc2 | 820 | cx24123_wait_for_diseqc(state); |
cd20ca9f | 821 | cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb); |
a74b51fc | 822 | |
cd20ca9f | 823 | /* restart continuous tone if enabled */ |
93504abf | 824 | if (tone & 0x10) |
cd20ca9f | 825 | cx24123_writereg(state, 0x29, tone & ~0x40); |
93504abf | 826 | |
a74b51fc | 827 | return 0; |
b79cb653 ST |
828 | } |
829 | ||
0df289a2 | 830 | static int cx24123_read_status(struct dvb_frontend *fe, enum fe_status *status) |
b79cb653 ST |
831 | { |
832 | struct cx24123_state *state = fe->demodulator_priv; | |
b79cb653 | 833 | int sync = cx24123_readreg(state, 0x14); |
b79cb653 ST |
834 | |
835 | *status = 0; | |
ca06fa79 PB |
836 | if (state->config->dont_use_pll) { |
837 | u32 tun_status = 0; | |
838 | if (fe->ops.tuner_ops.get_status) | |
839 | fe->ops.tuner_ops.get_status(fe, &tun_status); | |
840 | if (tun_status & TUNER_STATUS_LOCKED) | |
841 | *status |= FE_HAS_SIGNAL; | |
842 | } else { | |
843 | int lock = cx24123_readreg(state, 0x20); | |
844 | if (lock & 0x01) | |
845 | *status |= FE_HAS_SIGNAL; | |
846 | } | |
847 | ||
a74b51fc | 848 | if (sync & 0x02) |
d93f8860 | 849 | *status |= FE_HAS_CARRIER; /* Phase locked */ |
b79cb653 ST |
850 | if (sync & 0x04) |
851 | *status |= FE_HAS_VITERBI; | |
d93f8860 MCC |
852 | |
853 | /* Reed-Solomon Status */ | |
b79cb653 | 854 | if (sync & 0x08) |
a74b51fc | 855 | *status |= FE_HAS_SYNC; |
b79cb653 | 856 | if (sync & 0x80) |
d93f8860 | 857 | *status |= FE_HAS_LOCK; /*Full Sync */ |
b79cb653 ST |
858 | |
859 | return 0; | |
860 | } | |
861 | ||
862 | /* | |
93504abf ST |
863 | * Configured to return the measurement of errors in blocks, |
864 | * because no UCBLOCKS value is available, so this value doubles up | |
865 | * to satisfy both measurements. | |
b79cb653 | 866 | */ |
ca06fa79 | 867 | static int cx24123_read_ber(struct dvb_frontend *fe, u32 *ber) |
b79cb653 ST |
868 | { |
869 | struct cx24123_state *state = fe->demodulator_priv; | |
870 | ||
18c053b3 YP |
871 | /* The true bit error rate is this value divided by |
872 | the window size (set as 256 * 255) */ | |
873 | *ber = ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) | | |
b79cb653 | 874 | (cx24123_readreg(state, 0x1d) << 8 | |
18c053b3 | 875 | cx24123_readreg(state, 0x1e)); |
caf970e0 | 876 | |
ca06fa79 | 877 | dprintk("BER = %d\n", *ber); |
b79cb653 ST |
878 | |
879 | return 0; | |
880 | } | |
881 | ||
ca06fa79 PB |
882 | static int cx24123_read_signal_strength(struct dvb_frontend *fe, |
883 | u16 *signal_strength) | |
b79cb653 ST |
884 | { |
885 | struct cx24123_state *state = fe->demodulator_priv; | |
d93f8860 | 886 | |
93504abf ST |
887 | /* larger = better */ |
888 | *signal_strength = cx24123_readreg(state, 0x3b) << 8; | |
b79cb653 | 889 | |
ca06fa79 | 890 | dprintk("Signal strength = %d\n", *signal_strength); |
caf970e0 | 891 | |
b79cb653 ST |
892 | return 0; |
893 | } | |
894 | ||
ca06fa79 | 895 | static int cx24123_read_snr(struct dvb_frontend *fe, u16 *snr) |
b79cb653 ST |
896 | { |
897 | struct cx24123_state *state = fe->demodulator_priv; | |
b79cb653 | 898 | |
18c053b3 YP |
899 | /* Inverted raw Es/N0 count, totally bogus but better than the |
900 | BER threshold. */ | |
901 | *snr = 65535 - (((u16)cx24123_readreg(state, 0x18) << 8) | | |
902 | (u16)cx24123_readreg(state, 0x19)); | |
caf970e0 | 903 | |
ca06fa79 | 904 | dprintk("read S/N index = %d\n", *snr); |
caf970e0 | 905 | |
b79cb653 ST |
906 | return 0; |
907 | } | |
908 | ||
a73efc05 | 909 | static int cx24123_set_frontend(struct dvb_frontend *fe) |
b79cb653 ST |
910 | { |
911 | struct cx24123_state *state = fe->demodulator_priv; | |
a73efc05 | 912 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
b79cb653 | 913 | |
ca06fa79 | 914 | dprintk("\n"); |
caf970e0 | 915 | |
b79cb653 ST |
916 | if (state->config->set_ts_params) |
917 | state->config->set_ts_params(fe, 0); | |
918 | ||
93504abf | 919 | state->currentfreq = p->frequency; |
a73efc05 | 920 | state->currentsymbolrate = p->symbol_rate; |
b79cb653 ST |
921 | |
922 | cx24123_set_inversion(state, p->inversion); | |
a73efc05 MCC |
923 | cx24123_set_fec(state, p->fec_inner); |
924 | cx24123_set_symbolrate(state, p->symbol_rate); | |
ca06fa79 PB |
925 | |
926 | if (!state->config->dont_use_pll) | |
a73efc05 | 927 | cx24123_pll_tune(fe); |
ca06fa79 | 928 | else if (fe->ops.tuner_ops.set_params) |
14d24d14 | 929 | fe->ops.tuner_ops.set_params(fe); |
ca06fa79 PB |
930 | else |
931 | err("it seems I don't have a tuner..."); | |
b79cb653 | 932 | |
25985edc | 933 | /* Enable automatic acquisition and reset cycle */ |
e3b152bc | 934 | cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07)); |
b79cb653 ST |
935 | cx24123_writereg(state, 0x00, 0x10); |
936 | cx24123_writereg(state, 0x00, 0); | |
937 | ||
ca06fa79 PB |
938 | if (state->config->agc_callback) |
939 | state->config->agc_callback(fe); | |
940 | ||
b79cb653 ST |
941 | return 0; |
942 | } | |
943 | ||
7e3e68bc MCC |
944 | static int cx24123_get_frontend(struct dvb_frontend *fe, |
945 | struct dtv_frontend_properties *p) | |
b79cb653 ST |
946 | { |
947 | struct cx24123_state *state = fe->demodulator_priv; | |
948 | ||
ca06fa79 | 949 | dprintk("\n"); |
caf970e0 | 950 | |
b79cb653 | 951 | if (cx24123_get_inversion(state, &p->inversion) != 0) { |
ca06fa79 | 952 | err("%s: Failed to get inversion status\n", __func__); |
b79cb653 ST |
953 | return -EREMOTEIO; |
954 | } | |
a73efc05 | 955 | if (cx24123_get_fec(state, &p->fec_inner) != 0) { |
ca06fa79 | 956 | err("%s: Failed to get fec status\n", __func__); |
b79cb653 ST |
957 | return -EREMOTEIO; |
958 | } | |
959 | p->frequency = state->currentfreq; | |
a73efc05 | 960 | p->symbol_rate = state->currentsymbolrate; |
b79cb653 ST |
961 | |
962 | return 0; | |
963 | } | |
964 | ||
0df289a2 | 965 | static int cx24123_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone) |
b79cb653 ST |
966 | { |
967 | struct cx24123_state *state = fe->demodulator_priv; | |
968 | u8 val; | |
969 | ||
cd20ca9f AQ |
970 | /* wait for diseqc queue ready */ |
971 | cx24123_wait_for_diseqc(state); | |
1c956a3a | 972 | |
cd20ca9f | 973 | val = cx24123_readreg(state, 0x29) & ~0x40; |
1c956a3a | 974 | |
cd20ca9f AQ |
975 | switch (tone) { |
976 | case SEC_TONE_ON: | |
ca06fa79 | 977 | dprintk("setting tone on\n"); |
cd20ca9f AQ |
978 | return cx24123_writereg(state, 0x29, val | 0x10); |
979 | case SEC_TONE_OFF: | |
ca06fa79 | 980 | dprintk("setting tone off\n"); |
cd20ca9f AQ |
981 | return cx24123_writereg(state, 0x29, val & 0xef); |
982 | default: | |
ca06fa79 | 983 | err("CASE reached default with tone=%d\n", tone); |
cd20ca9f | 984 | return -EINVAL; |
b79cb653 | 985 | } |
1c956a3a VC |
986 | |
987 | return 0; | |
b79cb653 ST |
988 | } |
989 | ||
93504abf | 990 | static int cx24123_tune(struct dvb_frontend *fe, |
7e072221 | 991 | bool re_tune, |
174ff219 | 992 | unsigned int mode_flags, |
3ea96615 | 993 | unsigned int *delay, |
0df289a2 | 994 | enum fe_status *status) |
174ff219 YP |
995 | { |
996 | int retval = 0; | |
997 | ||
7e072221 | 998 | if (re_tune) |
a73efc05 | 999 | retval = cx24123_set_frontend(fe); |
174ff219 YP |
1000 | |
1001 | if (!(mode_flags & FE_TUNE_MODE_ONESHOT)) | |
1002 | cx24123_read_status(fe, status); | |
1003 | *delay = HZ/10; | |
1004 | ||
1005 | return retval; | |
1006 | } | |
1007 | ||
8d718e53 | 1008 | static enum dvbfe_algo cx24123_get_algo(struct dvb_frontend *fe) |
174ff219 | 1009 | { |
27460adc | 1010 | return DVBFE_ALGO_HW; |
174ff219 YP |
1011 | } |
1012 | ||
93504abf | 1013 | static void cx24123_release(struct dvb_frontend *fe) |
b79cb653 | 1014 | { |
93504abf | 1015 | struct cx24123_state *state = fe->demodulator_priv; |
ca06fa79 PB |
1016 | dprintk("\n"); |
1017 | i2c_del_adapter(&state->tuner_i2c_adapter); | |
b79cb653 ST |
1018 | kfree(state); |
1019 | } | |
1020 | ||
ca06fa79 PB |
1021 | static int cx24123_tuner_i2c_tuner_xfer(struct i2c_adapter *i2c_adap, |
1022 | struct i2c_msg msg[], int num) | |
1023 | { | |
1024 | struct cx24123_state *state = i2c_get_adapdata(i2c_adap); | |
1025 | /* this repeater closes after the first stop */ | |
93504abf | 1026 | cx24123_repeater_mode(state, 1, 1); |
ca06fa79 PB |
1027 | return i2c_transfer(state->i2c, msg, num); |
1028 | } | |
1029 | ||
1030 | static u32 cx24123_tuner_i2c_func(struct i2c_adapter *adapter) | |
1031 | { | |
1032 | return I2C_FUNC_I2C; | |
1033 | } | |
1034 | ||
6ac8b81e | 1035 | static const struct i2c_algorithm cx24123_tuner_i2c_algo = { |
ca06fa79 PB |
1036 | .master_xfer = cx24123_tuner_i2c_tuner_xfer, |
1037 | .functionality = cx24123_tuner_i2c_func, | |
1038 | }; | |
1039 | ||
1040 | struct i2c_adapter * | |
1041 | cx24123_get_tuner_i2c_adapter(struct dvb_frontend *fe) | |
1042 | { | |
1043 | struct cx24123_state *state = fe->demodulator_priv; | |
1044 | return &state->tuner_i2c_adapter; | |
1045 | } | |
1046 | EXPORT_SYMBOL(cx24123_get_tuner_i2c_adapter); | |
1047 | ||
bd336e63 | 1048 | static const struct dvb_frontend_ops cx24123_ops; |
b79cb653 | 1049 | |
93504abf ST |
1050 | struct dvb_frontend *cx24123_attach(const struct cx24123_config *config, |
1051 | struct i2c_adapter *i2c) | |
b79cb653 | 1052 | { |
8420fa7e | 1053 | /* allocate memory for the internal state */ |
ca06fa79 PB |
1054 | struct cx24123_state *state = |
1055 | kzalloc(sizeof(struct cx24123_state), GFP_KERNEL); | |
b79cb653 | 1056 | |
ca06fa79 | 1057 | dprintk("\n"); |
b79cb653 | 1058 | if (state == NULL) { |
8420fa7e | 1059 | err("Unable to kzalloc\n"); |
b79cb653 ST |
1060 | goto error; |
1061 | } | |
1062 | ||
1063 | /* setup the state */ | |
1064 | state->config = config; | |
1065 | state->i2c = i2c; | |
b79cb653 ST |
1066 | |
1067 | /* check if the demod is there */ | |
ca06fa79 PB |
1068 | state->demod_rev = cx24123_readreg(state, 0x00); |
1069 | switch (state->demod_rev) { | |
93504abf ST |
1070 | case 0xe1: |
1071 | info("detected CX24123C\n"); | |
1072 | break; | |
1073 | case 0xd1: | |
1074 | info("detected CX24123\n"); | |
1075 | break; | |
ca06fa79 PB |
1076 | default: |
1077 | err("wrong demod revision: %x\n", state->demod_rev); | |
b79cb653 ST |
1078 | goto error; |
1079 | } | |
1080 | ||
1081 | /* create dvb_frontend */ | |
93504abf ST |
1082 | memcpy(&state->frontend.ops, &cx24123_ops, |
1083 | sizeof(struct dvb_frontend_ops)); | |
b79cb653 | 1084 | state->frontend.demodulator_priv = state; |
ca06fa79 | 1085 | |
93504abf ST |
1086 | /* create tuner i2c adapter */ |
1087 | if (config->dont_use_pll) | |
1088 | cx24123_repeater_mode(state, 1, 0); | |
ca06fa79 | 1089 | |
c0decac1 | 1090 | strscpy(state->tuner_i2c_adapter.name, "CX24123 tuner I2C bus", |
1d434012 | 1091 | sizeof(state->tuner_i2c_adapter.name)); |
ca06fa79 PB |
1092 | state->tuner_i2c_adapter.algo = &cx24123_tuner_i2c_algo; |
1093 | state->tuner_i2c_adapter.algo_data = NULL; | |
fdc6b388 | 1094 | state->tuner_i2c_adapter.dev.parent = i2c->dev.parent; |
ca06fa79 PB |
1095 | i2c_set_adapdata(&state->tuner_i2c_adapter, state); |
1096 | if (i2c_add_adapter(&state->tuner_i2c_adapter) < 0) { | |
93504abf | 1097 | err("tuner i2c bus could not be initialized\n"); |
ca06fa79 PB |
1098 | goto error; |
1099 | } | |
1100 | ||
b79cb653 ST |
1101 | return &state->frontend; |
1102 | ||
1103 | error: | |
1104 | kfree(state); | |
1105 | ||
1106 | return NULL; | |
1107 | } | |
93504abf | 1108 | EXPORT_SYMBOL(cx24123_attach); |
b79cb653 | 1109 | |
bd336e63 | 1110 | static const struct dvb_frontend_ops cx24123_ops = { |
a73efc05 | 1111 | .delsys = { SYS_DVBS }, |
b79cb653 ST |
1112 | .info = { |
1113 | .name = "Conexant CX24123/CX24109", | |
f1b1eabf MCC |
1114 | .frequency_min_hz = 950 * MHz, |
1115 | .frequency_max_hz = 2150 * MHz, | |
1116 | .frequency_stepsize_hz = 1011 * kHz, | |
1117 | .frequency_tolerance_hz = 5 * MHz, | |
b79cb653 ST |
1118 | .symbol_rate_min = 1000000, |
1119 | .symbol_rate_max = 45000000, | |
1120 | .caps = FE_CAN_INVERSION_AUTO | | |
1121 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
0e4558ab YP |
1122 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | |
1123 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
b79cb653 ST |
1124 | FE_CAN_QPSK | FE_CAN_RECOVER |
1125 | }, | |
1126 | ||
1127 | .release = cx24123_release, | |
1128 | ||
1129 | .init = cx24123_initfe, | |
a73efc05 MCC |
1130 | .set_frontend = cx24123_set_frontend, |
1131 | .get_frontend = cx24123_get_frontend, | |
b79cb653 ST |
1132 | .read_status = cx24123_read_status, |
1133 | .read_ber = cx24123_read_ber, | |
1134 | .read_signal_strength = cx24123_read_signal_strength, | |
1135 | .read_snr = cx24123_read_snr, | |
b79cb653 | 1136 | .diseqc_send_master_cmd = cx24123_send_diseqc_msg, |
a74b51fc | 1137 | .diseqc_send_burst = cx24123_diseqc_send_burst, |
b79cb653 ST |
1138 | .set_tone = cx24123_set_tone, |
1139 | .set_voltage = cx24123_set_voltage, | |
174ff219 YP |
1140 | .tune = cx24123_tune, |
1141 | .get_frontend_algo = cx24123_get_algo, | |
b79cb653 ST |
1142 | }; |
1143 | ||
ca06fa79 PB |
1144 | MODULE_DESCRIPTION("DVB Frontend module for Conexant " \ |
1145 | "CX24123/CX24109/CX24113 hardware"); | |
b79cb653 ST |
1146 | MODULE_AUTHOR("Steven Toth"); |
1147 | MODULE_LICENSE("GPL"); | |
1148 |