Commit | Line | Data |
---|---|---|
74ba9207 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
0d788680 LA |
2 | /* |
3 | Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver | |
4 | ||
5 | Copyright (C) 2013 Luis Alves <ljalvs@gmail.com> | |
6 | July, 6th 2013 | |
7 | First release based on cx24116 driver by: | |
8 | Steven Toth and Georg Acher, Darron Broad, Igor Liplianin | |
9 | Cards currently supported: | |
10 | TBS6980 - Dual DVBS/S2 PCIe card | |
11 | TBS6981 - Dual DVBS/S2 PCIe card | |
12 | ||
0d788680 LA |
13 | */ |
14 | ||
15 | #include <linux/slab.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/moduleparam.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/firmware.h> | |
21 | ||
d10e8280 | 22 | #include "tuner-i2c.h" |
fada1935 | 23 | #include <media/dvb_frontend.h> |
0d788680 LA |
24 | #include "cx24117.h" |
25 | ||
26 | ||
27 | #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw" | |
28 | #define CX24117_SEARCH_RANGE_KHZ 5000 | |
29 | ||
30 | /* known registers */ | |
31 | #define CX24117_REG_COMMAND (0x00) /* command buffer */ | |
32 | #define CX24117_REG_EXECUTE (0x1f) /* execute command */ | |
33 | ||
34 | #define CX24117_REG_FREQ3_0 (0x34) /* frequency */ | |
35 | #define CX24117_REG_FREQ2_0 (0x35) | |
36 | #define CX24117_REG_FREQ1_0 (0x36) | |
37 | #define CX24117_REG_STATE0 (0x39) | |
38 | #define CX24117_REG_SSTATUS0 (0x3a) /* demod0 signal high / status */ | |
39 | #define CX24117_REG_SIGNAL0 (0x3b) | |
40 | #define CX24117_REG_FREQ5_0 (0x3c) /* +-freq */ | |
41 | #define CX24117_REG_FREQ6_0 (0x3d) | |
42 | #define CX24117_REG_SRATE2_0 (0x3e) /* +- 1000 * srate */ | |
43 | #define CX24117_REG_SRATE1_0 (0x3f) | |
44 | #define CX24117_REG_QUALITY2_0 (0x40) | |
45 | #define CX24117_REG_QUALITY1_0 (0x41) | |
46 | ||
47 | #define CX24117_REG_BER4_0 (0x47) | |
48 | #define CX24117_REG_BER3_0 (0x48) | |
49 | #define CX24117_REG_BER2_0 (0x49) | |
50 | #define CX24117_REG_BER1_0 (0x4a) | |
51 | #define CX24117_REG_DVBS_UCB2_0 (0x4b) | |
52 | #define CX24117_REG_DVBS_UCB1_0 (0x4c) | |
53 | #define CX24117_REG_DVBS2_UCB2_0 (0x50) | |
54 | #define CX24117_REG_DVBS2_UCB1_0 (0x51) | |
55 | #define CX24117_REG_QSTATUS0 (0x93) | |
56 | #define CX24117_REG_CLKDIV0 (0xe6) | |
57 | #define CX24117_REG_RATEDIV0 (0xf0) | |
58 | ||
59 | ||
60 | #define CX24117_REG_FREQ3_1 (0x55) /* frequency */ | |
61 | #define CX24117_REG_FREQ2_1 (0x56) | |
62 | #define CX24117_REG_FREQ1_1 (0x57) | |
63 | #define CX24117_REG_STATE1 (0x5a) | |
64 | #define CX24117_REG_SSTATUS1 (0x5b) /* demod1 signal high / status */ | |
65 | #define CX24117_REG_SIGNAL1 (0x5c) | |
66 | #define CX24117_REG_FREQ5_1 (0x5d) /* +- freq */ | |
67 | #define CX24117_REG_FREQ4_1 (0x5e) | |
68 | #define CX24117_REG_SRATE2_1 (0x5f) | |
69 | #define CX24117_REG_SRATE1_1 (0x60) | |
70 | #define CX24117_REG_QUALITY2_1 (0x61) | |
71 | #define CX24117_REG_QUALITY1_1 (0x62) | |
72 | #define CX24117_REG_BER4_1 (0x68) | |
73 | #define CX24117_REG_BER3_1 (0x69) | |
74 | #define CX24117_REG_BER2_1 (0x6a) | |
75 | #define CX24117_REG_BER1_1 (0x6b) | |
76 | #define CX24117_REG_DVBS_UCB2_1 (0x6c) | |
77 | #define CX24117_REG_DVBS_UCB1_1 (0x6d) | |
78 | #define CX24117_REG_DVBS2_UCB2_1 (0x71) | |
79 | #define CX24117_REG_DVBS2_UCB1_1 (0x72) | |
80 | #define CX24117_REG_QSTATUS1 (0x9f) | |
81 | #define CX24117_REG_CLKDIV1 (0xe7) | |
82 | #define CX24117_REG_RATEDIV1 (0xf1) | |
83 | ||
84 | ||
85 | /* arg buffer size */ | |
86 | #define CX24117_ARGLEN (0x1e) | |
87 | ||
88 | /* rolloff */ | |
89 | #define CX24117_ROLLOFF_020 (0x00) | |
90 | #define CX24117_ROLLOFF_025 (0x01) | |
91 | #define CX24117_ROLLOFF_035 (0x02) | |
92 | ||
93 | /* pilot bit */ | |
94 | #define CX24117_PILOT_OFF (0x00) | |
95 | #define CX24117_PILOT_ON (0x40) | |
96 | #define CX24117_PILOT_AUTO (0x80) | |
97 | ||
98 | /* signal status */ | |
99 | #define CX24117_HAS_SIGNAL (0x01) | |
100 | #define CX24117_HAS_CARRIER (0x02) | |
101 | #define CX24117_HAS_VITERBI (0x04) | |
102 | #define CX24117_HAS_SYNCLOCK (0x08) | |
103 | #define CX24117_STATUS_MASK (0x0f) | |
104 | #define CX24117_SIGNAL_MASK (0xc0) | |
105 | ||
106 | ||
107 | /* arg offset for DiSEqC */ | |
108 | #define CX24117_DISEQC_DEMOD (1) | |
109 | #define CX24117_DISEQC_BURST (2) | |
110 | #define CX24117_DISEQC_ARG3_2 (3) /* unknown value=2 */ | |
111 | #define CX24117_DISEQC_ARG4_0 (4) /* unknown value=0 */ | |
112 | #define CX24117_DISEQC_ARG5_0 (5) /* unknown value=0 */ | |
113 | #define CX24117_DISEQC_MSGLEN (6) | |
114 | #define CX24117_DISEQC_MSGOFS (7) | |
115 | ||
116 | /* DiSEqC burst */ | |
117 | #define CX24117_DISEQC_MINI_A (0) | |
118 | #define CX24117_DISEQC_MINI_B (1) | |
119 | ||
120 | ||
121 | #define CX24117_PNE (0) /* 0 disabled / 2 enabled */ | |
122 | #define CX24117_OCC (1) /* 0 disabled / 1 enabled */ | |
123 | ||
124 | ||
125 | enum cmds { | |
9fa7c419 LA |
126 | CMD_SET_VCOFREQ = 0x10, |
127 | CMD_TUNEREQUEST = 0x11, | |
128 | CMD_GLOBAL_MPEGCFG = 0x13, | |
129 | CMD_MPEGCFG = 0x14, | |
130 | CMD_TUNERINIT = 0x15, | |
131 | CMD_GET_SRATE = 0x18, | |
132 | CMD_SET_GOLDCODE = 0x19, | |
133 | CMD_GET_AGCACC = 0x1a, | |
134 | CMD_DEMODINIT = 0x1b, | |
135 | CMD_GETCTLACC = 0x1c, | |
136 | ||
137 | CMD_LNBCONFIG = 0x20, | |
138 | CMD_LNBSEND = 0x21, | |
139 | CMD_LNBDCLEVEL = 0x22, | |
140 | CMD_LNBPCBCONFIG = 0x23, | |
141 | CMD_LNBSENDTONEBST = 0x24, | |
142 | CMD_LNBUPDREPLY = 0x25, | |
143 | ||
144 | CMD_SET_GPIOMODE = 0x30, | |
145 | CMD_SET_GPIOEN = 0x31, | |
146 | CMD_SET_GPIODIR = 0x32, | |
147 | CMD_SET_GPIOOUT = 0x33, | |
148 | CMD_ENABLERSCORR = 0x34, | |
149 | CMD_FWVERSION = 0x35, | |
150 | CMD_SET_SLEEPMODE = 0x36, | |
151 | CMD_BERCTRL = 0x3c, | |
152 | CMD_EVENTCTRL = 0x3d, | |
0d788680 LA |
153 | }; |
154 | ||
d10e8280 LA |
155 | static LIST_HEAD(hybrid_tuner_instance_list); |
156 | static DEFINE_MUTEX(cx24117_list_mutex); | |
157 | ||
0d788680 LA |
158 | /* The Demod/Tuner can't easily provide these, we cache them */ |
159 | struct cx24117_tuning { | |
160 | u32 frequency; | |
161 | u32 symbol_rate; | |
0df289a2 MCC |
162 | enum fe_spectral_inversion inversion; |
163 | enum fe_code_rate fec; | |
0d788680 | 164 | |
0df289a2 MCC |
165 | enum fe_delivery_system delsys; |
166 | enum fe_modulation modulation; | |
167 | enum fe_pilot pilot; | |
168 | enum fe_rolloff rolloff; | |
0d788680 LA |
169 | |
170 | /* Demod values */ | |
171 | u8 fec_val; | |
172 | u8 fec_mask; | |
173 | u8 inversion_val; | |
174 | u8 pilot_val; | |
175 | u8 rolloff_val; | |
176 | }; | |
177 | ||
178 | /* Basic commands that are sent to the firmware */ | |
179 | struct cx24117_cmd { | |
180 | u8 len; | |
181 | u8 args[CX24117_ARGLEN]; | |
182 | }; | |
183 | ||
184 | /* common to both fe's */ | |
185 | struct cx24117_priv { | |
186 | u8 demod_address; | |
187 | struct i2c_adapter *i2c; | |
188 | u8 skip_fw_load; | |
0d788680 | 189 | struct mutex fe_lock; |
d10e8280 LA |
190 | |
191 | /* Used for sharing this struct between demods */ | |
192 | struct tuner_i2c_props i2c_props; | |
193 | struct list_head hybrid_tuner_instance_list; | |
0d788680 LA |
194 | }; |
195 | ||
196 | /* one per each fe */ | |
197 | struct cx24117_state { | |
198 | struct cx24117_priv *priv; | |
199 | struct dvb_frontend frontend; | |
200 | ||
201 | struct cx24117_tuning dcur; | |
202 | struct cx24117_tuning dnxt; | |
203 | struct cx24117_cmd dsec_cmd; | |
204 | ||
205 | int demod; | |
206 | }; | |
207 | ||
208 | /* modfec (modulation and FEC) lookup table */ | |
209 | /* Check cx24116.c for a detailed description of each field */ | |
210 | static struct cx24117_modfec { | |
0df289a2 MCC |
211 | enum fe_delivery_system delivery_system; |
212 | enum fe_modulation modulation; | |
213 | enum fe_code_rate fec; | |
0d788680 LA |
214 | u8 mask; /* In DVBS mode this is used to autodetect */ |
215 | u8 val; /* Passed to the firmware to indicate mode selection */ | |
216 | } cx24117_modfec_modes[] = { | |
217 | /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ | |
218 | ||
219 | /*mod fec mask val */ | |
220 | { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, | |
221 | { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ | |
222 | { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ | |
223 | { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ | |
224 | { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ | |
225 | { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ | |
226 | { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ | |
227 | { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ | |
228 | { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ | |
229 | { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, | |
230 | /* NBC-QPSK */ | |
231 | { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 }, | |
232 | { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, | |
233 | { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, | |
234 | { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, | |
235 | { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, | |
236 | { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, | |
237 | { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, | |
238 | { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, | |
239 | { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, | |
240 | { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 }, | |
241 | /* 8PSK */ | |
242 | { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 }, | |
243 | { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, | |
244 | { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, | |
245 | { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, | |
246 | { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, | |
247 | { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, | |
248 | { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, | |
249 | { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 }, | |
250 | /* | |
251 | * 'val' can be found in the FECSTATUS register when tuning. | |
252 | * FECSTATUS will give the actual FEC in use if tuning was successful. | |
253 | */ | |
254 | }; | |
255 | ||
256 | ||
257 | static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data) | |
258 | { | |
259 | u8 buf[] = { reg, data }; | |
260 | struct i2c_msg msg = { .addr = state->priv->demod_address, | |
261 | .flags = 0, .buf = buf, .len = 2 }; | |
262 | int ret; | |
263 | ||
264 | dev_dbg(&state->priv->i2c->dev, | |
265 | "%s() demod%d i2c wr @0x%02x=0x%02x\n", | |
266 | __func__, state->demod, reg, data); | |
267 | ||
268 | ret = i2c_transfer(state->priv->i2c, &msg, 1); | |
269 | if (ret < 0) { | |
270 | dev_warn(&state->priv->i2c->dev, | |
271 | "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n", | |
272 | KBUILD_MODNAME, state->demod, ret, reg, data); | |
273 | return ret; | |
274 | } | |
275 | return 0; | |
276 | } | |
277 | ||
278 | static int cx24117_writecmd(struct cx24117_state *state, | |
279 | struct cx24117_cmd *cmd) | |
280 | { | |
281 | struct i2c_msg msg; | |
282 | u8 buf[CX24117_ARGLEN+1]; | |
283 | int ret; | |
284 | ||
285 | dev_dbg(&state->priv->i2c->dev, | |
286 | "%s() demod%d i2c wr cmd len=%d\n", | |
287 | __func__, state->demod, cmd->len); | |
288 | ||
289 | buf[0] = CX24117_REG_COMMAND; | |
290 | memcpy(&buf[1], cmd->args, cmd->len); | |
291 | ||
292 | msg.addr = state->priv->demod_address; | |
293 | msg.flags = 0; | |
294 | msg.len = cmd->len+1; | |
295 | msg.buf = buf; | |
296 | ret = i2c_transfer(state->priv->i2c, &msg, 1); | |
297 | if (ret < 0) { | |
298 | dev_warn(&state->priv->i2c->dev, | |
299 | "%s: demod%d i2c wr cmd err(%i) len=%d\n", | |
300 | KBUILD_MODNAME, state->demod, ret, cmd->len); | |
301 | return ret; | |
302 | } | |
303 | return 0; | |
304 | } | |
305 | ||
306 | static int cx24117_readreg(struct cx24117_state *state, u8 reg) | |
307 | { | |
308 | int ret; | |
309 | u8 recv = 0; | |
310 | struct i2c_msg msg[] = { | |
311 | { .addr = state->priv->demod_address, .flags = 0, | |
312 | .buf = ®, .len = 1 }, | |
313 | { .addr = state->priv->demod_address, .flags = I2C_M_RD, | |
314 | .buf = &recv, .len = 1 } | |
315 | }; | |
316 | ||
317 | ret = i2c_transfer(state->priv->i2c, msg, 2); | |
318 | if (ret < 0) { | |
319 | dev_warn(&state->priv->i2c->dev, | |
320 | "%s: demod%d i2c rd err(%d) @0x%x\n", | |
321 | KBUILD_MODNAME, state->demod, ret, reg); | |
322 | return ret; | |
323 | } | |
324 | ||
325 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n", | |
326 | __func__, state->demod, reg, recv); | |
327 | ||
328 | return recv; | |
329 | } | |
330 | ||
331 | static int cx24117_readregN(struct cx24117_state *state, | |
332 | u8 reg, u8 *buf, int len) | |
333 | { | |
334 | int ret; | |
335 | struct i2c_msg msg[] = { | |
336 | { .addr = state->priv->demod_address, .flags = 0, | |
337 | .buf = ®, .len = 1 }, | |
338 | { .addr = state->priv->demod_address, .flags = I2C_M_RD, | |
339 | .buf = buf, .len = len } | |
340 | }; | |
341 | ||
342 | ret = i2c_transfer(state->priv->i2c, msg, 2); | |
343 | if (ret < 0) { | |
344 | dev_warn(&state->priv->i2c->dev, | |
345 | "%s: demod%d i2c rd err(%d) @0x%x\n", | |
346 | KBUILD_MODNAME, state->demod, ret, reg); | |
347 | return ret; | |
348 | } | |
349 | return 0; | |
350 | } | |
351 | ||
352 | static int cx24117_set_inversion(struct cx24117_state *state, | |
0df289a2 | 353 | enum fe_spectral_inversion inversion) |
0d788680 LA |
354 | { |
355 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", | |
356 | __func__, inversion, state->demod); | |
357 | ||
358 | switch (inversion) { | |
359 | case INVERSION_OFF: | |
360 | state->dnxt.inversion_val = 0x00; | |
361 | break; | |
362 | case INVERSION_ON: | |
363 | state->dnxt.inversion_val = 0x04; | |
364 | break; | |
365 | case INVERSION_AUTO: | |
366 | state->dnxt.inversion_val = 0x0C; | |
367 | break; | |
368 | default: | |
369 | return -EINVAL; | |
370 | } | |
371 | ||
372 | state->dnxt.inversion = inversion; | |
373 | ||
374 | return 0; | |
375 | } | |
376 | ||
377 | static int cx24117_lookup_fecmod(struct cx24117_state *state, | |
0df289a2 | 378 | enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f) |
0d788680 LA |
379 | { |
380 | int i, ret = -EINVAL; | |
381 | ||
382 | dev_dbg(&state->priv->i2c->dev, | |
383 | "%s(demod(0x%02x,0x%02x) demod%d\n", | |
384 | __func__, m, f, state->demod); | |
385 | ||
386 | for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) { | |
387 | if ((d == cx24117_modfec_modes[i].delivery_system) && | |
388 | (m == cx24117_modfec_modes[i].modulation) && | |
389 | (f == cx24117_modfec_modes[i].fec)) { | |
390 | ret = i; | |
391 | break; | |
392 | } | |
393 | } | |
394 | ||
395 | return ret; | |
396 | } | |
397 | ||
398 | static int cx24117_set_fec(struct cx24117_state *state, | |
0df289a2 MCC |
399 | enum fe_delivery_system delsys, |
400 | enum fe_modulation mod, | |
401 | enum fe_code_rate fec) | |
0d788680 LA |
402 | { |
403 | int ret; | |
404 | ||
405 | dev_dbg(&state->priv->i2c->dev, | |
406 | "%s(0x%02x,0x%02x) demod%d\n", | |
407 | __func__, mod, fec, state->demod); | |
408 | ||
409 | ret = cx24117_lookup_fecmod(state, delsys, mod, fec); | |
410 | if (ret < 0) | |
411 | return ret; | |
412 | ||
413 | state->dnxt.fec = fec; | |
414 | state->dnxt.fec_val = cx24117_modfec_modes[ret].val; | |
415 | state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask; | |
416 | dev_dbg(&state->priv->i2c->dev, | |
417 | "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__, | |
418 | state->demod, state->dnxt.fec_mask, state->dnxt.fec_val); | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
423 | static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate) | |
424 | { | |
425 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", | |
426 | __func__, rate, state->demod); | |
427 | ||
428 | state->dnxt.symbol_rate = rate; | |
429 | ||
430 | dev_dbg(&state->priv->i2c->dev, | |
431 | "%s() demod%d symbol_rate = %d\n", | |
432 | __func__, state->demod, rate); | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | static int cx24117_load_firmware(struct dvb_frontend *fe, | |
438 | const struct firmware *fw); | |
439 | ||
440 | static int cx24117_firmware_ondemand(struct dvb_frontend *fe) | |
441 | { | |
442 | struct cx24117_state *state = fe->demodulator_priv; | |
443 | const struct firmware *fw; | |
444 | int ret = 0; | |
445 | ||
446 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n", | |
447 | __func__, state->demod, state->priv->skip_fw_load); | |
448 | ||
449 | if (state->priv->skip_fw_load) | |
450 | return 0; | |
451 | ||
510cb39c | 452 | /* check if firmware is already running */ |
0d788680 LA |
453 | if (cx24117_readreg(state, 0xeb) != 0xa) { |
454 | /* Load firmware */ | |
455 | /* request the firmware, this will block until loaded */ | |
456 | dev_dbg(&state->priv->i2c->dev, | |
457 | "%s: Waiting for firmware upload (%s)...\n", | |
458 | __func__, CX24117_DEFAULT_FIRMWARE); | |
459 | ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE, | |
460 | state->priv->i2c->dev.parent); | |
461 | dev_dbg(&state->priv->i2c->dev, | |
462 | "%s: Waiting for firmware upload(2)...\n", __func__); | |
463 | if (ret) { | |
464 | dev_err(&state->priv->i2c->dev, | |
4bd69e7b MCC |
465 | "%s: No firmware uploaded (timeout or file not found?)\n", |
466 | __func__); | |
0d788680 LA |
467 | return ret; |
468 | } | |
469 | ||
470 | /* Make sure we don't recurse back through here | |
471 | * during loading */ | |
472 | state->priv->skip_fw_load = 1; | |
473 | ||
474 | ret = cx24117_load_firmware(fe, fw); | |
475 | if (ret) | |
476 | dev_err(&state->priv->i2c->dev, | |
477 | "%s: Writing firmware failed\n", __func__); | |
478 | release_firmware(fw); | |
479 | ||
480 | dev_info(&state->priv->i2c->dev, | |
481 | "%s: Firmware upload %s\n", __func__, | |
482 | ret == 0 ? "complete" : "failed"); | |
483 | ||
484 | /* Ensure firmware is always loaded if required */ | |
485 | state->priv->skip_fw_load = 0; | |
486 | } | |
487 | ||
488 | return ret; | |
489 | } | |
490 | ||
491 | /* Take a basic firmware command structure, format it | |
492 | * and forward it for processing | |
493 | */ | |
494 | static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe, | |
495 | struct cx24117_cmd *cmd) | |
496 | { | |
497 | struct cx24117_state *state = fe->demodulator_priv; | |
498 | int i, ret; | |
499 | ||
500 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
501 | __func__, state->demod); | |
502 | ||
503 | /* Load the firmware if required */ | |
504 | ret = cx24117_firmware_ondemand(fe); | |
505 | if (ret != 0) | |
506 | return ret; | |
507 | ||
508 | /* Write the command */ | |
509 | cx24117_writecmd(state, cmd); | |
510 | ||
511 | /* Start execution and wait for cmd to terminate */ | |
512 | cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01); | |
513 | i = 0; | |
514 | while (cx24117_readreg(state, CX24117_REG_EXECUTE)) { | |
515 | msleep(20); | |
516 | if (i++ > 40) { | |
517 | /* Avoid looping forever if the firmware does | |
518 | not respond */ | |
519 | dev_warn(&state->priv->i2c->dev, | |
520 | "%s() Firmware not responding\n", __func__); | |
521 | return -EIO; | |
522 | } | |
523 | } | |
524 | return 0; | |
525 | } | |
526 | ||
527 | static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd) | |
528 | { | |
529 | struct cx24117_state *state = fe->demodulator_priv; | |
530 | int ret; | |
531 | ||
532 | mutex_lock(&state->priv->fe_lock); | |
533 | ret = cx24117_cmd_execute_nolock(fe, cmd); | |
534 | mutex_unlock(&state->priv->fe_lock); | |
535 | ||
536 | return ret; | |
537 | } | |
538 | ||
539 | static int cx24117_load_firmware(struct dvb_frontend *fe, | |
540 | const struct firmware *fw) | |
541 | { | |
542 | struct cx24117_state *state = fe->demodulator_priv; | |
543 | struct cx24117_cmd cmd; | |
544 | int i, ret; | |
545 | unsigned char vers[4]; | |
546 | ||
547 | struct i2c_msg msg; | |
548 | u8 *buf; | |
549 | ||
550 | dev_dbg(&state->priv->i2c->dev, | |
551 | "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n", | |
552 | __func__, state->demod, fw->size, fw->data[0], fw->data[1], | |
d10e8280 | 553 | fw->data[fw->size - 2], fw->data[fw->size - 1]); |
0d788680 LA |
554 | |
555 | cx24117_writereg(state, 0xea, 0x00); | |
556 | cx24117_writereg(state, 0xea, 0x01); | |
557 | cx24117_writereg(state, 0xea, 0x00); | |
558 | ||
559 | cx24117_writereg(state, 0xce, 0x92); | |
560 | ||
561 | cx24117_writereg(state, 0xfb, 0x00); | |
562 | cx24117_writereg(state, 0xfc, 0x00); | |
563 | ||
564 | cx24117_writereg(state, 0xc3, 0x04); | |
565 | cx24117_writereg(state, 0xc4, 0x04); | |
566 | ||
567 | cx24117_writereg(state, 0xce, 0x00); | |
568 | cx24117_writereg(state, 0xcf, 0x00); | |
569 | ||
570 | cx24117_writereg(state, 0xea, 0x00); | |
571 | cx24117_writereg(state, 0xeb, 0x0c); | |
572 | cx24117_writereg(state, 0xec, 0x06); | |
573 | cx24117_writereg(state, 0xed, 0x05); | |
574 | cx24117_writereg(state, 0xee, 0x03); | |
575 | cx24117_writereg(state, 0xef, 0x05); | |
576 | ||
577 | cx24117_writereg(state, 0xf3, 0x03); | |
578 | cx24117_writereg(state, 0xf4, 0x44); | |
579 | ||
580 | cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04); | |
581 | cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02); | |
582 | ||
583 | cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04); | |
584 | cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02); | |
585 | ||
586 | cx24117_writereg(state, 0xf2, 0x04); | |
587 | cx24117_writereg(state, 0xe8, 0x02); | |
588 | cx24117_writereg(state, 0xea, 0x01); | |
589 | cx24117_writereg(state, 0xc8, 0x00); | |
590 | cx24117_writereg(state, 0xc9, 0x00); | |
591 | cx24117_writereg(state, 0xca, 0x00); | |
592 | cx24117_writereg(state, 0xcb, 0x00); | |
593 | cx24117_writereg(state, 0xcc, 0x00); | |
594 | cx24117_writereg(state, 0xcd, 0x00); | |
595 | cx24117_writereg(state, 0xe4, 0x03); | |
596 | cx24117_writereg(state, 0xeb, 0x0a); | |
597 | ||
598 | cx24117_writereg(state, 0xfb, 0x00); | |
599 | cx24117_writereg(state, 0xe0, 0x76); | |
600 | cx24117_writereg(state, 0xf7, 0x81); | |
601 | cx24117_writereg(state, 0xf8, 0x00); | |
602 | cx24117_writereg(state, 0xf9, 0x00); | |
603 | ||
604 | buf = kmalloc(fw->size + 1, GFP_KERNEL); | |
605 | if (buf == NULL) { | |
606 | state->priv->skip_fw_load = 0; | |
607 | return -ENOMEM; | |
608 | } | |
609 | ||
610 | /* fw upload reg */ | |
611 | buf[0] = 0xfa; | |
612 | memcpy(&buf[1], fw->data, fw->size); | |
613 | ||
614 | /* prepare i2c message to send */ | |
615 | msg.addr = state->priv->demod_address; | |
616 | msg.flags = 0; | |
617 | msg.len = fw->size + 1; | |
618 | msg.buf = buf; | |
619 | ||
620 | /* send fw */ | |
621 | ret = i2c_transfer(state->priv->i2c, &msg, 1); | |
2f6451ed WW |
622 | if (ret < 0) { |
623 | kfree(buf); | |
0d788680 | 624 | return ret; |
2f6451ed | 625 | } |
0d788680 LA |
626 | |
627 | kfree(buf); | |
628 | ||
629 | cx24117_writereg(state, 0xf7, 0x0c); | |
630 | cx24117_writereg(state, 0xe0, 0x00); | |
631 | ||
9fa7c419 LA |
632 | /* Init demodulator */ |
633 | cmd.args[0] = CMD_DEMODINIT; | |
0d788680 LA |
634 | cmd.args[1] = 0x00; |
635 | cmd.args[2] = 0x01; | |
636 | cmd.args[3] = 0x00; | |
637 | cmd.len = 4; | |
638 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
639 | if (ret != 0) | |
640 | goto error; | |
641 | ||
9fa7c419 LA |
642 | /* Set VCO frequency */ |
643 | cmd.args[0] = CMD_SET_VCOFREQ; | |
0d788680 LA |
644 | cmd.args[1] = 0x06; |
645 | cmd.args[2] = 0x2b; | |
646 | cmd.args[3] = 0xd8; | |
647 | cmd.args[4] = 0xa5; | |
648 | cmd.args[5] = 0xee; | |
649 | cmd.args[6] = 0x03; | |
650 | cmd.args[7] = 0x9d; | |
651 | cmd.args[8] = 0xfc; | |
652 | cmd.args[9] = 0x06; | |
653 | cmd.args[10] = 0x02; | |
654 | cmd.args[11] = 0x9d; | |
655 | cmd.args[12] = 0xfc; | |
656 | cmd.len = 13; | |
657 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
658 | if (ret != 0) | |
659 | goto error; | |
660 | ||
9fa7c419 LA |
661 | /* Tuner init */ |
662 | cmd.args[0] = CMD_TUNERINIT; | |
0d788680 LA |
663 | cmd.args[1] = 0x00; |
664 | cmd.args[2] = 0x01; | |
665 | cmd.args[3] = 0x00; | |
666 | cmd.args[4] = 0x00; | |
667 | cmd.args[5] = 0x01; | |
668 | cmd.args[6] = 0x01; | |
669 | cmd.args[7] = 0x01; | |
670 | cmd.args[8] = 0x00; | |
671 | cmd.args[9] = 0x05; | |
672 | cmd.args[10] = 0x02; | |
673 | cmd.args[11] = 0x02; | |
674 | cmd.args[12] = 0x00; | |
675 | cmd.len = 13; | |
676 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
677 | if (ret != 0) | |
678 | goto error; | |
679 | ||
9fa7c419 LA |
680 | /* Global MPEG config */ |
681 | cmd.args[0] = CMD_GLOBAL_MPEGCFG; | |
0d788680 LA |
682 | cmd.args[1] = 0x00; |
683 | cmd.args[2] = 0x00; | |
684 | cmd.args[3] = 0x00; | |
685 | cmd.args[4] = 0x01; | |
686 | cmd.args[5] = 0x00; | |
687 | cmd.len = 6; | |
688 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
689 | if (ret != 0) | |
690 | goto error; | |
691 | ||
9fa7c419 | 692 | /* MPEG config for each demod */ |
0d788680 | 693 | for (i = 0; i < 2; i++) { |
9fa7c419 | 694 | cmd.args[0] = CMD_MPEGCFG; |
0d788680 LA |
695 | cmd.args[1] = (u8) i; |
696 | cmd.args[2] = 0x00; | |
697 | cmd.args[3] = 0x05; | |
698 | cmd.args[4] = 0x00; | |
699 | cmd.args[5] = 0x00; | |
700 | cmd.args[6] = 0x55; | |
701 | cmd.args[7] = 0x00; | |
702 | cmd.len = 8; | |
703 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
704 | if (ret != 0) | |
705 | goto error; | |
706 | } | |
707 | ||
708 | cx24117_writereg(state, 0xce, 0xc0); | |
709 | cx24117_writereg(state, 0xcf, 0x00); | |
710 | cx24117_writereg(state, 0xe5, 0x04); | |
711 | ||
9fa7c419 LA |
712 | /* Get firmware version */ |
713 | cmd.args[0] = CMD_FWVERSION; | |
0d788680 LA |
714 | cmd.len = 2; |
715 | for (i = 0; i < 4; i++) { | |
716 | cmd.args[1] = i; | |
717 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
718 | if (ret != 0) | |
719 | goto error; | |
720 | vers[i] = cx24117_readreg(state, 0x33); | |
721 | } | |
722 | dev_info(&state->priv->i2c->dev, | |
723 | "%s: FW version %i.%i.%i.%i\n", __func__, | |
724 | vers[0], vers[1], vers[2], vers[3]); | |
725 | return 0; | |
726 | error: | |
727 | state->priv->skip_fw_load = 0; | |
728 | dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__); | |
729 | return ret; | |
730 | } | |
731 | ||
0df289a2 | 732 | static int cx24117_read_status(struct dvb_frontend *fe, enum fe_status *status) |
0d788680 LA |
733 | { |
734 | struct cx24117_state *state = fe->demodulator_priv; | |
735 | int lock; | |
736 | ||
737 | lock = cx24117_readreg(state, | |
738 | (state->demod == 0) ? CX24117_REG_SSTATUS0 : | |
739 | CX24117_REG_SSTATUS1) & | |
740 | CX24117_STATUS_MASK; | |
741 | ||
742 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n", | |
743 | __func__, state->demod, lock); | |
744 | ||
745 | *status = 0; | |
746 | ||
747 | if (lock & CX24117_HAS_SIGNAL) | |
748 | *status |= FE_HAS_SIGNAL; | |
749 | if (lock & CX24117_HAS_CARRIER) | |
750 | *status |= FE_HAS_CARRIER; | |
751 | if (lock & CX24117_HAS_VITERBI) | |
752 | *status |= FE_HAS_VITERBI; | |
753 | if (lock & CX24117_HAS_SYNCLOCK) | |
754 | *status |= FE_HAS_SYNC | FE_HAS_LOCK; | |
755 | ||
756 | return 0; | |
757 | } | |
758 | ||
759 | static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber) | |
760 | { | |
761 | struct cx24117_state *state = fe->demodulator_priv; | |
762 | int ret; | |
763 | u8 buf[4]; | |
764 | u8 base_reg = (state->demod == 0) ? | |
765 | CX24117_REG_BER4_0 : | |
766 | CX24117_REG_BER4_1; | |
767 | ||
768 | ret = cx24117_readregN(state, base_reg, buf, 4); | |
769 | if (ret != 0) | |
770 | return ret; | |
771 | ||
772 | *ber = (buf[0] << 24) | (buf[1] << 16) | | |
773 | (buf[1] << 8) | buf[0]; | |
774 | ||
775 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n", | |
776 | __func__, state->demod, *ber); | |
777 | ||
778 | return 0; | |
779 | } | |
780 | ||
781 | static int cx24117_read_signal_strength(struct dvb_frontend *fe, | |
782 | u16 *signal_strength) | |
783 | { | |
784 | struct cx24117_state *state = fe->demodulator_priv; | |
785 | struct cx24117_cmd cmd; | |
786 | int ret; | |
787 | u16 sig_reading; | |
788 | u8 buf[2]; | |
789 | u8 reg = (state->demod == 0) ? | |
790 | CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1; | |
791 | ||
9fa7c419 LA |
792 | /* Read AGC accumulator register */ |
793 | cmd.args[0] = CMD_GET_AGCACC; | |
0d788680 LA |
794 | cmd.args[1] = (u8) state->demod; |
795 | cmd.len = 2; | |
796 | ret = cx24117_cmd_execute(fe, &cmd); | |
797 | if (ret != 0) | |
798 | return ret; | |
799 | ||
800 | ret = cx24117_readregN(state, reg, buf, 2); | |
801 | if (ret != 0) | |
802 | return ret; | |
803 | sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1]; | |
804 | ||
805 | *signal_strength = -100 * sig_reading + 94324; | |
806 | ||
807 | dev_dbg(&state->priv->i2c->dev, | |
808 | "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n", | |
809 | __func__, state->demod, sig_reading, *signal_strength); | |
810 | ||
811 | return 0; | |
812 | } | |
813 | ||
814 | static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr) | |
815 | { | |
816 | struct cx24117_state *state = fe->demodulator_priv; | |
817 | int ret; | |
818 | u8 buf[2]; | |
819 | u8 reg = (state->demod == 0) ? | |
820 | CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1; | |
821 | ||
822 | ret = cx24117_readregN(state, reg, buf, 2); | |
823 | if (ret != 0) | |
824 | return ret; | |
825 | ||
826 | *snr = (buf[0] << 8) | buf[1]; | |
827 | ||
828 | dev_dbg(&state->priv->i2c->dev, | |
829 | "%s() demod%d snr = 0x%04x\n", | |
830 | __func__, state->demod, *snr); | |
831 | ||
832 | return ret; | |
833 | } | |
834 | ||
835 | static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) | |
836 | { | |
837 | struct cx24117_state *state = fe->demodulator_priv; | |
0df289a2 | 838 | enum fe_delivery_system delsys = fe->dtv_property_cache.delivery_system; |
0d788680 LA |
839 | int ret; |
840 | u8 buf[2]; | |
841 | u8 reg = (state->demod == 0) ? | |
842 | CX24117_REG_DVBS_UCB2_0 : | |
843 | CX24117_REG_DVBS_UCB2_1; | |
844 | ||
845 | switch (delsys) { | |
846 | case SYS_DVBS: | |
847 | break; | |
848 | case SYS_DVBS2: | |
849 | reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0); | |
850 | break; | |
851 | default: | |
852 | return -EINVAL; | |
853 | } | |
854 | ||
855 | ret = cx24117_readregN(state, reg, buf, 2); | |
856 | if (ret != 0) | |
857 | return ret; | |
858 | *ucblocks = (buf[0] << 8) | buf[1]; | |
859 | ||
860 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n", | |
861 | __func__, state->demod, *ucblocks); | |
862 | ||
863 | return 0; | |
864 | } | |
865 | ||
866 | /* Overwrite the current tuning params, we are about to tune */ | |
867 | static void cx24117_clone_params(struct dvb_frontend *fe) | |
868 | { | |
869 | struct cx24117_state *state = fe->demodulator_priv; | |
870 | state->dcur = state->dnxt; | |
871 | } | |
872 | ||
873 | /* Wait for LNB */ | |
874 | static int cx24117_wait_for_lnb(struct dvb_frontend *fe) | |
875 | { | |
876 | struct cx24117_state *state = fe->demodulator_priv; | |
877 | int i; | |
878 | u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 : | |
879 | CX24117_REG_QSTATUS1; | |
880 | ||
881 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n", | |
882 | __func__, state->demod, cx24117_readreg(state, reg)); | |
883 | ||
884 | /* Wait for up to 300 ms */ | |
885 | for (i = 0; i < 10; i++) { | |
886 | val = cx24117_readreg(state, reg) & 0x01; | |
887 | if (val != 0) | |
888 | return 0; | |
889 | msleep(30); | |
890 | } | |
891 | ||
892 | dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n", | |
893 | KBUILD_MODNAME, state->demod); | |
894 | ||
895 | return -ETIMEDOUT; /* -EBUSY ? */ | |
896 | } | |
897 | ||
898 | static int cx24117_set_voltage(struct dvb_frontend *fe, | |
0df289a2 | 899 | enum fe_sec_voltage voltage) |
0d788680 LA |
900 | { |
901 | struct cx24117_state *state = fe->demodulator_priv; | |
902 | struct cx24117_cmd cmd; | |
903 | int ret; | |
904 | u8 reg = (state->demod == 0) ? 0x10 : 0x20; | |
905 | ||
906 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n", | |
907 | __func__, state->demod, | |
908 | voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : | |
909 | voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : | |
910 | "SEC_VOLTAGE_OFF"); | |
911 | ||
71b6aaaf LA |
912 | /* Prepare a set GPIO logic level CMD */ |
913 | cmd.args[0] = CMD_SET_GPIOOUT; | |
914 | cmd.args[2] = reg; /* mask */ | |
0d788680 | 915 | cmd.len = 3; |
0d788680 LA |
916 | |
917 | if ((voltage == SEC_VOLTAGE_13) || | |
918 | (voltage == SEC_VOLTAGE_18)) { | |
71b6aaaf | 919 | /* power on LNB */ |
0d788680 | 920 | cmd.args[1] = reg; |
0d788680 LA |
921 | ret = cx24117_cmd_execute(fe, &cmd); |
922 | if (ret != 0) | |
923 | return ret; | |
924 | ||
925 | ret = cx24117_wait_for_lnb(fe); | |
926 | if (ret != 0) | |
927 | return ret; | |
928 | ||
929 | /* Wait for voltage/min repeat delay */ | |
930 | msleep(100); | |
931 | ||
9fa7c419 | 932 | /* Set 13V/18V select pin */ |
0d788680 LA |
933 | cmd.args[0] = CMD_LNBDCLEVEL; |
934 | cmd.args[1] = state->demod ? 0 : 1; | |
935 | cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); | |
936 | cmd.len = 3; | |
71b6aaaf | 937 | ret = cx24117_cmd_execute(fe, &cmd); |
0d788680 LA |
938 | |
939 | /* Min delay time before DiSEqC send */ | |
940 | msleep(20); | |
941 | } else { | |
71b6aaaf | 942 | /* power off LNB */ |
0d788680 | 943 | cmd.args[1] = 0x00; |
71b6aaaf | 944 | ret = cx24117_cmd_execute(fe, &cmd); |
0d788680 LA |
945 | } |
946 | ||
71b6aaaf | 947 | return ret; |
0d788680 LA |
948 | } |
949 | ||
950 | static int cx24117_set_tone(struct dvb_frontend *fe, | |
0df289a2 | 951 | enum fe_sec_tone_mode tone) |
0d788680 LA |
952 | { |
953 | struct cx24117_state *state = fe->demodulator_priv; | |
954 | struct cx24117_cmd cmd; | |
955 | int ret; | |
956 | ||
957 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", | |
958 | __func__, state->demod, tone); | |
959 | if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { | |
960 | dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n", | |
961 | KBUILD_MODNAME, state->demod, tone); | |
962 | return -EINVAL; | |
963 | } | |
964 | ||
965 | /* Wait for LNB ready */ | |
966 | ret = cx24117_wait_for_lnb(fe); | |
967 | if (ret != 0) | |
968 | return ret; | |
969 | ||
970 | /* Min delay time after DiSEqC send */ | |
971 | msleep(20); | |
972 | ||
973 | /* Set the tone */ | |
9fa7c419 | 974 | cmd.args[0] = CMD_LNBPCBCONFIG; |
0d788680 LA |
975 | cmd.args[1] = (state->demod ? 0 : 1); |
976 | cmd.args[2] = 0x00; | |
977 | cmd.args[3] = 0x00; | |
978 | cmd.len = 5; | |
979 | switch (tone) { | |
980 | case SEC_TONE_ON: | |
981 | cmd.args[4] = 0x01; | |
982 | break; | |
983 | case SEC_TONE_OFF: | |
984 | cmd.args[4] = 0x00; | |
985 | break; | |
986 | } | |
987 | ||
988 | msleep(20); | |
989 | ||
990 | return cx24117_cmd_execute(fe, &cmd); | |
991 | } | |
992 | ||
993 | /* Initialise DiSEqC */ | |
994 | static int cx24117_diseqc_init(struct dvb_frontend *fe) | |
995 | { | |
996 | struct cx24117_state *state = fe->demodulator_priv; | |
997 | ||
998 | /* Prepare a DiSEqC command */ | |
999 | state->dsec_cmd.args[0] = CMD_LNBSEND; | |
1000 | ||
1001 | /* demod */ | |
1002 | state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1; | |
1003 | ||
1004 | /* DiSEqC burst */ | |
1005 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A; | |
1006 | ||
1007 | /* Unknown */ | |
1008 | state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02; | |
1009 | state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00; | |
1010 | ||
1011 | /* Continuation flag? */ | |
1012 | state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00; | |
1013 | ||
1014 | /* DiSEqC message length */ | |
1015 | state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00; | |
1016 | ||
1017 | /* Command length */ | |
1018 | state->dsec_cmd.len = 7; | |
1019 | ||
1020 | return 0; | |
1021 | } | |
1022 | ||
1023 | /* Send DiSEqC message */ | |
1024 | static int cx24117_send_diseqc_msg(struct dvb_frontend *fe, | |
1025 | struct dvb_diseqc_master_cmd *d) | |
1026 | { | |
1027 | struct cx24117_state *state = fe->demodulator_priv; | |
1028 | int i, ret; | |
1029 | ||
1030 | /* Dump DiSEqC message */ | |
1031 | dev_dbg(&state->priv->i2c->dev, "%s: demod %d (", | |
1032 | __func__, state->demod); | |
1033 | for (i = 0; i < d->msg_len; i++) | |
1034 | dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]); | |
1035 | dev_dbg(&state->priv->i2c->dev, ")\n"); | |
1036 | ||
1037 | /* Validate length */ | |
82e3b88b | 1038 | if (d->msg_len > sizeof(d->msg)) |
0d788680 LA |
1039 | return -EINVAL; |
1040 | ||
1041 | /* DiSEqC message */ | |
1042 | for (i = 0; i < d->msg_len; i++) | |
1043 | state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i]; | |
1044 | ||
1045 | /* DiSEqC message length */ | |
1046 | state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len; | |
1047 | ||
1048 | /* Command length */ | |
1049 | state->dsec_cmd.len = CX24117_DISEQC_MSGOFS + | |
1050 | state->dsec_cmd.args[CX24117_DISEQC_MSGLEN]; | |
1051 | ||
1052 | /* | |
1053 | * Message is sent with derived else cached burst | |
1054 | * | |
1055 | * WRITE PORT GROUP COMMAND 38 | |
1056 | * | |
1057 | * 0/A/A: E0 10 38 F0..F3 | |
1058 | * 1/B/B: E0 10 38 F4..F7 | |
1059 | * 2/C/A: E0 10 38 F8..FB | |
1060 | * 3/D/B: E0 10 38 FC..FF | |
1061 | * | |
1062 | * databyte[3]= 8421:8421 | |
1063 | * ABCD:WXYZ | |
1064 | * CLR :SET | |
1065 | * | |
1066 | * WX= PORT SELECT 0..3 (X=TONEBURST) | |
1067 | * Y = VOLTAGE (0=13V, 1=18V) | |
1068 | * Z = BAND (0=LOW, 1=HIGH(22K)) | |
1069 | */ | |
1070 | if (d->msg_len >= 4 && d->msg[2] == 0x38) | |
1071 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = | |
1072 | ((d->msg[3] & 4) >> 2); | |
1073 | ||
1074 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n", | |
1075 | __func__, state->demod, | |
1076 | state->dsec_cmd.args[CX24117_DISEQC_BURST]); | |
1077 | ||
1078 | /* Wait for LNB ready */ | |
1079 | ret = cx24117_wait_for_lnb(fe); | |
1080 | if (ret != 0) | |
1081 | return ret; | |
1082 | ||
1083 | /* Wait for voltage/min repeat delay */ | |
1084 | msleep(100); | |
1085 | ||
1086 | /* Command */ | |
1087 | ret = cx24117_cmd_execute(fe, &state->dsec_cmd); | |
1088 | if (ret != 0) | |
1089 | return ret; | |
1090 | /* | |
1091 | * Wait for send | |
1092 | * | |
1093 | * Eutelsat spec: | |
1094 | * >15ms delay + (XXX determine if FW does this, see set_tone) | |
1095 | * 13.5ms per byte + | |
1096 | * >15ms delay + | |
1097 | * 12.5ms burst + | |
1098 | * >15ms delay (XXX determine if FW does this, see set_tone) | |
1099 | */ | |
1100 | msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60); | |
1101 | ||
1102 | return 0; | |
1103 | } | |
1104 | ||
1105 | /* Send DiSEqC burst */ | |
1106 | static int cx24117_diseqc_send_burst(struct dvb_frontend *fe, | |
0df289a2 | 1107 | enum fe_sec_mini_cmd burst) |
0d788680 LA |
1108 | { |
1109 | struct cx24117_state *state = fe->demodulator_priv; | |
1110 | ||
1111 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n", | |
1112 | __func__, burst, state->demod); | |
1113 | ||
1114 | /* DiSEqC burst */ | |
1115 | if (burst == SEC_MINI_A) | |
1116 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = | |
1117 | CX24117_DISEQC_MINI_A; | |
1118 | else if (burst == SEC_MINI_B) | |
1119 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = | |
1120 | CX24117_DISEQC_MINI_B; | |
1121 | else | |
1122 | return -EINVAL; | |
1123 | ||
1124 | return 0; | |
1125 | } | |
1126 | ||
d10e8280 LA |
1127 | static int cx24117_get_priv(struct cx24117_priv **priv, |
1128 | struct i2c_adapter *i2c, u8 client_address) | |
1129 | { | |
1130 | int ret; | |
1131 | ||
1132 | mutex_lock(&cx24117_list_mutex); | |
1133 | ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv), | |
1134 | hybrid_tuner_instance_list, i2c, client_address, "cx24117"); | |
1135 | mutex_unlock(&cx24117_list_mutex); | |
1136 | ||
1137 | return ret; | |
1138 | } | |
1139 | ||
1140 | static void cx24117_release_priv(struct cx24117_priv *priv) | |
1141 | { | |
1142 | mutex_lock(&cx24117_list_mutex); | |
1143 | if (priv != NULL) | |
1144 | hybrid_tuner_release_state(priv); | |
1145 | mutex_unlock(&cx24117_list_mutex); | |
1146 | } | |
1147 | ||
0d788680 LA |
1148 | static void cx24117_release(struct dvb_frontend *fe) |
1149 | { | |
1150 | struct cx24117_state *state = fe->demodulator_priv; | |
1151 | dev_dbg(&state->priv->i2c->dev, "%s demod%d\n", | |
1152 | __func__, state->demod); | |
d10e8280 | 1153 | cx24117_release_priv(state->priv); |
0d788680 LA |
1154 | kfree(state); |
1155 | } | |
1156 | ||
bd336e63 | 1157 | static const struct dvb_frontend_ops cx24117_ops; |
0d788680 LA |
1158 | |
1159 | struct dvb_frontend *cx24117_attach(const struct cx24117_config *config, | |
d10e8280 | 1160 | struct i2c_adapter *i2c) |
0d788680 LA |
1161 | { |
1162 | struct cx24117_state *state = NULL; | |
1163 | struct cx24117_priv *priv = NULL; | |
1164 | int demod = 0; | |
1165 | ||
d10e8280 LA |
1166 | /* get the common data struct for both demods */ |
1167 | demod = cx24117_get_priv(&priv, i2c, config->demod_address); | |
1168 | ||
1169 | switch (demod) { | |
1170 | case 0: | |
a33dd517 | 1171 | dev_err(&i2c->dev, |
d10e8280 LA |
1172 | "%s: Error attaching frontend %d\n", |
1173 | KBUILD_MODNAME, demod); | |
1174 | goto error1; | |
1175 | break; | |
1176 | case 1: | |
1177 | /* new priv instance */ | |
0d788680 LA |
1178 | priv->i2c = i2c; |
1179 | priv->demod_address = config->demod_address; | |
1180 | mutex_init(&priv->fe_lock); | |
d10e8280 LA |
1181 | break; |
1182 | default: | |
1183 | /* existing priv instance */ | |
1184 | break; | |
0d788680 LA |
1185 | } |
1186 | ||
1187 | /* allocate memory for the internal state */ | |
1188 | state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL); | |
1189 | if (state == NULL) | |
1190 | goto error2; | |
1191 | ||
d10e8280 | 1192 | state->demod = demod - 1; |
0d788680 LA |
1193 | state->priv = priv; |
1194 | ||
0d788680 LA |
1195 | dev_info(&state->priv->i2c->dev, |
1196 | "%s: Attaching frontend %d\n", | |
d10e8280 | 1197 | KBUILD_MODNAME, state->demod); |
0d788680 LA |
1198 | |
1199 | /* create dvb_frontend */ | |
1200 | memcpy(&state->frontend.ops, &cx24117_ops, | |
1201 | sizeof(struct dvb_frontend_ops)); | |
1202 | state->frontend.demodulator_priv = state; | |
1203 | return &state->frontend; | |
1204 | ||
0d788680 | 1205 | error2: |
d10e8280 | 1206 | cx24117_release_priv(priv); |
0d788680 LA |
1207 | error1: |
1208 | return NULL; | |
1209 | } | |
1210 | EXPORT_SYMBOL_GPL(cx24117_attach); | |
1211 | ||
1212 | /* | |
1213 | * Initialise or wake up device | |
1214 | * | |
1215 | * Power config will reset and load initial firmware if required | |
1216 | */ | |
1217 | static int cx24117_initfe(struct dvb_frontend *fe) | |
1218 | { | |
1219 | struct cx24117_state *state = fe->demodulator_priv; | |
1220 | struct cx24117_cmd cmd; | |
1221 | int ret; | |
1222 | ||
1223 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1224 | __func__, state->demod); | |
1225 | ||
1226 | mutex_lock(&state->priv->fe_lock); | |
1227 | ||
9fa7c419 LA |
1228 | /* Set sleep mode off */ |
1229 | cmd.args[0] = CMD_SET_SLEEPMODE; | |
0d788680 LA |
1230 | cmd.args[1] = (state->demod ? 1 : 0); |
1231 | cmd.args[2] = 0; | |
1232 | cmd.len = 3; | |
1233 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
1234 | if (ret != 0) | |
4699b5f3 | 1235 | goto exit; |
0d788680 LA |
1236 | |
1237 | ret = cx24117_diseqc_init(fe); | |
1238 | if (ret != 0) | |
4699b5f3 | 1239 | goto exit; |
0d788680 | 1240 | |
9fa7c419 LA |
1241 | /* Set BER control */ |
1242 | cmd.args[0] = CMD_BERCTRL; | |
0d788680 LA |
1243 | cmd.args[1] = (state->demod ? 1 : 0); |
1244 | cmd.args[2] = 0x10; | |
1245 | cmd.args[3] = 0x10; | |
1246 | cmd.len = 4; | |
1247 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
1248 | if (ret != 0) | |
4699b5f3 | 1249 | goto exit; |
0d788680 | 1250 | |
9fa7c419 LA |
1251 | /* Set RS correction (enable/disable) */ |
1252 | cmd.args[0] = CMD_ENABLERSCORR; | |
0d788680 LA |
1253 | cmd.args[1] = (state->demod ? 1 : 0); |
1254 | cmd.args[2] = CX24117_OCC; | |
1255 | cmd.len = 3; | |
1256 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
71b6aaaf LA |
1257 | if (ret != 0) |
1258 | goto exit; | |
1259 | ||
1260 | /* Set GPIO direction */ | |
1261 | /* Set as output - controls LNB power on/off */ | |
1262 | cmd.args[0] = CMD_SET_GPIODIR; | |
1263 | cmd.args[1] = 0x30; | |
1264 | cmd.args[2] = 0x30; | |
1265 | cmd.len = 3; | |
1266 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
0d788680 | 1267 | |
4699b5f3 | 1268 | exit: |
0d788680 LA |
1269 | mutex_unlock(&state->priv->fe_lock); |
1270 | ||
1271 | return ret; | |
1272 | } | |
1273 | ||
1274 | /* | |
1275 | * Put device to sleep | |
1276 | */ | |
1277 | static int cx24117_sleep(struct dvb_frontend *fe) | |
1278 | { | |
1279 | struct cx24117_state *state = fe->demodulator_priv; | |
1280 | struct cx24117_cmd cmd; | |
1281 | ||
1282 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1283 | __func__, state->demod); | |
1284 | ||
9fa7c419 LA |
1285 | /* Set sleep mode on */ |
1286 | cmd.args[0] = CMD_SET_SLEEPMODE; | |
0d788680 LA |
1287 | cmd.args[1] = (state->demod ? 1 : 0); |
1288 | cmd.args[2] = 1; | |
1289 | cmd.len = 3; | |
1290 | return cx24117_cmd_execute(fe, &cmd); | |
1291 | } | |
1292 | ||
1293 | /* dvb-core told us to tune, the tv property cache will be complete, | |
1294 | * it's safe for is to pull values and use them for tuning purposes. | |
1295 | */ | |
1296 | static int cx24117_set_frontend(struct dvb_frontend *fe) | |
1297 | { | |
1298 | struct cx24117_state *state = fe->demodulator_priv; | |
1299 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; | |
1300 | struct cx24117_cmd cmd; | |
0df289a2 | 1301 | enum fe_status tunerstat; |
0d788680 LA |
1302 | int i, status, ret, retune = 1; |
1303 | u8 reg_clkdiv, reg_ratediv; | |
1304 | ||
1305 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1306 | __func__, state->demod); | |
1307 | ||
1308 | switch (c->delivery_system) { | |
1309 | case SYS_DVBS: | |
1310 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n", | |
1311 | __func__, state->demod); | |
1312 | ||
1313 | /* Only QPSK is supported for DVB-S */ | |
1314 | if (c->modulation != QPSK) { | |
1315 | dev_dbg(&state->priv->i2c->dev, | |
1316 | "%s() demod%d unsupported modulation (%d)\n", | |
1317 | __func__, state->demod, c->modulation); | |
1318 | return -EINVAL; | |
1319 | } | |
1320 | ||
1321 | /* Pilot doesn't exist in DVB-S, turn bit off */ | |
1322 | state->dnxt.pilot_val = CX24117_PILOT_OFF; | |
1323 | ||
1324 | /* DVB-S only supports 0.35 */ | |
1325 | state->dnxt.rolloff_val = CX24117_ROLLOFF_035; | |
1326 | break; | |
1327 | ||
1328 | case SYS_DVBS2: | |
1329 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n", | |
1330 | __func__, state->demod); | |
1331 | ||
1332 | /* | |
1333 | * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, | |
1334 | * but not hardware auto detection | |
1335 | */ | |
1336 | if (c->modulation != PSK_8 && c->modulation != QPSK) { | |
1337 | dev_dbg(&state->priv->i2c->dev, | |
1338 | "%s() demod%d unsupported modulation (%d)\n", | |
1339 | __func__, state->demod, c->modulation); | |
1340 | return -EOPNOTSUPP; | |
1341 | } | |
1342 | ||
1343 | switch (c->pilot) { | |
1344 | case PILOT_AUTO: | |
1345 | state->dnxt.pilot_val = CX24117_PILOT_AUTO; | |
1346 | break; | |
1347 | case PILOT_OFF: | |
1348 | state->dnxt.pilot_val = CX24117_PILOT_OFF; | |
1349 | break; | |
1350 | case PILOT_ON: | |
1351 | state->dnxt.pilot_val = CX24117_PILOT_ON; | |
1352 | break; | |
1353 | default: | |
1354 | dev_dbg(&state->priv->i2c->dev, | |
1355 | "%s() demod%d unsupported pilot mode (%d)\n", | |
1356 | __func__, state->demod, c->pilot); | |
1357 | return -EOPNOTSUPP; | |
1358 | } | |
1359 | ||
1360 | switch (c->rolloff) { | |
1361 | case ROLLOFF_20: | |
1362 | state->dnxt.rolloff_val = CX24117_ROLLOFF_020; | |
1363 | break; | |
1364 | case ROLLOFF_25: | |
1365 | state->dnxt.rolloff_val = CX24117_ROLLOFF_025; | |
1366 | break; | |
1367 | case ROLLOFF_35: | |
1368 | state->dnxt.rolloff_val = CX24117_ROLLOFF_035; | |
1369 | break; | |
1370 | case ROLLOFF_AUTO: | |
1371 | state->dnxt.rolloff_val = CX24117_ROLLOFF_035; | |
1372 | /* soft-auto rolloff */ | |
1373 | retune = 3; | |
1374 | break; | |
1375 | default: | |
1376 | dev_warn(&state->priv->i2c->dev, | |
1377 | "%s: demod%d unsupported rolloff (%d)\n", | |
1378 | KBUILD_MODNAME, state->demod, c->rolloff); | |
1379 | return -EOPNOTSUPP; | |
1380 | } | |
1381 | break; | |
1382 | ||
1383 | default: | |
1384 | dev_warn(&state->priv->i2c->dev, | |
1385 | "%s: demod %d unsupported delivery system (%d)\n", | |
1386 | KBUILD_MODNAME, state->demod, c->delivery_system); | |
1387 | return -EINVAL; | |
1388 | } | |
1389 | ||
1390 | state->dnxt.delsys = c->delivery_system; | |
1391 | state->dnxt.modulation = c->modulation; | |
1392 | state->dnxt.frequency = c->frequency; | |
1393 | state->dnxt.pilot = c->pilot; | |
1394 | state->dnxt.rolloff = c->rolloff; | |
1395 | ||
1396 | ret = cx24117_set_inversion(state, c->inversion); | |
1397 | if (ret != 0) | |
1398 | return ret; | |
1399 | ||
1400 | ret = cx24117_set_fec(state, | |
1401 | c->delivery_system, c->modulation, c->fec_inner); | |
1402 | if (ret != 0) | |
1403 | return ret; | |
1404 | ||
1405 | ret = cx24117_set_symbolrate(state, c->symbol_rate); | |
1406 | if (ret != 0) | |
1407 | return ret; | |
1408 | ||
1409 | /* discard the 'current' tuning parameters and prepare to tune */ | |
1410 | cx24117_clone_params(fe); | |
1411 | ||
1412 | dev_dbg(&state->priv->i2c->dev, | |
1413 | "%s: delsys = %d\n", __func__, state->dcur.delsys); | |
1414 | dev_dbg(&state->priv->i2c->dev, | |
1415 | "%s: modulation = %d\n", __func__, state->dcur.modulation); | |
1416 | dev_dbg(&state->priv->i2c->dev, | |
1417 | "%s: frequency = %d\n", __func__, state->dcur.frequency); | |
1418 | dev_dbg(&state->priv->i2c->dev, | |
1419 | "%s: pilot = %d (val = 0x%02x)\n", __func__, | |
1420 | state->dcur.pilot, state->dcur.pilot_val); | |
1421 | dev_dbg(&state->priv->i2c->dev, | |
1422 | "%s: retune = %d\n", __func__, retune); | |
1423 | dev_dbg(&state->priv->i2c->dev, | |
1424 | "%s: rolloff = %d (val = 0x%02x)\n", __func__, | |
1425 | state->dcur.rolloff, state->dcur.rolloff_val); | |
1426 | dev_dbg(&state->priv->i2c->dev, | |
1427 | "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); | |
1428 | dev_dbg(&state->priv->i2c->dev, | |
1429 | "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, | |
1430 | state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); | |
1431 | dev_dbg(&state->priv->i2c->dev, | |
1432 | "%s: Inversion = %d (val = 0x%02x)\n", __func__, | |
1433 | state->dcur.inversion, state->dcur.inversion_val); | |
1434 | ||
1435 | /* Prepare a tune request */ | |
1436 | cmd.args[0] = CMD_TUNEREQUEST; | |
1437 | ||
1438 | /* demod */ | |
1439 | cmd.args[1] = state->demod; | |
1440 | ||
1441 | /* Frequency */ | |
1442 | cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16; | |
1443 | cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8; | |
1444 | cmd.args[4] = (state->dcur.frequency & 0x0000ff); | |
1445 | ||
1446 | /* Symbol Rate */ | |
1447 | cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; | |
1448 | cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff); | |
1449 | ||
1450 | /* Automatic Inversion */ | |
1451 | cmd.args[7] = state->dcur.inversion_val; | |
1452 | ||
1453 | /* Modulation / FEC / Pilot */ | |
1454 | cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val; | |
1455 | ||
1456 | cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8; | |
1457 | cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff; | |
1458 | ||
1459 | cmd.args[11] = state->dcur.rolloff_val; | |
1460 | cmd.args[12] = state->dcur.fec_mask; | |
1461 | ||
1462 | if (state->dcur.symbol_rate > 30000000) { | |
1463 | reg_ratediv = 0x04; | |
1464 | reg_clkdiv = 0x02; | |
1465 | } else if (state->dcur.symbol_rate > 10000000) { | |
1466 | reg_ratediv = 0x06; | |
1467 | reg_clkdiv = 0x03; | |
1468 | } else { | |
1469 | reg_ratediv = 0x0a; | |
1470 | reg_clkdiv = 0x05; | |
1471 | } | |
1472 | ||
1473 | cmd.args[13] = reg_ratediv; | |
1474 | cmd.args[14] = reg_clkdiv; | |
1475 | ||
1476 | cx24117_writereg(state, (state->demod == 0) ? | |
1477 | CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv); | |
1478 | cx24117_writereg(state, (state->demod == 0) ? | |
1479 | CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv); | |
1480 | ||
1481 | cmd.args[15] = CX24117_PNE; | |
1482 | cmd.len = 16; | |
1483 | ||
1484 | do { | |
1485 | /* Reset status register */ | |
1486 | status = cx24117_readreg(state, (state->demod == 0) ? | |
1487 | CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) & | |
1488 | CX24117_SIGNAL_MASK; | |
1489 | ||
1490 | dev_dbg(&state->priv->i2c->dev, | |
1491 | "%s() demod%d status_setfe = %02x\n", | |
1492 | __func__, state->demod, status); | |
1493 | ||
1494 | cx24117_writereg(state, (state->demod == 0) ? | |
1495 | CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status); | |
1496 | ||
1497 | /* Tune */ | |
1498 | ret = cx24117_cmd_execute(fe, &cmd); | |
1499 | if (ret != 0) | |
1500 | break; | |
1501 | ||
1502 | /* | |
1503 | * Wait for up to 500 ms before retrying | |
1504 | * | |
1505 | * If we are able to tune then generally it occurs within 100ms. | |
1506 | * If it takes longer, try a different rolloff setting. | |
1507 | */ | |
1508 | for (i = 0; i < 50; i++) { | |
1509 | cx24117_read_status(fe, &tunerstat); | |
1510 | status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); | |
1511 | if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { | |
1512 | dev_dbg(&state->priv->i2c->dev, | |
1513 | "%s() demod%d tuned\n", | |
1514 | __func__, state->demod); | |
1515 | return 0; | |
1516 | } | |
1517 | msleep(20); | |
1518 | } | |
1519 | ||
1520 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n", | |
1521 | __func__, state->demod); | |
1522 | ||
1523 | /* try next rolloff value */ | |
1524 | if (state->dcur.rolloff == 3) | |
1525 | cmd.args[11]--; | |
1526 | ||
1527 | } while (--retune); | |
1528 | return -EINVAL; | |
1529 | } | |
1530 | ||
1531 | static int cx24117_tune(struct dvb_frontend *fe, bool re_tune, | |
0df289a2 | 1532 | unsigned int mode_flags, unsigned int *delay, enum fe_status *status) |
0d788680 LA |
1533 | { |
1534 | struct cx24117_state *state = fe->demodulator_priv; | |
1535 | ||
1536 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1537 | __func__, state->demod); | |
1538 | ||
1539 | *delay = HZ / 5; | |
1540 | if (re_tune) { | |
1541 | int ret = cx24117_set_frontend(fe); | |
1542 | if (ret) | |
1543 | return ret; | |
1544 | } | |
1545 | return cx24117_read_status(fe, status); | |
1546 | } | |
1547 | ||
8d718e53 | 1548 | static enum dvbfe_algo cx24117_get_algo(struct dvb_frontend *fe) |
0d788680 LA |
1549 | { |
1550 | return DVBFE_ALGO_HW; | |
1551 | } | |
1552 | ||
7e3e68bc MCC |
1553 | static int cx24117_get_frontend(struct dvb_frontend *fe, |
1554 | struct dtv_frontend_properties *c) | |
0d788680 LA |
1555 | { |
1556 | struct cx24117_state *state = fe->demodulator_priv; | |
0d788680 LA |
1557 | struct cx24117_cmd cmd; |
1558 | u8 reg, st, inv; | |
1559 | int ret, idx; | |
1560 | unsigned int freq; | |
1561 | short srate_os, freq_os; | |
1562 | ||
1563 | u8 buf[0x1f-4]; | |
1564 | ||
9fa7c419 LA |
1565 | /* Read current tune parameters */ |
1566 | cmd.args[0] = CMD_GETCTLACC; | |
0d788680 LA |
1567 | cmd.args[1] = (u8) state->demod; |
1568 | cmd.len = 2; | |
1569 | ret = cx24117_cmd_execute(fe, &cmd); | |
1570 | if (ret != 0) | |
1571 | return ret; | |
1572 | ||
1573 | /* read all required regs at once */ | |
1574 | reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1; | |
1575 | ret = cx24117_readregN(state, reg, buf, 0x1f-4); | |
1576 | if (ret != 0) | |
1577 | return ret; | |
1578 | ||
1579 | st = buf[5]; | |
1580 | ||
1581 | /* get spectral inversion */ | |
1582 | inv = (((state->demod == 0) ? ~st : st) >> 6) & 1; | |
1583 | if (inv == 0) | |
1584 | c->inversion = INVERSION_OFF; | |
1585 | else | |
1586 | c->inversion = INVERSION_ON; | |
1587 | ||
1588 | /* modulation and fec */ | |
1589 | idx = st & 0x3f; | |
1590 | if (c->delivery_system == SYS_DVBS2) { | |
1591 | if (idx > 11) | |
1592 | idx += 9; | |
1593 | else | |
1594 | idx += 7; | |
1595 | } | |
1596 | ||
1597 | c->modulation = cx24117_modfec_modes[idx].modulation; | |
1598 | c->fec_inner = cx24117_modfec_modes[idx].fec; | |
1599 | ||
1600 | /* frequency */ | |
1601 | freq = (buf[0] << 16) | (buf[1] << 8) | buf[2]; | |
1602 | freq_os = (buf[8] << 8) | buf[9]; | |
1603 | c->frequency = freq + freq_os; | |
1604 | ||
1605 | /* symbol rate */ | |
1606 | srate_os = (buf[10] << 8) | buf[11]; | |
1607 | c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate; | |
1608 | return 0; | |
1609 | } | |
1610 | ||
bd336e63 | 1611 | static const struct dvb_frontend_ops cx24117_ops = { |
0d788680 LA |
1612 | .delsys = { SYS_DVBS, SYS_DVBS2 }, |
1613 | .info = { | |
1614 | .name = "Conexant CX24117/CX24132", | |
f1b1eabf MCC |
1615 | .frequency_min_hz = 950 * MHz, |
1616 | .frequency_max_hz = 2150 * MHz, | |
1617 | .frequency_stepsize_hz = 1011 * kHz, | |
1618 | .frequency_tolerance_hz = 5 * MHz, | |
0d788680 LA |
1619 | .symbol_rate_min = 1000000, |
1620 | .symbol_rate_max = 45000000, | |
1621 | .caps = FE_CAN_INVERSION_AUTO | | |
1622 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
1623 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | | |
1624 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
1625 | FE_CAN_2G_MODULATION | | |
1626 | FE_CAN_QPSK | FE_CAN_RECOVER | |
1627 | }, | |
1628 | ||
1629 | .release = cx24117_release, | |
1630 | ||
1631 | .init = cx24117_initfe, | |
1632 | .sleep = cx24117_sleep, | |
1633 | .read_status = cx24117_read_status, | |
1634 | .read_ber = cx24117_read_ber, | |
1635 | .read_signal_strength = cx24117_read_signal_strength, | |
1636 | .read_snr = cx24117_read_snr, | |
1637 | .read_ucblocks = cx24117_read_ucblocks, | |
1638 | .set_tone = cx24117_set_tone, | |
1639 | .set_voltage = cx24117_set_voltage, | |
1640 | .diseqc_send_master_cmd = cx24117_send_diseqc_msg, | |
1641 | .diseqc_send_burst = cx24117_diseqc_send_burst, | |
1642 | .get_frontend_algo = cx24117_get_algo, | |
1643 | .tune = cx24117_tune, | |
1644 | ||
1645 | .set_frontend = cx24117_set_frontend, | |
1646 | .get_frontend = cx24117_get_frontend, | |
1647 | }; | |
1648 | ||
1649 | ||
1650 | MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware"); | |
1651 | MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)"); | |
1652 | MODULE_LICENSE("GPL"); | |
1653 | MODULE_VERSION("1.1"); | |
1654 | MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE); | |
1655 |