Commit | Line | Data |
---|---|---|
0d46748c ST |
1 | /* |
2 | Conexant cx24116/cx24118 - DVBS/S2 Satellite demod/tuner driver | |
3 | ||
4 | Copyright (C) 2006-2008 Steven Toth <stoth@hauppauge.com> | |
490c8684 DB |
5 | Copyright (C) 2006-2007 Georg Acher |
6 | Copyright (C) 2007-2008 Darron Broad | |
7 | March 2007 | |
8 | Fixed some bugs. | |
9 | Added diseqc support. | |
10 | Added corrected signal strength support. | |
11 | August 2007 | |
12 | Sync with legacy version. | |
13 | Some clean ups. | |
14 | Copyright (C) 2008 Igor Liplianin | |
15 | September, 9th 2008 | |
c063a489 IL |
16 | Fixed locking on high symbol rates (>30000). |
17 | Implement MPEG initialization parameter. | |
c7bdcd0f IL |
18 | January, 17th 2009 |
19 | Fill set_voltage with actually control voltage code. | |
20 | Correct set tone to not affect voltage. | |
0d46748c ST |
21 | |
22 | This program is free software; you can redistribute it and/or modify | |
23 | it under the terms of the GNU General Public License as published by | |
24 | the Free Software Foundation; either version 2 of the License, or | |
25 | (at your option) any later version. | |
26 | ||
27 | This program is distributed in the hope that it will be useful, | |
28 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
29 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
30 | GNU General Public License for more details. | |
31 | ||
32 | You should have received a copy of the GNU General Public License | |
33 | along with this program; if not, write to the Free Software | |
34 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
35 | */ | |
36 | ||
0d46748c ST |
37 | #include <linux/slab.h> |
38 | #include <linux/kernel.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/moduleparam.h> | |
41 | #include <linux/init.h> | |
42 | #include <linux/firmware.h> | |
43 | ||
44 | #include "dvb_frontend.h" | |
45 | #include "cx24116.h" | |
46 | ||
f11ec7d4 ST |
47 | static int debug; |
48 | module_param(debug, int, 0644); | |
49 | MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); | |
50 | ||
490c8684 DB |
51 | #define dprintk(args...) \ |
52 | do { \ | |
f11ec7d4 | 53 | if (debug) \ |
98c94823 | 54 | printk(KERN_INFO "cx24116: " args); \ |
490c8684 DB |
55 | } while (0) |
56 | ||
0d46748c ST |
57 | #define CX24116_DEFAULT_FIRMWARE "dvb-fe-cx24116.fw" |
58 | #define CX24116_SEARCH_RANGE_KHZ 5000 | |
59 | ||
490c8684 DB |
60 | /* known registers */ |
61 | #define CX24116_REG_COMMAND (0x00) /* command args 0x00..0x1e */ | |
62 | #define CX24116_REG_EXECUTE (0x1f) /* execute command */ | |
63 | #define CX24116_REG_MAILBOX (0x96) /* FW or multipurpose mailbox? */ | |
64 | #define CX24116_REG_RESET (0x20) /* reset status > 0 */ | |
65 | #define CX24116_REG_SIGNAL (0x9e) /* signal low */ | |
66 | #define CX24116_REG_SSTATUS (0x9d) /* signal high / status */ | |
8953db79 | 67 | #define CX24116_REG_QUALITY8 (0xa3) |
490c8684 | 68 | #define CX24116_REG_QSTATUS (0xbc) |
8953db79 | 69 | #define CX24116_REG_QUALITY0 (0xd5) |
490c8684 DB |
70 | #define CX24116_REG_BER0 (0xc9) |
71 | #define CX24116_REG_BER8 (0xc8) | |
72 | #define CX24116_REG_BER16 (0xc7) | |
73 | #define CX24116_REG_BER24 (0xc6) | |
74 | #define CX24116_REG_UCB0 (0xcb) | |
75 | #define CX24116_REG_UCB8 (0xca) | |
76 | #define CX24116_REG_CLKDIV (0xf3) | |
77 | #define CX24116_REG_RATEDIV (0xf9) | |
98c94823 ST |
78 | |
79 | /* configured fec (not tuned) or actual FEC (tuned) 1=1/2 2=2/3 etc */ | |
80 | #define CX24116_REG_FECSTATUS (0x9c) | |
681faa0b DB |
81 | |
82 | /* FECSTATUS bits */ | |
98c94823 ST |
83 | /* mask to determine configured fec (not tuned) or actual fec (tuned) */ |
84 | #define CX24116_FEC_FECMASK (0x1f) | |
85 | ||
86 | /* Select DVB-S demodulator, else DVB-S2 */ | |
87 | #define CX24116_FEC_DVBS (0x20) | |
681faa0b | 88 | #define CX24116_FEC_UNKNOWN (0x40) /* Unknown/unused */ |
98c94823 ST |
89 | |
90 | /* Pilot mode requested when tuning else always reset when tuned */ | |
91 | #define CX24116_FEC_PILOT (0x80) | |
0d46748c ST |
92 | |
93 | /* arg buffer size */ | |
94 | #define CX24116_ARGLEN (0x1e) | |
95 | ||
490c8684 DB |
96 | /* rolloff */ |
97 | #define CX24116_ROLLOFF_020 (0x00) | |
98 | #define CX24116_ROLLOFF_025 (0x01) | |
99 | #define CX24116_ROLLOFF_035 (0x02) | |
100 | ||
101 | /* pilot bit */ | |
01a8f038 DB |
102 | #define CX24116_PILOT_OFF (0x00) |
103 | #define CX24116_PILOT_ON (0x40) | |
490c8684 DB |
104 | |
105 | /* signal status */ | |
106 | #define CX24116_HAS_SIGNAL (0x01) | |
107 | #define CX24116_HAS_CARRIER (0x02) | |
108 | #define CX24116_HAS_VITERBI (0x04) | |
109 | #define CX24116_HAS_SYNCLOCK (0x08) | |
110 | #define CX24116_HAS_UNKNOWN1 (0x10) | |
111 | #define CX24116_HAS_UNKNOWN2 (0x20) | |
6639f1e0 | 112 | #define CX24116_STATUS_MASK (0x0f) |
490c8684 DB |
113 | #define CX24116_SIGNAL_MASK (0xc0) |
114 | ||
115 | #define CX24116_DISEQC_TONEOFF (0) /* toneburst never sent */ | |
116 | #define CX24116_DISEQC_TONECACHE (1) /* toneburst cached */ | |
117 | #define CX24116_DISEQC_MESGCACHE (2) /* message cached */ | |
118 | ||
0d46748c ST |
119 | /* arg offset for DiSEqC */ |
120 | #define CX24116_DISEQC_BURST (1) | |
121 | #define CX24116_DISEQC_ARG2_2 (2) /* unknown value=2 */ | |
122 | #define CX24116_DISEQC_ARG3_0 (3) /* unknown value=0 */ | |
123 | #define CX24116_DISEQC_ARG4_0 (4) /* unknown value=0 */ | |
124 | #define CX24116_DISEQC_MSGLEN (5) | |
125 | #define CX24116_DISEQC_MSGOFS (6) | |
126 | ||
127 | /* DiSEqC burst */ | |
128 | #define CX24116_DISEQC_MINI_A (0) | |
129 | #define CX24116_DISEQC_MINI_B (1) | |
130 | ||
490c8684 DB |
131 | /* DiSEqC tone burst */ |
132 | static int toneburst = 1; | |
f11ec7d4 | 133 | module_param(toneburst, int, 0644); |
98c94823 ST |
134 | MODULE_PARM_DESC(toneburst, "DiSEqC toneburst 0=OFF, 1=TONE CACHE, "\ |
135 | "2=MESSAGE CACHE (default:1)"); | |
490c8684 | 136 | |
8953db79 | 137 | /* SNR measurements */ |
f11ec7d4 ST |
138 | static int esno_snr; |
139 | module_param(esno_snr, int, 0644); | |
53f1fe94 | 140 | MODULE_PARM_DESC(esno_snr, "SNR return units, 0=PERCENTAGE 0-100, "\ |
98c94823 | 141 | "1=ESNO(db * 10) (default:0)"); |
8953db79 | 142 | |
f11ec7d4 | 143 | enum cmds { |
490c8684 | 144 | CMD_SET_VCO = 0x10, |
0d46748c | 145 | CMD_TUNEREQUEST = 0x11, |
490c8684 DB |
146 | CMD_MPEGCONFIG = 0x13, |
147 | CMD_TUNERINIT = 0x14, | |
148 | CMD_BANDWIDTH = 0x15, | |
149 | CMD_GETAGC = 0x19, | |
150 | CMD_LNBCONFIG = 0x20, | |
151 | CMD_LNBSEND = 0x21, /* Formerly CMD_SEND_DISEQC */ | |
c7bdcd0f | 152 | CMD_LNBDCLEVEL = 0x22, |
0d46748c | 153 | CMD_SET_TONE = 0x23, |
490c8684 DB |
154 | CMD_UPDFWVERS = 0x35, |
155 | CMD_TUNERSLEEP = 0x36, | |
156 | CMD_AGCCONTROL = 0x3b, /* Unknown */ | |
0d46748c ST |
157 | }; |
158 | ||
159 | /* The Demod/Tuner can't easily provide these, we cache them */ | |
f11ec7d4 | 160 | struct cx24116_tuning { |
0d46748c ST |
161 | u32 frequency; |
162 | u32 symbol_rate; | |
0df289a2 MCC |
163 | enum fe_spectral_inversion inversion; |
164 | enum fe_code_rate fec; | |
0d46748c | 165 | |
0df289a2 MCC |
166 | enum fe_delivery_system delsys; |
167 | enum fe_modulation modulation; | |
168 | enum fe_pilot pilot; | |
169 | enum fe_rolloff rolloff; | |
0d46748c ST |
170 | |
171 | /* Demod values */ | |
172 | u8 fec_val; | |
173 | u8 fec_mask; | |
174 | u8 inversion_val; | |
01a8f038 | 175 | u8 pilot_val; |
490c8684 | 176 | u8 rolloff_val; |
0d46748c ST |
177 | }; |
178 | ||
179 | /* Basic commands that are sent to the firmware */ | |
f11ec7d4 | 180 | struct cx24116_cmd { |
0d46748c ST |
181 | u8 len; |
182 | u8 args[CX24116_ARGLEN]; | |
183 | }; | |
184 | ||
f11ec7d4 ST |
185 | struct cx24116_state { |
186 | struct i2c_adapter *i2c; | |
187 | const struct cx24116_config *config; | |
0d46748c ST |
188 | |
189 | struct dvb_frontend frontend; | |
190 | ||
191 | struct cx24116_tuning dcur; | |
192 | struct cx24116_tuning dnxt; | |
193 | ||
194 | u8 skip_fw_load; | |
195 | u8 burst; | |
490c8684 | 196 | struct cx24116_cmd dsec_cmd; |
0d46748c ST |
197 | }; |
198 | ||
f11ec7d4 | 199 | static int cx24116_writereg(struct cx24116_state *state, int reg, int data) |
0d46748c ST |
200 | { |
201 | u8 buf[] = { reg, data }; | |
202 | struct i2c_msg msg = { .addr = state->config->demod_address, | |
203 | .flags = 0, .buf = buf, .len = 2 }; | |
204 | int err; | |
205 | ||
f11ec7d4 | 206 | if (debug > 1) |
0d46748c | 207 | printk("cx24116: %s: write reg 0x%02x, value 0x%02x\n", |
f11ec7d4 | 208 | __func__, reg, data); |
0d46748c | 209 | |
f11ec7d4 ST |
210 | err = i2c_transfer(state->i2c, &msg, 1); |
211 | if (err != 1) { | |
4bd69e7b MCC |
212 | printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n", |
213 | __func__, err, reg, data); | |
0d46748c ST |
214 | return -EREMOTEIO; |
215 | } | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
220 | /* Bulk byte writes to a single I2C address, for 32k firmware load */ | |
f11ec7d4 | 221 | static int cx24116_writeregN(struct cx24116_state *state, int reg, |
64decbfe | 222 | const u8 *data, u16 len) |
0d46748c ST |
223 | { |
224 | int ret = -EREMOTEIO; | |
225 | struct i2c_msg msg; | |
226 | u8 *buf; | |
227 | ||
228 | buf = kmalloc(len + 1, GFP_KERNEL); | |
229 | if (buf == NULL) { | |
230 | printk("Unable to kmalloc\n"); | |
231 | ret = -ENOMEM; | |
232 | goto error; | |
233 | } | |
234 | ||
235 | *(buf) = reg; | |
236 | memcpy(buf + 1, data, len); | |
237 | ||
238 | msg.addr = state->config->demod_address; | |
239 | msg.flags = 0; | |
240 | msg.buf = buf; | |
241 | msg.len = len + 1; | |
242 | ||
f11ec7d4 | 243 | if (debug > 1) |
98c94823 | 244 | printk(KERN_INFO "cx24116: %s: write regN 0x%02x, len = %d\n", |
f11ec7d4 | 245 | __func__, reg, len); |
0d46748c | 246 | |
f11ec7d4 ST |
247 | ret = i2c_transfer(state->i2c, &msg, 1); |
248 | if (ret != 1) { | |
98c94823 | 249 | printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x\n", |
0d46748c ST |
250 | __func__, ret, reg); |
251 | ret = -EREMOTEIO; | |
252 | } | |
253 | ||
254 | error: | |
255 | kfree(buf); | |
256 | ||
257 | return ret; | |
258 | } | |
259 | ||
f11ec7d4 | 260 | static int cx24116_readreg(struct cx24116_state *state, u8 reg) |
0d46748c ST |
261 | { |
262 | int ret; | |
263 | u8 b0[] = { reg }; | |
264 | u8 b1[] = { 0 }; | |
265 | struct i2c_msg msg[] = { | |
f11ec7d4 ST |
266 | { .addr = state->config->demod_address, .flags = 0, |
267 | .buf = b0, .len = 1 }, | |
268 | { .addr = state->config->demod_address, .flags = I2C_M_RD, | |
269 | .buf = b1, .len = 1 } | |
0d46748c ST |
270 | }; |
271 | ||
272 | ret = i2c_transfer(state->i2c, msg, 2); | |
273 | ||
274 | if (ret != 2) { | |
98c94823 ST |
275 | printk(KERN_ERR "%s: reg=0x%x (error=%d)\n", |
276 | __func__, reg, ret); | |
0d46748c ST |
277 | return ret; |
278 | } | |
279 | ||
f11ec7d4 | 280 | if (debug > 1) |
98c94823 | 281 | printk(KERN_INFO "cx24116: read reg 0x%02x, value 0x%02x\n", |
f11ec7d4 | 282 | reg, b1[0]); |
0d46748c ST |
283 | |
284 | return b1[0]; | |
285 | } | |
286 | ||
98c94823 | 287 | static int cx24116_set_inversion(struct cx24116_state *state, |
0df289a2 | 288 | enum fe_spectral_inversion inversion) |
0d46748c ST |
289 | { |
290 | dprintk("%s(%d)\n", __func__, inversion); | |
291 | ||
292 | switch (inversion) { | |
293 | case INVERSION_OFF: | |
294 | state->dnxt.inversion_val = 0x00; | |
295 | break; | |
296 | case INVERSION_ON: | |
297 | state->dnxt.inversion_val = 0x04; | |
298 | break; | |
299 | case INVERSION_AUTO: | |
300 | state->dnxt.inversion_val = 0x0C; | |
301 | break; | |
302 | default: | |
303 | return -EINVAL; | |
304 | } | |
305 | ||
306 | state->dnxt.inversion = inversion; | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
490c8684 DB |
311 | /* |
312 | * modfec (modulation and FEC) | |
313 | * =========================== | |
314 | * | |
315 | * MOD FEC mask/val standard | |
316 | * ---- -------- ----------- -------- | |
317 | * QPSK FEC_1_2 0x02 0x02+X DVB-S | |
318 | * QPSK FEC_2_3 0x04 0x02+X DVB-S | |
319 | * QPSK FEC_3_4 0x08 0x02+X DVB-S | |
320 | * QPSK FEC_4_5 0x10 0x02+X DVB-S (?) | |
321 | * QPSK FEC_5_6 0x20 0x02+X DVB-S | |
322 | * QPSK FEC_6_7 0x40 0x02+X DVB-S | |
323 | * QPSK FEC_7_8 0x80 0x02+X DVB-S | |
324 | * QPSK FEC_8_9 0x01 0x02+X DVB-S (?) (NOT SUPPORTED?) | |
325 | * QPSK AUTO 0xff 0x02+X DVB-S | |
326 | * | |
327 | * For DVB-S high byte probably represents FEC | |
328 | * and low byte selects the modulator. The high | |
329 | * byte is search range mask. Bit 5 may turn | |
330 | * on DVB-S and remaining bits represent some | |
331 | * kind of calibration (how/what i do not know). | |
332 | * | |
333 | * Eg.(2/3) szap "Zone Horror" | |
334 | * | |
335 | * mask/val = 0x04, 0x20 | |
98c94823 | 336 | * status 1f | signal c3c0 | snr a333 | ber 00000098 | unc 0 | FE_HAS_LOCK |
490c8684 DB |
337 | * |
338 | * mask/val = 0x04, 0x30 | |
98c94823 | 339 | * status 1f | signal c3c0 | snr a333 | ber 00000000 | unc 0 | FE_HAS_LOCK |
490c8684 DB |
340 | * |
341 | * After tuning FECSTATUS contains actual FEC | |
342 | * in use numbered 1 through to 8 for 1/2 .. 2/3 etc | |
343 | * | |
344 | * NBC=NOT/NON BACKWARD COMPATIBLE WITH DVB-S (DVB-S2 only) | |
345 | * | |
346 | * NBC-QPSK FEC_1_2 0x00, 0x04 DVB-S2 | |
347 | * NBC-QPSK FEC_3_5 0x00, 0x05 DVB-S2 | |
348 | * NBC-QPSK FEC_2_3 0x00, 0x06 DVB-S2 | |
349 | * NBC-QPSK FEC_3_4 0x00, 0x07 DVB-S2 | |
350 | * NBC-QPSK FEC_4_5 0x00, 0x08 DVB-S2 | |
351 | * NBC-QPSK FEC_5_6 0x00, 0x09 DVB-S2 | |
352 | * NBC-QPSK FEC_8_9 0x00, 0x0a DVB-S2 | |
353 | * NBC-QPSK FEC_9_10 0x00, 0x0b DVB-S2 | |
354 | * | |
355 | * NBC-8PSK FEC_3_5 0x00, 0x0c DVB-S2 | |
356 | * NBC-8PSK FEC_2_3 0x00, 0x0d DVB-S2 | |
357 | * NBC-8PSK FEC_3_4 0x00, 0x0e DVB-S2 | |
358 | * NBC-8PSK FEC_5_6 0x00, 0x0f DVB-S2 | |
359 | * NBC-8PSK FEC_8_9 0x00, 0x10 DVB-S2 | |
360 | * NBC-8PSK FEC_9_10 0x00, 0x11 DVB-S2 | |
361 | * | |
362 | * For DVB-S2 low bytes selects both modulator | |
363 | * and FEC. High byte is meaningless here. To | |
364 | * set pilot, bit 6 (0x40) is set. When inspecting | |
365 | * FECSTATUS bit 7 (0x80) represents the pilot | |
366 | * selection whilst not tuned. When tuned, actual FEC | |
367 | * in use is found in FECSTATUS as per above. Pilot | |
368 | * value is reset. | |
369 | */ | |
370 | ||
0d46748c ST |
371 | /* A table of modulation, fec and configuration bytes for the demod. |
372 | * Not all S2 mmodulation schemes are support and not all rates with | |
373 | * a scheme are support. Especially, no auto detect when in S2 mode. | |
374 | */ | |
ffbc5f88 | 375 | static struct cx24116_modfec { |
0df289a2 MCC |
376 | enum fe_delivery_system delivery_system; |
377 | enum fe_modulation modulation; | |
378 | enum fe_code_rate fec; | |
0d46748c ST |
379 | u8 mask; /* In DVBS mode this is used to autodetect */ |
380 | u8 val; /* Passed to the firmware to indicate mode selection */ | |
381 | } CX24116_MODFEC_MODES[] = { | |
382 | /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ | |
490c8684 DB |
383 | |
384 | /*mod fec mask val */ | |
0a6393ae ST |
385 | { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, |
386 | { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ | |
387 | { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ | |
388 | { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ | |
389 | { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ | |
390 | { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ | |
391 | { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ | |
392 | { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ | |
393 | { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ | |
394 | { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, | |
0d46748c | 395 | /* NBC-QPSK */ |
0a6393ae ST |
396 | { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, |
397 | { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, | |
398 | { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, | |
399 | { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, | |
400 | { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, | |
401 | { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, | |
402 | { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, | |
403 | { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, | |
0d46748c | 404 | /* 8PSK */ |
0a6393ae ST |
405 | { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, |
406 | { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, | |
407 | { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, | |
408 | { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, | |
409 | { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, | |
410 | { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, | |
490c8684 DB |
411 | /* |
412 | * `val' can be found in the FECSTATUS register when tuning. | |
413 | * FECSTATUS will give the actual FEC in use if tuning was successful. | |
414 | */ | |
0d46748c ST |
415 | }; |
416 | ||
f11ec7d4 | 417 | static int cx24116_lookup_fecmod(struct cx24116_state *state, |
0df289a2 | 418 | enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f) |
0d46748c ST |
419 | { |
420 | int i, ret = -EOPNOTSUPP; | |
421 | ||
490c8684 DB |
422 | dprintk("%s(0x%02x,0x%02x)\n", __func__, m, f); |
423 | ||
f11ec7d4 | 424 | for (i = 0; i < ARRAY_SIZE(CX24116_MODFEC_MODES); i++) { |
3569476d DB |
425 | if ((d == CX24116_MODFEC_MODES[i].delivery_system) && |
426 | (m == CX24116_MODFEC_MODES[i].modulation) && | |
f11ec7d4 | 427 | (f == CX24116_MODFEC_MODES[i].fec)) { |
0d46748c ST |
428 | ret = i; |
429 | break; | |
430 | } | |
431 | } | |
432 | ||
433 | return ret; | |
434 | } | |
435 | ||
98c94823 | 436 | static int cx24116_set_fec(struct cx24116_state *state, |
0df289a2 MCC |
437 | enum fe_delivery_system delsys, |
438 | enum fe_modulation mod, | |
439 | enum fe_code_rate fec) | |
0d46748c ST |
440 | { |
441 | int ret = 0; | |
490c8684 DB |
442 | |
443 | dprintk("%s(0x%02x,0x%02x)\n", __func__, mod, fec); | |
0d46748c | 444 | |
3569476d | 445 | ret = cx24116_lookup_fecmod(state, delsys, mod, fec); |
0d46748c | 446 | |
f11ec7d4 | 447 | if (ret < 0) |
0d46748c ST |
448 | return ret; |
449 | ||
490c8684 | 450 | state->dnxt.fec = fec; |
0d46748c ST |
451 | state->dnxt.fec_val = CX24116_MODFEC_MODES[ret].val; |
452 | state->dnxt.fec_mask = CX24116_MODFEC_MODES[ret].mask; | |
490c8684 DB |
453 | dprintk("%s() mask/val = 0x%02x/0x%02x\n", __func__, |
454 | state->dnxt.fec_mask, state->dnxt.fec_val); | |
0d46748c ST |
455 | |
456 | return 0; | |
457 | } | |
458 | ||
f11ec7d4 | 459 | static int cx24116_set_symbolrate(struct cx24116_state *state, u32 rate) |
0d46748c | 460 | { |
490c8684 | 461 | dprintk("%s(%d)\n", __func__, rate); |
0d46748c | 462 | |
490c8684 DB |
463 | /* check if symbol rate is within limits */ |
464 | if ((rate > state->frontend.ops.info.symbol_rate_max) || | |
465 | (rate < state->frontend.ops.info.symbol_rate_min)) { | |
466 | dprintk("%s() unsupported symbol_rate = %d\n", __func__, rate); | |
467 | return -EOPNOTSUPP; | |
468 | } | |
0d46748c ST |
469 | |
470 | state->dnxt.symbol_rate = rate; | |
490c8684 | 471 | dprintk("%s() symbol_rate = %d\n", __func__, rate); |
0d46748c | 472 | |
490c8684 | 473 | return 0; |
0d46748c ST |
474 | } |
475 | ||
f11ec7d4 ST |
476 | static int cx24116_load_firmware(struct dvb_frontend *fe, |
477 | const struct firmware *fw); | |
0d46748c | 478 | |
f11ec7d4 | 479 | static int cx24116_firmware_ondemand(struct dvb_frontend *fe) |
0d46748c ST |
480 | { |
481 | struct cx24116_state *state = fe->demodulator_priv; | |
482 | const struct firmware *fw; | |
483 | int ret = 0; | |
484 | ||
f11ec7d4 | 485 | dprintk("%s()\n", __func__); |
0d46748c | 486 | |
f11ec7d4 | 487 | if (cx24116_readreg(state, 0x20) > 0) { |
0d46748c ST |
488 | |
489 | if (state->skip_fw_load) | |
490 | return 0; | |
491 | ||
492 | /* Load firmware */ | |
98c94823 ST |
493 | /* request the firmware, this will block until loaded */ |
494 | printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", | |
495 | __func__, CX24116_DEFAULT_FIRMWARE); | |
496 | ret = request_firmware(&fw, CX24116_DEFAULT_FIRMWARE, | |
e9785250 | 497 | state->i2c->dev.parent); |
98c94823 ST |
498 | printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", |
499 | __func__); | |
0d46748c | 500 | if (ret) { |
4bd69e7b MCC |
501 | printk(KERN_ERR "%s: No firmware uploaded (timeout or file not found?)\n", |
502 | __func__); | |
0d46748c ST |
503 | return ret; |
504 | } | |
505 | ||
98c94823 ST |
506 | /* Make sure we don't recurse back through here |
507 | * during loading */ | |
0d46748c ST |
508 | state->skip_fw_load = 1; |
509 | ||
510 | ret = cx24116_load_firmware(fe, fw); | |
511 | if (ret) | |
98c94823 ST |
512 | printk(KERN_ERR "%s: Writing firmware to device failed\n", |
513 | __func__); | |
0d46748c ST |
514 | |
515 | release_firmware(fw); | |
516 | ||
98c94823 ST |
517 | printk(KERN_INFO "%s: Firmware upload %s\n", __func__, |
518 | ret == 0 ? "complete" : "failed"); | |
0d46748c ST |
519 | |
520 | /* Ensure firmware is always loaded if required */ | |
521 | state->skip_fw_load = 0; | |
522 | } | |
523 | ||
524 | return ret; | |
525 | } | |
526 | ||
98c94823 ST |
527 | /* Take a basic firmware command structure, format it |
528 | * and forward it for processing | |
529 | */ | |
f11ec7d4 | 530 | static int cx24116_cmd_execute(struct dvb_frontend *fe, struct cx24116_cmd *cmd) |
0d46748c ST |
531 | { |
532 | struct cx24116_state *state = fe->demodulator_priv; | |
533 | int i, ret; | |
534 | ||
535 | dprintk("%s()\n", __func__); | |
536 | ||
537 | /* Load the firmware if required */ | |
f11ec7d4 ST |
538 | ret = cx24116_firmware_ondemand(fe); |
539 | if (ret != 0) { | |
98c94823 ST |
540 | printk(KERN_ERR "%s(): Unable initialise the firmware\n", |
541 | __func__); | |
0d46748c ST |
542 | return ret; |
543 | } | |
544 | ||
545 | /* Write the command */ | |
f11ec7d4 | 546 | for (i = 0; i < cmd->len ; i++) { |
0d46748c ST |
547 | dprintk("%s: 0x%02x == 0x%02x\n", __func__, i, cmd->args[i]); |
548 | cx24116_writereg(state, i, cmd->args[i]); | |
549 | } | |
550 | ||
551 | /* Start execution and wait for cmd to terminate */ | |
490c8684 | 552 | cx24116_writereg(state, CX24116_REG_EXECUTE, 0x01); |
f11ec7d4 | 553 | while (cx24116_readreg(state, CX24116_REG_EXECUTE)) { |
0d46748c | 554 | msleep(10); |
f11ec7d4 | 555 | if (i++ > 64) { |
98c94823 ST |
556 | /* Avoid looping forever if the firmware does |
557 | not respond */ | |
558 | printk(KERN_WARNING "%s() Firmware not responding\n", | |
559 | __func__); | |
0d46748c ST |
560 | return -EREMOTEIO; |
561 | } | |
562 | } | |
563 | return 0; | |
564 | } | |
565 | ||
f11ec7d4 ST |
566 | static int cx24116_load_firmware(struct dvb_frontend *fe, |
567 | const struct firmware *fw) | |
0d46748c | 568 | { |
f11ec7d4 | 569 | struct cx24116_state *state = fe->demodulator_priv; |
0d46748c | 570 | struct cx24116_cmd cmd; |
e0bae9b3 | 571 | int i, ret, len, max, remaining; |
490c8684 | 572 | unsigned char vers[4]; |
0d46748c ST |
573 | |
574 | dprintk("%s\n", __func__); | |
f11ec7d4 ST |
575 | dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n", |
576 | fw->size, | |
577 | fw->data[0], | |
578 | fw->data[1], | |
579 | fw->data[fw->size-2], | |
580 | fw->data[fw->size-1]); | |
0d46748c ST |
581 | |
582 | /* Toggle 88x SRST pin to reset demod */ | |
583 | if (state->config->reset_device) | |
584 | state->config->reset_device(fe); | |
585 | ||
586 | /* Begin the firmware load process */ | |
587 | /* Prepare the demod, load the firmware, cleanup after load */ | |
490c8684 DB |
588 | |
589 | /* Init PLL */ | |
590 | cx24116_writereg(state, 0xE5, 0x00); | |
0d46748c | 591 | cx24116_writereg(state, 0xF1, 0x08); |
490c8684 DB |
592 | cx24116_writereg(state, 0xF2, 0x13); |
593 | ||
594 | /* Start PLL */ | |
595 | cx24116_writereg(state, 0xe0, 0x03); | |
596 | cx24116_writereg(state, 0xe0, 0x00); | |
597 | ||
598 | /* Unknown */ | |
599 | cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46); | |
600 | cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00); | |
0d46748c | 601 | |
490c8684 | 602 | /* Unknown */ |
0d46748c ST |
603 | cx24116_writereg(state, 0xF0, 0x03); |
604 | cx24116_writereg(state, 0xF4, 0x81); | |
605 | cx24116_writereg(state, 0xF5, 0x00); | |
606 | cx24116_writereg(state, 0xF6, 0x00); | |
607 | ||
107d7b18 | 608 | /* Split firmware to the max I2C write len and write. |
e0bae9b3 AP |
609 | * Writes whole firmware as one write when i2c_wr_max is set to 0. */ |
610 | if (state->config->i2c_wr_max) | |
611 | max = state->config->i2c_wr_max; | |
612 | else | |
613 | max = INT_MAX; /* enough for 32k firmware */ | |
107d7b18 | 614 | |
e0bae9b3 | 615 | for (remaining = fw->size; remaining > 0; remaining -= max - 1) { |
107d7b18 | 616 | len = remaining; |
e0bae9b3 AP |
617 | if (len > max - 1) |
618 | len = max - 1; | |
107d7b18 AP |
619 | |
620 | cx24116_writeregN(state, 0xF7, &fw->data[fw->size - remaining], | |
621 | len); | |
622 | } | |
0d46748c ST |
623 | |
624 | cx24116_writereg(state, 0xF4, 0x10); | |
625 | cx24116_writereg(state, 0xF0, 0x00); | |
626 | cx24116_writereg(state, 0xF8, 0x06); | |
627 | ||
490c8684 DB |
628 | /* Firmware CMD 10: VCO config */ |
629 | cmd.args[0x00] = CMD_SET_VCO; | |
0d46748c ST |
630 | cmd.args[0x01] = 0x05; |
631 | cmd.args[0x02] = 0xdc; | |
632 | cmd.args[0x03] = 0xda; | |
633 | cmd.args[0x04] = 0xae; | |
634 | cmd.args[0x05] = 0xaa; | |
635 | cmd.args[0x06] = 0x04; | |
636 | cmd.args[0x07] = 0x9d; | |
637 | cmd.args[0x08] = 0xfc; | |
638 | cmd.args[0x09] = 0x06; | |
f11ec7d4 | 639 | cmd.len = 0x0a; |
0d46748c ST |
640 | ret = cx24116_cmd_execute(fe, &cmd); |
641 | if (ret != 0) | |
642 | return ret; | |
643 | ||
490c8684 | 644 | cx24116_writereg(state, CX24116_REG_SSTATUS, 0x00); |
0d46748c | 645 | |
490c8684 DB |
646 | /* Firmware CMD 14: Tuner config */ |
647 | cmd.args[0x00] = CMD_TUNERINIT; | |
0d46748c ST |
648 | cmd.args[0x01] = 0x00; |
649 | cmd.args[0x02] = 0x00; | |
f11ec7d4 | 650 | cmd.len = 0x03; |
0d46748c ST |
651 | ret = cx24116_cmd_execute(fe, &cmd); |
652 | if (ret != 0) | |
653 | return ret; | |
654 | ||
655 | cx24116_writereg(state, 0xe5, 0x00); | |
656 | ||
490c8684 DB |
657 | /* Firmware CMD 13: MPEG config */ |
658 | cmd.args[0x00] = CMD_MPEGCONFIG; | |
0d46748c ST |
659 | cmd.args[0x01] = 0x01; |
660 | cmd.args[0x02] = 0x75; | |
661 | cmd.args[0x03] = 0x00; | |
cc8c4f3a IL |
662 | if (state->config->mpg_clk_pos_pol) |
663 | cmd.args[0x04] = state->config->mpg_clk_pos_pol; | |
664 | else | |
665 | cmd.args[0x04] = 0x02; | |
0d46748c | 666 | cmd.args[0x05] = 0x00; |
f11ec7d4 | 667 | cmd.len = 0x06; |
0d46748c ST |
668 | ret = cx24116_cmd_execute(fe, &cmd); |
669 | if (ret != 0) | |
670 | return ret; | |
671 | ||
490c8684 DB |
672 | /* Firmware CMD 35: Get firmware version */ |
673 | cmd.args[0x00] = CMD_UPDFWVERS; | |
f11ec7d4 ST |
674 | cmd.len = 0x02; |
675 | for (i = 0; i < 4; i++) { | |
490c8684 DB |
676 | cmd.args[0x01] = i; |
677 | ret = cx24116_cmd_execute(fe, &cmd); | |
678 | if (ret != 0) | |
679 | return ret; | |
f11ec7d4 | 680 | vers[i] = cx24116_readreg(state, CX24116_REG_MAILBOX); |
490c8684 | 681 | } |
98c94823 | 682 | printk(KERN_INFO "%s: FW version %i.%i.%i.%i\n", __func__, |
490c8684 DB |
683 | vers[0], vers[1], vers[2], vers[3]); |
684 | ||
0d46748c ST |
685 | return 0; |
686 | } | |
687 | ||
0df289a2 | 688 | static int cx24116_read_status(struct dvb_frontend *fe, enum fe_status *status) |
0d46748c ST |
689 | { |
690 | struct cx24116_state *state = fe->demodulator_priv; | |
691 | ||
6639f1e0 DB |
692 | int lock = cx24116_readreg(state, CX24116_REG_SSTATUS) & |
693 | CX24116_STATUS_MASK; | |
0d46748c ST |
694 | |
695 | dprintk("%s: status = 0x%02x\n", __func__, lock); | |
696 | ||
697 | *status = 0; | |
698 | ||
490c8684 | 699 | if (lock & CX24116_HAS_SIGNAL) |
0d46748c | 700 | *status |= FE_HAS_SIGNAL; |
490c8684 | 701 | if (lock & CX24116_HAS_CARRIER) |
0d46748c | 702 | *status |= FE_HAS_CARRIER; |
490c8684 | 703 | if (lock & CX24116_HAS_VITERBI) |
0d46748c | 704 | *status |= FE_HAS_VITERBI; |
490c8684 | 705 | if (lock & CX24116_HAS_SYNCLOCK) |
0d46748c ST |
706 | *status |= FE_HAS_SYNC | FE_HAS_LOCK; |
707 | ||
708 | return 0; | |
709 | } | |
710 | ||
f11ec7d4 | 711 | static int cx24116_read_ber(struct dvb_frontend *fe, u32 *ber) |
0d46748c | 712 | { |
490c8684 DB |
713 | struct cx24116_state *state = fe->demodulator_priv; |
714 | ||
0d46748c | 715 | dprintk("%s()\n", __func__); |
490c8684 | 716 | |
f11ec7d4 ST |
717 | *ber = (cx24116_readreg(state, CX24116_REG_BER24) << 24) | |
718 | (cx24116_readreg(state, CX24116_REG_BER16) << 16) | | |
719 | (cx24116_readreg(state, CX24116_REG_BER8) << 8) | | |
720 | cx24116_readreg(state, CX24116_REG_BER0); | |
0d46748c ST |
721 | |
722 | return 0; | |
723 | } | |
724 | ||
490c8684 | 725 | /* TODO Determine function and scale appropriately */ |
f11ec7d4 ST |
726 | static int cx24116_read_signal_strength(struct dvb_frontend *fe, |
727 | u16 *signal_strength) | |
0d46748c ST |
728 | { |
729 | struct cx24116_state *state = fe->demodulator_priv; | |
490c8684 DB |
730 | struct cx24116_cmd cmd; |
731 | int ret; | |
732 | u16 sig_reading; | |
0d46748c ST |
733 | |
734 | dprintk("%s()\n", __func__); | |
735 | ||
490c8684 DB |
736 | /* Firmware CMD 19: Get AGC */ |
737 | cmd.args[0x00] = CMD_GETAGC; | |
f11ec7d4 | 738 | cmd.len = 0x01; |
490c8684 DB |
739 | ret = cx24116_cmd_execute(fe, &cmd); |
740 | if (ret != 0) | |
741 | return ret; | |
0d46748c | 742 | |
f11ec7d4 ST |
743 | sig_reading = |
744 | (cx24116_readreg(state, | |
745 | CX24116_REG_SSTATUS) & CX24116_SIGNAL_MASK) | | |
746 | (cx24116_readreg(state, CX24116_REG_SIGNAL) << 6); | |
747 | *signal_strength = 0 - sig_reading; | |
0d46748c | 748 | |
f11ec7d4 ST |
749 | dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n", |
750 | __func__, sig_reading, *signal_strength); | |
0d46748c ST |
751 | |
752 | return 0; | |
753 | } | |
754 | ||
490c8684 | 755 | /* SNR (0..100)% = (sig & 0xf0) * 10 + (sig & 0x0f) * 10 / 16 */ |
f11ec7d4 | 756 | static int cx24116_read_snr_pct(struct dvb_frontend *fe, u16 *snr) |
0d46748c | 757 | { |
490c8684 DB |
758 | struct cx24116_state *state = fe->demodulator_priv; |
759 | u8 snr_reading; | |
760 | static const u32 snr_tab[] = { /* 10 x Table (rounded up) */ | |
f11ec7d4 ST |
761 | 0x00000, 0x0199A, 0x03333, 0x04ccD, 0x06667, |
762 | 0x08000, 0x0999A, 0x0b333, 0x0cccD, 0x0e667, | |
763 | 0x10000, 0x1199A, 0x13333, 0x14ccD, 0x16667, | |
764 | 0x18000 }; | |
490c8684 | 765 | |
0d46748c | 766 | dprintk("%s()\n", __func__); |
490c8684 | 767 | |
8953db79 | 768 | snr_reading = cx24116_readreg(state, CX24116_REG_QUALITY0); |
490c8684 | 769 | |
f11ec7d4 | 770 | if (snr_reading >= 0xa0 /* 100% */) |
490c8684 DB |
771 | *snr = 0xffff; |
772 | else | |
f11ec7d4 ST |
773 | *snr = snr_tab[(snr_reading & 0xf0) >> 4] + |
774 | (snr_tab[(snr_reading & 0x0f)] >> 4); | |
490c8684 DB |
775 | |
776 | dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__, | |
777 | snr_reading, *snr); | |
0d46748c ST |
778 | |
779 | return 0; | |
780 | } | |
781 | ||
8953db79 ST |
782 | /* The reelbox patches show the value in the registers represents |
783 | * ESNO, from 0->30db (values 0->300). We provide this value by | |
784 | * default. | |
785 | */ | |
f11ec7d4 | 786 | static int cx24116_read_snr_esno(struct dvb_frontend *fe, u16 *snr) |
8953db79 ST |
787 | { |
788 | struct cx24116_state *state = fe->demodulator_priv; | |
789 | ||
790 | dprintk("%s()\n", __func__); | |
791 | ||
792 | *snr = cx24116_readreg(state, CX24116_REG_QUALITY8) << 8 | | |
793 | cx24116_readreg(state, CX24116_REG_QUALITY0); | |
794 | ||
795 | dprintk("%s: raw 0x%04x\n", __func__, *snr); | |
796 | ||
797 | return 0; | |
798 | } | |
799 | ||
f11ec7d4 | 800 | static int cx24116_read_snr(struct dvb_frontend *fe, u16 *snr) |
8953db79 ST |
801 | { |
802 | if (esno_snr == 1) | |
803 | return cx24116_read_snr_esno(fe, snr); | |
804 | else | |
805 | return cx24116_read_snr_pct(fe, snr); | |
806 | } | |
807 | ||
f11ec7d4 | 808 | static int cx24116_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) |
0d46748c | 809 | { |
490c8684 DB |
810 | struct cx24116_state *state = fe->demodulator_priv; |
811 | ||
0d46748c | 812 | dprintk("%s()\n", __func__); |
490c8684 | 813 | |
f11ec7d4 | 814 | *ucblocks = (cx24116_readreg(state, CX24116_REG_UCB8) << 8) | |
490c8684 | 815 | cx24116_readreg(state, CX24116_REG_UCB0); |
0d46748c ST |
816 | |
817 | return 0; | |
818 | } | |
819 | ||
820 | /* Overwrite the current tuning params, we are about to tune */ | |
f11ec7d4 | 821 | static void cx24116_clone_params(struct dvb_frontend *fe) |
0d46748c ST |
822 | { |
823 | struct cx24116_state *state = fe->demodulator_priv; | |
ee45ddc1 | 824 | state->dcur = state->dnxt; |
0d46748c ST |
825 | } |
826 | ||
490c8684 | 827 | /* Wait for LNB */ |
f11ec7d4 | 828 | static int cx24116_wait_for_lnb(struct dvb_frontend *fe) |
490c8684 DB |
829 | { |
830 | struct cx24116_state *state = fe->demodulator_priv; | |
831 | int i; | |
832 | ||
833 | dprintk("%s() qstatus = 0x%02x\n", __func__, | |
834 | cx24116_readreg(state, CX24116_REG_QSTATUS)); | |
835 | ||
836 | /* Wait for up to 300 ms */ | |
f11ec7d4 | 837 | for (i = 0; i < 30 ; i++) { |
490c8684 DB |
838 | if (cx24116_readreg(state, CX24116_REG_QSTATUS) & 0x20) |
839 | return 0; | |
840 | msleep(10); | |
841 | } | |
842 | ||
843 | dprintk("%s(): LNB not ready\n", __func__); | |
844 | ||
845 | return -ETIMEDOUT; /* -EBUSY ? */ | |
846 | } | |
847 | ||
c7bdcd0f | 848 | static int cx24116_set_voltage(struct dvb_frontend *fe, |
0df289a2 | 849 | enum fe_sec_voltage voltage) |
c7bdcd0f IL |
850 | { |
851 | struct cx24116_cmd cmd; | |
852 | int ret; | |
853 | ||
854 | dprintk("%s: %s\n", __func__, | |
855 | voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : | |
856 | voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??"); | |
857 | ||
858 | /* Wait for LNB ready */ | |
859 | ret = cx24116_wait_for_lnb(fe); | |
860 | if (ret != 0) | |
861 | return ret; | |
862 | ||
863 | /* Wait for voltage/min repeat delay */ | |
864 | msleep(100); | |
865 | ||
866 | cmd.args[0x00] = CMD_LNBDCLEVEL; | |
867 | cmd.args[0x01] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); | |
868 | cmd.len = 0x02; | |
869 | ||
870 | /* Min delay time before DiSEqC send */ | |
871 | msleep(15); | |
872 | ||
873 | return cx24116_cmd_execute(fe, &cmd); | |
874 | } | |
875 | ||
f11ec7d4 | 876 | static int cx24116_set_tone(struct dvb_frontend *fe, |
0df289a2 | 877 | enum fe_sec_tone_mode tone) |
0d46748c ST |
878 | { |
879 | struct cx24116_cmd cmd; | |
880 | int ret; | |
881 | ||
882 | dprintk("%s(%d)\n", __func__, tone); | |
f11ec7d4 | 883 | if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { |
98c94823 | 884 | printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone); |
0d46748c ST |
885 | return -EINVAL; |
886 | } | |
887 | ||
490c8684 DB |
888 | /* Wait for LNB ready */ |
889 | ret = cx24116_wait_for_lnb(fe); | |
f11ec7d4 | 890 | if (ret != 0) |
490c8684 DB |
891 | return ret; |
892 | ||
893 | /* Min delay time after DiSEqC send */ | |
894 | msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */ | |
895 | ||
0d46748c ST |
896 | /* Now we set the tone */ |
897 | cmd.args[0x00] = CMD_SET_TONE; | |
898 | cmd.args[0x01] = 0x00; | |
899 | cmd.args[0x02] = 0x00; | |
900 | ||
901 | switch (tone) { | |
902 | case SEC_TONE_ON: | |
903 | dprintk("%s: setting tone on\n", __func__); | |
904 | cmd.args[0x03] = 0x01; | |
905 | break; | |
906 | case SEC_TONE_OFF: | |
f11ec7d4 | 907 | dprintk("%s: setting tone off\n", __func__); |
0d46748c ST |
908 | cmd.args[0x03] = 0x00; |
909 | break; | |
910 | } | |
f11ec7d4 | 911 | cmd.len = 0x04; |
0d46748c | 912 | |
490c8684 DB |
913 | /* Min delay time before DiSEqC send */ |
914 | msleep(15); /* XXX determine is FW does this, see send_diseqc/burst */ | |
915 | ||
0d46748c ST |
916 | return cx24116_cmd_execute(fe, &cmd); |
917 | } | |
918 | ||
919 | /* Initialise DiSEqC */ | |
f11ec7d4 | 920 | static int cx24116_diseqc_init(struct dvb_frontend *fe) |
0d46748c ST |
921 | { |
922 | struct cx24116_state *state = fe->demodulator_priv; | |
490c8684 DB |
923 | struct cx24116_cmd cmd; |
924 | int ret; | |
925 | ||
926 | /* Firmware CMD 20: LNB/DiSEqC config */ | |
927 | cmd.args[0x00] = CMD_LNBCONFIG; | |
928 | cmd.args[0x01] = 0x00; | |
929 | cmd.args[0x02] = 0x10; | |
930 | cmd.args[0x03] = 0x00; | |
931 | cmd.args[0x04] = 0x8f; | |
932 | cmd.args[0x05] = 0x28; | |
933 | cmd.args[0x06] = (toneburst == CX24116_DISEQC_TONEOFF) ? 0x00 : 0x01; | |
934 | cmd.args[0x07] = 0x01; | |
f11ec7d4 | 935 | cmd.len = 0x08; |
490c8684 DB |
936 | ret = cx24116_cmd_execute(fe, &cmd); |
937 | if (ret != 0) | |
938 | return ret; | |
939 | ||
940 | /* Prepare a DiSEqC command */ | |
941 | state->dsec_cmd.args[0x00] = CMD_LNBSEND; | |
942 | ||
943 | /* DiSEqC burst */ | |
944 | state->dsec_cmd.args[CX24116_DISEQC_BURST] = CX24116_DISEQC_MINI_A; | |
945 | ||
946 | /* Unknown */ | |
947 | state->dsec_cmd.args[CX24116_DISEQC_ARG2_2] = 0x02; | |
948 | state->dsec_cmd.args[CX24116_DISEQC_ARG3_0] = 0x00; | |
98c94823 ST |
949 | /* Continuation flag? */ |
950 | state->dsec_cmd.args[CX24116_DISEQC_ARG4_0] = 0x00; | |
0d46748c | 951 | |
490c8684 DB |
952 | /* DiSEqC message length */ |
953 | state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = 0x00; | |
954 | ||
955 | /* Command length */ | |
f11ec7d4 | 956 | state->dsec_cmd.len = CX24116_DISEQC_MSGOFS; |
0d46748c ST |
957 | |
958 | return 0; | |
959 | } | |
960 | ||
961 | /* Send DiSEqC message with derived burst (hack) || previous burst */ | |
f11ec7d4 ST |
962 | static int cx24116_send_diseqc_msg(struct dvb_frontend *fe, |
963 | struct dvb_diseqc_master_cmd *d) | |
0d46748c ST |
964 | { |
965 | struct cx24116_state *state = fe->demodulator_priv; | |
0d46748c ST |
966 | int i, ret; |
967 | ||
1fa2337a MCC |
968 | /* Validate length */ |
969 | if (d->msg_len > sizeof(d->msg)) | |
970 | return -EINVAL; | |
971 | ||
0d46748c ST |
972 | /* Dump DiSEqC message */ |
973 | if (debug) { | |
98c94823 | 974 | printk(KERN_INFO "cx24116: %s(", __func__); |
f11ec7d4 | 975 | for (i = 0 ; i < d->msg_len ;) { |
98c94823 | 976 | printk(KERN_INFO "0x%02x", d->msg[i]); |
f11ec7d4 | 977 | if (++i < d->msg_len) |
98c94823 | 978 | printk(KERN_INFO ", "); |
f11ec7d4 | 979 | } |
490c8684 | 980 | printk(") toneburst=%d\n", toneburst); |
0d46748c ST |
981 | } |
982 | ||
0d46748c ST |
983 | /* DiSEqC message */ |
984 | for (i = 0; i < d->msg_len; i++) | |
490c8684 DB |
985 | state->dsec_cmd.args[CX24116_DISEQC_MSGOFS + i] = d->msg[i]; |
986 | ||
987 | /* DiSEqC message length */ | |
988 | state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] = d->msg_len; | |
989 | ||
990 | /* Command length */ | |
f11ec7d4 ST |
991 | state->dsec_cmd.len = CX24116_DISEQC_MSGOFS + |
992 | state->dsec_cmd.args[CX24116_DISEQC_MSGLEN]; | |
490c8684 DB |
993 | |
994 | /* DiSEqC toneburst */ | |
f11ec7d4 | 995 | if (toneburst == CX24116_DISEQC_MESGCACHE) |
490c8684 DB |
996 | /* Message is cached */ |
997 | return 0; | |
998 | ||
f11ec7d4 | 999 | else if (toneburst == CX24116_DISEQC_TONEOFF) |
490c8684 DB |
1000 | /* Message is sent without burst */ |
1001 | state->dsec_cmd.args[CX24116_DISEQC_BURST] = 0; | |
1002 | ||
f11ec7d4 | 1003 | else if (toneburst == CX24116_DISEQC_TONECACHE) { |
490c8684 DB |
1004 | /* |
1005 | * Message is sent with derived else cached burst | |
1006 | * | |
1007 | * WRITE PORT GROUP COMMAND 38 | |
1008 | * | |
1009 | * 0/A/A: E0 10 38 F0..F3 | |
1010 | * 1/B/B: E0 10 38 F4..F7 | |
1011 | * 2/C/A: E0 10 38 F8..FB | |
1012 | * 3/D/B: E0 10 38 FC..FF | |
1013 | * | |
7396d3ea | 1014 | * databyte[3]= 8421:8421 |
490c8684 DB |
1015 | * ABCD:WXYZ |
1016 | * CLR :SET | |
1017 | * | |
1018 | * WX= PORT SELECT 0..3 (X=TONEBURST) | |
1019 | * Y = VOLTAGE (0=13V, 1=18V) | |
1020 | * Z = BAND (0=LOW, 1=HIGH(22K)) | |
1021 | */ | |
f11ec7d4 ST |
1022 | if (d->msg_len >= 4 && d->msg[2] == 0x38) |
1023 | state->dsec_cmd.args[CX24116_DISEQC_BURST] = | |
1024 | ((d->msg[3] & 4) >> 2); | |
1025 | if (debug) | |
1026 | dprintk("%s burst=%d\n", __func__, | |
1027 | state->dsec_cmd.args[CX24116_DISEQC_BURST]); | |
490c8684 | 1028 | } |
0d46748c | 1029 | |
490c8684 DB |
1030 | /* Wait for LNB ready */ |
1031 | ret = cx24116_wait_for_lnb(fe); | |
f11ec7d4 | 1032 | if (ret != 0) |
490c8684 | 1033 | return ret; |
0d46748c | 1034 | |
490c8684 DB |
1035 | /* Wait for voltage/min repeat delay */ |
1036 | msleep(100); | |
0d46748c | 1037 | |
490c8684 DB |
1038 | /* Command */ |
1039 | ret = cx24116_cmd_execute(fe, &state->dsec_cmd); | |
f11ec7d4 | 1040 | if (ret != 0) |
490c8684 DB |
1041 | return ret; |
1042 | /* | |
1043 | * Wait for send | |
0d46748c ST |
1044 | * |
1045 | * Eutelsat spec: | |
490c8684 DB |
1046 | * >15ms delay + (XXX determine if FW does this, see set_tone) |
1047 | * 13.5ms per byte + | |
1048 | * >15ms delay + | |
1049 | * 12.5ms burst + | |
1050 | * >15ms delay (XXX determine if FW does this, see set_tone) | |
0d46748c | 1051 | */ |
f11ec7d4 ST |
1052 | msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + |
1053 | ((toneburst == CX24116_DISEQC_TONEOFF) ? 30 : 60)); | |
0d46748c | 1054 | |
490c8684 | 1055 | return 0; |
0d46748c ST |
1056 | } |
1057 | ||
1058 | /* Send DiSEqC burst */ | |
f11ec7d4 | 1059 | static int cx24116_diseqc_send_burst(struct dvb_frontend *fe, |
0df289a2 | 1060 | enum fe_sec_mini_cmd burst) |
0d46748c ST |
1061 | { |
1062 | struct cx24116_state *state = fe->demodulator_priv; | |
0d46748c ST |
1063 | int ret; |
1064 | ||
f11ec7d4 | 1065 | dprintk("%s(%d) toneburst=%d\n", __func__, burst, toneburst); |
0d46748c | 1066 | |
490c8684 | 1067 | /* DiSEqC burst */ |
0d46748c | 1068 | if (burst == SEC_MINI_A) |
f11ec7d4 ST |
1069 | state->dsec_cmd.args[CX24116_DISEQC_BURST] = |
1070 | CX24116_DISEQC_MINI_A; | |
1071 | else if (burst == SEC_MINI_B) | |
1072 | state->dsec_cmd.args[CX24116_DISEQC_BURST] = | |
1073 | CX24116_DISEQC_MINI_B; | |
0d46748c ST |
1074 | else |
1075 | return -EINVAL; | |
1076 | ||
490c8684 | 1077 | /* DiSEqC toneburst */ |
f11ec7d4 | 1078 | if (toneburst != CX24116_DISEQC_MESGCACHE) |
490c8684 DB |
1079 | /* Burst is cached */ |
1080 | return 0; | |
0d46748c | 1081 | |
490c8684 | 1082 | /* Burst is to be sent with cached message */ |
0d46748c | 1083 | |
490c8684 DB |
1084 | /* Wait for LNB ready */ |
1085 | ret = cx24116_wait_for_lnb(fe); | |
f11ec7d4 | 1086 | if (ret != 0) |
490c8684 | 1087 | return ret; |
0d46748c | 1088 | |
490c8684 DB |
1089 | /* Wait for voltage/min repeat delay */ |
1090 | msleep(100); | |
0d46748c | 1091 | |
490c8684 DB |
1092 | /* Command */ |
1093 | ret = cx24116_cmd_execute(fe, &state->dsec_cmd); | |
f11ec7d4 | 1094 | if (ret != 0) |
490c8684 DB |
1095 | return ret; |
1096 | ||
1097 | /* | |
1098 | * Wait for send | |
1099 | * | |
1100 | * Eutelsat spec: | |
1101 | * >15ms delay + (XXX determine if FW does this, see set_tone) | |
1102 | * 13.5ms per byte + | |
1103 | * >15ms delay + | |
1104 | * 12.5ms burst + | |
1105 | * >15ms delay (XXX determine if FW does this, see set_tone) | |
1106 | */ | |
f11ec7d4 | 1107 | msleep((state->dsec_cmd.args[CX24116_DISEQC_MSGLEN] << 4) + 60); |
490c8684 DB |
1108 | |
1109 | return 0; | |
0d46748c ST |
1110 | } |
1111 | ||
f11ec7d4 | 1112 | static void cx24116_release(struct dvb_frontend *fe) |
0d46748c | 1113 | { |
f11ec7d4 ST |
1114 | struct cx24116_state *state = fe->demodulator_priv; |
1115 | dprintk("%s\n", __func__); | |
0d46748c ST |
1116 | kfree(state); |
1117 | } | |
1118 | ||
bd336e63 | 1119 | static const struct dvb_frontend_ops cx24116_ops; |
0d46748c | 1120 | |
f11ec7d4 ST |
1121 | struct dvb_frontend *cx24116_attach(const struct cx24116_config *config, |
1122 | struct i2c_adapter *i2c) | |
0d46748c | 1123 | { |
f11ec7d4 | 1124 | struct cx24116_state *state = NULL; |
0d46748c ST |
1125 | int ret; |
1126 | ||
f11ec7d4 | 1127 | dprintk("%s\n", __func__); |
0d46748c ST |
1128 | |
1129 | /* allocate memory for the internal state */ | |
8420fa7e | 1130 | state = kzalloc(sizeof(struct cx24116_state), GFP_KERNEL); |
98c94823 | 1131 | if (state == NULL) |
7396d3ea | 1132 | goto error1; |
0d46748c | 1133 | |
0d46748c ST |
1134 | state->config = config; |
1135 | state->i2c = i2c; | |
1136 | ||
1137 | /* check if the demod is present */ | |
98c94823 ST |
1138 | ret = (cx24116_readreg(state, 0xFF) << 8) | |
1139 | cx24116_readreg(state, 0xFE); | |
0d46748c | 1140 | if (ret != 0x0501) { |
98c94823 | 1141 | printk(KERN_INFO "Invalid probe, probably not a CX24116 device\n"); |
7396d3ea | 1142 | goto error2; |
0d46748c ST |
1143 | } |
1144 | ||
1145 | /* create dvb_frontend */ | |
98c94823 ST |
1146 | memcpy(&state->frontend.ops, &cx24116_ops, |
1147 | sizeof(struct dvb_frontend_ops)); | |
0d46748c ST |
1148 | state->frontend.demodulator_priv = state; |
1149 | return &state->frontend; | |
1150 | ||
7396d3ea | 1151 | error2: kfree(state); |
490c8684 | 1152 | error1: return NULL; |
0d46748c | 1153 | } |
f11ec7d4 ST |
1154 | EXPORT_SYMBOL(cx24116_attach); |
1155 | ||
490c8684 DB |
1156 | /* |
1157 | * Initialise or wake up device | |
1158 | * | |
1159 | * Power config will reset and load initial firmware if required | |
1160 | */ | |
f11ec7d4 | 1161 | static int cx24116_initfe(struct dvb_frontend *fe) |
0d46748c | 1162 | { |
f11ec7d4 | 1163 | struct cx24116_state *state = fe->demodulator_priv; |
490c8684 DB |
1164 | struct cx24116_cmd cmd; |
1165 | int ret; | |
0d46748c | 1166 | |
f11ec7d4 | 1167 | dprintk("%s()\n", __func__); |
0d46748c | 1168 | |
490c8684 DB |
1169 | /* Power on */ |
1170 | cx24116_writereg(state, 0xe0, 0); | |
1171 | cx24116_writereg(state, 0xe1, 0); | |
1172 | cx24116_writereg(state, 0xea, 0); | |
0d46748c | 1173 | |
490c8684 DB |
1174 | /* Firmware CMD 36: Power config */ |
1175 | cmd.args[0x00] = CMD_TUNERSLEEP; | |
1176 | cmd.args[0x01] = 0; | |
f11ec7d4 | 1177 | cmd.len = 0x02; |
490c8684 | 1178 | ret = cx24116_cmd_execute(fe, &cmd); |
f11ec7d4 | 1179 | if (ret != 0) |
490c8684 DB |
1180 | return ret; |
1181 | ||
8afe6ad6 IL |
1182 | ret = cx24116_diseqc_init(fe); |
1183 | if (ret != 0) | |
1184 | return ret; | |
1185 | ||
1186 | /* HVR-4000 needs this */ | |
1187 | return cx24116_set_voltage(fe, SEC_VOLTAGE_13); | |
0d46748c ST |
1188 | } |
1189 | ||
490c8684 DB |
1190 | /* |
1191 | * Put device to sleep | |
1192 | */ | |
f11ec7d4 | 1193 | static int cx24116_sleep(struct dvb_frontend *fe) |
0d46748c | 1194 | { |
f11ec7d4 | 1195 | struct cx24116_state *state = fe->demodulator_priv; |
490c8684 DB |
1196 | struct cx24116_cmd cmd; |
1197 | int ret; | |
1198 | ||
f11ec7d4 | 1199 | dprintk("%s()\n", __func__); |
0d46748c | 1200 | |
490c8684 DB |
1201 | /* Firmware CMD 36: Power config */ |
1202 | cmd.args[0x00] = CMD_TUNERSLEEP; | |
1203 | cmd.args[0x01] = 1; | |
f11ec7d4 | 1204 | cmd.len = 0x02; |
490c8684 | 1205 | ret = cx24116_cmd_execute(fe, &cmd); |
f11ec7d4 | 1206 | if (ret != 0) |
490c8684 DB |
1207 | return ret; |
1208 | ||
1209 | /* Power off (Shutdown clocks) */ | |
1210 | cx24116_writereg(state, 0xea, 0xff); | |
1211 | cx24116_writereg(state, 0xe1, 1); | |
1212 | cx24116_writereg(state, 0xe0, 1); | |
1213 | ||
1214 | return 0; | |
0d46748c ST |
1215 | } |
1216 | ||
0d46748c ST |
1217 | /* dvb-core told us to tune, the tv property cache will be complete, |
1218 | * it's safe for is to pull values and use them for tuning purposes. | |
1219 | */ | |
1ac6a854 | 1220 | static int cx24116_set_frontend(struct dvb_frontend *fe) |
0d46748c ST |
1221 | { |
1222 | struct cx24116_state *state = fe->demodulator_priv; | |
56f0680a | 1223 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
0d46748c | 1224 | struct cx24116_cmd cmd; |
0df289a2 | 1225 | enum fe_status tunerstat; |
2fd93396 | 1226 | int i, status, ret, retune = 1; |
0d46748c | 1227 | |
f11ec7d4 | 1228 | dprintk("%s()\n", __func__); |
0d46748c | 1229 | |
f11ec7d4 ST |
1230 | switch (c->delivery_system) { |
1231 | case SYS_DVBS: | |
1232 | dprintk("%s: DVB-S delivery system selected\n", __func__); | |
01a8f038 | 1233 | |
f11ec7d4 ST |
1234 | /* Only QPSK is supported for DVB-S */ |
1235 | if (c->modulation != QPSK) { | |
1236 | dprintk("%s: unsupported modulation selected (%d)\n", | |
1237 | __func__, c->modulation); | |
1238 | return -EOPNOTSUPP; | |
1239 | } | |
01a8f038 | 1240 | |
f11ec7d4 ST |
1241 | /* Pilot doesn't exist in DVB-S, turn bit off */ |
1242 | state->dnxt.pilot_val = CX24116_PILOT_OFF; | |
01a8f038 | 1243 | |
f11ec7d4 ST |
1244 | /* DVB-S only supports 0.35 */ |
1245 | if (c->rolloff != ROLLOFF_35) { | |
1246 | dprintk("%s: unsupported rolloff selected (%d)\n", | |
1247 | __func__, c->rolloff); | |
1248 | return -EOPNOTSUPP; | |
1249 | } | |
1250 | state->dnxt.rolloff_val = CX24116_ROLLOFF_035; | |
1251 | break; | |
01a8f038 | 1252 | |
f11ec7d4 ST |
1253 | case SYS_DVBS2: |
1254 | dprintk("%s: DVB-S2 delivery system selected\n", __func__); | |
01a8f038 | 1255 | |
f11ec7d4 ST |
1256 | /* |
1257 | * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, | |
1258 | * but not hardware auto detection | |
1259 | */ | |
1260 | if (c->modulation != PSK_8 && c->modulation != QPSK) { | |
1261 | dprintk("%s: unsupported modulation selected (%d)\n", | |
1262 | __func__, c->modulation); | |
1263 | return -EOPNOTSUPP; | |
1264 | } | |
01a8f038 | 1265 | |
f11ec7d4 ST |
1266 | switch (c->pilot) { |
1267 | case PILOT_AUTO: /* Not supported but emulated */ | |
74563214 CT |
1268 | state->dnxt.pilot_val = (c->modulation == QPSK) |
1269 | ? CX24116_PILOT_OFF : CX24116_PILOT_ON; | |
2fd93396 | 1270 | retune++; |
74563214 | 1271 | break; |
f11ec7d4 ST |
1272 | case PILOT_OFF: |
1273 | state->dnxt.pilot_val = CX24116_PILOT_OFF; | |
1274 | break; | |
1275 | case PILOT_ON: | |
1276 | state->dnxt.pilot_val = CX24116_PILOT_ON; | |
490c8684 | 1277 | break; |
f11ec7d4 ST |
1278 | default: |
1279 | dprintk("%s: unsupported pilot mode selected (%d)\n", | |
1280 | __func__, c->pilot); | |
1281 | return -EOPNOTSUPP; | |
1282 | } | |
01a8f038 | 1283 | |
f11ec7d4 ST |
1284 | switch (c->rolloff) { |
1285 | case ROLLOFF_20: | |
1286 | state->dnxt.rolloff_val = CX24116_ROLLOFF_020; | |
1287 | break; | |
1288 | case ROLLOFF_25: | |
1289 | state->dnxt.rolloff_val = CX24116_ROLLOFF_025; | |
1290 | break; | |
1291 | case ROLLOFF_35: | |
1292 | state->dnxt.rolloff_val = CX24116_ROLLOFF_035; | |
1293 | break; | |
1294 | case ROLLOFF_AUTO: /* Rolloff must be explicit */ | |
490c8684 | 1295 | default: |
f11ec7d4 ST |
1296 | dprintk("%s: unsupported rolloff selected (%d)\n", |
1297 | __func__, c->rolloff); | |
490c8684 | 1298 | return -EOPNOTSUPP; |
f11ec7d4 ST |
1299 | } |
1300 | break; | |
1301 | ||
1302 | default: | |
1303 | dprintk("%s: unsupported delivery system selected (%d)\n", | |
1304 | __func__, c->delivery_system); | |
1305 | return -EOPNOTSUPP; | |
490c8684 | 1306 | } |
3569476d | 1307 | state->dnxt.delsys = c->delivery_system; |
01a8f038 DB |
1308 | state->dnxt.modulation = c->modulation; |
1309 | state->dnxt.frequency = c->frequency; | |
1310 | state->dnxt.pilot = c->pilot; | |
1311 | state->dnxt.rolloff = c->rolloff; | |
490c8684 | 1312 | |
f11ec7d4 ST |
1313 | ret = cx24116_set_inversion(state, c->inversion); |
1314 | if (ret != 0) | |
0d46748c ST |
1315 | return ret; |
1316 | ||
01a8f038 | 1317 | /* FEC_NONE/AUTO for DVB-S2 is not supported and detected here */ |
3569476d | 1318 | ret = cx24116_set_fec(state, c->delivery_system, c->modulation, c->fec_inner); |
f11ec7d4 | 1319 | if (ret != 0) |
0d46748c ST |
1320 | return ret; |
1321 | ||
f11ec7d4 ST |
1322 | ret = cx24116_set_symbolrate(state, c->symbol_rate); |
1323 | if (ret != 0) | |
0d46748c ST |
1324 | return ret; |
1325 | ||
1326 | /* discard the 'current' tuning parameters and prepare to tune */ | |
1327 | cx24116_clone_params(fe); | |
1328 | ||
3569476d | 1329 | dprintk("%s: delsys = %d\n", __func__, state->dcur.delsys); |
01a8f038 | 1330 | dprintk("%s: modulation = %d\n", __func__, state->dcur.modulation); |
0d46748c | 1331 | dprintk("%s: frequency = %d\n", __func__, state->dcur.frequency); |
01a8f038 DB |
1332 | dprintk("%s: pilot = %d (val = 0x%02x)\n", __func__, |
1333 | state->dcur.pilot, state->dcur.pilot_val); | |
1334 | dprintk("%s: retune = %d\n", __func__, retune); | |
1335 | dprintk("%s: rolloff = %d (val = 0x%02x)\n", __func__, | |
1336 | state->dcur.rolloff, state->dcur.rolloff_val); | |
0d46748c ST |
1337 | dprintk("%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); |
1338 | dprintk("%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, | |
1339 | state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); | |
1340 | dprintk("%s: Inversion = %d (val = 0x%02x)\n", __func__, | |
1341 | state->dcur.inversion, state->dcur.inversion_val); | |
1342 | ||
490c8684 | 1343 | /* This is also done in advise/acquire on HVR4000 but not on LITE */ |
0d46748c ST |
1344 | if (state->config->set_ts_params) |
1345 | state->config->set_ts_params(fe, 0); | |
1346 | ||
490c8684 DB |
1347 | /* Set/Reset B/W */ |
1348 | cmd.args[0x00] = CMD_BANDWIDTH; | |
1349 | cmd.args[0x01] = 0x01; | |
f11ec7d4 | 1350 | cmd.len = 0x02; |
490c8684 DB |
1351 | ret = cx24116_cmd_execute(fe, &cmd); |
1352 | if (ret != 0) | |
1353 | return ret; | |
3f8e51ad | 1354 | |
0d46748c ST |
1355 | /* Prepare a tune request */ |
1356 | cmd.args[0x00] = CMD_TUNEREQUEST; | |
1357 | ||
1358 | /* Frequency */ | |
1359 | cmd.args[0x01] = (state->dcur.frequency & 0xff0000) >> 16; | |
1360 | cmd.args[0x02] = (state->dcur.frequency & 0x00ff00) >> 8; | |
1361 | cmd.args[0x03] = (state->dcur.frequency & 0x0000ff); | |
1362 | ||
1363 | /* Symbol Rate */ | |
1364 | cmd.args[0x04] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; | |
1365 | cmd.args[0x05] = ((state->dcur.symbol_rate / 1000) & 0x00ff); | |
1366 | ||
1367 | /* Automatic Inversion */ | |
1368 | cmd.args[0x06] = state->dcur.inversion_val; | |
1369 | ||
01a8f038 DB |
1370 | /* Modulation / FEC / Pilot */ |
1371 | cmd.args[0x07] = state->dcur.fec_val | state->dcur.pilot_val; | |
0d46748c ST |
1372 | |
1373 | cmd.args[0x08] = CX24116_SEARCH_RANGE_KHZ >> 8; | |
1374 | cmd.args[0x09] = CX24116_SEARCH_RANGE_KHZ & 0xff; | |
1375 | cmd.args[0x0a] = 0x00; | |
1376 | cmd.args[0x0b] = 0x00; | |
490c8684 | 1377 | cmd.args[0x0c] = state->dcur.rolloff_val; |
0d46748c | 1378 | cmd.args[0x0d] = state->dcur.fec_mask; |
3f8e51ad | 1379 | |
490c8684 | 1380 | if (state->dcur.symbol_rate > 30000000) { |
3f8e51ad IL |
1381 | cmd.args[0x0e] = 0x04; |
1382 | cmd.args[0x0f] = 0x00; | |
1383 | cmd.args[0x10] = 0x01; | |
1384 | cmd.args[0x11] = 0x77; | |
1385 | cmd.args[0x12] = 0x36; | |
490c8684 DB |
1386 | cx24116_writereg(state, CX24116_REG_CLKDIV, 0x44); |
1387 | cx24116_writereg(state, CX24116_REG_RATEDIV, 0x01); | |
3f8e51ad IL |
1388 | } else { |
1389 | cmd.args[0x0e] = 0x06; | |
1390 | cmd.args[0x0f] = 0x00; | |
1391 | cmd.args[0x10] = 0x00; | |
1392 | cmd.args[0x11] = 0xFA; | |
1393 | cmd.args[0x12] = 0x24; | |
490c8684 DB |
1394 | cx24116_writereg(state, CX24116_REG_CLKDIV, 0x46); |
1395 | cx24116_writereg(state, CX24116_REG_RATEDIV, 0x00); | |
3f8e51ad IL |
1396 | } |
1397 | ||
f11ec7d4 | 1398 | cmd.len = 0x13; |
0d46748c ST |
1399 | |
1400 | /* We need to support pilot and non-pilot tuning in the | |
1401 | * driver automatically. This is a workaround for because | |
1402 | * the demod does not support autodetect. | |
1403 | */ | |
1404 | do { | |
490c8684 | 1405 | /* Reset status register */ |
f11ec7d4 ST |
1406 | status = cx24116_readreg(state, CX24116_REG_SSTATUS) |
1407 | & CX24116_SIGNAL_MASK; | |
490c8684 | 1408 | cx24116_writereg(state, CX24116_REG_SSTATUS, status); |
0d46748c ST |
1409 | |
1410 | /* Tune */ | |
1411 | ret = cx24116_cmd_execute(fe, &cmd); | |
f11ec7d4 | 1412 | if (ret != 0) |
0d46748c ST |
1413 | break; |
1414 | ||
490c8684 DB |
1415 | /* |
1416 | * Wait for up to 500 ms before retrying | |
1417 | * | |
1418 | * If we are able to tune then generally it occurs within 100ms. | |
1419 | * If it takes longer, try a different toneburst setting. | |
1420 | */ | |
f11ec7d4 | 1421 | for (i = 0; i < 50 ; i++) { |
490c8684 DB |
1422 | cx24116_read_status(fe, &tunerstat); |
1423 | status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); | |
f11ec7d4 ST |
1424 | if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { |
1425 | dprintk("%s: Tuned\n", __func__); | |
490c8684 DB |
1426 | goto tuned; |
1427 | } | |
1428 | msleep(10); | |
0d46748c | 1429 | } |
490c8684 | 1430 | |
f11ec7d4 | 1431 | dprintk("%s: Not tuned\n", __func__); |
490c8684 DB |
1432 | |
1433 | /* Toggle pilot bit when in auto-pilot */ | |
f11ec7d4 | 1434 | if (state->dcur.pilot == PILOT_AUTO) |
01a8f038 | 1435 | cmd.args[0x07] ^= CX24116_PILOT_ON; |
f11ec7d4 | 1436 | } while (--retune); |
0d46748c | 1437 | |
490c8684 DB |
1438 | tuned: /* Set/Reset B/W */ |
1439 | cmd.args[0x00] = CMD_BANDWIDTH; | |
1440 | cmd.args[0x01] = 0x00; | |
f11ec7d4 | 1441 | cmd.len = 0x02; |
3735edf9 | 1442 | return cx24116_cmd_execute(fe, &cmd); |
0d46748c ST |
1443 | } |
1444 | ||
7e072221 | 1445 | static int cx24116_tune(struct dvb_frontend *fe, bool re_tune, |
0df289a2 | 1446 | unsigned int mode_flags, unsigned int *delay, enum fe_status *status) |
6639f1e0 | 1447 | { |
1ac6a854 MCC |
1448 | /* |
1449 | * It is safe to discard "params" here, as the DVB core will sync | |
1450 | * fe->dtv_property_cache with fepriv->parameters_in, where the | |
1451 | * DVBv3 params are stored. The only practical usage for it indicate | |
1452 | * that re-tuning is needed, e. g. (fepriv->state & FESTATE_RETUNE) is | |
1453 | * true. | |
1454 | */ | |
1455 | ||
6639f1e0 | 1456 | *delay = HZ / 5; |
7e072221 | 1457 | if (re_tune) { |
1ac6a854 | 1458 | int ret = cx24116_set_frontend(fe); |
6639f1e0 DB |
1459 | if (ret) |
1460 | return ret; | |
1461 | } | |
1462 | return cx24116_read_status(fe, status); | |
1463 | } | |
1464 | ||
1465 | static int cx24116_get_algo(struct dvb_frontend *fe) | |
1466 | { | |
1467 | return DVBFE_ALGO_HW; | |
1468 | } | |
1469 | ||
bd336e63 | 1470 | static const struct dvb_frontend_ops cx24116_ops = { |
1ac6a854 | 1471 | .delsys = { SYS_DVBS, SYS_DVBS2 }, |
0d46748c ST |
1472 | .info = { |
1473 | .name = "Conexant CX24116/CX24118", | |
0d46748c ST |
1474 | .frequency_min = 950000, |
1475 | .frequency_max = 2150000, | |
1476 | .frequency_stepsize = 1011, /* kHz for QPSK frontends */ | |
1477 | .frequency_tolerance = 5000, | |
1478 | .symbol_rate_min = 1000000, | |
1479 | .symbol_rate_max = 45000000, | |
1480 | .caps = FE_CAN_INVERSION_AUTO | | |
1481 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
1482 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | | |
1483 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
faed4aa5 | 1484 | FE_CAN_2G_MODULATION | |
0d46748c ST |
1485 | FE_CAN_QPSK | FE_CAN_RECOVER |
1486 | }, | |
1487 | ||
1488 | .release = cx24116_release, | |
1489 | ||
1490 | .init = cx24116_initfe, | |
490c8684 | 1491 | .sleep = cx24116_sleep, |
0d46748c ST |
1492 | .read_status = cx24116_read_status, |
1493 | .read_ber = cx24116_read_ber, | |
1494 | .read_signal_strength = cx24116_read_signal_strength, | |
1495 | .read_snr = cx24116_read_snr, | |
1496 | .read_ucblocks = cx24116_read_ucblocks, | |
1497 | .set_tone = cx24116_set_tone, | |
1498 | .set_voltage = cx24116_set_voltage, | |
1499 | .diseqc_send_master_cmd = cx24116_send_diseqc_msg, | |
1500 | .diseqc_send_burst = cx24116_diseqc_send_burst, | |
6639f1e0 DB |
1501 | .get_frontend_algo = cx24116_get_algo, |
1502 | .tune = cx24116_tune, | |
0d46748c | 1503 | |
1ac6a854 | 1504 | .set_frontend = cx24116_set_frontend, |
0d46748c ST |
1505 | }; |
1506 | ||
0d46748c ST |
1507 | MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24116/cx24118 hardware"); |
1508 | MODULE_AUTHOR("Steven Toth"); | |
1509 | MODULE_LICENSE("GPL"); | |
1510 |