Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
[linux-2.6-block.git] / drivers / media / dvb-frontends / af9013.c
CommitLineData
825b9670 1/*
c89f66f6 2 * Afatech AF9013 demodulator driver
825b9670
AP
3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
f571e004 5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
825b9670
AP
6 *
7 * Thanks to Afatech who kindly provided information.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
825b9670
AP
19 */
20
825b9670 21#include "af9013_priv.h"
825b9670 22
37ebaf68
MCC
23/* Max transfer size done by I2C transfer functions */
24#define MAX_XFER_SIZE 64
25
825b9670
AP
26struct af9013_state {
27 struct i2c_adapter *i2c;
f571e004 28 struct dvb_frontend fe;
825b9670
AP
29 struct af9013_config config;
30
9e35cd22
AP
31 /* tuner/demod RF and IF AGC limits used for signal strength calc */
32 u8 signal_strength_en, rf_50, rf_80, if_50, if_80;
825b9670
AP
33 u16 signal_strength;
34 u32 ber;
35 u32 ucblocks;
36 u16 snr;
f571e004 37 u32 bandwidth_hz;
0df289a2 38 enum fe_status fe_status;
f571e004
AP
39 unsigned long set_frontend_jiffies;
40 unsigned long read_status_jiffies;
41 bool first_tune;
42 bool i2c_gate_state;
43 unsigned int statistics_step:3;
44 struct delayed_work statistics_work;
825b9670
AP
45};
46
f571e004
AP
47/* write multiple registers */
48static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
49 const u8 *val, int len)
825b9670 50{
f571e004 51 int ret;
37ebaf68 52 u8 buf[MAX_XFER_SIZE];
f571e004
AP
53 struct i2c_msg msg[1] = {
54 {
55 .addr = priv->config.i2c_addr,
56 .flags = 0,
37ebaf68 57 .len = 3 + len,
f571e004
AP
58 .buf = buf,
59 }
60 };
61
37ebaf68
MCC
62 if (3 + len > sizeof(buf)) {
63 dev_warn(&priv->i2c->dev,
64 "%s: i2c wr reg=%04x: len=%d is too big!\n",
65 KBUILD_MODNAME, reg, len);
66 return -EINVAL;
67 }
68
f571e004
AP
69 buf[0] = (reg >> 8) & 0xff;
70 buf[1] = (reg >> 0) & 0xff;
825b9670
AP
71 buf[2] = mbox;
72 memcpy(&buf[3], val, len);
73
f571e004
AP
74 ret = i2c_transfer(priv->i2c, msg, 1);
75 if (ret == 1) {
76 ret = 0;
77 } else {
8df379c5
AP
78 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%04x " \
79 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
f571e004 80 ret = -EREMOTEIO;
825b9670 81 }
f571e004 82 return ret;
825b9670
AP
83}
84
f571e004
AP
85/* read multiple registers */
86static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
87 u8 *val, int len)
825b9670 88{
f571e004
AP
89 int ret;
90 u8 buf[3];
91 struct i2c_msg msg[2] = {
92 {
93 .addr = priv->config.i2c_addr,
94 .flags = 0,
95 .len = 3,
96 .buf = buf,
97 }, {
98 .addr = priv->config.i2c_addr,
99 .flags = I2C_M_RD,
100 .len = len,
101 .buf = val,
102 }
103 };
104
105 buf[0] = (reg >> 8) & 0xff;
106 buf[1] = (reg >> 0) & 0xff;
107 buf[2] = mbox;
108
109 ret = i2c_transfer(priv->i2c, msg, 2);
110 if (ret == 2) {
111 ret = 0;
112 } else {
8df379c5
AP
113 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%04x " \
114 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
f571e004
AP
115 ret = -EREMOTEIO;
116 }
117 return ret;
825b9670
AP
118}
119
f571e004
AP
120/* write multiple registers */
121static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val,
122 int len)
825b9670 123{
f571e004
AP
124 int ret, i;
125 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0);
126
938ca36e
DC
127 if ((priv->config.ts_mode == AF9013_TS_USB) &&
128 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
f571e004
AP
129 mbox |= ((len - 1) << 2);
130 ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len);
131 } else {
132 for (i = 0; i < len; i++) {
133 ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1);
134 if (ret)
135 goto err;
136 }
137 }
138
139err:
140 return 0;
141}
142
143/* read multiple registers */
144static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len)
145{
146 int ret, i;
147 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0);
148
938ca36e
DC
149 if ((priv->config.ts_mode == AF9013_TS_USB) &&
150 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
f571e004
AP
151 mbox |= ((len - 1) << 2);
152 ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len);
153 } else {
154 for (i = 0; i < len; i++) {
155 ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1);
156 if (ret)
157 goto err;
158 }
159 }
160
161err:
162 return 0;
825b9670
AP
163}
164
165/* write single register */
f571e004 166static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val)
825b9670 167{
f571e004 168 return af9013_wr_regs(priv, reg, &val, 1);
825b9670
AP
169}
170
171/* read single register */
f571e004 172static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val)
825b9670 173{
f571e004
AP
174 return af9013_rd_regs(priv, reg, val, 1);
175}
825b9670 176
f571e004
AP
177static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
178 u8 len)
179{
180 u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0);
181 return af9013_wr_regs_i2c(state, mbox, reg, val, len);
825b9670
AP
182}
183
f571e004
AP
184static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos,
185 int len, u8 val)
825b9670
AP
186{
187 int ret;
188 u8 tmp, mask;
189
f571e004
AP
190 /* no need for read if whole reg is written */
191 if (len != 8) {
192 ret = af9013_rd_reg(state, reg, &tmp);
193 if (ret)
194 return ret;
825b9670 195
f571e004
AP
196 mask = (0xff >> (8 - len)) << pos;
197 val <<= pos;
198 tmp &= ~mask;
199 val |= tmp;
200 }
825b9670 201
f571e004 202 return af9013_wr_reg(state, reg, val);
825b9670
AP
203}
204
f571e004
AP
205static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos,
206 int len, u8 *val)
825b9670
AP
207{
208 int ret;
209 u8 tmp;
210
f571e004 211 ret = af9013_rd_reg(state, reg, &tmp);
825b9670
AP
212 if (ret)
213 return ret;
f571e004
AP
214
215 *val = (tmp >> pos);
216 *val &= (0xff >> (8 - len));
217
825b9670
AP
218 return 0;
219}
220
221static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
222{
223 int ret;
224 u8 pos;
225 u16 addr;
825b9670 226
8df379c5
AP
227 dev_dbg(&state->i2c->dev, "%s: gpio=%d gpioval=%02x\n",
228 __func__, gpio, gpioval);
f571e004
AP
229
230 /*
231 * GPIO0 & GPIO1 0xd735
232 * GPIO2 & GPIO3 0xd736
233 */
825b9670
AP
234
235 switch (gpio) {
236 case 0:
237 case 1:
238 addr = 0xd735;
239 break;
240 case 2:
241 case 3:
242 addr = 0xd736;
243 break;
244
245 default:
8df379c5
AP
246 dev_err(&state->i2c->dev, "%s: invalid gpio=%d\n",
247 KBUILD_MODNAME, gpio);
825b9670 248 ret = -EINVAL;
f571e004 249 goto err;
c2c1b415 250 }
825b9670
AP
251
252 switch (gpio) {
253 case 0:
254 case 2:
255 pos = 0;
256 break;
257 case 1:
258 case 3:
259 default:
260 pos = 4;
261 break;
c2c1b415 262 }
825b9670 263
f571e004
AP
264 ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval);
265 if (ret)
266 goto err;
825b9670 267
f571e004
AP
268 return ret;
269err:
8df379c5 270 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
271 return ret;
272}
273
8df379c5 274static u32 af9013_div(struct af9013_state *state, u32 a, u32 b, u32 x)
825b9670
AP
275{
276 u32 r = 0, c = 0, i;
f571e004 277
8df379c5 278 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d\n", __func__, a, b, x);
825b9670
AP
279
280 if (a > b) {
281 c = a / b;
282 a = a - c * b;
283 }
284
285 for (i = 0; i < x; i++) {
286 if (a >= b) {
287 r += 1;
288 a -= b;
289 }
290 a <<= 1;
291 r <<= 1;
292 }
293 r = (c << (u32)x) + r;
294
8df379c5
AP
295 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d r=%d r=%x\n",
296 __func__, a, b, x, r, r);
297
825b9670
AP
298 return r;
299}
300
f571e004 301static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
825b9670 302{
f571e004
AP
303 int ret, i;
304 u8 tmp;
9b22edd4 305
8df379c5 306 dev_dbg(&state->i2c->dev, "%s: onoff=%d\n", __func__, onoff);
f571e004
AP
307
308 /* enable reset */
309 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1);
310 if (ret)
311 goto err;
312
313 /* start reset mechanism */
314 ret = af9013_wr_reg(state, 0xaeff, 1);
315 if (ret)
316 goto err;
317
318 /* wait reset performs */
319 for (i = 0; i < 150; i++) {
320 ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp);
321 if (ret)
322 goto err;
323
324 if (tmp)
325 break; /* reset done */
326
327 usleep_range(5000, 25000);
825b9670
AP
328 }
329
f571e004
AP
330 if (!tmp)
331 return -ETIMEDOUT;
825b9670 332
f571e004
AP
333 if (onoff) {
334 /* clear reset */
335 ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0);
825b9670 336 if (ret)
f571e004
AP
337 goto err;
338
339 /* disable reset */
340 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0);
341
342 /* power on */
343 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0);
344 } else {
345 /* power off */
346 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1);
825b9670
AP
347 }
348
f571e004
AP
349 return ret;
350err:
8df379c5 351 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
352 return ret;
353}
354
f571e004 355static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe)
825b9670 356{
f571e004 357 struct af9013_state *state = fe->demodulator_priv;
825b9670 358 int ret;
825b9670 359
8df379c5 360 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
825b9670 361
f571e004
AP
362 /* reset and start BER counter */
363 ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1);
364 if (ret)
365 goto err;
366
367 return ret;
368err:
8df379c5 369 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
370 return ret;
371}
372
373static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe)
374{
375 struct af9013_state *state = fe->demodulator_priv;
376 int ret;
377 u8 buf[5];
378
8df379c5 379 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
380
381 /* check if error bit count is ready */
382 ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]);
383 if (ret)
384 goto err;
385
386 if (!buf[0]) {
8df379c5 387 dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
f571e004
AP
388 return 0;
389 }
390
391 ret = af9013_rd_regs(state, 0xd387, buf, 5);
392 if (ret)
393 goto err;
394
395 state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0];
396 state->ucblocks += (buf[4] << 8) | buf[3];
397
398 return ret;
399err:
8df379c5 400 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
401 return ret;
402}
403
404static int af9013_statistics_snr_start(struct dvb_frontend *fe)
405{
406 struct af9013_state *state = fe->demodulator_priv;
407 int ret;
408
8df379c5 409 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
410
411 /* start SNR meas */
412 ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1);
413 if (ret)
414 goto err;
415
416 return ret;
417err:
8df379c5 418 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
419 return ret;
420}
421
422static int af9013_statistics_snr_result(struct dvb_frontend *fe)
423{
424 struct af9013_state *state = fe->demodulator_priv;
425 int ret, i, len;
426 u8 buf[3], tmp;
427 u32 snr_val;
428 const struct af9013_snr *uninitialized_var(snr_lut);
429
8df379c5 430 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
431
432 /* check if SNR ready */
433 ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp);
434 if (ret)
435 goto err;
436
437 if (!tmp) {
8df379c5 438 dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
f571e004
AP
439 return 0;
440 }
441
442 /* read value */
443 ret = af9013_rd_regs(state, 0xd2e3, buf, 3);
444 if (ret)
445 goto err;
446
447 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
448
449 /* read current modulation */
450 ret = af9013_rd_reg(state, 0xd3c1, &tmp);
451 if (ret)
452 goto err;
453
454 switch ((tmp >> 6) & 3) {
455 case 0:
456 len = ARRAY_SIZE(qpsk_snr_lut);
457 snr_lut = qpsk_snr_lut;
825b9670 458 break;
f571e004
AP
459 case 1:
460 len = ARRAY_SIZE(qam16_snr_lut);
461 snr_lut = qam16_snr_lut;
825b9670 462 break;
f571e004
AP
463 case 2:
464 len = ARRAY_SIZE(qam64_snr_lut);
465 snr_lut = qam64_snr_lut;
825b9670
AP
466 break;
467 default:
f571e004 468 goto err;
825b9670
AP
469 }
470
f571e004
AP
471 for (i = 0; i < len; i++) {
472 tmp = snr_lut[i].snr;
825b9670 473
f571e004
AP
474 if (snr_val < snr_lut[i].val)
475 break;
476 }
477 state->snr = tmp * 10; /* dB/10 */
825b9670 478
f571e004
AP
479 return ret;
480err:
8df379c5 481 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
482 return ret;
483}
825b9670 484
f571e004
AP
485static int af9013_statistics_signal_strength(struct dvb_frontend *fe)
486{
487 struct af9013_state *state = fe->demodulator_priv;
488 int ret = 0;
489 u8 buf[2], rf_gain, if_gain;
490 int signal_strength;
491
8df379c5 492 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
493
494 if (!state->signal_strength_en)
495 return 0;
496
497 ret = af9013_rd_regs(state, 0xd07c, buf, 2);
498 if (ret)
499 goto err;
500
501 rf_gain = buf[0];
502 if_gain = buf[1];
503
504 signal_strength = (0xffff / \
505 (9 * (state->rf_50 + state->if_50) - \
506 11 * (state->rf_80 + state->if_80))) * \
507 (10 * (rf_gain + if_gain) - \
508 11 * (state->rf_80 + state->if_80));
509 if (signal_strength < 0)
510 signal_strength = 0;
511 else if (signal_strength > 0xffff)
512 signal_strength = 0xffff;
513
514 state->signal_strength = signal_strength;
515
516 return ret;
517err:
8df379c5 518 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
519 return ret;
520}
521
f571e004 522static void af9013_statistics_work(struct work_struct *work)
825b9670 523{
f571e004
AP
524 struct af9013_state *state = container_of(work,
525 struct af9013_state, statistics_work.work);
526 unsigned int next_msec;
527
528 /* update only signal strength when demod is not locked */
529 if (!(state->fe_status & FE_HAS_LOCK)) {
530 state->statistics_step = 0;
531 state->ber = 0;
532 state->snr = 0;
533 }
534
535 switch (state->statistics_step) {
536 default:
537 state->statistics_step = 0;
538 case 0:
fdf07b02 539 af9013_statistics_signal_strength(&state->fe);
f571e004
AP
540 state->statistics_step++;
541 next_msec = 300;
542 break;
543 case 1:
fdf07b02 544 af9013_statistics_snr_start(&state->fe);
f571e004
AP
545 state->statistics_step++;
546 next_msec = 200;
547 break;
548 case 2:
fdf07b02 549 af9013_statistics_ber_unc_start(&state->fe);
f571e004
AP
550 state->statistics_step++;
551 next_msec = 1000;
552 break;
553 case 3:
fdf07b02 554 af9013_statistics_snr_result(&state->fe);
f571e004
AP
555 state->statistics_step++;
556 next_msec = 400;
557 break;
558 case 4:
fdf07b02 559 af9013_statistics_ber_unc_result(&state->fe);
f571e004
AP
560 state->statistics_step++;
561 next_msec = 100;
562 break;
563 }
564
565 schedule_delayed_work(&state->statistics_work,
566 msecs_to_jiffies(next_msec));
f571e004
AP
567}
568
569static int af9013_get_tune_settings(struct dvb_frontend *fe,
570 struct dvb_frontend_tune_settings *fesettings)
571{
572 fesettings->min_delay_ms = 800;
573 fesettings->step_size = 0;
574 fesettings->max_drift = 0;
575
576 return 0;
577}
578
59d3cc19 579static int af9013_set_frontend(struct dvb_frontend *fe)
f571e004
AP
580{
581 struct af9013_state *state = fe->demodulator_priv;
582 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
583 int ret, i, sampling_freq;
584 bool auto_mode, spec_inv;
585 u8 buf[6];
586 u32 if_frequency, freq_cw;
587
8df379c5
AP
588 dev_dbg(&state->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n",
589 __func__, c->frequency, c->bandwidth_hz);
f571e004
AP
590
591 /* program tuner */
592 if (fe->ops.tuner_ops.set_params)
14d24d14 593 fe->ops.tuner_ops.set_params(fe);
f571e004
AP
594
595 /* program CFOE coefficients */
596 if (c->bandwidth_hz != state->bandwidth_hz) {
597 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
598 if (coeff_lut[i].clock == state->config.clock &&
599 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
600 break;
601 }
825b9670
AP
602 }
603
d7b76c91
MCC
604 /* Return an error if can't find bandwidth or the right clock */
605 if (i == ARRAY_SIZE(coeff_lut))
606 return -EINVAL;
607
f571e004
AP
608 ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val,
609 sizeof(coeff_lut[i].val));
610 }
6d42b218 611
f571e004
AP
612 /* program frequency control */
613 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
6d42b218
AP
614 /* get used IF frequency */
615 if (fe->ops.tuner_ops.get_if_frequency)
f571e004 616 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
6d42b218 617 else
f571e004 618 if_frequency = state->config.if_frequency;
825b9670 619
8df379c5
AP
620 dev_dbg(&state->i2c->dev, "%s: if_frequency=%d\n",
621 __func__, if_frequency);
ab2e06ac 622
f571e004 623 sampling_freq = if_frequency;
825b9670 624
f571e004
AP
625 while (sampling_freq > (state->config.clock / 2))
626 sampling_freq -= state->config.clock;
825b9670 627
f571e004
AP
628 if (sampling_freq < 0) {
629 sampling_freq *= -1;
630 spec_inv = state->config.spec_inv;
631 } else {
632 spec_inv = !state->config.spec_inv;
633 }
825b9670 634
8df379c5
AP
635 freq_cw = af9013_div(state, sampling_freq, state->config.clock,
636 23);
825b9670 637
f571e004
AP
638 if (spec_inv)
639 freq_cw = 0x800000 - freq_cw;
825b9670 640
f571e004
AP
641 buf[0] = (freq_cw >> 0) & 0xff;
642 buf[1] = (freq_cw >> 8) & 0xff;
643 buf[2] = (freq_cw >> 16) & 0x7f;
825b9670 644
f571e004 645 freq_cw = 0x800000 - freq_cw;
825b9670 646
f571e004
AP
647 buf[3] = (freq_cw >> 0) & 0xff;
648 buf[4] = (freq_cw >> 8) & 0xff;
649 buf[5] = (freq_cw >> 16) & 0x7f;
650
651 ret = af9013_wr_regs(state, 0xd140, buf, 3);
652 if (ret)
653 goto err;
654
655 ret = af9013_wr_regs(state, 0x9be7, buf, 6);
656 if (ret)
657 goto err;
825b9670 658 }
825b9670 659
f571e004
AP
660 /* clear TPS lock flag */
661 ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1);
662 if (ret)
663 goto err;
825b9670 664
f571e004
AP
665 /* clear MPEG2 lock flag */
666 ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0);
667 if (ret)
668 goto err;
a2f5a811 669
f571e004
AP
670 /* empty channel function */
671 ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0);
672 if (ret)
673 goto err;
674
675 /* empty DVB-T channel function */
676 ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0);
677 if (ret)
678 goto err;
679
680 /* transmission parameters */
681 auto_mode = false;
682 memset(buf, 0, 3);
683
684 switch (c->transmission_mode) {
825b9670 685 case TRANSMISSION_MODE_AUTO:
6a5e7fde 686 auto_mode = true;
f571e004 687 break;
825b9670
AP
688 case TRANSMISSION_MODE_2K:
689 break;
690 case TRANSMISSION_MODE_8K:
691 buf[0] |= (1 << 0);
692 break;
693 default:
8df379c5
AP
694 dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n",
695 __func__);
6a5e7fde 696 auto_mode = true;
825b9670
AP
697 }
698
f571e004 699 switch (c->guard_interval) {
825b9670 700 case GUARD_INTERVAL_AUTO:
6a5e7fde 701 auto_mode = true;
f571e004 702 break;
825b9670
AP
703 case GUARD_INTERVAL_1_32:
704 break;
705 case GUARD_INTERVAL_1_16:
706 buf[0] |= (1 << 2);
707 break;
708 case GUARD_INTERVAL_1_8:
709 buf[0] |= (2 << 2);
710 break;
711 case GUARD_INTERVAL_1_4:
712 buf[0] |= (3 << 2);
713 break;
714 default:
8df379c5
AP
715 dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n",
716 __func__);
6a5e7fde 717 auto_mode = true;
825b9670
AP
718 }
719
f571e004 720 switch (c->hierarchy) {
825b9670 721 case HIERARCHY_AUTO:
6a5e7fde 722 auto_mode = true;
f571e004 723 break;
825b9670
AP
724 case HIERARCHY_NONE:
725 break;
726 case HIERARCHY_1:
727 buf[0] |= (1 << 4);
728 break;
729 case HIERARCHY_2:
730 buf[0] |= (2 << 4);
731 break;
732 case HIERARCHY_4:
733 buf[0] |= (3 << 4);
734 break;
735 default:
8df379c5 736 dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__);
6a5e7fde 737 auto_mode = true;
c2c1b415 738 }
825b9670 739
f571e004 740 switch (c->modulation) {
825b9670 741 case QAM_AUTO:
6a5e7fde 742 auto_mode = true;
f571e004 743 break;
825b9670
AP
744 case QPSK:
745 break;
746 case QAM_16:
747 buf[1] |= (1 << 6);
748 break;
749 case QAM_64:
750 buf[1] |= (2 << 6);
751 break;
752 default:
8df379c5 753 dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__);
6a5e7fde 754 auto_mode = true;
825b9670
AP
755 }
756
757 /* Use HP. How and which case we can switch to LP? */
758 buf[1] |= (1 << 4);
759
f571e004 760 switch (c->code_rate_HP) {
825b9670 761 case FEC_AUTO:
6a5e7fde 762 auto_mode = true;
f571e004 763 break;
825b9670
AP
764 case FEC_1_2:
765 break;
766 case FEC_2_3:
767 buf[2] |= (1 << 0);
768 break;
769 case FEC_3_4:
770 buf[2] |= (2 << 0);
771 break;
772 case FEC_5_6:
773 buf[2] |= (3 << 0);
774 break;
775 case FEC_7_8:
776 buf[2] |= (4 << 0);
777 break;
778 default:
8df379c5
AP
779 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n",
780 __func__);
6a5e7fde 781 auto_mode = true;
825b9670
AP
782 }
783
f571e004 784 switch (c->code_rate_LP) {
825b9670 785 case FEC_AUTO:
6a5e7fde 786 auto_mode = true;
f571e004 787 break;
825b9670
AP
788 case FEC_1_2:
789 break;
790 case FEC_2_3:
791 buf[2] |= (1 << 3);
792 break;
793 case FEC_3_4:
794 buf[2] |= (2 << 3);
795 break;
796 case FEC_5_6:
797 buf[2] |= (3 << 3);
798 break;
799 case FEC_7_8:
800 buf[2] |= (4 << 3);
801 break;
802 case FEC_NONE:
f571e004 803 break;
825b9670 804 default:
8df379c5
AP
805 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n",
806 __func__);
6a5e7fde 807 auto_mode = true;
825b9670
AP
808 }
809
f571e004
AP
810 switch (c->bandwidth_hz) {
811 case 6000000:
825b9670 812 break;
f571e004 813 case 7000000:
825b9670
AP
814 buf[1] |= (1 << 2);
815 break;
f571e004 816 case 8000000:
825b9670
AP
817 buf[1] |= (2 << 2);
818 break;
819 default:
8df379c5
AP
820 dev_dbg(&state->i2c->dev, "%s: invalid bandwidth_hz\n",
821 __func__);
f571e004
AP
822 ret = -EINVAL;
823 goto err;
825b9670
AP
824 }
825
f571e004 826 ret = af9013_wr_regs(state, 0xd3c0, buf, 3);
825b9670 827 if (ret)
f571e004 828 goto err;
825b9670 829
f571e004
AP
830 if (auto_mode) {
831 /* clear easy mode flag */
832 ret = af9013_wr_reg(state, 0xaefd, 0);
825b9670 833 if (ret)
f571e004 834 goto err;
825b9670 835
8df379c5 836 dev_dbg(&state->i2c->dev, "%s: auto params\n", __func__);
825b9670 837 } else {
f571e004
AP
838 /* set easy mode flag */
839 ret = af9013_wr_reg(state, 0xaefd, 1);
825b9670 840 if (ret)
f571e004 841 goto err;
825b9670 842
f571e004 843 ret = af9013_wr_reg(state, 0xaefe, 0);
825b9670 844 if (ret)
f571e004
AP
845 goto err;
846
8df379c5 847 dev_dbg(&state->i2c->dev, "%s: manual params\n", __func__);
825b9670 848 }
825b9670 849
f571e004
AP
850 /* tune */
851 ret = af9013_wr_reg(state, 0xffff, 0);
825b9670 852 if (ret)
f571e004
AP
853 goto err;
854
855 state->bandwidth_hz = c->bandwidth_hz;
856 state->set_frontend_jiffies = jiffies;
857 state->first_tune = false;
825b9670 858
f571e004
AP
859 return ret;
860err:
8df379c5 861 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
862 return ret;
863}
864
7e3e68bc
MCC
865static int af9013_get_frontend(struct dvb_frontend *fe,
866 struct dtv_frontend_properties *c)
825b9670
AP
867{
868 struct af9013_state *state = fe->demodulator_priv;
869 int ret;
f571e004 870 u8 buf[3];
825b9670 871
8df379c5 872 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
873
874 ret = af9013_rd_regs(state, 0xd3c0, buf, 3);
875 if (ret)
876 goto err;
825b9670
AP
877
878 switch ((buf[1] >> 6) & 3) {
879 case 0:
f571e004 880 c->modulation = QPSK;
825b9670
AP
881 break;
882 case 1:
f571e004 883 c->modulation = QAM_16;
825b9670
AP
884 break;
885 case 2:
f571e004 886 c->modulation = QAM_64;
825b9670
AP
887 break;
888 }
889
890 switch ((buf[0] >> 0) & 3) {
891 case 0:
f571e004 892 c->transmission_mode = TRANSMISSION_MODE_2K;
825b9670
AP
893 break;
894 case 1:
f571e004 895 c->transmission_mode = TRANSMISSION_MODE_8K;
825b9670
AP
896 }
897
898 switch ((buf[0] >> 2) & 3) {
899 case 0:
6a2329ad 900 c->guard_interval = GUARD_INTERVAL_1_32;
825b9670
AP
901 break;
902 case 1:
6a2329ad 903 c->guard_interval = GUARD_INTERVAL_1_16;
825b9670
AP
904 break;
905 case 2:
6a2329ad 906 c->guard_interval = GUARD_INTERVAL_1_8;
825b9670
AP
907 break;
908 case 3:
6a2329ad 909 c->guard_interval = GUARD_INTERVAL_1_4;
825b9670
AP
910 break;
911 }
912
913 switch ((buf[0] >> 4) & 7) {
914 case 0:
f571e004 915 c->hierarchy = HIERARCHY_NONE;
825b9670
AP
916 break;
917 case 1:
f571e004 918 c->hierarchy = HIERARCHY_1;
825b9670
AP
919 break;
920 case 2:
f571e004 921 c->hierarchy = HIERARCHY_2;
825b9670
AP
922 break;
923 case 3:
f571e004 924 c->hierarchy = HIERARCHY_4;
825b9670
AP
925 break;
926 }
927
928 switch ((buf[2] >> 0) & 7) {
929 case 0:
f571e004 930 c->code_rate_HP = FEC_1_2;
825b9670
AP
931 break;
932 case 1:
f571e004
AP
933 c->code_rate_HP = FEC_2_3;
934 break;
935 case 2:
936 c->code_rate_HP = FEC_3_4;
937 break;
938 case 3:
939 c->code_rate_HP = FEC_5_6;
940 break;
941 case 4:
942 c->code_rate_HP = FEC_7_8;
943 break;
825b9670
AP
944 }
945
f571e004
AP
946 switch ((buf[2] >> 3) & 7) {
947 case 0:
948 c->code_rate_LP = FEC_1_2;
949 break;
950 case 1:
951 c->code_rate_LP = FEC_2_3;
952 break;
953 case 2:
954 c->code_rate_LP = FEC_3_4;
955 break;
956 case 3:
957 c->code_rate_LP = FEC_5_6;
958 break;
959 case 4:
960 c->code_rate_LP = FEC_7_8;
961 break;
962 }
825b9670 963
f571e004
AP
964 switch ((buf[1] >> 2) & 3) {
965 case 0:
966 c->bandwidth_hz = 6000000;
967 break;
968 case 1:
969 c->bandwidth_hz = 7000000;
970 break;
971 case 2:
972 c->bandwidth_hz = 8000000;
973 break;
825b9670
AP
974 }
975
825b9670 976 return ret;
f571e004 977err:
8df379c5 978 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
979 return ret;
980}
981
0df289a2 982static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
825b9670
AP
983{
984 struct af9013_state *state = fe->demodulator_priv;
f571e004 985 int ret;
825b9670 986 u8 tmp;
f571e004
AP
987
988 /*
989 * Return status from the cache if it is younger than 2000ms with the
990 * exception of last tune is done during 4000ms.
991 */
992 if (time_is_after_jiffies(
993 state->read_status_jiffies + msecs_to_jiffies(2000)) &&
994 time_is_before_jiffies(
995 state->set_frontend_jiffies + msecs_to_jiffies(4000))
996 ) {
997 *status = state->fe_status;
998 return 0;
999 } else {
1000 *status = 0;
1001 }
825b9670 1002
825b9670 1003 /* MPEG2 lock */
f571e004 1004 ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp);
825b9670 1005 if (ret)
f571e004
AP
1006 goto err;
1007
825b9670 1008 if (tmp)
8af5e381
AP
1009 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
1010 FE_HAS_SYNC | FE_HAS_LOCK;
825b9670 1011
8af5e381
AP
1012 if (!*status) {
1013 /* TPS lock */
f571e004 1014 ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp);
825b9670 1015 if (ret)
f571e004
AP
1016 goto err;
1017
825b9670 1018 if (tmp)
8af5e381
AP
1019 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
1020 FE_HAS_VITERBI;
825b9670
AP
1021 }
1022
f571e004
AP
1023 state->fe_status = *status;
1024 state->read_status_jiffies = jiffies;
825b9670 1025
f571e004
AP
1026 return ret;
1027err:
8df379c5 1028 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
1029 return ret;
1030}
1031
f571e004 1032static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
825b9670
AP
1033{
1034 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP
1035 *snr = state->snr;
1036 return 0;
825b9670
AP
1037}
1038
1039static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1040{
1041 struct af9013_state *state = fe->demodulator_priv;
825b9670 1042 *strength = state->signal_strength;
f571e004 1043 return 0;
825b9670
AP
1044}
1045
f571e004 1046static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
825b9670
AP
1047{
1048 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP
1049 *ber = state->ber;
1050 return 0;
825b9670
AP
1051}
1052
1053static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1054{
1055 struct af9013_state *state = fe->demodulator_priv;
825b9670 1056 *ucblocks = state->ucblocks;
f571e004 1057 return 0;
825b9670
AP
1058}
1059
1060static int af9013_init(struct dvb_frontend *fe)
1061{
1062 struct af9013_state *state = fe->demodulator_priv;
1063 int ret, i, len;
f571e004
AP
1064 u8 buf[3], tmp;
1065 u32 adc_cw;
1066 const struct af9013_reg_bit *init;
825b9670 1067
8df379c5 1068 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
825b9670
AP
1069
1070 /* power on */
1071 ret = af9013_power_ctrl(state, 1);
1072 if (ret)
f571e004 1073 goto err;
825b9670
AP
1074
1075 /* enable ADC */
f571e004 1076 ret = af9013_wr_reg(state, 0xd73a, 0xa4);
825b9670 1077 if (ret)
f571e004 1078 goto err;
825b9670
AP
1079
1080 /* write API version to firmware */
f571e004
AP
1081 ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4);
1082 if (ret)
1083 goto err;
825b9670
AP
1084
1085 /* program ADC control */
f571e004
AP
1086 switch (state->config.clock) {
1087 case 28800000: /* 28.800 MHz */
1088 tmp = 0;
1089 break;
1090 case 20480000: /* 20.480 MHz */
1091 tmp = 1;
1092 break;
1093 case 28000000: /* 28.000 MHz */
1094 tmp = 2;
1095 break;
1096 case 25000000: /* 25.000 MHz */
1097 tmp = 3;
1098 break;
1099 default:
8df379c5
AP
1100 dev_err(&state->i2c->dev, "%s: invalid clock\n",
1101 KBUILD_MODNAME);
f571e004
AP
1102 return -EINVAL;
1103 }
1104
8df379c5 1105 adc_cw = af9013_div(state, state->config.clock, 1000000ul, 19);
f571e004
AP
1106 buf[0] = (adc_cw >> 0) & 0xff;
1107 buf[1] = (adc_cw >> 8) & 0xff;
1108 buf[2] = (adc_cw >> 16) & 0xff;
1109
1110 ret = af9013_wr_regs(state, 0xd180, buf, 3);
1111 if (ret)
1112 goto err;
1113
1114 ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp);
825b9670 1115 if (ret)
f571e004 1116 goto err;
825b9670
AP
1117
1118 /* set I2C master clock */
f571e004 1119 ret = af9013_wr_reg(state, 0xd416, 0x14);
825b9670 1120 if (ret)
f571e004 1121 goto err;
825b9670
AP
1122
1123 /* set 16 embx */
f571e004 1124 ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1);
825b9670 1125 if (ret)
f571e004 1126 goto err;
825b9670
AP
1127
1128 /* set no trigger */
f571e004 1129 ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0);
825b9670 1130 if (ret)
f571e004 1131 goto err;
825b9670
AP
1132
1133 /* set read-update bit for constellation */
f571e004 1134 ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1);
825b9670 1135 if (ret)
f571e004 1136 goto err;
825b9670 1137
f571e004
AP
1138 /* settings for mp2if */
1139 if (state->config.ts_mode == AF9013_TS_USB) {
1140 /* AF9015 split PSB to 1.5k + 0.5k */
1141 ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1);
1142 if (ret)
1143 goto err;
1144 } else {
1145 /* AF9013 change the output bit to data7 */
1146 ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1);
1147 if (ret)
1148 goto err;
1149
1150 /* AF9013 set mpeg to full speed */
1151 ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1);
1152 if (ret)
1153 goto err;
1154 }
1155
1156 ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1);
825b9670 1157 if (ret)
f571e004 1158 goto err;
825b9670
AP
1159
1160 /* load OFSM settings */
8df379c5 1161 dev_dbg(&state->i2c->dev, "%s: load ofsm settings\n", __func__);
825b9670
AP
1162 len = ARRAY_SIZE(ofsm_init);
1163 init = ofsm_init;
1164 for (i = 0; i < len; i++) {
f571e004 1165 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP
1166 init[i].len, init[i].val);
1167 if (ret)
f571e004 1168 goto err;
825b9670
AP
1169 }
1170
1171 /* load tuner specific settings */
8df379c5
AP
1172 dev_dbg(&state->i2c->dev, "%s: load tuner specific settings\n",
1173 __func__);
825b9670
AP
1174 switch (state->config.tuner) {
1175 case AF9013_TUNER_MXL5003D:
1176 len = ARRAY_SIZE(tuner_init_mxl5003d);
1177 init = tuner_init_mxl5003d;
1178 break;
1179 case AF9013_TUNER_MXL5005D:
1180 case AF9013_TUNER_MXL5005R:
a4f31d0d 1181 case AF9013_TUNER_MXL5007T:
825b9670
AP
1182 len = ARRAY_SIZE(tuner_init_mxl5005);
1183 init = tuner_init_mxl5005;
1184 break;
1185 case AF9013_TUNER_ENV77H11D5:
1186 len = ARRAY_SIZE(tuner_init_env77h11d5);
1187 init = tuner_init_env77h11d5;
1188 break;
1189 case AF9013_TUNER_MT2060:
1190 len = ARRAY_SIZE(tuner_init_mt2060);
1191 init = tuner_init_mt2060;
1192 break;
1193 case AF9013_TUNER_MC44S803:
1194 len = ARRAY_SIZE(tuner_init_mc44s803);
1195 init = tuner_init_mc44s803;
1196 break;
1197 case AF9013_TUNER_QT1010:
1198 case AF9013_TUNER_QT1010A:
1199 len = ARRAY_SIZE(tuner_init_qt1010);
1200 init = tuner_init_qt1010;
1201 break;
1202 case AF9013_TUNER_MT2060_2:
1203 len = ARRAY_SIZE(tuner_init_mt2060_2);
1204 init = tuner_init_mt2060_2;
1205 break;
1206 case AF9013_TUNER_TDA18271:
2158e509 1207 case AF9013_TUNER_TDA18218:
825b9670
AP
1208 len = ARRAY_SIZE(tuner_init_tda18271);
1209 init = tuner_init_tda18271;
1210 break;
1211 case AF9013_TUNER_UNKNOWN:
1212 default:
1213 len = ARRAY_SIZE(tuner_init_unknown);
1214 init = tuner_init_unknown;
1215 break;
1216 }
1217
1218 for (i = 0; i < len; i++) {
f571e004 1219 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP
1220 init[i].len, init[i].val);
1221 if (ret)
f571e004 1222 goto err;
825b9670
AP
1223 }
1224
f571e004
AP
1225 /* TS mode */
1226 ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode);
825b9670 1227 if (ret)
f571e004 1228 goto err;
825b9670
AP
1229
1230 /* enable lock led */
f571e004 1231 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1);
825b9670 1232 if (ret)
f571e004 1233 goto err;
825b9670 1234
f571e004
AP
1235 /* check if we support signal strength */
1236 if (!state->signal_strength_en) {
1237 ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1,
1238 &state->signal_strength_en);
1239 if (ret)
1240 goto err;
1241 }
9e35cd22 1242
f571e004
AP
1243 /* read values needed for signal strength calculation */
1244 if (state->signal_strength_en && !state->rf_50) {
1245 ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50);
9e35cd22 1246 if (ret)
f571e004
AP
1247 goto err;
1248
1249 ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80);
9e35cd22 1250 if (ret)
f571e004
AP
1251 goto err;
1252
1253 ret = af9013_rd_reg(state, 0x9be2, &state->if_50);
9e35cd22 1254 if (ret)
f571e004
AP
1255 goto err;
1256
1257 ret = af9013_rd_reg(state, 0x9be4, &state->if_80);
9e35cd22 1258 if (ret)
f571e004 1259 goto err;
9e35cd22
AP
1260 }
1261
f571e004
AP
1262 /* SNR */
1263 ret = af9013_wr_reg(state, 0xd2e2, 1);
1264 if (ret)
1265 goto err;
1266
1267 /* BER / UCB */
1268 buf[0] = (10000 >> 0) & 0xff;
1269 buf[1] = (10000 >> 8) & 0xff;
1270 ret = af9013_wr_regs(state, 0xd385, buf, 2);
1271 if (ret)
1272 goto err;
1273
1274 /* enable FEC monitor */
1275 ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1);
1276 if (ret)
1277 goto err;
1278
1279 state->first_tune = true;
1280 schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400));
1281
1282 return ret;
1283err:
8df379c5 1284 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
1285 return ret;
1286}
1287
1288static int af9013_sleep(struct dvb_frontend *fe)
1289{
1290 struct af9013_state *state = fe->demodulator_priv;
1291 int ret;
1292
8df379c5 1293 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
1294
1295 /* stop statistics polling */
1296 cancel_delayed_work_sync(&state->statistics_work);
1297
1298 /* disable lock led */
1299 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0);
1300 if (ret)
1301 goto err;
1302
1303 /* power off */
1304 ret = af9013_power_ctrl(state, 0);
1305 if (ret)
1306 goto err;
1307
1308 return ret;
1309err:
8df379c5 1310 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
1311 return ret;
1312}
1313
1314static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1315{
1316 int ret;
1317 struct af9013_state *state = fe->demodulator_priv;
1318
8df379c5 1319 dev_dbg(&state->i2c->dev, "%s: enable=%d\n", __func__, enable);
f571e004
AP
1320
1321 /* gate already open or close */
1322 if (state->i2c_gate_state == enable)
1323 return 0;
1324
1325 if (state->config.ts_mode == AF9013_TS_USB)
1326 ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable);
1327 else
1328 ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable);
1329 if (ret)
1330 goto err;
1331
1332 state->i2c_gate_state = enable;
1333
1334 return ret;
1335err:
8df379c5 1336 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
1337 return ret;
1338}
1339
f571e004
AP
1340static void af9013_release(struct dvb_frontend *fe)
1341{
1342 struct af9013_state *state = fe->demodulator_priv;
631c694f
EMW
1343
1344 /* stop statistics polling */
1345 cancel_delayed_work_sync(&state->statistics_work);
1346
f571e004
AP
1347 kfree(state);
1348}
1349
bd336e63 1350static const struct dvb_frontend_ops af9013_ops;
825b9670
AP
1351
1352static int af9013_download_firmware(struct af9013_state *state)
1353{
6ed9d560 1354 int i, len, remaining, ret;
825b9670 1355 const struct firmware *fw;
825b9670
AP
1356 u16 checksum = 0;
1357 u8 val;
1358 u8 fw_params[4];
a71103a6 1359 u8 *fw_file = AF9013_FIRMWARE;
825b9670
AP
1360
1361 msleep(100);
1362 /* check whether firmware is already running */
f571e004 1363 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1364 if (ret)
f571e004 1365 goto err;
825b9670 1366 else
8df379c5
AP
1367 dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
1368 __func__, val);
825b9670
AP
1369
1370 if (val == 0x0c) /* fw is running, no need for download */
1371 goto exit;
1372
8df379c5
AP
1373 dev_info(&state->i2c->dev, "%s: found a '%s' in cold state, will try " \
1374 "to load a firmware\n",
1375 KBUILD_MODNAME, af9013_ops.info.name);
825b9670
AP
1376
1377 /* request the firmware, this will block and timeout */
e9785250 1378 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
825b9670 1379 if (ret) {
8df379c5
AP
1380 dev_info(&state->i2c->dev, "%s: did not find the firmware " \
1381 "file. (%s) Please see linux/Documentation/dvb/ for " \
1382 "more details on firmware-problems. (%d)\n",
1383 KBUILD_MODNAME, fw_file, ret);
f571e004 1384 goto err;
825b9670
AP
1385 }
1386
8df379c5
AP
1387 dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s'\n",
1388 KBUILD_MODNAME, fw_file);
825b9670
AP
1389
1390 /* calc checksum */
1391 for (i = 0; i < fw->size; i++)
1392 checksum += fw->data[i];
1393
1394 fw_params[0] = checksum >> 8;
1395 fw_params[1] = checksum & 0xff;
1396 fw_params[2] = fw->size >> 8;
1397 fw_params[3] = fw->size & 0xff;
1398
1399 /* write fw checksum & size */
1400 ret = af9013_write_ofsm_regs(state, 0x50fc,
1401 fw_params, sizeof(fw_params));
1402 if (ret)
f571e004 1403 goto err_release;
825b9670 1404
6ed9d560
AP
1405 #define FW_ADDR 0x5100 /* firmware start address */
1406 #define LEN_MAX 16 /* max packet size */
1407 for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
1408 len = remaining;
1409 if (len > LEN_MAX)
1410 len = LEN_MAX;
825b9670 1411
6ed9d560
AP
1412 ret = af9013_write_ofsm_regs(state,
1413 FW_ADDR + fw->size - remaining,
1414 (u8 *) &fw->data[fw->size - remaining], len);
825b9670 1415 if (ret) {
8df379c5
AP
1416 dev_err(&state->i2c->dev,
1417 "%s: firmware download failed=%d\n",
1418 KBUILD_MODNAME, ret);
f571e004 1419 goto err_release;
825b9670
AP
1420 }
1421 }
1422
825b9670 1423 /* request boot firmware */
f571e004 1424 ret = af9013_wr_reg(state, 0xe205, 1);
825b9670 1425 if (ret)
f571e004 1426 goto err_release;
825b9670
AP
1427
1428 for (i = 0; i < 15; i++) {
1429 msleep(100);
1430
1431 /* check firmware status */
f571e004 1432 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1433 if (ret)
f571e004 1434 goto err_release;
825b9670 1435
8df379c5
AP
1436 dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
1437 __func__, val);
825b9670
AP
1438
1439 if (val == 0x0c || val == 0x04) /* success or fail */
1440 break;
1441 }
1442
1443 if (val == 0x04) {
8df379c5
AP
1444 dev_err(&state->i2c->dev, "%s: firmware did not run\n",
1445 KBUILD_MODNAME);
f571e004 1446 ret = -ENODEV;
825b9670 1447 } else if (val != 0x0c) {
8df379c5
AP
1448 dev_err(&state->i2c->dev, "%s: firmware boot timeout\n",
1449 KBUILD_MODNAME);
f571e004 1450 ret = -ENODEV;
825b9670
AP
1451 }
1452
f571e004 1453err_release:
825b9670 1454 release_firmware(fw);
f571e004 1455err:
825b9670
AP
1456exit:
1457 if (!ret)
8df379c5
AP
1458 dev_info(&state->i2c->dev, "%s: found a '%s' in warm state\n",
1459 KBUILD_MODNAME, af9013_ops.info.name);
825b9670
AP
1460 return ret;
1461}
1462
825b9670
AP
1463struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1464 struct i2c_adapter *i2c)
1465{
1466 int ret;
1467 struct af9013_state *state = NULL;
ce99efa5 1468 u8 buf[4], i;
825b9670
AP
1469
1470 /* allocate memory for the internal state */
1471 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
1472 if (state == NULL)
f571e004 1473 goto err;
825b9670
AP
1474
1475 /* setup the state */
1476 state->i2c = i2c;
1477 memcpy(&state->config, config, sizeof(struct af9013_config));
1478
825b9670 1479 /* download firmware */
f571e004 1480 if (state->config.ts_mode != AF9013_TS_USB) {
825b9670
AP
1481 ret = af9013_download_firmware(state);
1482 if (ret)
f571e004 1483 goto err;
825b9670
AP
1484 }
1485
1486 /* firmware version */
f571e004 1487 ret = af9013_rd_regs(state, 0x5103, buf, 4);
109a2990 1488 if (ret)
f571e004 1489 goto err;
109a2990 1490
8df379c5
AP
1491 dev_info(&state->i2c->dev, "%s: firmware version %d.%d.%d.%d\n",
1492 KBUILD_MODNAME, buf[0], buf[1], buf[2], buf[3]);
825b9670
AP
1493
1494 /* set GPIOs */
1495 for (i = 0; i < sizeof(state->config.gpio); i++) {
1496 ret = af9013_set_gpio(state, i, state->config.gpio[i]);
1497 if (ret)
f571e004 1498 goto err;
825b9670
AP
1499 }
1500
1501 /* create dvb_frontend */
f571e004 1502 memcpy(&state->fe.ops, &af9013_ops,
825b9670 1503 sizeof(struct dvb_frontend_ops));
f571e004
AP
1504 state->fe.demodulator_priv = state;
1505
1506 INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work);
825b9670 1507
f571e004
AP
1508 return &state->fe;
1509err:
825b9670
AP
1510 kfree(state);
1511 return NULL;
1512}
1513EXPORT_SYMBOL(af9013_attach);
1514
bd336e63 1515static const struct dvb_frontend_ops af9013_ops = {
59d3cc19 1516 .delsys = { SYS_DVBT },
825b9670 1517 .info = {
f571e004 1518 .name = "Afatech AF9013",
825b9670
AP
1519 .frequency_min = 174000000,
1520 .frequency_max = 862000000,
1521 .frequency_stepsize = 250000,
1522 .frequency_tolerance = 0,
f571e004
AP
1523 .caps = FE_CAN_FEC_1_2 |
1524 FE_CAN_FEC_2_3 |
1525 FE_CAN_FEC_3_4 |
1526 FE_CAN_FEC_5_6 |
1527 FE_CAN_FEC_7_8 |
1528 FE_CAN_FEC_AUTO |
1529 FE_CAN_QPSK |
1530 FE_CAN_QAM_16 |
1531 FE_CAN_QAM_64 |
1532 FE_CAN_QAM_AUTO |
825b9670
AP
1533 FE_CAN_TRANSMISSION_MODE_AUTO |
1534 FE_CAN_GUARD_INTERVAL_AUTO |
1535 FE_CAN_HIERARCHY_AUTO |
1536 FE_CAN_RECOVER |
1537 FE_CAN_MUTE_TS
1538 },
1539
1540 .release = af9013_release,
f571e004 1541
825b9670
AP
1542 .init = af9013_init,
1543 .sleep = af9013_sleep,
825b9670 1544
f571e004 1545 .get_tune_settings = af9013_get_tune_settings,
59d3cc19
MCC
1546 .set_frontend = af9013_set_frontend,
1547 .get_frontend = af9013_get_frontend,
825b9670 1548
825b9670 1549 .read_status = af9013_read_status,
825b9670 1550 .read_snr = af9013_read_snr,
f571e004
AP
1551 .read_signal_strength = af9013_read_signal_strength,
1552 .read_ber = af9013_read_ber,
825b9670 1553 .read_ucblocks = af9013_read_ucblocks,
825b9670 1554
f571e004
AP
1555 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1556};
825b9670
AP
1557
1558MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1559MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1560MODULE_LICENSE("GPL");
a71103a6 1561MODULE_FIRMWARE(AF9013_FIRMWARE);