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[PATCH] dvb: ttpci: budget-av / tu1216 fix for QAM128
[linux-block.git] / drivers / media / dvb / ttpci / av7110.c
CommitLineData
1da177e4
LT		 1/*
2 * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
3 * av7110.c: initialization and demux stuff
4 *
5 * Copyright (C) 1999-2002 Ralph Metzler
6 * & Marcus Metzler for convergence integrated media GmbH
7 *
8 * originally based on code by:
9 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
27 *
28 *
29 * the project's page is at http://www.linuxtv.org/dvb/
30 */
31
32
33#include <linux/config.h>
34#include <linux/module.h>
35#include <linux/kmod.h>
36#include <linux/delay.h>
37#include <linux/fs.h>
38#include <linux/timer.h>
39#include <linux/poll.h>
40#include <linux/byteorder/swabb.h>
41#include <linux/smp_lock.h>
42
43#include <linux/kernel.h>
44#include <linux/moduleparam.h>
45#include <linux/sched.h>
46#include <linux/types.h>
47#include <linux/fcntl.h>
48#include <linux/interrupt.h>
49#include <linux/string.h>
50#include <linux/pci.h>
51#include <linux/vmalloc.h>
52#include <linux/firmware.h>
53#include <linux/crc32.h>
54#include <linux/i2c.h>
55
56#include <asm/system.h>
57#include <asm/semaphore.h>
58
59#include <linux/dvb/frontend.h>
60
61#include "dvb_frontend.h"
62
63#include "ttpci-eeprom.h"
64#include "av7110.h"
65#include "av7110_hw.h"
66#include "av7110_av.h"
67#include "av7110_ca.h"
68#include "av7110_ipack.h"
69
70#define TS_WIDTH 376
71#define TS_HEIGHT 512
72#define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
73#define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
74
75
76int av7110_debug;
77
78static int vidmode = CVBS_RGB_OUT;
79static int pids_off;
80static int adac = DVB_ADAC_TI;
81static int hw_sections;
82static int rgb_on;
83static int volume = 255;
84static int budgetpatch = 0;
85
86module_param_named(debug, av7110_debug, int, 0644);
87MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
88module_param(vidmode, int, 0444);
89MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
90module_param(pids_off, int, 0444);
91MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
92module_param(adac, int, 0444);
93MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
94module_param(hw_sections, int, 0444);
95MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
96module_param(rgb_on, int, 0444);
97MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control"
98 " signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
99module_param(volume, int, 0444);
100MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
101module_param(budgetpatch, int, 0444);
102MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
103
104static void restart_feeds(struct av7110 *av7110);
105
106static int av7110_num = 0;
107
108#define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
109{\
110 if (fe_func != NULL) { \
111 av7110_copy = fe_func; \
112 fe_func = av7110_func; \
113 } \
114}
115
116
117static void init_av7110_av(struct av7110 *av7110)
118{
119 struct saa7146_dev *dev = av7110->dev;
120
121 /* set internal volume control to maximum */
122 av7110->adac_type = DVB_ADAC_TI;
123 av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
124
125 av7710_set_video_mode(av7110, vidmode);
126
127 /* handle different card types */
128 /* remaining inits according to card and frontend type */
129 av7110->analog_tuner_flags = 0;
130 av7110->current_input = 0;
131 if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
132 printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
fdc53a6d 133 av7110->dvb_adapter.num);
1da177e4
LT		 134 av7110->adac_type = DVB_ADAC_CRYSTAL;
135 i2c_writereg(av7110, 0x20, 0x01, 0xd2);
136 i2c_writereg(av7110, 0x20, 0x02, 0x49);
137 i2c_writereg(av7110, 0x20, 0x03, 0x00);
138 i2c_writereg(av7110, 0x20, 0x04, 0x00);
139
140 /**
141 * some special handling for the Siemens DVB-C cards...
142 */
143 } else if (0 == av7110_init_analog_module(av7110)) {
144 /* done. */
145 }
146 else if (dev->pci->subsystem_vendor == 0x110a) {
147 printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
fdc53a6d 148 av7110->dvb_adapter.num);
1da177e4
LT		 149 av7110->adac_type = DVB_ADAC_NONE;
150 }
151 else {
152 av7110->adac_type = adac;
153 printk("dvb-ttpci: adac type set to %d @ card %d\n",
fdc53a6d 154 av7110->dvb_adapter.num, av7110->adac_type);
1da177e4
LT		 155 }
156
157 if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP) {
158 // switch DVB SCART on
159 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
160 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
161 if (rgb_on &&
162 (av7110->dev->pci->subsystem_vendor == 0x110a) && (av7110->dev->pci->subsystem_device == 0x0000)) {
163 saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
164 //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
165 }
166 }
167
168 av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
169 av7110_setup_irc_config(av7110, 0);
170}
171
172static void recover_arm(struct av7110 *av7110)
173{
174 dprintk(4, "%p\n",av7110);
175
176 av7110_bootarm(av7110);
177 msleep(100);
178 restart_feeds(av7110);
179 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, av7110->ir_config);
180}
181
182static void arm_error(struct av7110 *av7110)
183{
184 dprintk(4, "%p\n",av7110);
185
186 av7110->arm_errors++;
187 av7110->arm_ready = 0;
188 recover_arm(av7110);
189}
190
191static void av7110_arm_sync(struct av7110 *av7110)
192{
193 av7110->arm_rmmod = 1;
194 wake_up_interruptible(&av7110->arm_wait);
195
196 while (av7110->arm_thread)
197 msleep(1);
198}
199
200static int arm_thread(void *data)
201{
202 struct av7110 *av7110 = data;
203 u16 newloops = 0;
204 int timeout;
205
206 dprintk(4, "%p\n",av7110);
207
208 lock_kernel();
209 daemonize("arm_mon");
210 sigfillset(&current->blocked);
211 unlock_kernel();
212
213 av7110->arm_thread = current;
214
215 for (;;) {
216 timeout = wait_event_interruptible_timeout(av7110->arm_wait,
217 av7110->arm_rmmod, 5 * HZ);
218 if (-ERESTARTSYS == timeout || av7110->arm_rmmod) {
219 /* got signal or told to quit*/
220 break;
221 }
222
223 if (!av7110->arm_ready)
224 continue;
225
226 if (down_interruptible(&av7110->dcomlock))
227 break;
228
229 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
230 up(&av7110->dcomlock);
231
232 if (newloops == av7110->arm_loops) {
233 printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
fdc53a6d 234 av7110->dvb_adapter.num);
1da177e4
LT		 235
236 arm_error(av7110);
237 av7710_set_video_mode(av7110, vidmode);
238
239 init_av7110_av(av7110);
240
241 if (down_interruptible(&av7110->dcomlock))
242 break;
243
244 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
245 up(&av7110->dcomlock);
246 }
247 av7110->arm_loops = newloops;
248 }
249
250 av7110->arm_thread = NULL;
251 return 0;
252}
253
254
255/**
256 * Hack! we save the last av7110 ptr. This should be ok, since
257 * you rarely will use more then one IR control.
258 *
259 * If we want to support multiple controls we would have to do much more...
260 */
261void av7110_setup_irc_config(struct av7110 *av7110, u32 ir_config)
262{
263 static struct av7110 *last;
264
265 dprintk(4, "%p\n", av7110);
266
267 if (!av7110)
268 av7110 = last;
269 else
270 last = av7110;
271
272 if (av7110) {
273 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, ir_config);
274 av7110->ir_config = ir_config;
275 }
276}
277
278static void (*irc_handler)(u32);
279
280void av7110_register_irc_handler(void (*func)(u32))
281{
282 dprintk(4, "registering %p\n", func);
283 irc_handler = func;
284}
285
286void av7110_unregister_irc_handler(void (*func)(u32))
287{
288 dprintk(4, "unregistering %p\n", func);
289 irc_handler = NULL;
290}
291
292static void run_handlers(unsigned long ircom)
293{
294 if (irc_handler != NULL)
295 (*irc_handler)((u32) ircom);
296}
297
298static DECLARE_TASKLET(irtask, run_handlers, 0);
299
300static void IR_handle(struct av7110 *av7110, u32 ircom)
301{
302 dprintk(4, "ircommand = %08x\n", ircom);
303 irtask.data = (unsigned long) ircom;
304 tasklet_schedule(&irtask);
305}
306
307/****************************************************************************
308 * IRQ handling
309 ****************************************************************************/
310
311static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
312 u8 *buffer2, size_t buffer2_len,
313 struct dvb_demux_filter *dvbdmxfilter,
314 enum dmx_success success,
315 struct av7110 *av7110)
316{
317 if (!dvbdmxfilter->feed->demux->dmx.frontend)
318 return 0;
319 if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
320 return 0;
321
322 switch (dvbdmxfilter->type) {
323 case DMX_TYPE_SEC:
324 if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
325 return 0;
326 if (dvbdmxfilter->doneq) {
327 struct dmx_section_filter *filter = &dvbdmxfilter->filter;
328 int i;
329 u8 xor, neq = 0;
330
331 for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
332 xor = filter->filter_value[i] ^ buffer1[i];
333 neq |= dvbdmxfilter->maskandnotmode[i] & xor;
334 }
335 if (!neq)
336 return 0;
337 }
338 return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
339 buffer2, buffer2_len,
340 &dvbdmxfilter->filter,
341 DMX_OK);
342 case DMX_TYPE_TS:
343 if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
344 return 0;
345 if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
346 return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
347 buffer2, buffer2_len,
348 &dvbdmxfilter->feed->feed.ts,
349 DMX_OK);
350 else
351 av7110_p2t_write(buffer1, buffer1_len,
352 dvbdmxfilter->feed->pid,
353 &av7110->p2t_filter[dvbdmxfilter->index]);
354 default:
355 return 0;
356 }
357}
358
359
360//#define DEBUG_TIMING
361static inline void print_time(char *s)
362{
363#ifdef DEBUG_TIMING
364 struct timeval tv;
365 do_gettimeofday(&tv);
366 printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
367#endif
368}
369
370#define DEBI_READ 0
371#define DEBI_WRITE 1
372static inline void start_debi_dma(struct av7110 *av7110, int dir,
373 unsigned long addr, unsigned int len)
374{
375 dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
376 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
377 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
378 return;
379 }
380
381 SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
382 SAA7146_IER_ENABLE(av7110->dev, MASK_19);
383 if (len < 5)
384 len = 5; /* we want a real DEBI DMA */
385 if (dir == DEBI_WRITE)
386 iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
387 else
388 irdebi(av7110, DEBISWAB, addr, 0, len);
389}
390
391static void debiirq(unsigned long data)
392{
393 struct av7110 *av7110 = (struct av7110 *) data;
394 int type = av7110->debitype;
395 int handle = (type >> 8) & 0x1f;
396 unsigned int xfer = 0;
397
398 print_time("debi");
399 dprintk(4, "type 0x%04x\n", type);
400
401 if (type == -1) {
402 printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
403 jiffies, saa7146_read(av7110->dev, PSR),
404 saa7146_read(av7110->dev, SSR));
405 goto debi_done;
406 }
407 av7110->debitype = -1;
408
409 switch (type & 0xff) {
410
411 case DATA_TS_RECORD:
412 dvb_dmx_swfilter_packets(&av7110->demux,
413 (const u8 *) av7110->debi_virt,
414 av7110->debilen / 188);
415 xfer = RX_BUFF;
416 break;
417
418 case DATA_PES_RECORD:
419 if (av7110->demux.recording)
420 av7110_record_cb(&av7110->p2t[handle],
421 (u8 *) av7110->debi_virt,
422 av7110->debilen);
423 xfer = RX_BUFF;
424 break;
425
426 case DATA_IPMPE:
427 case DATA_FSECTION:
428 case DATA_PIPING:
429 if (av7110->handle2filter[handle])
430 DvbDmxFilterCallback((u8 *)av7110->debi_virt,
431 av7110->debilen, NULL, 0,
432 av7110->handle2filter[handle],
433 DMX_OK, av7110);
434 xfer = RX_BUFF;
435 break;
436
437 case DATA_CI_GET:
438 {
439 u8 *data = av7110->debi_virt;
440
441 if ((data[0] < 2) && data[2] == 0xff) {
442 int flags = 0;
443 if (data[5] > 0)
444 flags |= CA_CI_MODULE_PRESENT;
445 if (data[5] > 5)
446 flags |= CA_CI_MODULE_READY;
447 av7110->ci_slot[data[0]].flags = flags;
448 } else
449 ci_get_data(&av7110->ci_rbuffer,
450 av7110->debi_virt,
451 av7110->debilen);
452 xfer = RX_BUFF;
453 break;
454 }
455
456 case DATA_COMMON_INTERFACE:
457 CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
458#if 0
459 {
460 int i;
461
462 printk("av7110%d: ", av7110->num);
463 printk("%02x ", *(u8 *)av7110->debi_virt);
464 printk("%02x ", *(1+(u8 *)av7110->debi_virt));
465 for (i = 2; i < av7110->debilen; i++)
466 printk("%02x ", (*(i+(unsigned char *)av7110->debi_virt)));
467 for (i = 2; i < av7110->debilen; i++)
468 printk("%c", chtrans(*(i+(unsigned char *)av7110->debi_virt)));
469
470 printk("\n");
471 }
472#endif
473 xfer = RX_BUFF;
474 break;
475
476 case DATA_DEBUG_MESSAGE:
477 ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
478 printk("%s\n", (s8 *) av7110->debi_virt);
479 xfer = RX_BUFF;
480 break;
481
482 case DATA_CI_PUT:
483 dprintk(4, "debi DATA_CI_PUT\n");
484 case DATA_MPEG_PLAY:
485 dprintk(4, "debi DATA_MPEG_PLAY\n");
486 case DATA_BMP_LOAD:
487 dprintk(4, "debi DATA_BMP_LOAD\n");
488 xfer = TX_BUFF;
489 break;
490 default:
491 break;
492 }
493debi_done:
494 spin_lock(&av7110->debilock);
495 if (xfer)
496 iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
497 ARM_ClearMailBox(av7110);
498 spin_unlock(&av7110->debilock);
499}
500
501/* irq from av7110 firmware writing the mailbox register in the DPRAM */
502static void gpioirq(unsigned long data)
503{
504 struct av7110 *av7110 = (struct av7110 *) data;
505 u32 rxbuf, txbuf;
506 int len;
507
508 if (av7110->debitype != -1)
509 /* we shouldn't get any irq while a debi xfer is running */
510 printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
511 jiffies, saa7146_read(av7110->dev, PSR),
512 saa7146_read(av7110->dev, SSR));
513
514 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
515 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
516 BUG(); /* maybe we should try resetting the debi? */
517 }
518
519 spin_lock(&av7110->debilock);
520 ARM_ClearIrq(av7110);
521
522 /* see what the av7110 wants */
523 av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
524 av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
525 rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
526 txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
527 len = (av7110->debilen + 3) & ~3;
528
529 print_time("gpio");
530 dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
531
532 switch (av7110->debitype & 0xff) {
533
534 case DATA_TS_PLAY:
535 case DATA_PES_PLAY:
536 break;
537
538 case DATA_MPEG_VIDEO_EVENT:
539 {
540 u32 h_ar;
541 struct video_event event;
542
543 av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
544 h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
545
546 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
547 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
548
549 av7110->video_size.h = h_ar & 0xfff;
550 dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
551 av7110->video_size.w,
552 av7110->video_size.h,
553 av7110->video_size.aspect_ratio);
554
555 event.type = VIDEO_EVENT_SIZE_CHANGED;
556 event.u.size.w = av7110->video_size.w;
557 event.u.size.h = av7110->video_size.h;
558 switch ((h_ar >> 12) & 0xf)
559 {
560 case 3:
561 av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
562 event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
563 av7110->videostate.video_format = VIDEO_FORMAT_16_9;
564 break;
565 case 4:
566 av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
567 event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
568 av7110->videostate.video_format = VIDEO_FORMAT_221_1;
569 break;
570 default:
571 av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
572 event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
573 av7110->videostate.video_format = VIDEO_FORMAT_4_3;
574 }
575 dvb_video_add_event(av7110, &event);
576 break;
577 }
578
579 case DATA_CI_PUT:
580 {
581 int avail;
582 struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
583
584 avail = dvb_ringbuffer_avail(cibuf);
585 if (avail <= 2) {
586 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
587 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
588 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
589 break;
590 }
591 len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
592 len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
593 if (avail < len + 2) {
594 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
595 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
596 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
597 break;
598 }
599 DVB_RINGBUFFER_SKIP(cibuf, 2);
600
601 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len, 0);
602
603 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
604 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
605 dprintk(8, "DMA: CI\n");
606 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
607 spin_unlock(&av7110->debilock);
608 wake_up(&cibuf->queue);
609 return;
610 }
611
612 case DATA_MPEG_PLAY:
613 if (!av7110->playing) {
614 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
615 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
616 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
617 break;
618 }
619 len = 0;
620 if (av7110->debitype & 0x100) {
621 spin_lock(&av7110->aout.lock);
622 len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
623 spin_unlock(&av7110->aout.lock);
624 }
625 if (len <= 0 && (av7110->debitype & 0x200)
626 &&av7110->videostate.play_state != VIDEO_FREEZED) {
627 spin_lock(&av7110->avout.lock);
628 len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
629 spin_unlock(&av7110->avout.lock);
630 }
631 if (len <= 0) {
632 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
633 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
634 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
635 break;
636 }
637 dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
638 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
639 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
640 dprintk(8, "DMA: MPEG_PLAY\n");
641 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
642 spin_unlock(&av7110->debilock);
643 return;
644
645 case DATA_BMP_LOAD:
646 len = av7110->debilen;
647 dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
648 if (!len) {
649 av7110->bmp_state = BMP_LOADED;
650 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
651 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
652 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
653 wake_up(&av7110->bmpq);
654 dprintk(8, "gpio DATA_BMP_LOAD done\n");
655 break;
656 }
657 if (len > av7110->bmplen)
658 len = av7110->bmplen;
659 if (len > 2 * 1024)
660 len = 2 * 1024;
661 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
662 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
663 memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
664 av7110->bmpp += len;
665 av7110->bmplen -= len;
666 dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
667 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
668 spin_unlock(&av7110->debilock);
669 return;
670
671 case DATA_CI_GET:
672 case DATA_COMMON_INTERFACE:
673 case DATA_FSECTION:
674 case DATA_IPMPE:
675 case DATA_PIPING:
676 if (!len || len > 4 * 1024) {
677 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
678 break;
679 }
680 /* fall through */
681
682 case DATA_TS_RECORD:
683 case DATA_PES_RECORD:
684 dprintk(8, "DMA: TS_REC etc.\n");
685 start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
686 spin_unlock(&av7110->debilock);
687 return;
688
689 case DATA_DEBUG_MESSAGE:
690 if (!len || len > 0xff) {
691 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
692 break;
693 }
694 start_debi_dma(av7110, DEBI_READ, Reserved, len);
695 spin_unlock(&av7110->debilock);
696 return;
697
698 case DATA_IRCOMMAND:
699 IR_handle(av7110,
700 swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
701 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
702 break;
703
704 default:
705 printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
706 av7110->debitype, av7110->debilen);
707 break;
708 }
709 av7110->debitype = -1;
710 ARM_ClearMailBox(av7110);
711 spin_unlock(&av7110->debilock);
712}
713
714
715#ifdef CONFIG_DVB_AV7110_OSD
716static int dvb_osd_ioctl(struct inode *inode, struct file *file,
717 unsigned int cmd, void *parg)
718{
719 struct dvb_device *dvbdev = (struct dvb_device *) file->private_data;
720 struct av7110 *av7110 = (struct av7110 *) dvbdev->priv;
721
722 dprintk(4, "%p\n", av7110);
723
724 if (cmd == OSD_SEND_CMD)
725 return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
726 if (cmd == OSD_GET_CAPABILITY)
727 return av7110_osd_capability(av7110, (osd_cap_t *) parg);
728
729 return -EINVAL;
730}
731
732
733static struct file_operations dvb_osd_fops = {
734 .owner = THIS_MODULE,
735 .ioctl = dvb_generic_ioctl,
736 .open = dvb_generic_open,
737 .release = dvb_generic_release,
738};
739
740static struct dvb_device dvbdev_osd = {
741 .priv = NULL,
742 .users = 1,
743 .writers = 1,
744 .fops = &dvb_osd_fops,
745 .kernel_ioctl = dvb_osd_ioctl,
746};
747#endif /* CONFIG_DVB_AV7110_OSD */
748
749
750static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
751 u16 subpid, u16 pcrpid)
752{
753 dprintk(4, "%p\n", av7110);
754
755 if (vpid == 0x1fff || apid == 0x1fff ||
756 ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
757 vpid = apid = ttpid = subpid = pcrpid = 0;
758 av7110->pids[DMX_PES_VIDEO] = 0;
759 av7110->pids[DMX_PES_AUDIO] = 0;
760 av7110->pids[DMX_PES_TELETEXT] = 0;
761 av7110->pids[DMX_PES_PCR] = 0;
762 }
763
764 return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 5,
765 pcrpid, vpid, apid, ttpid, subpid);
766}
767
768void ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
769 u16 subpid, u16 pcrpid)
770{
771 dprintk(4, "%p\n", av7110);
772
773 if (down_interruptible(&av7110->pid_mutex))
774 return;
775
776 if (!(vpid & 0x8000))
777 av7110->pids[DMX_PES_VIDEO] = vpid;
778 if (!(apid & 0x8000))
779 av7110->pids[DMX_PES_AUDIO] = apid;
780 if (!(ttpid & 0x8000))
781 av7110->pids[DMX_PES_TELETEXT] = ttpid;
782 if (!(pcrpid & 0x8000))
783 av7110->pids[DMX_PES_PCR] = pcrpid;
784
785 av7110->pids[DMX_PES_SUBTITLE] = 0;
786
787 if (av7110->fe_synced) {
788 pcrpid = av7110->pids[DMX_PES_PCR];
789 SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
790 }
791
792 up(&av7110->pid_mutex);
793}
794
795
796/******************************************************************************
797 * hardware filter functions
798 ******************************************************************************/
799
800static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
801{
802 struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
803 struct av7110 *av7110 = (struct av7110 *) dvbdmxfeed->demux->priv;
804 u16 buf[20];
805 int ret, i;
806 u16 handle;
807// u16 mode = 0x0320;
808 u16 mode = 0xb96a;
809
810 dprintk(4, "%p\n", av7110);
811
812 if (dvbdmxfilter->type == DMX_TYPE_SEC) {
813 if (hw_sections) {
814 buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
815 dvbdmxfilter->maskandmode[0];
816 for (i = 3; i < 18; i++)
817 buf[i + 4 - 2] =
818 (dvbdmxfilter->filter.filter_value[i] << 8) |
819 dvbdmxfilter->maskandmode[i];
820 mode = 4;
821 }
822 } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
823 !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
824 av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
825 }
826
827 buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
828 buf[1] = 16;
829 buf[2] = dvbdmxfeed->pid;
830 buf[3] = mode;
831
832 ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
833 if (ret != 0 || handle >= 32) {
834 printk("dvb-ttpci: %s error buf %04x %04x %04x %04x "
835 "ret %x handle %04x\n",
836 __FUNCTION__, buf[0], buf[1], buf[2], buf[3],
837 ret, handle);
838 dvbdmxfilter->hw_handle = 0xffff;
839 return -1;
840 }
841
842 av7110->handle2filter[handle] = dvbdmxfilter;
843 dvbdmxfilter->hw_handle = handle;
844
845 return ret;
846}
847
848static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
849{
850 struct av7110 *av7110 = (struct av7110 *) dvbdmxfilter->feed->demux->priv;
851 u16 buf[3];
852 u16 answ[2];
853 int ret;
854 u16 handle;
855
856 dprintk(4, "%p\n", av7110);
857
858 handle = dvbdmxfilter->hw_handle;
859 if (handle >= 32) {
860 printk("%s tried to stop invalid filter %04x, filter type = %x\n",
861 __FUNCTION__, handle, dvbdmxfilter->type);
862 return 0;
863 }
864
865 av7110->handle2filter[handle] = NULL;
866
867 buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
868 buf[1] = 1;
869 buf[2] = handle;
870 ret = av7110_fw_request(av7110, buf, 3, answ, 2);
871 if (ret != 0 || answ[1] != handle) {
872 printk("dvb-ttpci: %s error cmd %04x %04x %04x ret %x "
873 "resp %04x %04x pid %d\n",
874 __FUNCTION__, buf[0], buf[1], buf[2], ret,
875 answ[0], answ[1], dvbdmxfilter->feed->pid);
876 ret = -1;
877 }
878 return ret;
879}
880
881
882static void dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
883{
884 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
885 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
886 u16 *pid = dvbdmx->pids, npids[5];
887 int i;
888
889 dprintk(4, "%p\n", av7110);
890
891 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
892 i = dvbdmxfeed->pes_type;
893 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
894 if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
895 npids[i] = 0;
896 ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
897 StartHWFilter(dvbdmxfeed->filter);
898 return;
899 }
900 if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4)
901 ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
902
903 if (dvbdmxfeed->pes_type < 2 && npids[0])
904 if (av7110->fe_synced)
905 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
906
907 if ((dvbdmxfeed->ts_type & TS_PACKET)) {
908 if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
909 av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
910 if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
911 av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
912 }
913}
914
915static void dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
916{
917 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
918 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
919 u16 *pid = dvbdmx->pids, npids[5];
920 int i;
921
922 dprintk(4, "%p\n", av7110);
923
924 if (dvbdmxfeed->pes_type <= 1) {
925 av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
926 if (!av7110->rec_mode)
927 dvbdmx->recording = 0;
928 if (!av7110->playing)
929 dvbdmx->playing = 0;
930 }
931 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
932 i = dvbdmxfeed->pes_type;
933 switch (i) {
934 case 2: //teletext
935 if (dvbdmxfeed->ts_type & TS_PACKET)
936 StopHWFilter(dvbdmxfeed->filter);
937 npids[2] = 0;
938 break;
939 case 0:
940 case 1:
941 case 4:
942 if (!pids_off)
943 return;
944 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
945 break;
946 }
947 ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
948}
949
950static int av7110_start_feed(struct dvb_demux_feed *feed)
951{
952 struct dvb_demux *demux = feed->demux;
953 struct av7110 *av7110 = demux->priv;
954
955 dprintk(4, "%p\n", av7110);
956
957 if (!demux->dmx.frontend)
958 return -EINVAL;
959
960 if (feed->pid > 0x1fff)
961 return -EINVAL;
962
963 if (feed->type == DMX_TYPE_TS) {
964 if ((feed->ts_type & TS_DECODER) &&
965 (feed->pes_type < DMX_TS_PES_OTHER)) {
966 switch (demux->dmx.frontend->source) {
967 case DMX_MEMORY_FE:
968 if (feed->ts_type & TS_DECODER)
969 if (feed->pes_type < 2 &&
970 !(demux->pids[0] & 0x8000) &&
971 !(demux->pids[1] & 0x8000)) {
972 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
973 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
974 av7110_av_start_play(av7110,RP_AV);
975 demux->playing = 1;
976 }
977 break;
978 default:
979 dvb_feed_start_pid(feed);
980 break;
981 }
982 } else if ((feed->ts_type & TS_PACKET) &&
983 (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
984 StartHWFilter(feed->filter);
985 }
986 }
987
988 if (feed->type == DMX_TYPE_SEC) {
989 int i;
990
991 for (i = 0; i < demux->filternum; i++) {
992 if (demux->filter[i].state != DMX_STATE_READY)
993 continue;
994 if (demux->filter[i].type != DMX_TYPE_SEC)
995 continue;
996 if (demux->filter[i].filter.parent != &feed->feed.sec)
997 continue;
998 demux->filter[i].state = DMX_STATE_GO;
999 if (demux->dmx.frontend->source != DMX_MEMORY_FE)
1000 StartHWFilter(&demux->filter[i]);
1001 }
1002 }
1003
1004 return 0;
1005}
1006
1007
1008static int av7110_stop_feed(struct dvb_demux_feed *feed)
1009{
1010 struct dvb_demux *demux = feed->demux;
1011 struct av7110 *av7110 = demux->priv;
1012
1013 dprintk(4, "%p\n", av7110);
1014
1015 if (feed->type == DMX_TYPE_TS) {
1016 if (feed->ts_type & TS_DECODER) {
1017 if (feed->pes_type >= DMX_TS_PES_OTHER ||
1018 !demux->pesfilter[feed->pes_type])
1019 return -EINVAL;
1020 demux->pids[feed->pes_type] |= 0x8000;
1021 demux->pesfilter[feed->pes_type] = NULL;
1022 }
1023 if (feed->ts_type & TS_DECODER &&
1024 feed->pes_type < DMX_TS_PES_OTHER) {
1025 dvb_feed_stop_pid(feed);
1026 } else
1027 if ((feed->ts_type & TS_PACKET) &&
1028 (demux->dmx.frontend->source != DMX_MEMORY_FE))
1029 StopHWFilter(feed->filter);
1030 }
1031
1032 if (feed->type == DMX_TYPE_SEC) {
1033 int i;
1034
1035 for (i = 0; i<demux->filternum; i++)
1036 if (demux->filter[i].state == DMX_STATE_GO &&
1037 demux->filter[i].filter.parent == &feed->feed.sec) {
1038 demux->filter[i].state = DMX_STATE_READY;
1039 if (demux->dmx.frontend->source != DMX_MEMORY_FE)
1040 StopHWFilter(&demux->filter[i]);
1041 }
1042 }
1043
1044 return 0;
1045}
1046
1047
1048static void restart_feeds(struct av7110 *av7110)
1049{
1050 struct dvb_demux *dvbdmx = &av7110->demux;
1051 struct dvb_demux_feed *feed;
1052 int mode;
1053 int i;
1054
1055 dprintk(4, "%p\n", av7110);
1056
1057 mode = av7110->playing;
1058 av7110->playing = 0;
1059 av7110->rec_mode = 0;
1060
1061 for (i = 0; i < dvbdmx->filternum; i++) {
1062 feed = &dvbdmx->feed[i];
1063 if (feed->state == DMX_STATE_GO)
1064 av7110_start_feed(feed);
1065 }
1066
1067 if (mode)
1068 av7110_av_start_play(av7110, mode);
1069}
1070
1071static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
1072 uint64_t *stc, unsigned int *base)
1073{
1074 int ret;
1075 u16 fwstc[4];
1076 u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
1077 struct dvb_demux *dvbdemux;
1078 struct av7110 *av7110;
1079
1080 /* pointer casting paranoia... */
1081 if (!demux)
1082 BUG();
1083 dvbdemux = (struct dvb_demux *) demux->priv;
1084 if (!dvbdemux)
1085 BUG();
1086 av7110 = (struct av7110 *) dvbdemux->priv;
1087
1088 dprintk(4, "%p\n", av7110);
1089
1090 if (num != 0)
1091 return -EINVAL;
1092
1093 ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
1094 if (ret) {
1095 printk(KERN_ERR "%s: av7110_fw_request error\n", __FUNCTION__);
1096 return -EIO;
1097 }
1098 dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
1099 fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
1100
1101 *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
1102 (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
1103 *base = 1;
1104
1105 dprintk(4, "stc = %lu\n", (unsigned long)*stc);
1106
1107 return 0;
1108}
1109
1110
1111/******************************************************************************
1112 * SEC device file operations
1113 ******************************************************************************/
1114
1115
1116static int av7110_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
1117{
1118 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1119
1120 switch (tone) {
1121 case SEC_TONE_ON:
1122 Set22K(av7110, 1);
1123 break;
1124
1125 case SEC_TONE_OFF:
1126 Set22K(av7110, 0);
1127 break;
1128
1129 default:
1130 return -EINVAL;
1131 }
1132
1133 return 0;
1134}
1135
1136static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
1137 struct dvb_diseqc_master_cmd* cmd)
1138{
1139 struct av7110* av7110 = fe->dvb->priv;
1140
1141 av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
1142
1143 return 0;
1144}
1145
1146static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
1147 fe_sec_mini_cmd_t minicmd)
1148{
1149 struct av7110* av7110 = fe->dvb->priv;
1150
1151 av7110_diseqc_send(av7110, 0, NULL, minicmd);
1152
1153 return 0;
1154}
1155
1156/* simplified code from budget-core.c */
1157static int stop_ts_capture(struct av7110 *budget)
1158{
1159 dprintk(2, "budget: %p\n", budget);
1160
1161 if (--budget->feeding1)
1162 return budget->feeding1;
1163 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
1164 SAA7146_IER_DISABLE(budget->dev, MASK_10);
1165 SAA7146_ISR_CLEAR(budget->dev, MASK_10);
1166 return 0;
1167}
1168
1169static int start_ts_capture(struct av7110 *budget)
1170{
1171 dprintk(2, "budget: %p\n", budget);
1172
1173 if (budget->feeding1)
1174 return ++budget->feeding1;
1175 memset(budget->grabbing, 0x00, TS_HEIGHT * TS_WIDTH);
1176 budget->tsf = 0xff;
1177 budget->ttbp = 0;
1178 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1179 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
1180 return ++budget->feeding1;
1181}
1182
1183static int budget_start_feed(struct dvb_demux_feed *feed)
1184{
1185 struct dvb_demux *demux = feed->demux;
1186 struct av7110 *budget = (struct av7110 *) demux->priv;
1187 int status;
1188
1189 dprintk(2, "av7110: %p\n", budget);
1190
1191 spin_lock(&budget->feedlock1);
1192 feed->pusi_seen = 0; /* have a clean section start */
1193 status = start_ts_capture(budget);
1194 spin_unlock(&budget->feedlock1);
1195 return status;
1196}
1197
1198static int budget_stop_feed(struct dvb_demux_feed *feed)
1199{
1200 struct dvb_demux *demux = feed->demux;
1201 struct av7110 *budget = (struct av7110 *) demux->priv;
1202 int status;
1203
1204 dprintk(2, "budget: %p\n", budget);
1205
1206 spin_lock(&budget->feedlock1);
1207 status = stop_ts_capture(budget);
1208 spin_unlock(&budget->feedlock1);
1209 return status;
1210}
1211
1212static void vpeirq(unsigned long data)
1213{
1214 struct av7110 *budget = (struct av7110 *) data;
1215 u8 *mem = (u8 *) (budget->grabbing);
1216 u32 olddma = budget->ttbp;
1217 u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
1218
1219 if (!budgetpatch) {
1220 printk("av7110.c: vpeirq() called while budgetpatch disabled!"
1221 " check saa7146 IER register\n");
1222 BUG();
1223 }
1224 /* nearest lower position divisible by 188 */
1225 newdma -= newdma % 188;
1226
1227 if (newdma >= TS_BUFLEN)
1228 return;
1229
1230 budget->ttbp = newdma;
1231
1232 if (!budget->feeding1 || (newdma == olddma))
1233 return;
1234
1235#if 0
1236 /* track rps1 activity */
1237 printk("vpeirq: %02x Event Counter 1 0x%04x\n",
1238 mem[olddma],
1239 saa7146_read(budget->dev, EC1R) & 0x3fff);
1240#endif
1241
1242 if (newdma > olddma)
1243 /* no wraparound, dump olddma..newdma */
1244 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (newdma - olddma) / 188);
1245 else {
1246 /* wraparound, dump olddma..buflen and 0..newdma */
1247 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (TS_BUFLEN - olddma) / 188);
1248 dvb_dmx_swfilter_packets(&budget->demux1, mem, newdma / 188);
1249 }
1250}
1251
1252static int av7110_register(struct av7110 *av7110)
1253{
1254 int ret, i;
1255 struct dvb_demux *dvbdemux = &av7110->demux;
1256 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1257
1258 dprintk(4, "%p\n", av7110);
1259
1260 if (av7110->registered)
1261 return -1;
1262
1263 av7110->registered = 1;
1264
1265 dvbdemux->priv = (void *) av7110;
1266
1267 for (i = 0; i < 32; i++)
1268 av7110->handle2filter[i] = NULL;
1269
1270 dvbdemux->filternum = 32;
1271 dvbdemux->feednum = 32;
1272 dvbdemux->start_feed = av7110_start_feed;
1273 dvbdemux->stop_feed = av7110_stop_feed;
1274 dvbdemux->write_to_decoder = av7110_write_to_decoder;
1275 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1276 DMX_MEMORY_BASED_FILTERING);
1277
1278 dvb_dmx_init(&av7110->demux);
1279 av7110->demux.dmx.get_stc = dvb_get_stc;
1280
1281 av7110->dmxdev.filternum = 32;
1282 av7110->dmxdev.demux = &dvbdemux->dmx;
1283 av7110->dmxdev.capabilities = 0;
1284
fdc53a6d 1285 dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
1da177e4
LT		 1286
1287 av7110->hw_frontend.source = DMX_FRONTEND_0;
1288
1289 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1290
1291 if (ret < 0)
1292 return ret;
1293
1294 av7110->mem_frontend.source = DMX_MEMORY_FE;
1295
1296 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1297
1298 if (ret < 0)
1299 return ret;
1300
1301 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
1302 &av7110->hw_frontend);
1303 if (ret < 0)
1304 return ret;
1305
1306 av7110_av_register(av7110);
1307 av7110_ca_register(av7110);
1308
1309#ifdef CONFIG_DVB_AV7110_OSD
fdc53a6d 1310 dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
1da177e4
LT		 1311 &dvbdev_osd, av7110, DVB_DEVICE_OSD);
1312#endif
1313
fdc53a6d 1314 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
1da177e4
LT		 1315
1316 if (budgetpatch) {
1317 /* initialize software demux1 without its own frontend
1318 * demux1 hardware is connected to frontend0 of demux0
1319 */
1320 dvbdemux1->priv = (void *) av7110;
1321
1322 dvbdemux1->filternum = 256;
1323 dvbdemux1->feednum = 256;
1324 dvbdemux1->start_feed = budget_start_feed;
1325 dvbdemux1->stop_feed = budget_stop_feed;
1326 dvbdemux1->write_to_decoder = NULL;
1327
1328 dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1329 DMX_MEMORY_BASED_FILTERING);
1330
1331 dvb_dmx_init(&av7110->demux1);
1332
1333 av7110->dmxdev1.filternum = 256;
1334 av7110->dmxdev1.demux = &dvbdemux1->dmx;
1335 av7110->dmxdev1.capabilities = 0;
1336
fdc53a6d 1337 dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
1da177e4 1338
fdc53a6d 1339 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
1da177e4
LT		 1340 printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
1341 }
1342 return 0;
1343}
1344
1345
1346static void dvb_unregister(struct av7110 *av7110)
1347{
1348 struct dvb_demux *dvbdemux = &av7110->demux;
1349 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1350
1351 dprintk(4, "%p\n", av7110);
1352
1353 if (!av7110->registered)
1354 return;
1355
1356 if (budgetpatch) {
1357 dvb_net_release(&av7110->dvb_net1);
1358 dvbdemux->dmx.close(&dvbdemux1->dmx);
1359 dvb_dmxdev_release(&av7110->dmxdev1);
1360 dvb_dmx_release(&av7110->demux1);
1361 }
1362
1363 dvb_net_release(&av7110->dvb_net);
1364
1365 dvbdemux->dmx.close(&dvbdemux->dmx);
1366 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1367 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1368
1369 dvb_dmxdev_release(&av7110->dmxdev);
1370 dvb_dmx_release(&av7110->demux);
1371
1372 if (av7110->fe != NULL)
1373 dvb_unregister_frontend(av7110->fe);
1374 dvb_unregister_device(av7110->osd_dev);
1375 av7110_av_unregister(av7110);
1376 av7110_ca_unregister(av7110);
1377}
1378
1379
1380/****************************************************************************
1381 * I2C client commands
1382 ****************************************************************************/
1383
1384int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
1385{
1386 u8 msg[2] = { reg, val };
1387 struct i2c_msg msgs;
1388
1389 msgs.flags = 0;
1390 msgs.addr = id / 2;
1391 msgs.len = 2;
1392 msgs.buf = msg;
1393 return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
1394}
1395
1396#if 0
1397u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
1398{
1399 u8 mm1[] = {0x00};
1400 u8 mm2[] = {0x00};
1401 struct i2c_msg msgs[2];
1402
1403 msgs[0].flags = 0;
1404 msgs[1].flags = I2C_M_RD;
1405 msgs[0].addr = msgs[1].addr = id / 2;
1406 mm1[0] = reg;
1407 msgs[0].len = 1; msgs[1].len = 1;
1408 msgs[0].buf = mm1; msgs[1].buf = mm2;
1409 i2c_transfer(&av7110->i2c_adap, msgs, 2);
1410
1411 return mm2[0];
1412}
1413#endif
1414
1415/****************************************************************************
1416 * INITIALIZATION
1417 ****************************************************************************/
1418
1419
1420static int check_firmware(struct av7110* av7110)
1421{
1422 u32 crc = 0, len = 0;
1423 unsigned char *ptr;
1424
1425 /* check for firmware magic */
1426 ptr = av7110->bin_fw;
1427 if (ptr[0] != 'A' || ptr[1] != 'V' ||
1428 ptr[2] != 'F' || ptr[3] != 'W') {
1429 printk("dvb-ttpci: this is not an av7110 firmware\n");
1430 return -EINVAL;
1431 }
1432 ptr += 4;
1433
1434 /* check dpram file */
1435 crc = ntohl(*(u32*) ptr);
1436 ptr += 4;
1437 len = ntohl(*(u32*) ptr);
1438 ptr += 4;
1439 if (len >= 512) {
1440 printk("dvb-ttpci: dpram file is way to big.\n");
1441 return -EINVAL;
1442 }
1443 if (crc != crc32_le(0, ptr, len)) {
1444 printk("dvb-ttpci: crc32 of dpram file does not match.\n");
1445 return -EINVAL;
1446 }
1447 av7110->bin_dpram = ptr;
1448 av7110->size_dpram = len;
1449 ptr += len;
1450
1451 /* check root file */
1452 crc = ntohl(*(u32*) ptr);
1453 ptr += 4;
1454 len = ntohl(*(u32*) ptr);
1455 ptr += 4;
1456
1457 if (len <= 200000 || len >= 300000 ||
1458 len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
1459 printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
1460 return -EINVAL;
1461 }
1462 if( crc != crc32_le(0, ptr, len)) {
1463 printk("dvb-ttpci: crc32 of root file does not match.\n");
1464 return -EINVAL;
1465 }
1466 av7110->bin_root = ptr;
1467 av7110->size_root = len;
1468 return 0;
1469}
1470
1471#ifdef CONFIG_DVB_AV7110_FIRMWARE_FILE
1472#include "av7110_firm.h"
1473static void put_firmware(struct av7110* av7110)
1474{
1475 av7110->bin_fw = NULL;
1476}
1477
1478static inline int get_firmware(struct av7110* av7110)
1479{
1480 av7110->bin_fw = dvb_ttpci_fw;
1481 av7110->size_fw = sizeof(dvb_ttpci_fw);
1482 return check_firmware(av7110);
1483}
1484#else
1485static void put_firmware(struct av7110* av7110)
1486{
1487 vfree(av7110->bin_fw);
1488}
1489
1490static int get_firmware(struct av7110* av7110)
1491{
1492 int ret;
1493 const struct firmware *fw;
1494
1495 /* request the av7110 firmware, this will block until someone uploads it */
1496 ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
1497 if (ret) {
1498 if (ret == -ENOENT) {
1499 printk(KERN_ERR "dvb-ttpci: could not load firmware,"
1500 " file not found: dvb-ttpci-01.fw\n");
1501 printk(KERN_ERR "dvb-ttpci: usually this should be in"
1502 " /usr/lib/hotplug/firmware\n");
1503 printk(KERN_ERR "dvb-ttpci: and can be downloaded here"
1504 " http://www.linuxtv.org/download/dvb/firmware/\n");
1505 } else
1506 printk(KERN_ERR "dvb-ttpci: cannot request firmware"
1507 " (error %i)\n", ret);
1508 return -EINVAL;
1509 }
1510
1511 if (fw->size <= 200000) {
1512 printk("dvb-ttpci: this firmware is way too small.\n");
1513 release_firmware(fw);
1514 return -EINVAL;
1515 }
1516
1517 /* check if the firmware is available */
1518 av7110->bin_fw = (unsigned char *) vmalloc(fw->size);
1519 if (NULL == av7110->bin_fw) {
1520 dprintk(1, "out of memory\n");
1521 release_firmware(fw);
1522 return -ENOMEM;
1523 }
1524
1525 memcpy(av7110->bin_fw, fw->data, fw->size);
1526 av7110->size_fw = fw->size;
1527 if ((ret = check_firmware(av7110)))
1528 vfree(av7110->bin_fw);
1529
1530 release_firmware(fw);
1531 return ret;
1532}
1533#endif
1534
1535
1536static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1537{
1538 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1539 u8 pwr = 0;
1540 u8 buf[4];
1541 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
1542 u32 div = (params->frequency + 479500) / 125;
1543
1544 if (params->frequency > 2000000) pwr = 3;
1545 else if (params->frequency > 1800000) pwr = 2;
1546 else if (params->frequency > 1600000) pwr = 1;
1547 else if (params->frequency > 1200000) pwr = 0;
1548 else if (params->frequency >= 1100000) pwr = 1;
1549 else pwr = 2;
1550
1551 buf[0] = (div >> 8) & 0x7f;
1552 buf[1] = div & 0xff;
1553 buf[2] = ((div & 0x18000) >> 10) | 0x95;
1554 buf[3] = (pwr << 6) | 0x30;
1555
1556 // NOTE: since we're using a prescaler of 2, we set the
1557 // divisor frequency to 62.5kHz and divide by 125 above
1558
1559 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
1560 return -EIO;
1561 return 0;
1562}
1563
1564static struct ves1x93_config alps_bsrv2_config = {
1565 .demod_address = 0x08,
1566 .xin = 90100000UL,
1567 .invert_pwm = 0,
1568 .pll_set = alps_bsrv2_pll_set,
1569};
1570
1571
1572static u8 alps_bsru6_inittab[] = {
1573 0x01, 0x15,
1574 0x02, 0x30,
1575 0x03, 0x00,
1576 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1577 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1578 0x06, 0x40, /* DAC not used, set to high impendance mode */
1579 0x07, 0x00, /* DAC LSB */
1580 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1581 0x09, 0x00, /* FIFO */
1582 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1583 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1584 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1585 0x10, 0x3f, // AGC2 0x3d
1586 0x11, 0x84,
1587 0x12, 0xb5, // Lock detect: -64 Carrier freq detect:on
1588 0x15, 0xc9, // lock detector threshold
1589 0x16, 0x00,
1590 0x17, 0x00,
1591 0x18, 0x00,
1592 0x19, 0x00,
1593 0x1a, 0x00,
1594 0x1f, 0x50,
1595 0x20, 0x00,
1596 0x21, 0x00,
1597 0x22, 0x00,
1598 0x23, 0x00,
1599 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1600 0x29, 0x1e, // 1/2 threshold
1601 0x2a, 0x14, // 2/3 threshold
1602 0x2b, 0x0f, // 3/4 threshold
1603 0x2c, 0x09, // 5/6 threshold
1604 0x2d, 0x05, // 7/8 threshold
1605 0x2e, 0x01,
1606 0x31, 0x1f, // test all FECs
1607 0x32, 0x19, // viterbi and synchro search
1608 0x33, 0xfc, // rs control
1609 0x34, 0x93, // error control
1610 0x0f, 0x52,
1611 0xff, 0xff
1612};
1613
1614static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
1615{
1616 u8 aclk = 0;
1617 u8 bclk = 0;
1618
1619 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
1620 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
1621 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
1622 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
1623 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
1624 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
1625
1626 stv0299_writereg(fe, 0x13, aclk);
1627 stv0299_writereg(fe, 0x14, bclk);
1628 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
1629 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
1630 stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
1631
1632 return 0;
1633}
1634
1635static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1636{
1637 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1638 int ret;
1639 u8 data[4];
1640 u32 div;
1641 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1642
1643 if ((params->frequency < 950000) || (params->frequency > 2150000))
1644 return -EINVAL;
1645
1646 div = (params->frequency + (125 - 1)) / 125; // round correctly
1647 data[0] = (div >> 8) & 0x7f;
1648 data[1] = div & 0xff;
1649 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1650 data[3] = 0xC4;
1651
1652 if (params->frequency > 1530000) data[3] = 0xc0;
1653
1654 ret = i2c_transfer(&av7110->i2c_adap, &msg, 1);
1655 if (ret != 1)
1656 return -EIO;
1657 return 0;
1658}
1659
1660static struct stv0299_config alps_bsru6_config = {
1661
1662 .demod_address = 0x68,
1663 .inittab = alps_bsru6_inittab,
1664 .mclk = 88000000UL,
1665 .invert = 1,
1666 .enhanced_tuning = 0,
1667 .skip_reinit = 0,
1668 .lock_output = STV0229_LOCKOUTPUT_1,
1669 .volt13_op0_op1 = STV0299_VOLT13_OP1,
1670 .min_delay_ms = 100,
1671 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1672 .pll_set = alps_bsru6_pll_set,
1673};
1674
1675
3dfaebda
JS		 1676static u8 alps_bsbe1_inittab[] = {
1677 0x01, 0x15,
1678 0x02, 0x30,
1679 0x03, 0x00,
1680 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1681 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1682 0x06, 0x40, /* DAC not used, set to high impendance mode */
1683 0x07, 0x00, /* DAC LSB */
1684 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1685 0x09, 0x00, /* FIFO */
1686 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1687 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1688 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1689 0x10, 0x3f, // AGC2 0x3d
1690 0x11, 0x84,
1691 0x12, 0xb5, // Lock detect: -64 Carrier freq detect:on
1692 0x15, 0xc9, // lock detector threshold
1693 0x16, 0x00,
1694 0x17, 0x00,
1695 0x18, 0x00,
1696 0x19, 0x00,
1697 0x1a, 0x00,
1698 0x1f, 0x50,
1699 0x20, 0x00,
1700 0x21, 0x00,
1701 0x22, 0x00,
1702 0x23, 0x00,
1703 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1704 0x29, 0x1e, // 1/2 threshold
1705 0x2a, 0x14, // 2/3 threshold
1706 0x2b, 0x0f, // 3/4 threshold
1707 0x2c, 0x09, // 5/6 threshold
1708 0x2d, 0x05, // 7/8 threshold
1709 0x2e, 0x01,
1710 0x31, 0x1f, // test all FECs
1711 0x32, 0x19, // viterbi and synchro search
1712 0x33, 0xfc, // rs control
1713 0x34, 0x93, // error control
1714 0x0f, 0x92,
1715 0xff, 0xff
1716};
1717
1718static int alps_bsbe1_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1719{
1720 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1721 int ret;
1722 u8 data[4];
1723 u32 div;
1724 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1725
1726 if ((params->frequency < 950000) || (params->frequency > 2150000))
1727 return -EINVAL;
1728
1729 div = (params->frequency + (125 - 1)) / 125; // round correctly
1730 data[0] = (div >> 8) & 0x7f;
1731 data[1] = div & 0xff;
1732 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1733 data[3] = (params->frequency > 1530000) ? 0xE0 : 0xE4;
1734
1735 ret = i2c_transfer(&av7110->i2c_adap, &msg, 1);
1736 return (ret != 1) ? -EIO : 0;
1737}
1738
1739static struct stv0299_config alps_bsbe1_config = {
1740 .demod_address = 0x68,
1741 .inittab = alps_bsbe1_inittab,
1742 .mclk = 88000000UL,
1743 .invert = 1,
1744 .enhanced_tuning = 0,
1745 .skip_reinit = 0,
1746 .min_delay_ms = 100,
1747 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1748 .pll_set = alps_bsbe1_pll_set,
1749};
1750
1751static int lnbp21_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
1752{
1753 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1754 int ret;
1755 u8 data[1];
1756 struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = data, .len = sizeof(data) };
1757
1758 switch(voltage) {
1759 case SEC_VOLTAGE_OFF:
1760 data[0] = 0x00;
1761 break;
1762 case SEC_VOLTAGE_13:
1763 data[0] = 0x44;
1764 break;
1765 case SEC_VOLTAGE_18:
1766 data[0] = 0x4c;
1767 break;
1768 default:
1769 return -EINVAL;
1770 };
1771
1772 ret = i2c_transfer(&av7110->i2c_adap, &msg, 1);
1773 return (ret != 1) ? -EIO : 0;
1774}
1775
1da177e4
LT		 1776
1777static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1778{
1779 struct av7110* av7110 = fe->dvb->priv;
1780 u32 div;
1781 u8 data[4];
1782 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1783
1784 div = (params->frequency + 35937500 + 31250) / 62500;
1785
1786 data[0] = (div >> 8) & 0x7f;
1787 data[1] = div & 0xff;
1788 data[2] = 0x85 | ((div >> 10) & 0x60);
1789 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81);
1790
1791 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1792 return -EIO;
1793 return 0;
1794}
1795
1796static struct ves1820_config alps_tdbe2_config = {
1797 .demod_address = 0x09,
1798 .xin = 57840000UL,
1799 .invert = 1,
1800 .selagc = VES1820_SELAGC_SIGNAMPERR,
1801 .pll_set = alps_tdbe2_pll_set,
1802};
1803
1804
1805
1806
1807static int grundig_29504_451_pll_set(struct dvb_frontend* fe,
1808 struct dvb_frontend_parameters* params)
1809{
1810 struct av7110* av7110 = fe->dvb->priv;
1811 u32 div;
1812 u8 data[4];
1813 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1814
1815 div = params->frequency / 125;
1816 data[0] = (div >> 8) & 0x7f;
1817 data[1] = div & 0xff;
1818 data[2] = 0x8e;
1819 data[3] = 0x00;
1820
1821 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1822 return -EIO;
1823 return 0;
1824}
1825
1826static struct tda8083_config grundig_29504_451_config = {
1827 .demod_address = 0x68,
1828 .pll_set = grundig_29504_451_pll_set,
1829};
1830
1831
1832
1833static int philips_cd1516_pll_set(struct dvb_frontend* fe,
1834 struct dvb_frontend_parameters* params)
1835{
1836 struct av7110* av7110 = fe->dvb->priv;
1837 u32 div;
1838 u32 f = params->frequency;
1839 u8 data[4];
1840 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1841
1842 div = (f + 36125000 + 31250) / 62500;
1843
1844 data[0] = (div >> 8) & 0x7f;
1845 data[1] = div & 0xff;
1846 data[2] = 0x8e;
1847 data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
1848
1849 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1850 return -EIO;
1851 return 0;
1852}
1853
1854static struct ves1820_config philips_cd1516_config = {
1855 .demod_address = 0x09,
1856 .xin = 57840000UL,
1857 .invert = 1,
1858 .selagc = VES1820_SELAGC_SIGNAMPERR,
1859 .pll_set = philips_cd1516_pll_set,
1860};
1861
1862
1863
1864static int alps_tdlb7_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1865{
1866 struct av7110* av7110 = fe->dvb->priv;
1867 u32 div, pwr;
1868 u8 data[4];
1869 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1870
1871 div = (params->frequency + 36200000) / 166666;
1872
1873 if (params->frequency <= 782000000)
1874 pwr = 1;
1875 else
1876 pwr = 2;
1877
1878 data[0] = (div >> 8) & 0x7f;
1879 data[1] = div & 0xff;
1880 data[2] = 0x85;
1881 data[3] = pwr << 6;
1882
1883 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1884 return -EIO;
1885 return 0;
1886}
1887
1888static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
1889{
1890 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1891
1892 return request_firmware(fw, name, &av7110->dev->pci->dev);
1893}
1894
1895static struct sp8870_config alps_tdlb7_config = {
1896
1897 .demod_address = 0x71,
1898 .pll_set = alps_tdlb7_pll_set,
1899 .request_firmware = alps_tdlb7_request_firmware,
1900};
1901
1902
1903
1904static int nexusca_stv0297_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1905{
1906 struct av7110* av7110 = fe->dvb->priv;
1907 u32 div;
1908 u8 data[4];
1909 struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
1910 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1911 int i;
1912
1913 div = (params->frequency + 36150000 + 31250) / 62500;
1914
1915 data[0] = (div >> 8) & 0x7f;
1916 data[1] = div & 0xff;
1917 data[2] = 0xce;
1918
1919 if (params->frequency < 45000000)
1920 return -EINVAL;
1921 else if (params->frequency < 137000000)
1922 data[3] = 0x01;
1923 else if (params->frequency < 403000000)
1924 data[3] = 0x02;
1925 else if (params->frequency < 860000000)
1926 data[3] = 0x04;
1927 else
1928 return -EINVAL;
1929
1930 stv0297_enable_plli2c(fe);
1931 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
1932 printk("nexusca: pll transfer failed!\n");
1933 return -EIO;
1934 }
1935
1936 // wait for PLL lock
1937 for(i = 0; i < 20; i++) {
1938
1939 stv0297_enable_plli2c(fe);
1940 if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
1941 if (data[0] & 0x40) break;
1942 msleep(10);
1943 }
1944
1945 return 0;
1946}
1947
1948static struct stv0297_config nexusca_stv0297_config = {
1949
1950 .demod_address = 0x1C,
1951 .invert = 1,
1952 .pll_set = nexusca_stv0297_pll_set,
1953};
1954
1955
1956
1957static int grundig_29504_401_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1958{
1959 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1960 u32 div;
1961 u8 cfg, cpump, band_select;
1962 u8 data[4];
1963 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1964
1965 div = (36125000 + params->frequency) / 166666;
1966
1967 cfg = 0x88;
1968
1969 if (params->frequency < 175000000) cpump = 2;
1970 else if (params->frequency < 390000000) cpump = 1;
1971 else if (params->frequency < 470000000) cpump = 2;
1972 else if (params->frequency < 750000000) cpump = 1;
1973 else cpump = 3;
1974
1975 if (params->frequency < 175000000) band_select = 0x0e;
1976 else if (params->frequency < 470000000) band_select = 0x05;
1977 else band_select = 0x03;
1978
1979 data[0] = (div >> 8) & 0x7f;
1980 data[1] = div & 0xff;
1981 data[2] = ((div >> 10) & 0x60) | cfg;
1982 data[3] = (cpump << 6) | band_select;
1983
1984 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
1985 return 0;
1986}
1987
1988static struct l64781_config grundig_29504_401_config = {
1989 .demod_address = 0x55,
1990 .pll_set = grundig_29504_401_pll_set,
1991};
1992
1993
1994
1995static void av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status)
1996{
1997 int synced = (status & FE_HAS_LOCK) ? 1 : 0;
1998
1999 av7110->fe_status = status;
2000
2001 if (av7110->fe_synced == synced)
2002 return;
2003
2004 av7110->fe_synced = synced;
2005
2006 if (av7110->playing)
2007 return;
2008
2009 if (down_interruptible(&av7110->pid_mutex))
2010 return;
2011
2012 if (av7110->fe_synced) {
2013 SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
2014 av7110->pids[DMX_PES_AUDIO],
2015 av7110->pids[DMX_PES_TELETEXT], 0,
2016 av7110->pids[DMX_PES_PCR]);
2017 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
2018 } else {
2019 SetPIDs(av7110, 0, 0, 0, 0, 0);
2020 av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
2021 av7110_wait_msgstate(av7110, GPMQBusy);
2022 }
2023
2024 up(&av7110->pid_mutex);
2025}
2026
2027static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2028{
2029 struct av7110* av7110 = fe->dvb->priv;
2030 av7110_fe_lock_fix(av7110, 0);
2031 return av7110->fe_set_frontend(fe, params);
2032}
2033
2034static int av7110_fe_init(struct dvb_frontend* fe)
2035{
2036 struct av7110* av7110 = fe->dvb->priv;
2037
2038 av7110_fe_lock_fix(av7110, 0);
2039 return av7110->fe_init(fe);
2040}
2041
2042static int av7110_fe_read_status(struct dvb_frontend* fe, fe_status_t* status)
2043{
2044 struct av7110* av7110 = fe->dvb->priv;
2045 int ret;
2046
2047 /* call the real implementation */
2048 ret = av7110->fe_read_status(fe, status);
2049 if (ret)
2050 return ret;
2051
2052 if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK)) {
2053 av7110_fe_lock_fix(av7110, *status);
2054 }
2055
2056 return 0;
2057}
2058
2059static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
2060{
2061 struct av7110* av7110 = fe->dvb->priv;
2062
2063 av7110_fe_lock_fix(av7110, 0);
2064 return av7110->fe_diseqc_reset_overload(fe);
2065}
2066
2067static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
2068 struct dvb_diseqc_master_cmd* cmd)
2069{
2070 struct av7110* av7110 = fe->dvb->priv;
2071
2072 av7110_fe_lock_fix(av7110, 0);
2073 return av7110->fe_diseqc_send_master_cmd(fe, cmd);
2074}
2075
2076static int av7110_fe_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
2077{
2078 struct av7110* av7110 = fe->dvb->priv;
2079
2080 av7110_fe_lock_fix(av7110, 0);
2081 return av7110->fe_diseqc_send_burst(fe, minicmd);
2082}
2083
2084static int av7110_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
2085{
2086 struct av7110* av7110 = fe->dvb->priv;
2087
2088 av7110_fe_lock_fix(av7110, 0);
2089 return av7110->fe_set_tone(fe, tone);
2090}
2091
2092static int av7110_fe_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
2093{
2094 struct av7110* av7110 = fe->dvb->priv;
2095
2096 av7110_fe_lock_fix(av7110, 0);
2097 return av7110->fe_set_voltage(fe, voltage);
2098}
2099
2100static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned int cmd)
2101{
2102 struct av7110* av7110 = fe->dvb->priv;
2103
2104 av7110_fe_lock_fix(av7110, 0);
2105 return av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
2106}
2107
2108static u8 read_pwm(struct av7110* av7110)
2109{
2110 u8 b = 0xff;
2111 u8 pwm;
2112 struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
2113 { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
2114
2115 if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
2116 pwm = 0x48;
2117
2118 return pwm;
2119}
2120
2121static int frontend_init(struct av7110 *av7110)
2122{
2123 int ret;
2124
2125 if (av7110->dev->pci->subsystem_vendor == 0x110a) {
2126 switch(av7110->dev->pci->subsystem_device) {
2127 case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
2128 av7110->fe = ves1820_attach(&philips_cd1516_config,
2129 &av7110->i2c_adap, read_pwm(av7110));
2130 break;
2131 }
2132
2133 } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
2134 switch(av7110->dev->pci->subsystem_device) {
2135 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
2136 case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
2137 case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
2138
2139 // try the ALPS BSRV2 first of all
2140 av7110->fe = ves1x93_attach(&alps_bsrv2_config, &av7110->i2c_adap);
2141 if (av7110->fe) {
2142 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2143 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2144 av7110->fe->ops->set_tone = av7110_set_tone;
2145 break;
2146 }
2147
2148 // try the ALPS BSRU6 now
2149 av7110->fe = stv0299_attach(&alps_bsru6_config, &av7110->i2c_adap);
2150 if (av7110->fe) {
2151 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2152 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2153 av7110->fe->ops->set_tone = av7110_set_tone;
2154 break;
2155 }
2156
2157 // Try the grundig 29504-451
2158 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
2159 if (av7110->fe) {
2160 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2161 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2162 av7110->fe->ops->set_tone = av7110_set_tone;
2163 break;
2164 }
2165
2166 /* Try DVB-C cards */
2167 switch(av7110->dev->pci->subsystem_device) {
2168 case 0x0000:
2169 /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
2170 av7110->fe = ves1820_attach(&philips_cd1516_config, &av7110->i2c_adap,
2171 read_pwm(av7110));
2172 break;
2173 case 0x0003:
2174 /* Haupauge DVB-C 2.1 VES1820/ALPS TDBE2 */
2175 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap,
2176 read_pwm(av7110));
2177 break;
2178 }
2179 break;
2180
2181 case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
2182
2183 // ALPS TDLB7
2184 av7110->fe = sp8870_attach(&alps_tdlb7_config, &av7110->i2c_adap);
2185 break;
2186
2187 case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
2188
2189 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
2190 break;
2191
2192 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
2193 /* Grundig 29504-451 */
2194 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
2195 if (av7110->fe) {
2196 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2197 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2198 av7110->fe->ops->set_tone = av7110_set_tone;
2199 }
2200 break;
2201
2202 case 0x0008: // Hauppauge/TT DVB-T
2203
2204 av7110->fe = l64781_attach(&grundig_29504_401_config, &av7110->i2c_adap);
2205 break;
2206
2207 case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
2208
2209 av7110->fe = stv0297_attach(&nexusca_stv0297_config, &av7110->i2c_adap, 0x7b);
2210 if (av7110->fe) {
2211 /* set TDA9819 into DVB mode */
2212 saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9198 pin9(STD)
2213 saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9198 pin30(VIF)
2214
2215 /* tuner on this needs a slower i2c bus speed */
2216 av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
2217 break;
2218 }
3dfaebda
JS		 2219 break;
2220
2221 case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
2222 /* ALPS BSBE1 */
2223 av7110->fe = stv0299_attach(&alps_bsbe1_config, &av7110->i2c_adap);
2224 if (av7110->fe)
2225 av7110->fe->ops->set_voltage = lnbp21_set_voltage;
2226 break;
1da177e4
LT		 2227 }
2228 }
2229
2230 if (!av7110->fe) {
2231 /* FIXME: propagate the failure code from the lower layers */
2232 ret = -ENOMEM;
2233 printk("dvb-ttpci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
2234 av7110->dev->pci->vendor,
2235 av7110->dev->pci->device,
2236 av7110->dev->pci->subsystem_vendor,
2237 av7110->dev->pci->subsystem_device);
2238 } else {
2239 FE_FUNC_OVERRIDE(av7110->fe->ops->init, av7110->fe_init, av7110_fe_init);
2240 FE_FUNC_OVERRIDE(av7110->fe->ops->read_status, av7110->fe_read_status, av7110_fe_read_status);
2241 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
2242 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
2243 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
2244 FE_FUNC_OVERRIDE(av7110->fe->ops->set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
2245 FE_FUNC_OVERRIDE(av7110->fe->ops->set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage;)
2246 FE_FUNC_OVERRIDE(av7110->fe->ops->dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
2247 FE_FUNC_OVERRIDE(av7110->fe->ops->set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
2248
fdc53a6d 2249 ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
1da177e4
LT		 2250 if (ret < 0) {
2251 printk("av7110: Frontend registration failed!\n");
2252 if (av7110->fe->ops->release)
2253 av7110->fe->ops->release(av7110->fe);
2254 av7110->fe = NULL;
2255 }
2256 }
2257 return ret;
2258}
2259
2260/* Budgetpatch note:
2261 * Original hardware design by Roberto Deza:
2262 * There is a DVB_Wiki at
2263 * http://212.227.36.83/linuxtv/wiki/index.php/Main_Page
2264 * where is described this 'DVB TT Budget Patch', on Card Modding:
2265 * http://212.227.36.83/linuxtv/wiki/index.php/DVB_TT_Budget_Patch
2266 * On the short description there is also a link to a external file,
2267 * with more details:
2268 * http://perso.wanadoo.es/jesussolano/Ttf_tsc1.zip
2269 *
2270 * New software triggering design by Emard that works on
2271 * original Roberto Deza's hardware:
2272 *
2273 * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
2274 * GPIO3 is in budget-patch hardware connectd to port B VSYNC
2275 * HS is an internal event of 7146, accessible with RPS
2276 * and temporarily raised high every n lines
2277 * (n in defined in the RPS_THRESH1 counter threshold)
2278 * I think HS is raised high on the beginning of the n-th line
2279 * and remains high until this n-th line that triggered
2280 * it is completely received. When the receiption of n-th line
2281 * ends, HS is lowered.
2282 *
2283 * To transmit data over DMA, 7146 needs changing state at
2284 * port B VSYNC pin. Any changing of port B VSYNC will
2285 * cause some DMA data transfer, with more or less packets loss.
2286 * It depends on the phase and frequency of VSYNC and
2287 * the way of 7146 is instructed to trigger on port B (defined
2288 * in DD1_INIT register, 3rd nibble from the right valid
2289 * numbers are 0-7, see datasheet)
2290 *
2291 * The correct triggering can minimize packet loss,
2292 * dvbtraffic should give this stable bandwidths:
2293 * 22k transponder = 33814 kbit/s
2294 * 27.5k transponder = 38045 kbit/s
2295 * by experiment it is found that the best results
2296 * (stable bandwidths and almost no packet loss)
2297 * are obtained using DD1_INIT triggering number 2
2298 * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
2299 * and a VSYNC phase that occurs in the middle of DMA transfer
2300 * (about byte 188*512=96256 in the DMA window).
2301 *
2302 * Phase of HS is still not clear to me how to control,
2303 * It just happens to be so. It can be seen if one enables
2304 * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
2305 * time RPS_INTERRUPT is called, the Event Counter 1 will
2306 * increment. That's how the 7146 is programmed to do event
2307 * counting in this budget-patch.c
2308 * I *think* HPS setting has something to do with the phase
2309 * of HS but I cant be 100% sure in that.
2310 *
2311 * hardware debug note: a working budget card (including budget patch)
2312 * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
2313 * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
2314 * and that means 3*25=75 Hz of interrupt freqency, as seen by
2315 * watch cat /proc/interrupts
2316 *
2317 * If this frequency is 3x lower (and data received in the DMA
2318 * buffer don't start with 0x47, but in the middle of packets,
2319 * whose lengths appear to be like 188 292 188 104 etc.
2320 * this means VSYNC line is not connected in the hardware.
2321 * (check soldering pcb and pins)
2322 * The same behaviour of missing VSYNC can be duplicated on budget
2323 * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
2324 */
2325static int av7110_attach(struct saa7146_dev* dev, struct saa7146_pci_extension_data *pci_ext)
2326{
2327 const int length = TS_WIDTH * TS_HEIGHT;
2328 struct pci_dev *pdev = dev->pci;
2329 struct av7110 *av7110;
2330 int ret, count = 0;
2331
2332 dprintk(4, "dev: %p\n", dev);
2333
2334 /* Set RPS_IRQ to 1 to track rps1 activity.
2335 * Enabling this won't send any interrupt to PC CPU.
2336 */
2337#define RPS_IRQ 0
2338
2339 if (budgetpatch == 1) {
2340 budgetpatch = 0;
2341 /* autodetect the presence of budget patch
2342 * this only works if saa7146 has been recently
2343 * reset with with MASK_31 to MC1
2344 *
2345 * will wait for VBI_B event (vertical blank at port B)
2346 * and will reset GPIO3 after VBI_B is detected.
2347 * (GPIO3 should be raised high by CPU to
2348 * test if GPIO3 will generate vertical blank signal
2349 * in budget patch GPIO3 is connected to VSYNC_B
2350 */
2351
2352 /* RESET SAA7146 */
2353 saa7146_write(dev, MC1, MASK_31);
2354 /* autodetection success seems to be time-dependend after reset */
2355
2356 /* Fix VSYNC level */
2357 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2358 /* set vsync_b triggering */
2359 saa7146_write(dev, DD1_STREAM_B, 0);
2360 /* port B VSYNC at rising edge */
2361 saa7146_write(dev, DD1_INIT, 0x00000200);
2362 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
2363 saa7146_write(dev, MC2,
2364 1 * (MASK_08 | MASK_24) | // BRS control
2365 0 * (MASK_09 | MASK_25) | // a
2366 1 * (MASK_10 | MASK_26) | // b
2367 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
2368 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
2369 0 * (MASK_01 | MASK_15) // DEBI
2370 );
2371
2372 /* start writing RPS1 code from beginning */
2373 count = 0;
2374 /* Disable RPS1 */
2375 saa7146_write(dev, MC1, MASK_29);
2376 /* RPS1 timeout disable */
2377 saa7146_write(dev, RPS_TOV1, 0);
2378 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
2379 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2380 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2381 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2382#if RPS_IRQ
2383 /* issue RPS1 interrupt to increment counter */
2384 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2385#endif
2386 WRITE_RPS1(cpu_to_le32(CMD_STOP));
2387 /* Jump to begin of RPS program as safety measure (p37) */
2388 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2389 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2390
2391#if RPS_IRQ
2392 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2393 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2394 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2395 */
2396 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2397 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2398 saa7146_write(dev, ECT1R, 0x3fff );
2399#endif
2400 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2401 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2402 /* Enable RPS1, (rFC p33) */
2403 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
2404
2405 mdelay(10);
2406 /* now send VSYNC_B to rps1 by rising GPIO3 */
2407 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
2408 mdelay(10);
2409 /* if rps1 responded by lowering the GPIO3,
2410 * then we have budgetpatch hardware
2411 */
2412 if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
2413 budgetpatch = 1;
2414 printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
2415 }
2416 /* Disable RPS1 */
2417 saa7146_write(dev, MC1, ( MASK_29 ));
2418#if RPS_IRQ
2419 printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
2420#endif
2421 }
2422
2423 /* prepare the av7110 device struct */
2424 av7110 = kmalloc(sizeof(struct av7110), GFP_KERNEL);
2425 if (!av7110) {
2426 dprintk(1, "out of memory\n");
2427 return -ENOMEM;
2428 }
2429
2430 memset(av7110, 0, sizeof(struct av7110));
2431
2432 av7110->card_name = (char*) pci_ext->ext_priv;
2433 av7110->dev = dev;
2434 dev->ext_priv = av7110;
2435
2436 ret = get_firmware(av7110);
2437 if (ret < 0)
2438 goto err_kfree_0;
2439
2440 ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
2441 THIS_MODULE);
2442 if (ret < 0)
2443 goto err_put_firmware_1;
2444
2445 /* the Siemens DVB needs this if you want to have the i2c chips
2446 get recognized before the main driver is fully loaded */
2447 saa7146_write(dev, GPIO_CTRL, 0x500000);
2448
2449#ifdef I2C_ADAP_CLASS_TV_DIGITAL
2450 av7110->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL;
2451#else
2452 av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
2453#endif
2454 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
2455
2456 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
2457
2458 ret = i2c_add_adapter(&av7110->i2c_adap);
2459 if (ret < 0)
2460 goto err_dvb_unregister_adapter_2;
2461
2462 ttpci_eeprom_parse_mac(&av7110->i2c_adap,
fdc53a6d 2463 av7110->dvb_adapter.proposed_mac);
1da177e4
LT		 2464 ret = -ENOMEM;
2465
2466 if (budgetpatch) {
2467 spin_lock_init(&av7110->feedlock1);
2468 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2469 &av7110->pt);
2470 if (!av7110->grabbing)
2471 goto err_i2c_del_3;
2472
2473 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
2474 saa7146_write(dev, BCS_CTRL, 0x80400040);
2475 /* set dd1 stream a & b */
2476 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2477 saa7146_write(dev, DD1_INIT, 0x03000200);
2478 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2479 saa7146_write(dev, BRS_CTRL, 0x60000000);
2480 saa7146_write(dev, BASE_ODD3, 0);
2481 saa7146_write(dev, BASE_EVEN3, 0);
2482 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2483 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2484
2485 saa7146_write(dev, PITCH3, TS_WIDTH);
2486 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2487
2488 /* upload all */
2489 saa7146_write(dev, MC2, 0x077c077c);
2490 saa7146_write(dev, GPIO_CTRL, 0x000000);
2491#if RPS_IRQ
2492 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2493 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2494 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2495 */
2496 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2497 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2498 saa7146_write(dev, ECT1R, 0x3fff );
2499#endif
2500 /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
2501 count = 0;
2502
2503 /* Wait Source Line Counter Threshold (p36) */
2504 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
2505 /* Set GPIO3=1 (p42) */
2506 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2507 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2508 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
2509#if RPS_IRQ
2510 /* issue RPS1 interrupt */
2511 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2512#endif
2513 /* Wait reset Source Line Counter Threshold (p36) */
2514 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
2515 /* Set GPIO3=0 (p42) */
2516 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2517 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2518 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2519#if RPS_IRQ
2520 /* issue RPS1 interrupt */
2521 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2522#endif
2523 /* Jump to begin of RPS program (p37) */
2524 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2525 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2526
2527 /* Fix VSYNC level */
2528 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2529 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2530 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2531 /* Set Source Line Counter Threshold, using BRS (rCC p43)
2532 * It generates HS event every TS_HEIGHT lines
2533 * this is related to TS_WIDTH set in register
2534 * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
2535 * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
2536 * then RPS_THRESH1 should be set to trigger
2537 * every TS_HEIGHT (512) lines.
2538 */
2539 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
2540
2541 /* Enable RPS1 (rFC p33) */
2542 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2543
2544 /* end of budgetpatch register initialization */
2545 tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
2546 } else {
2547 saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
2548 saa7146_write(dev, BCS_CTRL, 0x80400040);
2549
2550 /* set dd1 stream a & b */
2551 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2552 saa7146_write(dev, DD1_INIT, 0x03000000);
2553 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2554
2555 /* upload all */
2556 saa7146_write(dev, MC2, 0x077c077c);
2557 saa7146_write(dev, GPIO_CTRL, 0x000000);
2558 }
2559
2560 tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
2561 tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
2562
2563 sema_init(&av7110->pid_mutex, 1);
2564
2565 /* locks for data transfers from/to AV7110 */
2566 spin_lock_init(&av7110->debilock);
2567 sema_init(&av7110->dcomlock, 1);
2568 av7110->debitype = -1;
2569
2570 /* default OSD window */
2571 av7110->osdwin = 1;
2572 sema_init(&av7110->osd_sema, 1);
2573
2574 /* ARM "watchdog" */
2575 init_waitqueue_head(&av7110->arm_wait);
2576 av7110->arm_thread = NULL;
2577
2578 /* allocate and init buffers */
2579 av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
2580 if (!av7110->debi_virt)
2581 goto err_saa71466_vfree_4;
2582
2583
2584 av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
2585 if (!av7110->iobuf)
2586 goto err_pci_free_5;
2587
2588 ret = av7110_av_init(av7110);
2589 if (ret < 0)
2590 goto err_iobuf_vfree_6;
2591
2592 /* init BMP buffer */
2593 av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
2594 init_waitqueue_head(&av7110->bmpq);
2595
2596 ret = av7110_ca_init(av7110);
2597 if (ret < 0)
2598 goto err_av7110_av_exit_7;
2599
2600 /* load firmware into AV7110 cards */
2601 ret = av7110_bootarm(av7110);
2602 if (ret < 0)
2603 goto err_av7110_ca_exit_8;
2604
2605 ret = av7110_firmversion(av7110);
2606 if (ret < 0)
2607 goto err_stop_arm_9;
2608
2609 if (FW_VERSION(av7110->arm_app)<0x2501)
2610 printk ("dvb-ttpci: Warning, firmware version 0x%04x is too old. "
2611 "System might be unstable!\n", FW_VERSION(av7110->arm_app));
2612
2613 ret = kernel_thread(arm_thread, (void *) av7110, 0);
2614 if (ret < 0)
2615 goto err_stop_arm_9;
2616
2617 /* set initial volume in mixer struct */
2618 av7110->mixer.volume_left = volume;
2619 av7110->mixer.volume_right = volume;
2620
2621 init_av7110_av(av7110);
2622
2623 ret = av7110_register(av7110);
2624 if (ret < 0)
2625 goto err_arm_thread_stop_10;
2626
2627 /* special case DVB-C: these cards have an analog tuner
2628 plus need some special handling, so we have separate
2629 saa7146_ext_vv data for these... */
2630 ret = av7110_init_v4l(av7110);
2631 if (ret < 0)
2632 goto err_av7110_unregister_11;
2633
fdc53a6d 2634 av7110->dvb_adapter.priv = av7110;
1da177e4
LT		 2635 ret = frontend_init(av7110);
2636 if (ret < 0)
2637 goto err_av7110_exit_v4l_12;
2638
2639#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
2640 av7110_ir_init();
2641#endif
2642 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
2643 av7110_num++;
2644out:
2645 return ret;
2646
2647err_av7110_exit_v4l_12:
2648 av7110_exit_v4l(av7110);
2649err_av7110_unregister_11:
2650 dvb_unregister(av7110);
2651err_arm_thread_stop_10:
2652 av7110_arm_sync(av7110);
2653err_stop_arm_9:
2654 /* Nothing to do. Rejoice. */
2655err_av7110_ca_exit_8:
2656 av7110_ca_exit(av7110);
2657err_av7110_av_exit_7:
2658 av7110_av_exit(av7110);
2659err_iobuf_vfree_6:
2660 vfree(av7110->iobuf);
2661err_pci_free_5:
2662 pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
2663err_saa71466_vfree_4:
2664 if (!av7110->grabbing)
2665 saa7146_pgtable_free(pdev, &av7110->pt);
2666err_i2c_del_3:
2667 i2c_del_adapter(&av7110->i2c_adap);
2668err_dvb_unregister_adapter_2:
fdc53a6d 2669 dvb_unregister_adapter(&av7110->dvb_adapter);
1da177e4
LT		 2670err_put_firmware_1:
2671 put_firmware(av7110);
2672err_kfree_0:
2673 kfree(av7110);
2674 goto out;
2675}
2676
2677static int av7110_detach(struct saa7146_dev* saa)
2678{
2679 struct av7110 *av7110 = saa->ext_priv;
2680 dprintk(4, "%p\n", av7110);
2681
2682 if (budgetpatch) {
2683 /* Disable RPS1 */
2684 saa7146_write(saa, MC1, MASK_29);
2685 /* VSYNC LOW (inactive) */
2686 saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
2687 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
2688 SAA7146_IER_DISABLE(saa, MASK_10);
2689 SAA7146_ISR_CLEAR(saa, MASK_10);
2690 msleep(50);
2691 tasklet_kill(&av7110->vpe_tasklet);
2692 saa7146_pgtable_free(saa->pci, &av7110->pt);
2693 }
2694 av7110_exit_v4l(av7110);
2695
2696 av7110_arm_sync(av7110);
2697
2698 tasklet_kill(&av7110->debi_tasklet);
2699 tasklet_kill(&av7110->gpio_tasklet);
2700
2701 dvb_unregister(av7110);
2702
2703 SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
2704 SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
2705
2706 av7110_ca_exit(av7110);
2707 av7110_av_exit(av7110);
2708
2709 vfree(av7110->iobuf);
2710 pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
2711 av7110->debi_bus);
2712
2713 i2c_del_adapter(&av7110->i2c_adap);
2714
fdc53a6d 2715 dvb_unregister_adapter (&av7110->dvb_adapter);
1da177e4
LT		 2716
2717 av7110_num--;
2718
2719 put_firmware(av7110);
2720
2721 kfree(av7110);
2722
2723 saa->ext_priv = NULL;
2724
2725 return 0;
2726}
2727
2728
2729static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
2730{
2731 struct av7110 *av7110 = dev->ext_priv;
2732
2733 //print_time("av7110_irq");
2734
2735 /* Note: Don't try to handle the DEBI error irq (MASK_18), in
2736 * intel mode the timeout is asserted all the time...
2737 */
2738
2739 if (*isr & MASK_19) {
2740 //printk("av7110_irq: DEBI\n");
2741 /* Note 1: The DEBI irq is level triggered: We must enable it
2742 * only after we started a DMA xfer, and disable it here
2743 * immediately, or it will be signalled all the time while
2744 * DEBI is idle.
2745 * Note 2: You would think that an irq which is masked is
2746 * not signalled by the hardware. Not so for the SAA7146:
2747 * An irq is signalled as long as the corresponding bit
2748 * in the ISR is set, and disabling irqs just prevents the
2749 * hardware from setting the ISR bit. This means a) that we
2750 * must clear the ISR *after* disabling the irq (which is why
2751 * we must do it here even though saa7146_core did it already),
2752 * and b) that if we were to disable an edge triggered irq
2753 * (like the gpio irqs sadly are) temporarily we would likely
2754 * loose some. This sucks :-(
2755 */
2756 SAA7146_IER_DISABLE(av7110->dev, MASK_19);
2757 SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
2758 tasklet_schedule(&av7110->debi_tasklet);
2759 }
2760
2761 if (*isr & MASK_03) {
2762 //printk("av7110_irq: GPIO\n");
2763 tasklet_schedule(&av7110->gpio_tasklet);
2764 }
2765
2766 if ((*isr & MASK_10) && budgetpatch)
2767 tasklet_schedule(&av7110->vpe_tasklet);
2768}
2769
2770
2771static struct saa7146_extension av7110_extension;
2772
2773#define MAKE_AV7110_INFO(x_var,x_name) \
2774static struct saa7146_pci_extension_data x_var = { \
2775 .ext_priv = x_name, \
2776 .ext = &av7110_extension }
2777
2778MAKE_AV7110_INFO(tts_1_X, "Technotrend/Hauppauge WinTV DVB-S rev1.X");
2779MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
2780MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
2781MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
2782MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
3dfaebda 2783MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
1da177e4
LT		 2784MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
2785MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
2786MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
2787MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
2788
2789static struct pci_device_id pci_tbl[] = {
3dfaebda 2790 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
1da177e4
LT		 2791 MAKE_EXTENSION_PCI(tts_1_X, 0x13c2, 0x0000),
2792 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
2793 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
2794 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
1da177e4
LT		 2795 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
2796 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
3dfaebda
JS		 2797 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
2798 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
2799 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
1da177e4
LT		 2800
2801/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0004), UNDEFINED CARD */ // Galaxis DVB PC-Sat-Carte
2802/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
2803/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
2804
2805 {
2806 .vendor = 0,
2807 }
2808};
2809
2810MODULE_DEVICE_TABLE(pci, pci_tbl);
2811
2812
2813static struct saa7146_extension av7110_extension = {
2814 .name = "dvb\0",
2815 .flags = SAA7146_I2C_SHORT_DELAY,
2816
2817 .module = THIS_MODULE,
2818 .pci_tbl = &pci_tbl[0],
2819 .attach = av7110_attach,
2820 .detach = av7110_detach,
2821
2822 .irq_mask = MASK_19 | MASK_03 | MASK_10,
2823 .irq_func = av7110_irq,
2824};
2825
2826
2827static int __init av7110_init(void)
2828{
2829 int retval;
2830 retval = saa7146_register_extension(&av7110_extension);
2831 return retval;
2832}
2833
2834
2835static void __exit av7110_exit(void)
2836{
2837#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
2838 av7110_ir_exit();
2839#endif
2840 saa7146_unregister_extension(&av7110_extension);
2841}
2842
2843module_init(av7110_init);
2844module_exit(av7110_exit);
2845
2846MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by "
2847 "Siemens, Technotrend, Hauppauge");
2848MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
2849MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)