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[PATCH] mips: setup_zero_pages count 1
[linux-block.git] / drivers / media / dvb / ttpci / av7110.c
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1da177e4
LT		 1/*
2 * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
3 * av7110.c: initialization and demux stuff
4 *
5 * Copyright (C) 1999-2002 Ralph Metzler
6 * & Marcus Metzler for convergence integrated media GmbH
7 *
8 * originally based on code by:
9 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
27 *
28 *
29 * the project's page is at http://www.linuxtv.org/dvb/
30 */
31
32
33#include <linux/config.h>
34#include <linux/module.h>
35#include <linux/kmod.h>
36#include <linux/delay.h>
37#include <linux/fs.h>
38#include <linux/timer.h>
39#include <linux/poll.h>
40#include <linux/byteorder/swabb.h>
41#include <linux/smp_lock.h>
42
43#include <linux/kernel.h>
44#include <linux/moduleparam.h>
45#include <linux/sched.h>
46#include <linux/types.h>
47#include <linux/fcntl.h>
48#include <linux/interrupt.h>
49#include <linux/string.h>
50#include <linux/pci.h>
51#include <linux/vmalloc.h>
52#include <linux/firmware.h>
53#include <linux/crc32.h>
54#include <linux/i2c.h>
55
56#include <asm/system.h>
57#include <asm/semaphore.h>
58
59#include <linux/dvb/frontend.h>
60
61#include "dvb_frontend.h"
62
63#include "ttpci-eeprom.h"
64#include "av7110.h"
65#include "av7110_hw.h"
66#include "av7110_av.h"
67#include "av7110_ca.h"
68#include "av7110_ipack.h"
69
70#define TS_WIDTH 376
71#define TS_HEIGHT 512
72#define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
73#define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
74
75
76int av7110_debug;
77
78static int vidmode = CVBS_RGB_OUT;
79static int pids_off;
80static int adac = DVB_ADAC_TI;
81static int hw_sections;
82static int rgb_on;
83static int volume = 255;
84static int budgetpatch = 0;
85
86module_param_named(debug, av7110_debug, int, 0644);
87MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
88module_param(vidmode, int, 0444);
89MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
90module_param(pids_off, int, 0444);
91MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
92module_param(adac, int, 0444);
93MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
94module_param(hw_sections, int, 0444);
95MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
96module_param(rgb_on, int, 0444);
97MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control"
98 " signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
99module_param(volume, int, 0444);
100MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
101module_param(budgetpatch, int, 0444);
102MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
103
104static void restart_feeds(struct av7110 *av7110);
105
106static int av7110_num = 0;
107
108#define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
109{\
110 if (fe_func != NULL) { \
111 av7110_copy = fe_func; \
112 fe_func = av7110_func; \
113 } \
114}
115
116
117static void init_av7110_av(struct av7110 *av7110)
118{
ce18a223 119 int ret;
1da177e4
LT		 120 struct saa7146_dev *dev = av7110->dev;
121
122 /* set internal volume control to maximum */
123 av7110->adac_type = DVB_ADAC_TI;
ce18a223 124 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 125 if (ret < 0)
ce18a223 126 printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
1da177e4 127
ce18a223 128 ret = av7710_set_video_mode(av7110, vidmode);
7a2fa90f 129 if (ret < 0)
ce18a223 130 printk("dvb-ttpci:cannot set video mode:%d\n",ret);
1da177e4
LT		 131
132 /* handle different card types */
133 /* remaining inits according to card and frontend type */
134 av7110->analog_tuner_flags = 0;
135 av7110->current_input = 0;
136 if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
137 printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
fdc53a6d 138 av7110->dvb_adapter.num);
1da177e4
LT		 139 av7110->adac_type = DVB_ADAC_CRYSTAL;
140 i2c_writereg(av7110, 0x20, 0x01, 0xd2);
141 i2c_writereg(av7110, 0x20, 0x02, 0x49);
142 i2c_writereg(av7110, 0x20, 0x03, 0x00);
143 i2c_writereg(av7110, 0x20, 0x04, 0x00);
144
145 /**
146 * some special handling for the Siemens DVB-C cards...
147 */
148 } else if (0 == av7110_init_analog_module(av7110)) {
149 /* done. */
150 }
151 else if (dev->pci->subsystem_vendor == 0x110a) {
152 printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
fdc53a6d 153 av7110->dvb_adapter.num);
1da177e4
LT		 154 av7110->adac_type = DVB_ADAC_NONE;
155 }
156 else {
157 av7110->adac_type = adac;
158 printk("dvb-ttpci: adac type set to %d @ card %d\n",
fdc53a6d 159 av7110->dvb_adapter.num, av7110->adac_type);
1da177e4
LT		 160 }
161
162 if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP) {
163 // switch DVB SCART on
ce18a223 164 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
7a2fa90f 165 if (ret < 0)
ce18a223
WR		 166 printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
167 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
7a2fa90f 168 if (ret < 0)
ce18a223 169 printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
1da177e4 170 if (rgb_on &&
6af4ee10
KH		 171 ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
172 (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
173 (av7110->dev->pci->subsystem_device == 0x0000)) {
1da177e4
LT		 174 saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
175 //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
176 }
177 }
178
ce18a223 179 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 180 if (ret < 0)
ce18a223 181 printk("dvb-ttpci:cannot set volume :%d\n",ret);
1da177e4
LT		 182}
183
184static void recover_arm(struct av7110 *av7110)
185{
186 dprintk(4, "%p\n",av7110);
187
188 av7110_bootarm(av7110);
189 msleep(100);
190 restart_feeds(av7110);
191 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, av7110->ir_config);
192}
193
194static void arm_error(struct av7110 *av7110)
195{
196 dprintk(4, "%p\n",av7110);
197
198 av7110->arm_errors++;
199 av7110->arm_ready = 0;
200 recover_arm(av7110);
201}
202
203static void av7110_arm_sync(struct av7110 *av7110)
204{
205 av7110->arm_rmmod = 1;
206 wake_up_interruptible(&av7110->arm_wait);
207
208 while (av7110->arm_thread)
209 msleep(1);
210}
211
212static int arm_thread(void *data)
213{
214 struct av7110 *av7110 = data;
215 u16 newloops = 0;
216 int timeout;
217
218 dprintk(4, "%p\n",av7110);
219
220 lock_kernel();
221 daemonize("arm_mon");
222 sigfillset(&current->blocked);
223 unlock_kernel();
224
225 av7110->arm_thread = current;
226
227 for (;;) {
228 timeout = wait_event_interruptible_timeout(av7110->arm_wait,
229 av7110->arm_rmmod, 5 * HZ);
230 if (-ERESTARTSYS == timeout || av7110->arm_rmmod) {
231 /* got signal or told to quit*/
232 break;
233 }
234
235 if (!av7110->arm_ready)
236 continue;
237
238 if (down_interruptible(&av7110->dcomlock))
239 break;
240
241 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
242 up(&av7110->dcomlock);
243
244 if (newloops == av7110->arm_loops) {
245 printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
fdc53a6d 246 av7110->dvb_adapter.num);
1da177e4
LT		 247
248 arm_error(av7110);
249 av7710_set_video_mode(av7110, vidmode);
250
251 init_av7110_av(av7110);
252
253 if (down_interruptible(&av7110->dcomlock))
254 break;
255
256 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
257 up(&av7110->dcomlock);
258 }
259 av7110->arm_loops = newloops;
260 }
261
262 av7110->arm_thread = NULL;
263 return 0;
264}
265
266
1da177e4
LT		 267/****************************************************************************
268 * IRQ handling
269 ****************************************************************************/
270
271static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
272 u8 *buffer2, size_t buffer2_len,
273 struct dvb_demux_filter *dvbdmxfilter,
274 enum dmx_success success,
275 struct av7110 *av7110)
276{
277 if (!dvbdmxfilter->feed->demux->dmx.frontend)
278 return 0;
279 if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
280 return 0;
281
282 switch (dvbdmxfilter->type) {
283 case DMX_TYPE_SEC:
284 if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
285 return 0;
286 if (dvbdmxfilter->doneq) {
287 struct dmx_section_filter *filter = &dvbdmxfilter->filter;
288 int i;
289 u8 xor, neq = 0;
290
291 for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
292 xor = filter->filter_value[i] ^ buffer1[i];
293 neq |= dvbdmxfilter->maskandnotmode[i] & xor;
294 }
295 if (!neq)
296 return 0;
297 }
298 return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
299 buffer2, buffer2_len,
300 &dvbdmxfilter->filter,
301 DMX_OK);
302 case DMX_TYPE_TS:
303 if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
304 return 0;
305 if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
306 return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
307 buffer2, buffer2_len,
308 &dvbdmxfilter->feed->feed.ts,
309 DMX_OK);
310 else
311 av7110_p2t_write(buffer1, buffer1_len,
312 dvbdmxfilter->feed->pid,
313 &av7110->p2t_filter[dvbdmxfilter->index]);
314 default:
315 return 0;
316 }
317}
318
319
320//#define DEBUG_TIMING
321static inline void print_time(char *s)
322{
323#ifdef DEBUG_TIMING
324 struct timeval tv;
325 do_gettimeofday(&tv);
326 printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
327#endif
328}
329
330#define DEBI_READ 0
331#define DEBI_WRITE 1
332static inline void start_debi_dma(struct av7110 *av7110, int dir,
333 unsigned long addr, unsigned int len)
334{
335 dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
336 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
337 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
338 return;
339 }
340
341 SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
342 SAA7146_IER_ENABLE(av7110->dev, MASK_19);
343 if (len < 5)
344 len = 5; /* we want a real DEBI DMA */
345 if (dir == DEBI_WRITE)
346 iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
347 else
348 irdebi(av7110, DEBISWAB, addr, 0, len);
349}
350
351static void debiirq(unsigned long data)
352{
353 struct av7110 *av7110 = (struct av7110 *) data;
354 int type = av7110->debitype;
355 int handle = (type >> 8) & 0x1f;
356 unsigned int xfer = 0;
357
358 print_time("debi");
359 dprintk(4, "type 0x%04x\n", type);
360
361 if (type == -1) {
362 printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
363 jiffies, saa7146_read(av7110->dev, PSR),
364 saa7146_read(av7110->dev, SSR));
365 goto debi_done;
366 }
367 av7110->debitype = -1;
368
369 switch (type & 0xff) {
370
371 case DATA_TS_RECORD:
372 dvb_dmx_swfilter_packets(&av7110->demux,
373 (const u8 *) av7110->debi_virt,
374 av7110->debilen / 188);
375 xfer = RX_BUFF;
376 break;
377
378 case DATA_PES_RECORD:
379 if (av7110->demux.recording)
380 av7110_record_cb(&av7110->p2t[handle],
381 (u8 *) av7110->debi_virt,
382 av7110->debilen);
383 xfer = RX_BUFF;
384 break;
385
386 case DATA_IPMPE:
387 case DATA_FSECTION:
388 case DATA_PIPING:
389 if (av7110->handle2filter[handle])
390 DvbDmxFilterCallback((u8 *)av7110->debi_virt,
391 av7110->debilen, NULL, 0,
392 av7110->handle2filter[handle],
393 DMX_OK, av7110);
394 xfer = RX_BUFF;
395 break;
396
397 case DATA_CI_GET:
398 {
399 u8 *data = av7110->debi_virt;
400
401 if ((data[0] < 2) && data[2] == 0xff) {
402 int flags = 0;
403 if (data[5] > 0)
404 flags |= CA_CI_MODULE_PRESENT;
405 if (data[5] > 5)
406 flags |= CA_CI_MODULE_READY;
407 av7110->ci_slot[data[0]].flags = flags;
408 } else
409 ci_get_data(&av7110->ci_rbuffer,
410 av7110->debi_virt,
411 av7110->debilen);
412 xfer = RX_BUFF;
413 break;
414 }
415
416 case DATA_COMMON_INTERFACE:
417 CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
418#if 0
419 {
420 int i;
421
422 printk("av7110%d: ", av7110->num);
423 printk("%02x ", *(u8 *)av7110->debi_virt);
424 printk("%02x ", *(1+(u8 *)av7110->debi_virt));
425 for (i = 2; i < av7110->debilen; i++)
426 printk("%02x ", (*(i+(unsigned char *)av7110->debi_virt)));
427 for (i = 2; i < av7110->debilen; i++)
428 printk("%c", chtrans(*(i+(unsigned char *)av7110->debi_virt)));
429
430 printk("\n");
431 }
432#endif
433 xfer = RX_BUFF;
434 break;
435
436 case DATA_DEBUG_MESSAGE:
437 ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
438 printk("%s\n", (s8 *) av7110->debi_virt);
439 xfer = RX_BUFF;
440 break;
441
442 case DATA_CI_PUT:
443 dprintk(4, "debi DATA_CI_PUT\n");
444 case DATA_MPEG_PLAY:
445 dprintk(4, "debi DATA_MPEG_PLAY\n");
446 case DATA_BMP_LOAD:
447 dprintk(4, "debi DATA_BMP_LOAD\n");
448 xfer = TX_BUFF;
449 break;
450 default:
451 break;
452 }
453debi_done:
454 spin_lock(&av7110->debilock);
455 if (xfer)
456 iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
457 ARM_ClearMailBox(av7110);
458 spin_unlock(&av7110->debilock);
459}
460
461/* irq from av7110 firmware writing the mailbox register in the DPRAM */
462static void gpioirq(unsigned long data)
463{
464 struct av7110 *av7110 = (struct av7110 *) data;
465 u32 rxbuf, txbuf;
466 int len;
467
468 if (av7110->debitype != -1)
469 /* we shouldn't get any irq while a debi xfer is running */
470 printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
471 jiffies, saa7146_read(av7110->dev, PSR),
472 saa7146_read(av7110->dev, SSR));
473
474 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
475 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
476 BUG(); /* maybe we should try resetting the debi? */
477 }
478
479 spin_lock(&av7110->debilock);
480 ARM_ClearIrq(av7110);
481
482 /* see what the av7110 wants */
483 av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
484 av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
485 rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
486 txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
487 len = (av7110->debilen + 3) & ~3;
488
489 print_time("gpio");
490 dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
491
492 switch (av7110->debitype & 0xff) {
493
494 case DATA_TS_PLAY:
495 case DATA_PES_PLAY:
496 break;
497
498 case DATA_MPEG_VIDEO_EVENT:
499 {
500 u32 h_ar;
501 struct video_event event;
502
503 av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
504 h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
505
506 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
507 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
508
509 av7110->video_size.h = h_ar & 0xfff;
510 dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
511 av7110->video_size.w,
512 av7110->video_size.h,
513 av7110->video_size.aspect_ratio);
514
515 event.type = VIDEO_EVENT_SIZE_CHANGED;
516 event.u.size.w = av7110->video_size.w;
517 event.u.size.h = av7110->video_size.h;
518 switch ((h_ar >> 12) & 0xf)
519 {
520 case 3:
521 av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
522 event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
523 av7110->videostate.video_format = VIDEO_FORMAT_16_9;
524 break;
525 case 4:
526 av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
527 event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
528 av7110->videostate.video_format = VIDEO_FORMAT_221_1;
529 break;
530 default:
531 av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
532 event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
533 av7110->videostate.video_format = VIDEO_FORMAT_4_3;
534 }
535 dvb_video_add_event(av7110, &event);
536 break;
537 }
538
539 case DATA_CI_PUT:
540 {
541 int avail;
542 struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
543
544 avail = dvb_ringbuffer_avail(cibuf);
545 if (avail <= 2) {
546 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
547 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
548 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
549 break;
550 }
551 len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
552 len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
553 if (avail < len + 2) {
554 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
555 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
556 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
557 break;
558 }
559 DVB_RINGBUFFER_SKIP(cibuf, 2);
560
561 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len, 0);
562
563 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
564 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
565 dprintk(8, "DMA: CI\n");
566 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
567 spin_unlock(&av7110->debilock);
568 wake_up(&cibuf->queue);
569 return;
570 }
571
572 case DATA_MPEG_PLAY:
573 if (!av7110->playing) {
574 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
575 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
576 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
577 break;
578 }
579 len = 0;
580 if (av7110->debitype & 0x100) {
581 spin_lock(&av7110->aout.lock);
582 len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
583 spin_unlock(&av7110->aout.lock);
584 }
585 if (len <= 0 && (av7110->debitype & 0x200)
586 &&av7110->videostate.play_state != VIDEO_FREEZED) {
587 spin_lock(&av7110->avout.lock);
588 len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
589 spin_unlock(&av7110->avout.lock);
590 }
591 if (len <= 0) {
592 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
593 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
594 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
595 break;
596 }
597 dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
598 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
599 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
600 dprintk(8, "DMA: MPEG_PLAY\n");
601 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
602 spin_unlock(&av7110->debilock);
603 return;
604
605 case DATA_BMP_LOAD:
606 len = av7110->debilen;
607 dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
608 if (!len) {
609 av7110->bmp_state = BMP_LOADED;
610 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
611 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
612 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
613 wake_up(&av7110->bmpq);
614 dprintk(8, "gpio DATA_BMP_LOAD done\n");
615 break;
616 }
617 if (len > av7110->bmplen)
618 len = av7110->bmplen;
619 if (len > 2 * 1024)
620 len = 2 * 1024;
621 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
622 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
623 memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
624 av7110->bmpp += len;
625 av7110->bmplen -= len;
626 dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
627 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
628 spin_unlock(&av7110->debilock);
629 return;
630
631 case DATA_CI_GET:
632 case DATA_COMMON_INTERFACE:
633 case DATA_FSECTION:
634 case DATA_IPMPE:
635 case DATA_PIPING:
636 if (!len || len > 4 * 1024) {
637 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
638 break;
639 }
640 /* fall through */
641
642 case DATA_TS_RECORD:
643 case DATA_PES_RECORD:
644 dprintk(8, "DMA: TS_REC etc.\n");
645 start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
646 spin_unlock(&av7110->debilock);
647 return;
648
649 case DATA_DEBUG_MESSAGE:
650 if (!len || len > 0xff) {
651 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
652 break;
653 }
654 start_debi_dma(av7110, DEBI_READ, Reserved, len);
655 spin_unlock(&av7110->debilock);
656 return;
657
658 case DATA_IRCOMMAND:
03388ae3
OE		 659 if (av7110->ir_handler)
660 av7110->ir_handler(av7110,
661 swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
1da177e4
LT		 662 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
663 break;
664
665 default:
666 printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
667 av7110->debitype, av7110->debilen);
668 break;
669 }
670 av7110->debitype = -1;
671 ARM_ClearMailBox(av7110);
672 spin_unlock(&av7110->debilock);
673}
674
675
676#ifdef CONFIG_DVB_AV7110_OSD
677static int dvb_osd_ioctl(struct inode *inode, struct file *file,
678 unsigned int cmd, void *parg)
679{
680 struct dvb_device *dvbdev = (struct dvb_device *) file->private_data;
681 struct av7110 *av7110 = (struct av7110 *) dvbdev->priv;
682
683 dprintk(4, "%p\n", av7110);
684
685 if (cmd == OSD_SEND_CMD)
686 return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
687 if (cmd == OSD_GET_CAPABILITY)
688 return av7110_osd_capability(av7110, (osd_cap_t *) parg);
689
690 return -EINVAL;
691}
692
693
694static struct file_operations dvb_osd_fops = {
695 .owner = THIS_MODULE,
696 .ioctl = dvb_generic_ioctl,
697 .open = dvb_generic_open,
698 .release = dvb_generic_release,
699};
700
701static struct dvb_device dvbdev_osd = {
702 .priv = NULL,
703 .users = 1,
704 .writers = 1,
705 .fops = &dvb_osd_fops,
706 .kernel_ioctl = dvb_osd_ioctl,
707};
708#endif /* CONFIG_DVB_AV7110_OSD */
709
710
711static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
712 u16 subpid, u16 pcrpid)
713{
714 dprintk(4, "%p\n", av7110);
715
716 if (vpid == 0x1fff || apid == 0x1fff ||
717 ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
718 vpid = apid = ttpid = subpid = pcrpid = 0;
719 av7110->pids[DMX_PES_VIDEO] = 0;
720 av7110->pids[DMX_PES_AUDIO] = 0;
721 av7110->pids[DMX_PES_TELETEXT] = 0;
722 av7110->pids[DMX_PES_PCR] = 0;
723 }
724
725 return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 5,
726 pcrpid, vpid, apid, ttpid, subpid);
727}
728
ce18a223 729int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
1da177e4
LT		 730 u16 subpid, u16 pcrpid)
731{
ce18a223 732 int ret = 0;
1da177e4
LT		 733 dprintk(4, "%p\n", av7110);
734
735 if (down_interruptible(&av7110->pid_mutex))
ce18a223 736 return -ERESTARTSYS;
1da177e4
LT		 737
738 if (!(vpid & 0x8000))
739 av7110->pids[DMX_PES_VIDEO] = vpid;
740 if (!(apid & 0x8000))
741 av7110->pids[DMX_PES_AUDIO] = apid;
742 if (!(ttpid & 0x8000))
743 av7110->pids[DMX_PES_TELETEXT] = ttpid;
744 if (!(pcrpid & 0x8000))
745 av7110->pids[DMX_PES_PCR] = pcrpid;
746
747 av7110->pids[DMX_PES_SUBTITLE] = 0;
748
749 if (av7110->fe_synced) {
750 pcrpid = av7110->pids[DMX_PES_PCR];
ce18a223 751 ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
1da177e4
LT		 752 }
753
754 up(&av7110->pid_mutex);
ce18a223 755 return ret;
1da177e4
LT		 756}
757
758
759/******************************************************************************
760 * hardware filter functions
761 ******************************************************************************/
762
763static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
764{
765 struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
766 struct av7110 *av7110 = (struct av7110 *) dvbdmxfeed->demux->priv;
767 u16 buf[20];
768 int ret, i;
769 u16 handle;
770// u16 mode = 0x0320;
771 u16 mode = 0xb96a;
772
773 dprintk(4, "%p\n", av7110);
774
775 if (dvbdmxfilter->type == DMX_TYPE_SEC) {
776 if (hw_sections) {
777 buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
778 dvbdmxfilter->maskandmode[0];
779 for (i = 3; i < 18; i++)
780 buf[i + 4 - 2] =
781 (dvbdmxfilter->filter.filter_value[i] << 8) |
782 dvbdmxfilter->maskandmode[i];
783 mode = 4;
784 }
785 } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
786 !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
787 av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
788 }
789
790 buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
791 buf[1] = 16;
792 buf[2] = dvbdmxfeed->pid;
793 buf[3] = mode;
794
795 ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
796 if (ret != 0 || handle >= 32) {
797 printk("dvb-ttpci: %s error buf %04x %04x %04x %04x "
ce18a223 798 "ret %d handle %04x\n",
1da177e4
LT		 799 __FUNCTION__, buf[0], buf[1], buf[2], buf[3],
800 ret, handle);
801 dvbdmxfilter->hw_handle = 0xffff;
ce18a223
WR		 802 if (!ret)
803 ret = -1;
804 return ret;
1da177e4
LT		 805 }
806
807 av7110->handle2filter[handle] = dvbdmxfilter;
808 dvbdmxfilter->hw_handle = handle;
809
810 return ret;
811}
812
813static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
814{
815 struct av7110 *av7110 = (struct av7110 *) dvbdmxfilter->feed->demux->priv;
816 u16 buf[3];
817 u16 answ[2];
818 int ret;
819 u16 handle;
820
821 dprintk(4, "%p\n", av7110);
822
823 handle = dvbdmxfilter->hw_handle;
824 if (handle >= 32) {
825 printk("%s tried to stop invalid filter %04x, filter type = %x\n",
826 __FUNCTION__, handle, dvbdmxfilter->type);
ce18a223 827 return -EINVAL;
1da177e4
LT		 828 }
829
830 av7110->handle2filter[handle] = NULL;
831
832 buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
833 buf[1] = 1;
834 buf[2] = handle;
835 ret = av7110_fw_request(av7110, buf, 3, answ, 2);
836 if (ret != 0 || answ[1] != handle) {
837 printk("dvb-ttpci: %s error cmd %04x %04x %04x ret %x "
838 "resp %04x %04x pid %d\n",
839 __FUNCTION__, buf[0], buf[1], buf[2], ret,
840 answ[0], answ[1], dvbdmxfilter->feed->pid);
ce18a223
WR		 841 if (!ret)
842 ret = -1;
1da177e4
LT		 843 }
844 return ret;
845}
846
847
ce18a223 848static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT		 849{
850 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
851 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
852 u16 *pid = dvbdmx->pids, npids[5];
853 int i;
ce18a223 854 int ret = 0;
1da177e4
LT		 855
856 dprintk(4, "%p\n", av7110);
857
858 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
859 i = dvbdmxfeed->pes_type;
860 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
861 if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
862 npids[i] = 0;
ce18a223
WR		 863 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
864 if (!ret)
865 ret = StartHWFilter(dvbdmxfeed->filter);
866 return ret;
867 }
868 if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
869 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
870 if (ret)
871 return ret;
1da177e4 872 }
1da177e4
LT		 873
874 if (dvbdmxfeed->pes_type < 2 && npids[0])
875 if (av7110->fe_synced)
ce18a223
WR		 876 {
877 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
878 if (ret)
879 return ret;
880 }
1da177e4
LT		 881
882 if ((dvbdmxfeed->ts_type & TS_PACKET)) {
883 if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
ce18a223 884 ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
1da177e4 885 if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
ce18a223 886 ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
1da177e4 887 }
ce18a223 888 return ret;
1da177e4
LT		 889}
890
ce18a223 891static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT		 892{
893 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
894 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
895 u16 *pid = dvbdmx->pids, npids[5];
896 int i;
897
ce18a223
WR		 898 int ret = 0;
899
1da177e4
LT		 900 dprintk(4, "%p\n", av7110);
901
902 if (dvbdmxfeed->pes_type <= 1) {
ce18a223
WR		 903 ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
904 if (ret)
905 return ret;
1da177e4
LT		 906 if (!av7110->rec_mode)
907 dvbdmx->recording = 0;
908 if (!av7110->playing)
909 dvbdmx->playing = 0;
910 }
911 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
912 i = dvbdmxfeed->pes_type;
913 switch (i) {
914 case 2: //teletext
915 if (dvbdmxfeed->ts_type & TS_PACKET)
ce18a223 916 ret = StopHWFilter(dvbdmxfeed->filter);
1da177e4
LT		 917 npids[2] = 0;
918 break;
919 case 0:
920 case 1:
921 case 4:
922 if (!pids_off)
ce18a223 923 return 0;
1da177e4
LT		 924 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
925 break;
926 }
ce18a223
WR		 927 if (!ret)
928 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
929 return ret;
1da177e4
LT		 930}
931
932static int av7110_start_feed(struct dvb_demux_feed *feed)
933{
934 struct dvb_demux *demux = feed->demux;
935 struct av7110 *av7110 = demux->priv;
ce18a223 936 int ret = 0;
1da177e4
LT		 937
938 dprintk(4, "%p\n", av7110);
939
940 if (!demux->dmx.frontend)
941 return -EINVAL;
942
943 if (feed->pid > 0x1fff)
944 return -EINVAL;
945
946 if (feed->type == DMX_TYPE_TS) {
947 if ((feed->ts_type & TS_DECODER) &&
948 (feed->pes_type < DMX_TS_PES_OTHER)) {
949 switch (demux->dmx.frontend->source) {
950 case DMX_MEMORY_FE:
951 if (feed->ts_type & TS_DECODER)
952 if (feed->pes_type < 2 &&
953 !(demux->pids[0] & 0x8000) &&
954 !(demux->pids[1] & 0x8000)) {
955 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
956 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
ce18a223
WR		 957 ret = av7110_av_start_play(av7110,RP_AV);
958 if (!ret)
959 demux->playing = 1;
1da177e4
LT		 960 }
961 break;
962 default:
ce18a223 963 ret = dvb_feed_start_pid(feed);
1da177e4
LT		 964 break;
965 }
966 } else if ((feed->ts_type & TS_PACKET) &&
967 (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
ce18a223 968 ret = StartHWFilter(feed->filter);
1da177e4
LT		 969 }
970 }
971
ce18a223 972 else if (feed->type == DMX_TYPE_SEC) {
1da177e4
LT		 973 int i;
974
975 for (i = 0; i < demux->filternum; i++) {
976 if (demux->filter[i].state != DMX_STATE_READY)
977 continue;
978 if (demux->filter[i].type != DMX_TYPE_SEC)
979 continue;
980 if (demux->filter[i].filter.parent != &feed->feed.sec)
981 continue;
982 demux->filter[i].state = DMX_STATE_GO;
ce18a223
WR		 983 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
984 ret = StartHWFilter(&demux->filter[i]);
985 if (ret)
986 break;
987 }
1da177e4
LT		 988 }
989 }
990
ce18a223 991 return ret;
1da177e4
LT		 992}
993
994
995static int av7110_stop_feed(struct dvb_demux_feed *feed)
996{
997 struct dvb_demux *demux = feed->demux;
998 struct av7110 *av7110 = demux->priv;
12ba0504 999 int i, rc, ret = 0;
1da177e4
LT		 1000 dprintk(4, "%p\n", av7110);
1001
1002 if (feed->type == DMX_TYPE_TS) {
1003 if (feed->ts_type & TS_DECODER) {
1004 if (feed->pes_type >= DMX_TS_PES_OTHER ||
1005 !demux->pesfilter[feed->pes_type])
1006 return -EINVAL;
1007 demux->pids[feed->pes_type] |= 0x8000;
1008 demux->pesfilter[feed->pes_type] = NULL;
1009 }
1010 if (feed->ts_type & TS_DECODER &&
1011 feed->pes_type < DMX_TS_PES_OTHER) {
ce18a223 1012 ret = dvb_feed_stop_pid(feed);
1da177e4
LT		 1013 } else
1014 if ((feed->ts_type & TS_PACKET) &&
1015 (demux->dmx.frontend->source != DMX_MEMORY_FE))
ce18a223 1016 ret = StopHWFilter(feed->filter);
1da177e4
LT		 1017 }
1018
ce18a223 1019 if (!ret && feed->type == DMX_TYPE_SEC) {
12ba0504 1020 for (i = 0; i<demux->filternum; i++) {
1da177e4
LT		 1021 if (demux->filter[i].state == DMX_STATE_GO &&
1022 demux->filter[i].filter.parent == &feed->feed.sec) {
1023 demux->filter[i].state = DMX_STATE_READY;
ce18a223 1024 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
12ba0504
JS		 1025 rc = StopHWFilter(&demux->filter[i]);
1026 if (!ret)
1027 ret = rc;
1028 /* keep going, stop as many filters as possible */
ce18a223 1029 }
12ba0504 1030 }
1da177e4
LT		 1031 }
1032 }
1033
ce18a223 1034 return ret;
1da177e4
LT		 1035}
1036
1037
1038static void restart_feeds(struct av7110 *av7110)
1039{
1040 struct dvb_demux *dvbdmx = &av7110->demux;
1041 struct dvb_demux_feed *feed;
1042 int mode;
1043 int i;
1044
1045 dprintk(4, "%p\n", av7110);
1046
1047 mode = av7110->playing;
1048 av7110->playing = 0;
1049 av7110->rec_mode = 0;
1050
1051 for (i = 0; i < dvbdmx->filternum; i++) {
1052 feed = &dvbdmx->feed[i];
1053 if (feed->state == DMX_STATE_GO)
1054 av7110_start_feed(feed);
1055 }
1056
1057 if (mode)
1058 av7110_av_start_play(av7110, mode);
1059}
1060
1061static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
1062 uint64_t *stc, unsigned int *base)
1063{
1064 int ret;
1065 u16 fwstc[4];
1066 u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
1067 struct dvb_demux *dvbdemux;
1068 struct av7110 *av7110;
1069
1070 /* pointer casting paranoia... */
1071 if (!demux)
1072 BUG();
1073 dvbdemux = (struct dvb_demux *) demux->priv;
1074 if (!dvbdemux)
1075 BUG();
1076 av7110 = (struct av7110 *) dvbdemux->priv;
1077
1078 dprintk(4, "%p\n", av7110);
1079
1080 if (num != 0)
1081 return -EINVAL;
1082
1083 ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
1084 if (ret) {
1085 printk(KERN_ERR "%s: av7110_fw_request error\n", __FUNCTION__);
ce18a223 1086 return ret;
1da177e4
LT		 1087 }
1088 dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
1089 fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
1090
1091 *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
1092 (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
1093 *base = 1;
1094
1095 dprintk(4, "stc = %lu\n", (unsigned long)*stc);
1096
1097 return 0;
1098}
1099
1100
1101/******************************************************************************
1102 * SEC device file operations
1103 ******************************************************************************/
1104
1105
1106static int av7110_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
1107{
1108 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1109
1110 switch (tone) {
1111 case SEC_TONE_ON:
ce18a223 1112 return Set22K(av7110, 1);
1da177e4
LT		 1113
1114 case SEC_TONE_OFF:
ce18a223 1115 return Set22K(av7110, 0);
1da177e4
LT		 1116
1117 default:
1118 return -EINVAL;
1119 }
1da177e4
LT		 1120}
1121
1122static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
1123 struct dvb_diseqc_master_cmd* cmd)
1124{
1125 struct av7110* av7110 = fe->dvb->priv;
1126
ce18a223 1127 return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
1da177e4
LT		 1128}
1129
1130static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
1131 fe_sec_mini_cmd_t minicmd)
1132{
1133 struct av7110* av7110 = fe->dvb->priv;
1134
ce18a223 1135 return av7110_diseqc_send(av7110, 0, NULL, minicmd);
1da177e4
LT		 1136}
1137
1138/* simplified code from budget-core.c */
1139static int stop_ts_capture(struct av7110 *budget)
1140{
1141 dprintk(2, "budget: %p\n", budget);
1142
1143 if (--budget->feeding1)
1144 return budget->feeding1;
1145 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
1146 SAA7146_IER_DISABLE(budget->dev, MASK_10);
1147 SAA7146_ISR_CLEAR(budget->dev, MASK_10);
1148 return 0;
1149}
1150
1151static int start_ts_capture(struct av7110 *budget)
1152{
1153 dprintk(2, "budget: %p\n", budget);
1154
1155 if (budget->feeding1)
1156 return ++budget->feeding1;
1157 memset(budget->grabbing, 0x00, TS_HEIGHT * TS_WIDTH);
1158 budget->tsf = 0xff;
1159 budget->ttbp = 0;
1160 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1161 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
1162 return ++budget->feeding1;
1163}
1164
1165static int budget_start_feed(struct dvb_demux_feed *feed)
1166{
1167 struct dvb_demux *demux = feed->demux;
1168 struct av7110 *budget = (struct av7110 *) demux->priv;
1169 int status;
1170
1171 dprintk(2, "av7110: %p\n", budget);
1172
1173 spin_lock(&budget->feedlock1);
1174 feed->pusi_seen = 0; /* have a clean section start */
1175 status = start_ts_capture(budget);
1176 spin_unlock(&budget->feedlock1);
1177 return status;
1178}
1179
1180static int budget_stop_feed(struct dvb_demux_feed *feed)
1181{
1182 struct dvb_demux *demux = feed->demux;
1183 struct av7110 *budget = (struct av7110 *) demux->priv;
1184 int status;
1185
1186 dprintk(2, "budget: %p\n", budget);
1187
1188 spin_lock(&budget->feedlock1);
1189 status = stop_ts_capture(budget);
1190 spin_unlock(&budget->feedlock1);
1191 return status;
1192}
1193
1194static void vpeirq(unsigned long data)
1195{
1196 struct av7110 *budget = (struct av7110 *) data;
1197 u8 *mem = (u8 *) (budget->grabbing);
1198 u32 olddma = budget->ttbp;
1199 u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
1200
1201 if (!budgetpatch) {
1202 printk("av7110.c: vpeirq() called while budgetpatch disabled!"
1203 " check saa7146 IER register\n");
1204 BUG();
1205 }
1206 /* nearest lower position divisible by 188 */
1207 newdma -= newdma % 188;
1208
1209 if (newdma >= TS_BUFLEN)
1210 return;
1211
1212 budget->ttbp = newdma;
1213
1214 if (!budget->feeding1 || (newdma == olddma))
1215 return;
1216
1217#if 0
1218 /* track rps1 activity */
1219 printk("vpeirq: %02x Event Counter 1 0x%04x\n",
1220 mem[olddma],
1221 saa7146_read(budget->dev, EC1R) & 0x3fff);
1222#endif
1223
1224 if (newdma > olddma)
1225 /* no wraparound, dump olddma..newdma */
1226 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (newdma - olddma) / 188);
1227 else {
1228 /* wraparound, dump olddma..buflen and 0..newdma */
1229 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (TS_BUFLEN - olddma) / 188);
1230 dvb_dmx_swfilter_packets(&budget->demux1, mem, newdma / 188);
1231 }
1232}
1233
1234static int av7110_register(struct av7110 *av7110)
1235{
1236 int ret, i;
1237 struct dvb_demux *dvbdemux = &av7110->demux;
1238 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1239
1240 dprintk(4, "%p\n", av7110);
1241
1242 if (av7110->registered)
1243 return -1;
1244
1245 av7110->registered = 1;
1246
1247 dvbdemux->priv = (void *) av7110;
1248
1249 for (i = 0; i < 32; i++)
1250 av7110->handle2filter[i] = NULL;
1251
1252 dvbdemux->filternum = 32;
1253 dvbdemux->feednum = 32;
1254 dvbdemux->start_feed = av7110_start_feed;
1255 dvbdemux->stop_feed = av7110_stop_feed;
1256 dvbdemux->write_to_decoder = av7110_write_to_decoder;
1257 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1258 DMX_MEMORY_BASED_FILTERING);
1259
1260 dvb_dmx_init(&av7110->demux);
1261 av7110->demux.dmx.get_stc = dvb_get_stc;
1262
1263 av7110->dmxdev.filternum = 32;
1264 av7110->dmxdev.demux = &dvbdemux->dmx;
1265 av7110->dmxdev.capabilities = 0;
1266
fdc53a6d 1267 dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
1da177e4
LT		 1268
1269 av7110->hw_frontend.source = DMX_FRONTEND_0;
1270
1271 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1272
1273 if (ret < 0)
1274 return ret;
1275
1276 av7110->mem_frontend.source = DMX_MEMORY_FE;
1277
1278 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1279
1280 if (ret < 0)
1281 return ret;
1282
1283 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
1284 &av7110->hw_frontend);
1285 if (ret < 0)
1286 return ret;
1287
1288 av7110_av_register(av7110);
1289 av7110_ca_register(av7110);
1290
1291#ifdef CONFIG_DVB_AV7110_OSD
fdc53a6d 1292 dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
1da177e4
LT		 1293 &dvbdev_osd, av7110, DVB_DEVICE_OSD);
1294#endif
1295
fdc53a6d 1296 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
1da177e4
LT		 1297
1298 if (budgetpatch) {
1299 /* initialize software demux1 without its own frontend
1300 * demux1 hardware is connected to frontend0 of demux0
1301 */
1302 dvbdemux1->priv = (void *) av7110;
1303
1304 dvbdemux1->filternum = 256;
1305 dvbdemux1->feednum = 256;
1306 dvbdemux1->start_feed = budget_start_feed;
1307 dvbdemux1->stop_feed = budget_stop_feed;
1308 dvbdemux1->write_to_decoder = NULL;
1309
1310 dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1311 DMX_MEMORY_BASED_FILTERING);
1312
1313 dvb_dmx_init(&av7110->demux1);
1314
1315 av7110->dmxdev1.filternum = 256;
1316 av7110->dmxdev1.demux = &dvbdemux1->dmx;
1317 av7110->dmxdev1.capabilities = 0;
1318
fdc53a6d 1319 dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
1da177e4 1320
fdc53a6d 1321 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
1da177e4
LT		 1322 printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
1323 }
1324 return 0;
1325}
1326
1327
1328static void dvb_unregister(struct av7110 *av7110)
1329{
1330 struct dvb_demux *dvbdemux = &av7110->demux;
1331 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1332
1333 dprintk(4, "%p\n", av7110);
1334
1335 if (!av7110->registered)
1336 return;
1337
1338 if (budgetpatch) {
1339 dvb_net_release(&av7110->dvb_net1);
1340 dvbdemux->dmx.close(&dvbdemux1->dmx);
1341 dvb_dmxdev_release(&av7110->dmxdev1);
1342 dvb_dmx_release(&av7110->demux1);
1343 }
1344
1345 dvb_net_release(&av7110->dvb_net);
1346
1347 dvbdemux->dmx.close(&dvbdemux->dmx);
1348 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1349 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1350
1351 dvb_dmxdev_release(&av7110->dmxdev);
1352 dvb_dmx_release(&av7110->demux);
1353
1354 if (av7110->fe != NULL)
1355 dvb_unregister_frontend(av7110->fe);
1356 dvb_unregister_device(av7110->osd_dev);
1357 av7110_av_unregister(av7110);
1358 av7110_ca_unregister(av7110);
1359}
1360
1361
1362/****************************************************************************
1363 * I2C client commands
1364 ****************************************************************************/
1365
1366int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
1367{
1368 u8 msg[2] = { reg, val };
1369 struct i2c_msg msgs;
1370
1371 msgs.flags = 0;
1372 msgs.addr = id / 2;
1373 msgs.len = 2;
1374 msgs.buf = msg;
1375 return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
1376}
1377
1378#if 0
1379u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
1380{
1381 u8 mm1[] = {0x00};
1382 u8 mm2[] = {0x00};
1383 struct i2c_msg msgs[2];
1384
1385 msgs[0].flags = 0;
1386 msgs[1].flags = I2C_M_RD;
1387 msgs[0].addr = msgs[1].addr = id / 2;
1388 mm1[0] = reg;
1389 msgs[0].len = 1; msgs[1].len = 1;
1390 msgs[0].buf = mm1; msgs[1].buf = mm2;
1391 i2c_transfer(&av7110->i2c_adap, msgs, 2);
1392
1393 return mm2[0];
1394}
1395#endif
1396
1397/****************************************************************************
1398 * INITIALIZATION
1399 ****************************************************************************/
1400
1401
1402static int check_firmware(struct av7110* av7110)
1403{
1404 u32 crc = 0, len = 0;
1405 unsigned char *ptr;
1406
1407 /* check for firmware magic */
1408 ptr = av7110->bin_fw;
1409 if (ptr[0] != 'A' || ptr[1] != 'V' ||
1410 ptr[2] != 'F' || ptr[3] != 'W') {
1411 printk("dvb-ttpci: this is not an av7110 firmware\n");
1412 return -EINVAL;
1413 }
1414 ptr += 4;
1415
1416 /* check dpram file */
1417 crc = ntohl(*(u32*) ptr);
1418 ptr += 4;
1419 len = ntohl(*(u32*) ptr);
1420 ptr += 4;
1421 if (len >= 512) {
1422 printk("dvb-ttpci: dpram file is way to big.\n");
1423 return -EINVAL;
1424 }
1425 if (crc != crc32_le(0, ptr, len)) {
1426 printk("dvb-ttpci: crc32 of dpram file does not match.\n");
1427 return -EINVAL;
1428 }
1429 av7110->bin_dpram = ptr;
1430 av7110->size_dpram = len;
1431 ptr += len;
1432
1433 /* check root file */
1434 crc = ntohl(*(u32*) ptr);
1435 ptr += 4;
1436 len = ntohl(*(u32*) ptr);
1437 ptr += 4;
1438
1439 if (len <= 200000 || len >= 300000 ||
1440 len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
1441 printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
1442 return -EINVAL;
1443 }
1444 if( crc != crc32_le(0, ptr, len)) {
1445 printk("dvb-ttpci: crc32 of root file does not match.\n");
1446 return -EINVAL;
1447 }
1448 av7110->bin_root = ptr;
1449 av7110->size_root = len;
1450 return 0;
1451}
1452
1453#ifdef CONFIG_DVB_AV7110_FIRMWARE_FILE
1454#include "av7110_firm.h"
1455static void put_firmware(struct av7110* av7110)
1456{
1457 av7110->bin_fw = NULL;
1458}
1459
1460static inline int get_firmware(struct av7110* av7110)
1461{
1462 av7110->bin_fw = dvb_ttpci_fw;
1463 av7110->size_fw = sizeof(dvb_ttpci_fw);
1464 return check_firmware(av7110);
1465}
1466#else
1467static void put_firmware(struct av7110* av7110)
1468{
1469 vfree(av7110->bin_fw);
1470}
1471
1472static int get_firmware(struct av7110* av7110)
1473{
1474 int ret;
1475 const struct firmware *fw;
1476
1477 /* request the av7110 firmware, this will block until someone uploads it */
1478 ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
1479 if (ret) {
1480 if (ret == -ENOENT) {
1481 printk(KERN_ERR "dvb-ttpci: could not load firmware,"
1482 " file not found: dvb-ttpci-01.fw\n");
1483 printk(KERN_ERR "dvb-ttpci: usually this should be in"
1484 " /usr/lib/hotplug/firmware\n");
1485 printk(KERN_ERR "dvb-ttpci: and can be downloaded here"
1486 " http://www.linuxtv.org/download/dvb/firmware/\n");
1487 } else
1488 printk(KERN_ERR "dvb-ttpci: cannot request firmware"
1489 " (error %i)\n", ret);
1490 return -EINVAL;
1491 }
1492
1493 if (fw->size <= 200000) {
1494 printk("dvb-ttpci: this firmware is way too small.\n");
1495 release_firmware(fw);
1496 return -EINVAL;
1497 }
1498
1499 /* check if the firmware is available */
1500 av7110->bin_fw = (unsigned char *) vmalloc(fw->size);
1501 if (NULL == av7110->bin_fw) {
1502 dprintk(1, "out of memory\n");
1503 release_firmware(fw);
1504 return -ENOMEM;
1505 }
1506
1507 memcpy(av7110->bin_fw, fw->data, fw->size);
1508 av7110->size_fw = fw->size;
1509 if ((ret = check_firmware(av7110)))
1510 vfree(av7110->bin_fw);
1511
1512 release_firmware(fw);
1513 return ret;
1514}
1515#endif
1516
1517
1518static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1519{
1520 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1521 u8 pwr = 0;
1522 u8 buf[4];
1523 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
1524 u32 div = (params->frequency + 479500) / 125;
1525
1526 if (params->frequency > 2000000) pwr = 3;
1527 else if (params->frequency > 1800000) pwr = 2;
1528 else if (params->frequency > 1600000) pwr = 1;
1529 else if (params->frequency > 1200000) pwr = 0;
1530 else if (params->frequency >= 1100000) pwr = 1;
1531 else pwr = 2;
1532
1533 buf[0] = (div >> 8) & 0x7f;
1534 buf[1] = div & 0xff;
1535 buf[2] = ((div & 0x18000) >> 10) | 0x95;
1536 buf[3] = (pwr << 6) | 0x30;
1537
1538 // NOTE: since we're using a prescaler of 2, we set the
1539 // divisor frequency to 62.5kHz and divide by 125 above
1540
1541 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
1542 return -EIO;
1543 return 0;
1544}
1545
1546static struct ves1x93_config alps_bsrv2_config = {
1547 .demod_address = 0x08,
1548 .xin = 90100000UL,
1549 .invert_pwm = 0,
1550 .pll_set = alps_bsrv2_pll_set,
1551};
1552
1553
1554static u8 alps_bsru6_inittab[] = {
1555 0x01, 0x15,
1556 0x02, 0x30,
1557 0x03, 0x00,
1558 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1559 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1560 0x06, 0x40, /* DAC not used, set to high impendance mode */
1561 0x07, 0x00, /* DAC LSB */
1562 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1563 0x09, 0x00, /* FIFO */
1564 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1565 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1566 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1567 0x10, 0x3f, // AGC2 0x3d
1568 0x11, 0x84,
ff29d06a 1569 0x12, 0xb9,
1da177e4
LT		 1570 0x15, 0xc9, // lock detector threshold
1571 0x16, 0x00,
1572 0x17, 0x00,
1573 0x18, 0x00,
1574 0x19, 0x00,
1575 0x1a, 0x00,
1576 0x1f, 0x50,
1577 0x20, 0x00,
1578 0x21, 0x00,
1579 0x22, 0x00,
1580 0x23, 0x00,
1581 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1582 0x29, 0x1e, // 1/2 threshold
1583 0x2a, 0x14, // 2/3 threshold
1584 0x2b, 0x0f, // 3/4 threshold
1585 0x2c, 0x09, // 5/6 threshold
1586 0x2d, 0x05, // 7/8 threshold
1587 0x2e, 0x01,
1588 0x31, 0x1f, // test all FECs
1589 0x32, 0x19, // viterbi and synchro search
1590 0x33, 0xfc, // rs control
1591 0x34, 0x93, // error control
1592 0x0f, 0x52,
1593 0xff, 0xff
1594};
1595
1596static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
1597{
1598 u8 aclk = 0;
1599 u8 bclk = 0;
1600
1601 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
1602 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
1603 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
1604 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
1605 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
1606 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
1607
1608 stv0299_writereg(fe, 0x13, aclk);
1609 stv0299_writereg(fe, 0x14, bclk);
1610 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
1611 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
1612 stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
1613
1614 return 0;
1615}
1616
cfbfce15 1617static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
1da177e4 1618{
1da177e4
LT		 1619 int ret;
1620 u8 data[4];
1621 u32 div;
1622 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1623
1624 if ((params->frequency < 950000) || (params->frequency > 2150000))
1625 return -EINVAL;
1626
1627 div = (params->frequency + (125 - 1)) / 125; // round correctly
1628 data[0] = (div >> 8) & 0x7f;
1629 data[1] = div & 0xff;
1630 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1631 data[3] = 0xC4;
1632
1633 if (params->frequency > 1530000) data[3] = 0xc0;
1634
cfbfce15 1635 ret = i2c_transfer(i2c, &msg, 1);
1da177e4
LT		 1636 if (ret != 1)
1637 return -EIO;
1638 return 0;
1639}
1640
1641static struct stv0299_config alps_bsru6_config = {
1642
1643 .demod_address = 0x68,
1644 .inittab = alps_bsru6_inittab,
1645 .mclk = 88000000UL,
1646 .invert = 1,
1da177e4
LT		 1647 .skip_reinit = 0,
1648 .lock_output = STV0229_LOCKOUTPUT_1,
1649 .volt13_op0_op1 = STV0299_VOLT13_OP1,
1650 .min_delay_ms = 100,
1651 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1652 .pll_set = alps_bsru6_pll_set,
1653};
1654
1655
3dfaebda
JS		 1656static u8 alps_bsbe1_inittab[] = {
1657 0x01, 0x15,
1658 0x02, 0x30,
1659 0x03, 0x00,
1660 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1661 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1662 0x06, 0x40, /* DAC not used, set to high impendance mode */
1663 0x07, 0x00, /* DAC LSB */
1664 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1665 0x09, 0x00, /* FIFO */
1666 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1667 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1668 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1669 0x10, 0x3f, // AGC2 0x3d
1670 0x11, 0x84,
ff29d06a 1671 0x12, 0xb9,
3dfaebda
JS		 1672 0x15, 0xc9, // lock detector threshold
1673 0x16, 0x00,
1674 0x17, 0x00,
1675 0x18, 0x00,
1676 0x19, 0x00,
1677 0x1a, 0x00,
1678 0x1f, 0x50,
1679 0x20, 0x00,
1680 0x21, 0x00,
1681 0x22, 0x00,
1682 0x23, 0x00,
1683 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1684 0x29, 0x1e, // 1/2 threshold
1685 0x2a, 0x14, // 2/3 threshold
1686 0x2b, 0x0f, // 3/4 threshold
1687 0x2c, 0x09, // 5/6 threshold
1688 0x2d, 0x05, // 7/8 threshold
1689 0x2e, 0x01,
1690 0x31, 0x1f, // test all FECs
1691 0x32, 0x19, // viterbi and synchro search
1692 0x33, 0xfc, // rs control
1693 0x34, 0x93, // error control
1694 0x0f, 0x92,
1695 0xff, 0xff
1696};
1697
cfbfce15 1698static int alps_bsbe1_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
3dfaebda 1699{
3dfaebda
JS		 1700 int ret;
1701 u8 data[4];
1702 u32 div;
1703 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1704
1705 if ((params->frequency < 950000) || (params->frequency > 2150000))
1706 return -EINVAL;
1707
1708 div = (params->frequency + (125 - 1)) / 125; // round correctly
1709 data[0] = (div >> 8) & 0x7f;
1710 data[1] = div & 0xff;
1711 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1712 data[3] = (params->frequency > 1530000) ? 0xE0 : 0xE4;
1713
cfbfce15 1714 ret = i2c_transfer(i2c, &msg, 1);
3dfaebda
JS		 1715 return (ret != 1) ? -EIO : 0;
1716}
1717
1718static struct stv0299_config alps_bsbe1_config = {
1719 .demod_address = 0x68,
1720 .inittab = alps_bsbe1_inittab,
1721 .mclk = 88000000UL,
1722 .invert = 1,
3dfaebda
JS		 1723 .skip_reinit = 0,
1724 .min_delay_ms = 100,
1725 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1726 .pll_set = alps_bsbe1_pll_set,
1727};
1728
1729static int lnbp21_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
1730{
1731 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1732 int ret;
1733 u8 data[1];
1734 struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = data, .len = sizeof(data) };
1735
1736 switch(voltage) {
1737 case SEC_VOLTAGE_OFF:
1738 data[0] = 0x00;
1739 break;
1740 case SEC_VOLTAGE_13:
1741 data[0] = 0x44;
1742 break;
1743 case SEC_VOLTAGE_18:
1744 data[0] = 0x4c;
1745 break;
1746 default:
1747 return -EINVAL;
1748 };
1749
1750 ret = i2c_transfer(&av7110->i2c_adap, &msg, 1);
1751 return (ret != 1) ? -EIO : 0;
1752}
1753
1da177e4
LT		 1754
1755static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1756{
1757 struct av7110* av7110 = fe->dvb->priv;
1758 u32 div;
1759 u8 data[4];
1760 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1761
1762 div = (params->frequency + 35937500 + 31250) / 62500;
1763
1764 data[0] = (div >> 8) & 0x7f;
1765 data[1] = div & 0xff;
1766 data[2] = 0x85 | ((div >> 10) & 0x60);
1767 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81);
1768
1769 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1770 return -EIO;
1771 return 0;
1772}
1773
1774static struct ves1820_config alps_tdbe2_config = {
1775 .demod_address = 0x09,
1776 .xin = 57840000UL,
1777 .invert = 1,
1778 .selagc = VES1820_SELAGC_SIGNAMPERR,
1779 .pll_set = alps_tdbe2_pll_set,
1780};
1781
1782
1783
1784
1785static int grundig_29504_451_pll_set(struct dvb_frontend* fe,
1786 struct dvb_frontend_parameters* params)
1787{
1788 struct av7110* av7110 = fe->dvb->priv;
1789 u32 div;
1790 u8 data[4];
1791 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1792
1793 div = params->frequency / 125;
1794 data[0] = (div >> 8) & 0x7f;
1795 data[1] = div & 0xff;
1796 data[2] = 0x8e;
1797 data[3] = 0x00;
1798
1799 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1800 return -EIO;
1801 return 0;
1802}
1803
1804static struct tda8083_config grundig_29504_451_config = {
1805 .demod_address = 0x68,
1806 .pll_set = grundig_29504_451_pll_set,
1807};
1808
1809
1810
1811static int philips_cd1516_pll_set(struct dvb_frontend* fe,
1812 struct dvb_frontend_parameters* params)
1813{
1814 struct av7110* av7110 = fe->dvb->priv;
1815 u32 div;
1816 u32 f = params->frequency;
1817 u8 data[4];
1818 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1819
1820 div = (f + 36125000 + 31250) / 62500;
1821
1822 data[0] = (div >> 8) & 0x7f;
1823 data[1] = div & 0xff;
1824 data[2] = 0x8e;
1825 data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
1826
1827 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1828 return -EIO;
1829 return 0;
1830}
1831
1832static struct ves1820_config philips_cd1516_config = {
1833 .demod_address = 0x09,
1834 .xin = 57840000UL,
1835 .invert = 1,
1836 .selagc = VES1820_SELAGC_SIGNAMPERR,
1837 .pll_set = philips_cd1516_pll_set,
1838};
1839
1840
1841
1842static int alps_tdlb7_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1843{
1844 struct av7110* av7110 = fe->dvb->priv;
1845 u32 div, pwr;
1846 u8 data[4];
1847 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1848
1849 div = (params->frequency + 36200000) / 166666;
1850
1851 if (params->frequency <= 782000000)
1852 pwr = 1;
1853 else
1854 pwr = 2;
1855
1856 data[0] = (div >> 8) & 0x7f;
1857 data[1] = div & 0xff;
1858 data[2] = 0x85;
1859 data[3] = pwr << 6;
1860
1861 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1862 return -EIO;
1863 return 0;
1864}
1865
1866static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
1867{
1868 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1869
1870 return request_firmware(fw, name, &av7110->dev->pci->dev);
1871}
1872
1873static struct sp8870_config alps_tdlb7_config = {
1874
1875 .demod_address = 0x71,
1876 .pll_set = alps_tdlb7_pll_set,
1877 .request_firmware = alps_tdlb7_request_firmware,
1878};
1879
1880
dc27a169
AQ		 1881static u8 nexusca_stv0297_inittab[] = {
1882 0x80, 0x01,
1883 0x80, 0x00,
1884 0x81, 0x01,
1885 0x81, 0x00,
1886 0x00, 0x09,
1887 0x01, 0x69,
1888 0x03, 0x00,
1889 0x04, 0x00,
1890 0x07, 0x00,
1891 0x08, 0x00,
1892 0x20, 0x00,
1893 0x21, 0x40,
1894 0x22, 0x00,
1895 0x23, 0x00,
1896 0x24, 0x40,
1897 0x25, 0x88,
1898 0x30, 0xff,
1899 0x31, 0x00,
1900 0x32, 0xff,
1901 0x33, 0x00,
1902 0x34, 0x50,
1903 0x35, 0x7f,
1904 0x36, 0x00,
1905 0x37, 0x20,
1906 0x38, 0x00,
1907 0x40, 0x1c,
1908 0x41, 0xff,
1909 0x42, 0x29,
1910 0x43, 0x00,
1911 0x44, 0xff,
1912 0x45, 0x00,
1913 0x46, 0x00,
1914 0x49, 0x04,
1915 0x4a, 0x00,
1916 0x4b, 0x7b,
1917 0x52, 0x30,
1918 0x55, 0xae,
1919 0x56, 0x47,
1920 0x57, 0xe1,
1921 0x58, 0x3a,
1922 0x5a, 0x1e,
1923 0x5b, 0x34,
1924 0x60, 0x00,
1925 0x63, 0x00,
1926 0x64, 0x00,
1927 0x65, 0x00,
1928 0x66, 0x00,
1929 0x67, 0x00,
1930 0x68, 0x00,
1931 0x69, 0x00,
1932 0x6a, 0x02,
1933 0x6b, 0x00,
1934 0x70, 0xff,
1935 0x71, 0x00,
1936 0x72, 0x00,
1937 0x73, 0x00,
1938 0x74, 0x0c,
1939 0x80, 0x00,
1940 0x81, 0x00,
1941 0x82, 0x00,
1942 0x83, 0x00,
1943 0x84, 0x04,
1944 0x85, 0x80,
1945 0x86, 0x24,
1946 0x87, 0x78,
1947 0x88, 0x10,
1948 0x89, 0x00,
1949 0x90, 0x01,
1950 0x91, 0x01,
1951 0xa0, 0x04,
1952 0xa1, 0x00,
1953 0xa2, 0x00,
1954 0xb0, 0x91,
1955 0xb1, 0x0b,
1956 0xc0, 0x53,
1957 0xc1, 0x70,
1958 0xc2, 0x12,
1959 0xd0, 0x00,
1960 0xd1, 0x00,
1961 0xd2, 0x00,
1962 0xd3, 0x00,
1963 0xd4, 0x00,
1964 0xd5, 0x00,
1965 0xde, 0x00,
1966 0xdf, 0x00,
1967 0x61, 0x49,
1968 0x62, 0x0b,
1969 0x53, 0x08,
1970 0x59, 0x08,
1971 0xff, 0xff,
1972};
1da177e4
LT		 1973
1974static int nexusca_stv0297_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1975{
1976 struct av7110* av7110 = fe->dvb->priv;
1977 u32 div;
1978 u8 data[4];
1979 struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
1980 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1981 int i;
1982
1983 div = (params->frequency + 36150000 + 31250) / 62500;
1984
1985 data[0] = (div >> 8) & 0x7f;
1986 data[1] = div & 0xff;
1987 data[2] = 0xce;
1988
1989 if (params->frequency < 45000000)
1990 return -EINVAL;
1991 else if (params->frequency < 137000000)
1992 data[3] = 0x01;
1993 else if (params->frequency < 403000000)
1994 data[3] = 0x02;
1995 else if (params->frequency < 860000000)
1996 data[3] = 0x04;
1997 else
1998 return -EINVAL;
1999
2000 stv0297_enable_plli2c(fe);
2001 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
2002 printk("nexusca: pll transfer failed!\n");
2003 return -EIO;
2004 }
2005
2006 // wait for PLL lock
2007 for(i = 0; i < 20; i++) {
2008
2009 stv0297_enable_plli2c(fe);
2010 if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
2011 if (data[0] & 0x40) break;
2012 msleep(10);
2013 }
2014
2015 return 0;
2016}
2017
2018static struct stv0297_config nexusca_stv0297_config = {
2019
2020 .demod_address = 0x1C,
dc27a169 2021 .inittab = nexusca_stv0297_inittab,
1da177e4
LT		 2022 .invert = 1,
2023 .pll_set = nexusca_stv0297_pll_set,
2024};
2025
2026
2027
2028static int grundig_29504_401_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2029{
2030 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
2031 u32 div;
2032 u8 cfg, cpump, band_select;
2033 u8 data[4];
2034 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
2035
2036 div = (36125000 + params->frequency) / 166666;
2037
2038 cfg = 0x88;
2039
2040 if (params->frequency < 175000000) cpump = 2;
2041 else if (params->frequency < 390000000) cpump = 1;
2042 else if (params->frequency < 470000000) cpump = 2;
2043 else if (params->frequency < 750000000) cpump = 1;
2044 else cpump = 3;
2045
2046 if (params->frequency < 175000000) band_select = 0x0e;
2047 else if (params->frequency < 470000000) band_select = 0x05;
2048 else band_select = 0x03;
2049
2050 data[0] = (div >> 8) & 0x7f;
2051 data[1] = div & 0xff;
2052 data[2] = ((div >> 10) & 0x60) | cfg;
2053 data[3] = (cpump << 6) | band_select;
2054
2055 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
2056 return 0;
2057}
2058
2059static struct l64781_config grundig_29504_401_config = {
2060 .demod_address = 0x55,
2061 .pll_set = grundig_29504_401_pll_set,
2062};
2063
2064
2065
ce18a223 2066static int av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status)
1da177e4 2067{
ce18a223 2068 int ret = 0;
1da177e4
LT		 2069 int synced = (status & FE_HAS_LOCK) ? 1 : 0;
2070
2071 av7110->fe_status = status;
2072
2073 if (av7110->fe_synced == synced)
ce18a223 2074 return 0;
1da177e4 2075
1da177e4 2076 if (av7110->playing)
ce18a223 2077 return 0;
1da177e4
LT		 2078
2079 if (down_interruptible(&av7110->pid_mutex))
ce18a223 2080 return -ERESTARTSYS;
1da177e4 2081
34612157 2082 if (synced) {
ce18a223 2083 ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
1da177e4
LT		 2084 av7110->pids[DMX_PES_AUDIO],
2085 av7110->pids[DMX_PES_TELETEXT], 0,
2086 av7110->pids[DMX_PES_PCR]);
ce18a223
WR		 2087 if (!ret)
2088 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
1da177e4 2089 } else {
ce18a223
WR		 2090 ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
2091 if (!ret) {
2092 ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
2093 if (!ret)
2094 ret = av7110_wait_msgstate(av7110, GPMQBusy);
2095 }
1da177e4
LT		 2096 }
2097
34612157
OE		 2098 if (!ret)
2099 av7110->fe_synced = synced;
2100
1da177e4 2101 up(&av7110->pid_mutex);
ce18a223 2102 return ret;
1da177e4
LT		 2103}
2104
2105static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2106{
2107 struct av7110* av7110 = fe->dvb->priv;
ce18a223
WR		 2108
2109 int ret = av7110_fe_lock_fix(av7110, 0);
2110 if (!ret)
2111 ret = av7110->fe_set_frontend(fe, params);
2112 return ret;
1da177e4
LT		 2113}
2114
2115static int av7110_fe_init(struct dvb_frontend* fe)
2116{
2117 struct av7110* av7110 = fe->dvb->priv;
2118
ce18a223
WR		 2119 int ret = av7110_fe_lock_fix(av7110, 0);
2120 if (!ret)
2121 ret = av7110->fe_init(fe);
2122 return ret;
1da177e4
LT		 2123}
2124
2125static int av7110_fe_read_status(struct dvb_frontend* fe, fe_status_t* status)
2126{
2127 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 2128
2129 /* call the real implementation */
ce18a223
WR		 2130 int ret = av7110->fe_read_status(fe, status);
2131 if (!ret)
2132 if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
2133 ret = av7110_fe_lock_fix(av7110, *status);
2134 return ret;
1da177e4
LT		 2135}
2136
2137static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
2138{
2139 struct av7110* av7110 = fe->dvb->priv;
2140
ce18a223
WR		 2141 int ret = av7110_fe_lock_fix(av7110, 0);
2142 if (!ret)
2143 ret = av7110->fe_diseqc_reset_overload(fe);
2144 return ret;
1da177e4
LT		 2145}
2146
2147static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
2148 struct dvb_diseqc_master_cmd* cmd)
2149{
2150 struct av7110* av7110 = fe->dvb->priv;
2151
ce18a223
WR		 2152 int ret = av7110_fe_lock_fix(av7110, 0);
2153 if (!ret)
2154 ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
2155 return ret;
1da177e4
LT		 2156}
2157
2158static int av7110_fe_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
2159{
2160 struct av7110* av7110 = fe->dvb->priv;
2161
ce18a223
WR		 2162 int ret = av7110_fe_lock_fix(av7110, 0);
2163 if (!ret)
2164 ret = av7110->fe_diseqc_send_burst(fe, minicmd);
2165 return ret;
1da177e4
LT		 2166}
2167
2168static int av7110_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
2169{
2170 struct av7110* av7110 = fe->dvb->priv;
2171
ce18a223
WR		 2172 int ret = av7110_fe_lock_fix(av7110, 0);
2173 if (!ret)
2174 ret = av7110->fe_set_tone(fe, tone);
2175 return ret;
1da177e4
LT		 2176}
2177
2178static int av7110_fe_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
2179{
2180 struct av7110* av7110 = fe->dvb->priv;
2181
ce18a223
WR		 2182 int ret = av7110_fe_lock_fix(av7110, 0);
2183 if (!ret)
2184 ret = av7110->fe_set_voltage(fe, voltage);
2185 return ret;
1da177e4
LT		 2186}
2187
2188static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned int cmd)
2189{
2190 struct av7110* av7110 = fe->dvb->priv;
2191
ce18a223
WR		 2192 int ret = av7110_fe_lock_fix(av7110, 0);
2193 if (!ret)
2194 ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
2195 return ret;
1da177e4
LT		 2196}
2197
2198static u8 read_pwm(struct av7110* av7110)
2199{
2200 u8 b = 0xff;
2201 u8 pwm;
2202 struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
2203 { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
2204
2205 if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
2206 pwm = 0x48;
2207
2208 return pwm;
2209}
2210
2211static int frontend_init(struct av7110 *av7110)
2212{
2213 int ret;
2214
2215 if (av7110->dev->pci->subsystem_vendor == 0x110a) {
2216 switch(av7110->dev->pci->subsystem_device) {
2217 case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
2218 av7110->fe = ves1820_attach(&philips_cd1516_config,
2219 &av7110->i2c_adap, read_pwm(av7110));
2220 break;
2221 }
2222
2223 } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
2224 switch(av7110->dev->pci->subsystem_device) {
2225 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
2226 case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
2227 case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
2228
2229 // try the ALPS BSRV2 first of all
2230 av7110->fe = ves1x93_attach(&alps_bsrv2_config, &av7110->i2c_adap);
2231 if (av7110->fe) {
2232 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2233 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2234 av7110->fe->ops->set_tone = av7110_set_tone;
2235 break;
2236 }
2237
2238 // try the ALPS BSRU6 now
2239 av7110->fe = stv0299_attach(&alps_bsru6_config, &av7110->i2c_adap);
2240 if (av7110->fe) {
2241 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2242 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2243 av7110->fe->ops->set_tone = av7110_set_tone;
2244 break;
2245 }
2246
2247 // Try the grundig 29504-451
2248 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
2249 if (av7110->fe) {
2250 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2251 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2252 av7110->fe->ops->set_tone = av7110_set_tone;
2253 break;
2254 }
2255
2256 /* Try DVB-C cards */
2257 switch(av7110->dev->pci->subsystem_device) {
2258 case 0x0000:
2259 /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
2260 av7110->fe = ves1820_attach(&philips_cd1516_config, &av7110->i2c_adap,
2261 read_pwm(av7110));
2262 break;
2263 case 0x0003:
2264 /* Haupauge DVB-C 2.1 VES1820/ALPS TDBE2 */
2265 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap,
2266 read_pwm(av7110));
2267 break;
2268 }
2269 break;
2270
2271 case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
2272
2273 // ALPS TDLB7
2274 av7110->fe = sp8870_attach(&alps_tdlb7_config, &av7110->i2c_adap);
2275 break;
2276
2277 case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
2278
2279 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
2280 break;
2281
2282 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
2283 /* Grundig 29504-451 */
2284 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
2285 if (av7110->fe) {
2286 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2287 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2288 av7110->fe->ops->set_tone = av7110_set_tone;
2289 }
2290 break;
2291
2292 case 0x0008: // Hauppauge/TT DVB-T
2293
2294 av7110->fe = l64781_attach(&grundig_29504_401_config, &av7110->i2c_adap);
2295 break;
2296
2297 case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
2298
dc27a169 2299 av7110->fe = stv0297_attach(&nexusca_stv0297_config, &av7110->i2c_adap);
1da177e4
LT		 2300 if (av7110->fe) {
2301 /* set TDA9819 into DVB mode */
2302 saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9198 pin9(STD)
2303 saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9198 pin30(VIF)
2304
2305 /* tuner on this needs a slower i2c bus speed */
2306 av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
2307 break;
2308 }
3dfaebda
JS		 2309 break;
2310
2311 case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
2312 /* ALPS BSBE1 */
2313 av7110->fe = stv0299_attach(&alps_bsbe1_config, &av7110->i2c_adap);
2314 if (av7110->fe)
2315 av7110->fe->ops->set_voltage = lnbp21_set_voltage;
2316 break;
1da177e4
LT		 2317 }
2318 }
2319
2320 if (!av7110->fe) {
2321 /* FIXME: propagate the failure code from the lower layers */
2322 ret = -ENOMEM;
2323 printk("dvb-ttpci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
2324 av7110->dev->pci->vendor,
2325 av7110->dev->pci->device,
2326 av7110->dev->pci->subsystem_vendor,
2327 av7110->dev->pci->subsystem_device);
2328 } else {
2329 FE_FUNC_OVERRIDE(av7110->fe->ops->init, av7110->fe_init, av7110_fe_init);
2330 FE_FUNC_OVERRIDE(av7110->fe->ops->read_status, av7110->fe_read_status, av7110_fe_read_status);
2331 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
2332 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
2333 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
2334 FE_FUNC_OVERRIDE(av7110->fe->ops->set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
2335 FE_FUNC_OVERRIDE(av7110->fe->ops->set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage;)
2336 FE_FUNC_OVERRIDE(av7110->fe->ops->dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
2337 FE_FUNC_OVERRIDE(av7110->fe->ops->set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
2338
fdc53a6d 2339 ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
1da177e4
LT		 2340 if (ret < 0) {
2341 printk("av7110: Frontend registration failed!\n");
2342 if (av7110->fe->ops->release)
2343 av7110->fe->ops->release(av7110->fe);
2344 av7110->fe = NULL;
2345 }
2346 }
2347 return ret;
2348}
2349
2350/* Budgetpatch note:
2351 * Original hardware design by Roberto Deza:
2352 * There is a DVB_Wiki at
2353 * http://212.227.36.83/linuxtv/wiki/index.php/Main_Page
2354 * where is described this 'DVB TT Budget Patch', on Card Modding:
2355 * http://212.227.36.83/linuxtv/wiki/index.php/DVB_TT_Budget_Patch
2356 * On the short description there is also a link to a external file,
2357 * with more details:
2358 * http://perso.wanadoo.es/jesussolano/Ttf_tsc1.zip
2359 *
2360 * New software triggering design by Emard that works on
2361 * original Roberto Deza's hardware:
2362 *
2363 * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
2364 * GPIO3 is in budget-patch hardware connectd to port B VSYNC
2365 * HS is an internal event of 7146, accessible with RPS
2366 * and temporarily raised high every n lines
2367 * (n in defined in the RPS_THRESH1 counter threshold)
2368 * I think HS is raised high on the beginning of the n-th line
2369 * and remains high until this n-th line that triggered
2370 * it is completely received. When the receiption of n-th line
2371 * ends, HS is lowered.
2372 *
2373 * To transmit data over DMA, 7146 needs changing state at
2374 * port B VSYNC pin. Any changing of port B VSYNC will
2375 * cause some DMA data transfer, with more or less packets loss.
2376 * It depends on the phase and frequency of VSYNC and
2377 * the way of 7146 is instructed to trigger on port B (defined
2378 * in DD1_INIT register, 3rd nibble from the right valid
2379 * numbers are 0-7, see datasheet)
2380 *
2381 * The correct triggering can minimize packet loss,
2382 * dvbtraffic should give this stable bandwidths:
2383 * 22k transponder = 33814 kbit/s
2384 * 27.5k transponder = 38045 kbit/s
2385 * by experiment it is found that the best results
2386 * (stable bandwidths and almost no packet loss)
2387 * are obtained using DD1_INIT triggering number 2
2388 * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
2389 * and a VSYNC phase that occurs in the middle of DMA transfer
2390 * (about byte 188*512=96256 in the DMA window).
2391 *
2392 * Phase of HS is still not clear to me how to control,
2393 * It just happens to be so. It can be seen if one enables
2394 * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
2395 * time RPS_INTERRUPT is called, the Event Counter 1 will
2396 * increment. That's how the 7146 is programmed to do event
2397 * counting in this budget-patch.c
2398 * I *think* HPS setting has something to do with the phase
2399 * of HS but I cant be 100% sure in that.
2400 *
2401 * hardware debug note: a working budget card (including budget patch)
2402 * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
2403 * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
2404 * and that means 3*25=75 Hz of interrupt freqency, as seen by
2405 * watch cat /proc/interrupts
2406 *
2407 * If this frequency is 3x lower (and data received in the DMA
2408 * buffer don't start with 0x47, but in the middle of packets,
2409 * whose lengths appear to be like 188 292 188 104 etc.
2410 * this means VSYNC line is not connected in the hardware.
2411 * (check soldering pcb and pins)
2412 * The same behaviour of missing VSYNC can be duplicated on budget
2413 * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
2414 */
2415static int av7110_attach(struct saa7146_dev* dev, struct saa7146_pci_extension_data *pci_ext)
2416{
2417 const int length = TS_WIDTH * TS_HEIGHT;
2418 struct pci_dev *pdev = dev->pci;
2419 struct av7110 *av7110;
2420 int ret, count = 0;
2421
2422 dprintk(4, "dev: %p\n", dev);
2423
2424 /* Set RPS_IRQ to 1 to track rps1 activity.
2425 * Enabling this won't send any interrupt to PC CPU.
2426 */
2427#define RPS_IRQ 0
2428
2429 if (budgetpatch == 1) {
2430 budgetpatch = 0;
2431 /* autodetect the presence of budget patch
2432 * this only works if saa7146 has been recently
2433 * reset with with MASK_31 to MC1
2434 *
2435 * will wait for VBI_B event (vertical blank at port B)
2436 * and will reset GPIO3 after VBI_B is detected.
2437 * (GPIO3 should be raised high by CPU to
2438 * test if GPIO3 will generate vertical blank signal
2439 * in budget patch GPIO3 is connected to VSYNC_B
2440 */
2441
2442 /* RESET SAA7146 */
2443 saa7146_write(dev, MC1, MASK_31);
2444 /* autodetection success seems to be time-dependend after reset */
2445
2446 /* Fix VSYNC level */
2447 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2448 /* set vsync_b triggering */
2449 saa7146_write(dev, DD1_STREAM_B, 0);
2450 /* port B VSYNC at rising edge */
2451 saa7146_write(dev, DD1_INIT, 0x00000200);
2452 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
2453 saa7146_write(dev, MC2,
2454 1 * (MASK_08 | MASK_24) | // BRS control
2455 0 * (MASK_09 | MASK_25) | // a
2456 1 * (MASK_10 | MASK_26) | // b
2457 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
2458 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
2459 0 * (MASK_01 | MASK_15) // DEBI
2460 );
2461
2462 /* start writing RPS1 code from beginning */
2463 count = 0;
2464 /* Disable RPS1 */
2465 saa7146_write(dev, MC1, MASK_29);
2466 /* RPS1 timeout disable */
2467 saa7146_write(dev, RPS_TOV1, 0);
2468 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
2469 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2470 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2471 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2472#if RPS_IRQ
2473 /* issue RPS1 interrupt to increment counter */
2474 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2475#endif
2476 WRITE_RPS1(cpu_to_le32(CMD_STOP));
2477 /* Jump to begin of RPS program as safety measure (p37) */
2478 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2479 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2480
2481#if RPS_IRQ
2482 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2483 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2484 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2485 */
2486 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2487 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2488 saa7146_write(dev, ECT1R, 0x3fff );
2489#endif
2490 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2491 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2492 /* Enable RPS1, (rFC p33) */
2493 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
2494
2495 mdelay(10);
2496 /* now send VSYNC_B to rps1 by rising GPIO3 */
2497 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
2498 mdelay(10);
2499 /* if rps1 responded by lowering the GPIO3,
2500 * then we have budgetpatch hardware
2501 */
2502 if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
2503 budgetpatch = 1;
2504 printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
2505 }
2506 /* Disable RPS1 */
2507 saa7146_write(dev, MC1, ( MASK_29 ));
2508#if RPS_IRQ
2509 printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
2510#endif
2511 }
2512
2513 /* prepare the av7110 device struct */
2514 av7110 = kmalloc(sizeof(struct av7110), GFP_KERNEL);
2515 if (!av7110) {
2516 dprintk(1, "out of memory\n");
2517 return -ENOMEM;
2518 }
2519
2520 memset(av7110, 0, sizeof(struct av7110));
2521
2522 av7110->card_name = (char*) pci_ext->ext_priv;
2523 av7110->dev = dev;
2524 dev->ext_priv = av7110;
2525
2526 ret = get_firmware(av7110);
2527 if (ret < 0)
2528 goto err_kfree_0;
2529
2530 ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
2531 THIS_MODULE);
2532 if (ret < 0)
2533 goto err_put_firmware_1;
2534
2535 /* the Siemens DVB needs this if you want to have the i2c chips
2536 get recognized before the main driver is fully loaded */
2537 saa7146_write(dev, GPIO_CTRL, 0x500000);
2538
2539#ifdef I2C_ADAP_CLASS_TV_DIGITAL
2540 av7110->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL;
2541#else
2542 av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
2543#endif
2544 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
2545
2546 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
2547
2548 ret = i2c_add_adapter(&av7110->i2c_adap);
2549 if (ret < 0)
2550 goto err_dvb_unregister_adapter_2;
2551
2552 ttpci_eeprom_parse_mac(&av7110->i2c_adap,
fdc53a6d 2553 av7110->dvb_adapter.proposed_mac);
1da177e4
LT		 2554 ret = -ENOMEM;
2555
2556 if (budgetpatch) {
2557 spin_lock_init(&av7110->feedlock1);
2558 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2559 &av7110->pt);
2560 if (!av7110->grabbing)
2561 goto err_i2c_del_3;
2562
2563 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
2564 saa7146_write(dev, BCS_CTRL, 0x80400040);
2565 /* set dd1 stream a & b */
2566 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2567 saa7146_write(dev, DD1_INIT, 0x03000200);
2568 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2569 saa7146_write(dev, BRS_CTRL, 0x60000000);
2570 saa7146_write(dev, BASE_ODD3, 0);
2571 saa7146_write(dev, BASE_EVEN3, 0);
2572 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2573 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2574
2575 saa7146_write(dev, PITCH3, TS_WIDTH);
2576 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2577
2578 /* upload all */
2579 saa7146_write(dev, MC2, 0x077c077c);
2580 saa7146_write(dev, GPIO_CTRL, 0x000000);
2581#if RPS_IRQ
2582 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2583 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2584 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2585 */
2586 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2587 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2588 saa7146_write(dev, ECT1R, 0x3fff );
2589#endif
2590 /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
2591 count = 0;
2592
2593 /* Wait Source Line Counter Threshold (p36) */
2594 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
2595 /* Set GPIO3=1 (p42) */
2596 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2597 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2598 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
2599#if RPS_IRQ
2600 /* issue RPS1 interrupt */
2601 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2602#endif
2603 /* Wait reset Source Line Counter Threshold (p36) */
2604 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
2605 /* Set GPIO3=0 (p42) */
2606 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2607 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2608 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2609#if RPS_IRQ
2610 /* issue RPS1 interrupt */
2611 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2612#endif
2613 /* Jump to begin of RPS program (p37) */
2614 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2615 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2616
2617 /* Fix VSYNC level */
2618 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2619 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2620 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2621 /* Set Source Line Counter Threshold, using BRS (rCC p43)
2622 * It generates HS event every TS_HEIGHT lines
2623 * this is related to TS_WIDTH set in register
2624 * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
2625 * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
2626 * then RPS_THRESH1 should be set to trigger
2627 * every TS_HEIGHT (512) lines.
2628 */
2629 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
2630
2631 /* Enable RPS1 (rFC p33) */
2632 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2633
2634 /* end of budgetpatch register initialization */
2635 tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
2636 } else {
2637 saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
2638 saa7146_write(dev, BCS_CTRL, 0x80400040);
2639
2640 /* set dd1 stream a & b */
2641 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2642 saa7146_write(dev, DD1_INIT, 0x03000000);
2643 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2644
2645 /* upload all */
2646 saa7146_write(dev, MC2, 0x077c077c);
2647 saa7146_write(dev, GPIO_CTRL, 0x000000);
2648 }
2649
2650 tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
2651 tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
2652
2653 sema_init(&av7110->pid_mutex, 1);
2654
2655 /* locks for data transfers from/to AV7110 */
2656 spin_lock_init(&av7110->debilock);
2657 sema_init(&av7110->dcomlock, 1);
2658 av7110->debitype = -1;
2659
2660 /* default OSD window */
2661 av7110->osdwin = 1;
2662 sema_init(&av7110->osd_sema, 1);
2663
2664 /* ARM "watchdog" */
2665 init_waitqueue_head(&av7110->arm_wait);
2666 av7110->arm_thread = NULL;
2667
2668 /* allocate and init buffers */
2669 av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
2670 if (!av7110->debi_virt)
2671 goto err_saa71466_vfree_4;
2672
2673
2674 av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
2675 if (!av7110->iobuf)
2676 goto err_pci_free_5;
2677
2678 ret = av7110_av_init(av7110);
2679 if (ret < 0)
2680 goto err_iobuf_vfree_6;
2681
2682 /* init BMP buffer */
2683 av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
2684 init_waitqueue_head(&av7110->bmpq);
2685
2686 ret = av7110_ca_init(av7110);
2687 if (ret < 0)
2688 goto err_av7110_av_exit_7;
2689
2690 /* load firmware into AV7110 cards */
2691 ret = av7110_bootarm(av7110);
2692 if (ret < 0)
2693 goto err_av7110_ca_exit_8;
2694
2695 ret = av7110_firmversion(av7110);
2696 if (ret < 0)
2697 goto err_stop_arm_9;
2698
2699 if (FW_VERSION(av7110->arm_app)<0x2501)
2700 printk ("dvb-ttpci: Warning, firmware version 0x%04x is too old. "
2701 "System might be unstable!\n", FW_VERSION(av7110->arm_app));
2702
2703 ret = kernel_thread(arm_thread, (void *) av7110, 0);
2704 if (ret < 0)
2705 goto err_stop_arm_9;
2706
2707 /* set initial volume in mixer struct */
2708 av7110->mixer.volume_left = volume;
2709 av7110->mixer.volume_right = volume;
2710
2711 init_av7110_av(av7110);
2712
2713 ret = av7110_register(av7110);
2714 if (ret < 0)
2715 goto err_arm_thread_stop_10;
2716
2717 /* special case DVB-C: these cards have an analog tuner
2718 plus need some special handling, so we have separate
2719 saa7146_ext_vv data for these... */
2720 ret = av7110_init_v4l(av7110);
2721 if (ret < 0)
2722 goto err_av7110_unregister_11;
2723
fdc53a6d 2724 av7110->dvb_adapter.priv = av7110;
1da177e4
LT		 2725 ret = frontend_init(av7110);
2726 if (ret < 0)
2727 goto err_av7110_exit_v4l_12;
2728
2729#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
03388ae3 2730 av7110_ir_init(av7110);
1da177e4
LT		 2731#endif
2732 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
2733 av7110_num++;
2734out:
2735 return ret;
2736
2737err_av7110_exit_v4l_12:
2738 av7110_exit_v4l(av7110);
2739err_av7110_unregister_11:
2740 dvb_unregister(av7110);
2741err_arm_thread_stop_10:
2742 av7110_arm_sync(av7110);
2743err_stop_arm_9:
2744 /* Nothing to do. Rejoice. */
2745err_av7110_ca_exit_8:
2746 av7110_ca_exit(av7110);
2747err_av7110_av_exit_7:
2748 av7110_av_exit(av7110);
2749err_iobuf_vfree_6:
2750 vfree(av7110->iobuf);
2751err_pci_free_5:
2752 pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
2753err_saa71466_vfree_4:
2754 if (!av7110->grabbing)
2755 saa7146_pgtable_free(pdev, &av7110->pt);
2756err_i2c_del_3:
2757 i2c_del_adapter(&av7110->i2c_adap);
2758err_dvb_unregister_adapter_2:
fdc53a6d 2759 dvb_unregister_adapter(&av7110->dvb_adapter);
1da177e4
LT		 2760err_put_firmware_1:
2761 put_firmware(av7110);
2762err_kfree_0:
2763 kfree(av7110);
2764 goto out;
2765}
2766
2767static int av7110_detach(struct saa7146_dev* saa)
2768{
2769 struct av7110 *av7110 = saa->ext_priv;
2770 dprintk(4, "%p\n", av7110);
2771
03388ae3
OE		 2772#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
2773 av7110_ir_exit(av7110);
2774#endif
1da177e4
LT		 2775 if (budgetpatch) {
2776 /* Disable RPS1 */
2777 saa7146_write(saa, MC1, MASK_29);
2778 /* VSYNC LOW (inactive) */
2779 saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
2780 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
2781 SAA7146_IER_DISABLE(saa, MASK_10);
2782 SAA7146_ISR_CLEAR(saa, MASK_10);
2783 msleep(50);
2784 tasklet_kill(&av7110->vpe_tasklet);
2785 saa7146_pgtable_free(saa->pci, &av7110->pt);
2786 }
2787 av7110_exit_v4l(av7110);
2788
2789 av7110_arm_sync(av7110);
2790
2791 tasklet_kill(&av7110->debi_tasklet);
2792 tasklet_kill(&av7110->gpio_tasklet);
2793
2794 dvb_unregister(av7110);
2795
2796 SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
2797 SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
2798
2799 av7110_ca_exit(av7110);
2800 av7110_av_exit(av7110);
2801
2802 vfree(av7110->iobuf);
2803 pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
2804 av7110->debi_bus);
2805
2806 i2c_del_adapter(&av7110->i2c_adap);
2807
fdc53a6d 2808 dvb_unregister_adapter (&av7110->dvb_adapter);
1da177e4
LT		 2809
2810 av7110_num--;
2811
2812 put_firmware(av7110);
2813
2814 kfree(av7110);
2815
2816 saa->ext_priv = NULL;
2817
2818 return 0;
2819}
2820
2821
2822static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
2823{
2824 struct av7110 *av7110 = dev->ext_priv;
2825
2826 //print_time("av7110_irq");
2827
2828 /* Note: Don't try to handle the DEBI error irq (MASK_18), in
2829 * intel mode the timeout is asserted all the time...
2830 */
2831
2832 if (*isr & MASK_19) {
2833 //printk("av7110_irq: DEBI\n");
2834 /* Note 1: The DEBI irq is level triggered: We must enable it
2835 * only after we started a DMA xfer, and disable it here
2836 * immediately, or it will be signalled all the time while
2837 * DEBI is idle.
2838 * Note 2: You would think that an irq which is masked is
2839 * not signalled by the hardware. Not so for the SAA7146:
2840 * An irq is signalled as long as the corresponding bit
2841 * in the ISR is set, and disabling irqs just prevents the
2842 * hardware from setting the ISR bit. This means a) that we
2843 * must clear the ISR *after* disabling the irq (which is why
2844 * we must do it here even though saa7146_core did it already),
2845 * and b) that if we were to disable an edge triggered irq
2846 * (like the gpio irqs sadly are) temporarily we would likely
2847 * loose some. This sucks :-(
2848 */
2849 SAA7146_IER_DISABLE(av7110->dev, MASK_19);
2850 SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
2851 tasklet_schedule(&av7110->debi_tasklet);
2852 }
2853
2854 if (*isr & MASK_03) {
2855 //printk("av7110_irq: GPIO\n");
2856 tasklet_schedule(&av7110->gpio_tasklet);
2857 }
2858
2859 if ((*isr & MASK_10) && budgetpatch)
2860 tasklet_schedule(&av7110->vpe_tasklet);
2861}
2862
2863
2864static struct saa7146_extension av7110_extension;
2865
2866#define MAKE_AV7110_INFO(x_var,x_name) \
2867static struct saa7146_pci_extension_data x_var = { \
2868 .ext_priv = x_name, \
2869 .ext = &av7110_extension }
2870
6af4ee10 2871MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
1da177e4
LT		 2872MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
2873MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
2874MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
2875MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
3dfaebda 2876MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
1da177e4
LT		 2877MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
2878MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
2879MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
2880MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
2881
2882static struct pci_device_id pci_tbl[] = {
6af4ee10
KH		 2883 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
2884 MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
2885 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
2886 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
2887 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
2888 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
2889 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
2890 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
2891 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
2892 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
1da177e4
LT		 2893
2894/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0004), UNDEFINED CARD */ // Galaxis DVB PC-Sat-Carte
2895/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
2896/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
2897
2898 {
2899 .vendor = 0,
2900 }
2901};
2902
2903MODULE_DEVICE_TABLE(pci, pci_tbl);
2904
2905
2906static struct saa7146_extension av7110_extension = {
2907 .name = "dvb\0",
2908 .flags = SAA7146_I2C_SHORT_DELAY,
2909
2910 .module = THIS_MODULE,
2911 .pci_tbl = &pci_tbl[0],
2912 .attach = av7110_attach,
2913 .detach = av7110_detach,
2914
2915 .irq_mask = MASK_19 | MASK_03 | MASK_10,
2916 .irq_func = av7110_irq,
2917};
2918
2919
2920static int __init av7110_init(void)
2921{
2922 int retval;
2923 retval = saa7146_register_extension(&av7110_extension);
2924 return retval;
2925}
2926
2927
2928static void __exit av7110_exit(void)
2929{
1da177e4
LT		 2930 saa7146_unregister_extension(&av7110_extension);
2931}
2932
2933module_init(av7110_init);
2934module_exit(av7110_exit);
2935
2936MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by "
2937 "Siemens, Technotrend, Hauppauge");
2938MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
2939MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)