projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (6961): tda18271: move common code to tda18271-common.c
[linux-2.6-block.git] / drivers / media / dvb / frontends / tda18271-fe.c
CommitLineData
5bea1cd3 1/*
6ca04de3 2 tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
5bea1cd3 3
59067f7e 4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5bea1cd3
MK		 5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
5bea1cd3
MK		 21#include <linux/delay.h>
22#include <linux/videodev2.h>
6ca04de3 23#include "tda18271-priv.h"
5bea1cd3 24
b5f3e1e1 25int tda18271_debug;
54465b08 26module_param_named(debug, tda18271_debug, int, 0644);
293da0ec 27MODULE_PARM_DESC(debug, "set debug level (info=1, map=2, reg=4 (or-able))");
5bea1cd3 28
5bea1cd3
MK		 29/*---------------------------------------------------------------------*/
30
efce8410
MK		 31static int tda18271_init(struct dvb_frontend *fe)
32{
33 struct tda18271_priv *priv = fe->tuner_priv;
34 unsigned char *regs = priv->tda18271_regs;
35
36 tda18271_read_regs(fe);
37
38 /* test IR_CAL_OK to see if we need init */
39 if ((regs[R_EP1] & 0x08) == 0)
40 tda18271_init_regs(fe);
41
42 return 0;
43}
44
255b5113
MK		 45/* ------------------------------------------------------------------ */
46
47static int tda18271_channel_configuration(struct dvb_frontend *fe,
48 u32 ifc, u32 freq, u32 bw, u8 std)
49{
50 struct tda18271_priv *priv = fe->tuner_priv;
51 unsigned char *regs = priv->tda18271_regs;
52 u32 N;
53
54 /* update TV broadcast parameters */
55
56 /* set standard */
57 regs[R_EP3] &= ~0x1f; /* clear std bits */
58 regs[R_EP3] |= std;
59
60 /* set cal mode to normal */
61 regs[R_EP4] &= ~0x03;
62
63 /* update IF output level & IF notch frequency */
64 regs[R_EP4] &= ~0x1c; /* clear if level bits */
65
66 switch (priv->mode) {
67 case TDA18271_ANALOG:
68 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
69 break;
70 case TDA18271_DIGITAL:
71 regs[R_EP4] |= 0x04; /* IF level = 1 */
72 regs[R_MPD] |= 0x80; /* IF notch = 1 */
73 break;
74 }
75 regs[R_EP4] &= ~0x80; /* FM_RFn: turn this bit on only for fm radio */
76
77 /* update RF_TOP / IF_TOP */
78 switch (priv->mode) {
79 case TDA18271_ANALOG:
80 regs[R_EB22] = 0x2c;
81 break;
82 case TDA18271_DIGITAL:
83 regs[R_EB22] = 0x37;
84 break;
85 }
86 tda18271_write_regs(fe, R_EB22, 1);
87
88 /* --------------------------------------------------------------- */
89
90 /* disable Power Level Indicator */
91 regs[R_EP1] |= 0x40;
92
93 /* frequency dependent parameters */
94
95 tda18271_calc_ir_measure(fe, &freq);
96
97 tda18271_calc_bp_filter(fe, &freq);
98
99 tda18271_calc_rf_band(fe, &freq);
100
101 tda18271_calc_gain_taper(fe, &freq);
102
103 /* --------------------------------------------------------------- */
104
105 /* dual tuner and agc1 extra configuration */
106
107 /* main vco when Master, cal vco when slave */
108 regs[R_EB1] |= 0x04; /* FIXME: assumes master */
109
110 /* agc1 always active */
111 regs[R_EB1] &= ~0x02;
112
113 /* agc1 has priority on agc2 */
114 regs[R_EB1] &= ~0x01;
115
116 tda18271_write_regs(fe, R_EB1, 1);
117
118 /* --------------------------------------------------------------- */
119
120 N = freq + ifc;
121
122 /* FIXME: assumes master */
123 tda18271_calc_main_pll(fe, N);
124 tda18271_write_regs(fe, R_MPD, 4);
125
126 tda18271_write_regs(fe, R_TM, 7);
127
128 /* main pll charge pump source */
129 regs[R_EB4] |= 0x20;
130 tda18271_write_regs(fe, R_EB4, 1);
131
132 msleep(1);
133
134 /* normal operation for the main pll */
135 regs[R_EB4] &= ~0x20;
136 tda18271_write_regs(fe, R_EB4, 1);
137
138 msleep(5);
139
140 return 0;
141}
142
143static int tda18271_read_thermometer(struct dvb_frontend *fe)
144{
145 struct tda18271_priv *priv = fe->tuner_priv;
146 unsigned char *regs = priv->tda18271_regs;
147 int tm;
148
149 /* switch thermometer on */
150 regs[R_TM] |= 0x10;
151 tda18271_write_regs(fe, R_TM, 1);
152
153 /* read thermometer info */
154 tda18271_read_regs(fe);
155
156 if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
157 (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
158
159 if ((regs[R_TM] & 0x20) == 0x20)
160 regs[R_TM] &= ~0x20;
161 else
162 regs[R_TM] |= 0x20;
163
164 tda18271_write_regs(fe, R_TM, 1);
165
166 msleep(10); /* temperature sensing */
167
168 /* read thermometer info */
169 tda18271_read_regs(fe);
170 }
171
172 tm = tda18271_lookup_thermometer(fe);
173
174 /* switch thermometer off */
175 regs[R_TM] &= ~0x10;
176 tda18271_write_regs(fe, R_TM, 1);
177
178 /* set CAL mode to normal */
179 regs[R_EP4] &= ~0x03;
180 tda18271_write_regs(fe, R_EP4, 1);
181
182 return tm;
183}
184
185static int tda18271_rf_tracking_filters_correction(struct dvb_frontend *fe,
186 u32 freq, int tm_rfcal)
187{
188 struct tda18271_priv *priv = fe->tuner_priv;
189 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
190 unsigned char *regs = priv->tda18271_regs;
191 int tm_current, rfcal_comp, approx, i;
192 u8 dc_over_dt, rf_tab;
193
194 /* power up */
195 regs[R_EP3] &= ~0xe0; /* sm = 0, sm_lt = 0, sm_xt = 0 */
196 tda18271_write_regs(fe, R_EP3, 1);
197
198 /* read die current temperature */
199 tm_current = tda18271_read_thermometer(fe);
200
201 /* frequency dependent parameters */
202
203 tda18271_calc_rf_cal(fe, &freq);
204 rf_tab = regs[R_EB14];
205
206 i = tda18271_lookup_rf_band(fe, &freq, NULL);
207 if (i < 0)
208 return -EINVAL;
209
210 if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
211 approx = map[i].rf_a1 *
212 (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
213 } else {
214 approx = map[i].rf_a2 *
215 (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
216 }
217
218 if (approx < 0)
219 approx = 0;
220 if (approx > 255)
221 approx = 255;
222
223 tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
224
225 /* calculate temperature compensation */
226 rfcal_comp = dc_over_dt * (tm_current - tm_rfcal);
227
228 regs[R_EB14] = approx + rfcal_comp;
229 tda18271_write_regs(fe, R_EB14, 1);
230
231 return 0;
232}
233
234static int tda18271_por(struct dvb_frontend *fe)
235{
236 struct tda18271_priv *priv = fe->tuner_priv;
237 unsigned char *regs = priv->tda18271_regs;
238
239 /* power up detector 1 */
240 regs[R_EB12] &= ~0x20;
241 tda18271_write_regs(fe, R_EB12, 1);
242
243 regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
244 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
245 tda18271_write_regs(fe, R_EB18, 1);
246
247 regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
248
249 /* POR mode */
250 regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
251 regs[R_EP3] |= 0x80; /* sm = 1, sm_lt = 0, sm_xt = 0 */
252 tda18271_write_regs(fe, R_EP3, 1);
253
254 /* disable 1.5 MHz low pass filter */
255 regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
256 regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
257 tda18271_write_regs(fe, R_EB21, 3);
258
259 return 0;
260}
261
262static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
263{
264 struct tda18271_priv *priv = fe->tuner_priv;
265 unsigned char *regs = priv->tda18271_regs;
266 u32 N;
267
268 /* set CAL mode to normal */
269 regs[R_EP4] &= ~0x03;
270 tda18271_write_regs(fe, R_EP4, 1);
271
272 /* switch off agc1 */
273 regs[R_EP3] |= 0x40; /* sm_lt = 1 */
274
275 regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
276 tda18271_write_regs(fe, R_EB18, 1);
277
278 /* frequency dependent parameters */
279
280 tda18271_calc_bp_filter(fe, &freq);
281 tda18271_calc_gain_taper(fe, &freq);
282 tda18271_calc_rf_band(fe, &freq);
283 tda18271_calc_km(fe, &freq);
284
285 tda18271_write_regs(fe, R_EP1, 3);
286 tda18271_write_regs(fe, R_EB13, 1);
287
288 /* main pll charge pump source */
289 regs[R_EB4] |= 0x20;
290 tda18271_write_regs(fe, R_EB4, 1);
291
292 /* cal pll charge pump source */
293 regs[R_EB7] |= 0x20;
294 tda18271_write_regs(fe, R_EB7, 1);
295
296 /* force dcdc converter to 0 V */
297 regs[R_EB14] = 0x00;
298 tda18271_write_regs(fe, R_EB14, 1);
299
300 /* disable plls lock */
301 regs[R_EB20] &= ~0x20;
302 tda18271_write_regs(fe, R_EB20, 1);
303
304 /* set CAL mode to RF tracking filter calibration */
305 regs[R_EP4] |= 0x03;
306 tda18271_write_regs(fe, R_EP4, 2);
307
308 /* --------------------------------------------------------------- */
309
310 /* set the internal calibration signal */
311 N = freq;
312
313 tda18271_calc_main_pll(fe, N);
314 tda18271_write_regs(fe, R_MPD, 4);
315
316 /* downconvert internal calibration */
317 N += 1000000;
318
319 tda18271_calc_main_pll(fe, N);
320 tda18271_write_regs(fe, R_MPD, 4);
321
322 msleep(5);
323
324 tda18271_write_regs(fe, R_EP2, 1);
325 tda18271_write_regs(fe, R_EP1, 1);
326 tda18271_write_regs(fe, R_EP2, 1);
327 tda18271_write_regs(fe, R_EP1, 1);
328
329 /* --------------------------------------------------------------- */
330
331 /* normal operation for the main pll */
332 regs[R_EB4] &= ~0x20;
333 tda18271_write_regs(fe, R_EB4, 1);
334
335 /* normal operation for the cal pll */
336 regs[R_EB7] &= ~0x20;
337 tda18271_write_regs(fe, R_EB7, 1);
338
339 msleep(5); /* plls locking */
340
341 /* launch the rf tracking filters calibration */
342 regs[R_EB20] |= 0x20;
343 tda18271_write_regs(fe, R_EB20, 1);
344
345 msleep(60); /* calibration */
346
347 /* --------------------------------------------------------------- */
348
349 /* set CAL mode to normal */
350 regs[R_EP4] &= ~0x03;
351
352 /* switch on agc1 */
353 regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
354
355 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
356 tda18271_write_regs(fe, R_EB18, 1);
357
358 tda18271_write_regs(fe, R_EP3, 2);
359
360 /* synchronization */
361 tda18271_write_regs(fe, R_EP1, 1);
362
363 /* get calibration result */
364 tda18271_read_extended(fe);
365
366 return regs[R_EB14];
367}
368
369static int tda18271_powerscan(struct dvb_frontend *fe,
370 u32 *freq_in, u32 *freq_out)
371{
372 struct tda18271_priv *priv = fe->tuner_priv;
373 unsigned char *regs = priv->tda18271_regs;
374 int sgn, bcal, count, wait;
375 u8 cid_target;
376 u16 count_limit;
377 u32 freq;
378
379 freq = *freq_in;
380
381 tda18271_calc_rf_band(fe, &freq);
382 tda18271_calc_rf_cal(fe, &freq);
383 tda18271_calc_gain_taper(fe, &freq);
384 tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
385
386 tda18271_write_regs(fe, R_EP2, 1);
387 tda18271_write_regs(fe, R_EB14, 1);
388
389 /* downconvert frequency */
390 freq += 1000000;
391
392 tda18271_calc_main_pll(fe, freq);
393 tda18271_write_regs(fe, R_MPD, 4);
394
395 msleep(5); /* pll locking */
396
397 /* detection mode */
398 regs[R_EP4] &= ~0x03;
399 regs[R_EP4] |= 0x01;
400 tda18271_write_regs(fe, R_EP4, 1);
401
402 /* launch power detection measurement */
403 tda18271_write_regs(fe, R_EP2, 1);
404
405 /* read power detection info, stored in EB10 */
406 tda18271_read_extended(fe);
407
408 /* algorithm initialization */
409 sgn = 1;
410 *freq_out = *freq_in;
411 bcal = 0;
412 count = 0;
413 wait = false;
414
415 while ((regs[R_EB10] & 0x3f) < cid_target) {
416 /* downconvert updated freq to 1 MHz */
417 freq = *freq_in + (sgn * count) + 1000000;
418
419 tda18271_calc_main_pll(fe, freq);
420 tda18271_write_regs(fe, R_MPD, 4);
421
422 if (wait) {
423 msleep(5); /* pll locking */
424 wait = false;
425 } else
426 udelay(100); /* pll locking */
427
428 /* launch power detection measurement */
429 tda18271_write_regs(fe, R_EP2, 1);
430
431 /* read power detection info, stored in EB10 */
432 tda18271_read_extended(fe);
433
434 count += 200;
435
436 if (count < count_limit)
437 continue;
438
439 if (sgn <= 0)
440 break;
441
442 sgn = -1 * sgn;
443 count = 200;
444 wait = true;
445 }
446
447 if ((regs[R_EB10] & 0x3f) >= cid_target) {
448 bcal = 1;
449 *freq_out = freq - 1000000;
450 } else
451 bcal = 0;
452
453 tda_dbg("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
454 bcal, *freq_in, *freq_out, freq);
455
456 return bcal;
457}
458
459static int tda18271_powerscan_init(struct dvb_frontend *fe)
460{
461 struct tda18271_priv *priv = fe->tuner_priv;
462 unsigned char *regs = priv->tda18271_regs;
463
464 /* set standard to digital */
465 regs[R_EP3] &= ~0x1f; /* clear std bits */
466 regs[R_EP3] |= 0x12;
467
468 /* set cal mode to normal */
469 regs[R_EP4] &= ~0x03;
470
471 /* update IF output level & IF notch frequency */
472 regs[R_EP4] &= ~0x1c; /* clear if level bits */
473
474 tda18271_write_regs(fe, R_EP3, 2);
475
476 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
477 tda18271_write_regs(fe, R_EB18, 1);
478
479 regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
480
481 /* 1.5 MHz low pass filter */
482 regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
483 regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
484
485 tda18271_write_regs(fe, R_EB21, 3);
486
487 return 0;
488}
489
490static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
491{
492 struct tda18271_priv *priv = fe->tuner_priv;
493 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
494 unsigned char *regs = priv->tda18271_regs;
495 int bcal, rf, i;
496#define RF1 0
497#define RF2 1
498#define RF3 2
499 u32 rf_default[3];
500 u32 rf_freq[3];
501 u8 prog_cal[3];
502 u8 prog_tab[3];
503
504 i = tda18271_lookup_rf_band(fe, &freq, NULL);
505
506 if (i < 0)
507 return i;
508
509 rf_default[RF1] = 1000 * map[i].rf1_def;
510 rf_default[RF2] = 1000 * map[i].rf2_def;
511 rf_default[RF3] = 1000 * map[i].rf3_def;
512
513 for (rf = RF1; rf <= RF3; rf++) {
514 if (0 == rf_default[rf])
515 return 0;
516 tda_dbg("freq = %d, rf = %d\n", freq, rf);
517
518 /* look for optimized calibration frequency */
519 bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
520
521 tda18271_calc_rf_cal(fe, &rf_freq[rf]);
522 prog_tab[rf] = regs[R_EB14];
523
524 if (1 == bcal)
525 prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
526 else
527 prog_cal[rf] = prog_tab[rf];
528
529 switch (rf) {
530 case RF1:
531 map[i].rf_a1 = 0;
532 map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
533 map[i].rf1 = rf_freq[RF1] / 1000;
534 break;
535 case RF2:
536 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
537 prog_cal[RF1] + prog_tab[RF1]) /
538 ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
539 map[i].rf2 = rf_freq[RF2] / 1000;
540 break;
541 case RF3:
542 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
543 prog_cal[RF2] + prog_tab[RF2]) /
544 ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
545 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
546 map[i].rf3 = rf_freq[RF3] / 1000;
547 break;
548 default:
549 BUG();
550 }
551 }
552
553 return 0;
554}
555
556static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe,
557 int *tm_rfcal)
558{
559 struct tda18271_priv *priv = fe->tuner_priv;
560 unsigned int i;
561
562 tda_info("tda18271: performing RF tracking filter calibration\n");
563
564 /* wait for die temperature stabilization */
565 msleep(200);
566
567 tda18271_powerscan_init(fe);
568
569 /* rf band calibration */
570 for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
571 tda18271_rf_tracking_filters_init(fe, 1000 *
572 priv->rf_cal_state[i].rfmax);
573
574 *tm_rfcal = tda18271_read_thermometer(fe);
575
576 return 0;
577}
578
579/* ------------------------------------------------------------------ */
580
581static int tda18271_init_cal(struct dvb_frontend *fe, int *tm)
582{
583 struct tda18271_priv *priv = fe->tuner_priv;
584
585 if (priv->cal_initialized)
586 return 0;
587
588 /* initialization */
589 tda18271_init(fe);
590
591 tda18271_calc_rf_filter_curve(fe, tm);
592
593 tda18271_por(fe);
594
595 priv->cal_initialized = true;
596
597 return 0;
598}
599
600static int tda18271c2_tune(struct dvb_frontend *fe,
601 u32 ifc, u32 freq, u32 bw, u8 std)
602{
603 int tm = 0;
604
605 tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
606
607 tda18271_init_cal(fe, &tm);
608
609 tda18271_rf_tracking_filters_correction(fe, freq, tm);
610
611 tda18271_channel_configuration(fe, ifc, freq, bw, std);
612
613 return 0;
614}
615
616/* ------------------------------------------------------------------ */
617
618static int tda18271c1_tune(struct dvb_frontend *fe,
619 u32 ifc, u32 freq, u32 bw, u8 std)
5bea1cd3
MK		 620{
621 struct tda18271_priv *priv = fe->tuner_priv;
622 unsigned char *regs = priv->tda18271_regs;
fe0bf6d7 623 u32 N = 0;
5bea1cd3 624
1457263e 625 tda18271_init(fe);
5bea1cd3 626
182519f4 627 tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
5bea1cd3 628
5bea1cd3
MK		 629 /* RF tracking filter calibration */
630
255b5113 631 /* calculate bp filter */
b92bf0f6 632 tda18271_calc_bp_filter(fe, &freq);
5bea1cd3
MK		 633 tda18271_write_regs(fe, R_EP1, 1);
634
635 regs[R_EB4] &= 0x07;
636 regs[R_EB4] |= 0x60;
637 tda18271_write_regs(fe, R_EB4, 1);
638
639 regs[R_EB7] = 0x60;
640 tda18271_write_regs(fe, R_EB7, 1);
641
642 regs[R_EB14] = 0x00;
643 tda18271_write_regs(fe, R_EB14, 1);
644
645 regs[R_EB20] = 0xcc;
646 tda18271_write_regs(fe, R_EB20, 1);
647
255b5113 648 /* set cal mode to RF tracking filter calibration */
26501a70 649 regs[R_EP4] |= 0x03;
5bea1cd3 650
255b5113 651 /* calculate cal pll */
5bea1cd3
MK		 652
653 switch (priv->mode) {
654 case TDA18271_ANALOG:
655 N = freq - 1250000;
656 break;
657 case TDA18271_DIGITAL:
658 N = freq + bw / 2;
659 break;
660 }
661
fe0bf6d7 662 tda18271_calc_cal_pll(fe, N);
5bea1cd3 663
255b5113 664 /* calculate main pll */
5bea1cd3
MK		 665
666 switch (priv->mode) {
667 case TDA18271_ANALOG:
668 N = freq - 250000;
669 break;
670 case TDA18271_DIGITAL:
671 N = freq + bw / 2 + 1000000;
672 break;
673 }
674
fe0bf6d7 675 tda18271_calc_main_pll(fe, N);
5bea1cd3
MK		 676
677 tda18271_write_regs(fe, R_EP3, 11);
678 msleep(5); /* RF tracking filter calibration initialization */
679
255b5113 680 /* search for K,M,CO for RF calibration */
b92bf0f6 681 tda18271_calc_km(fe, &freq);
5bea1cd3
MK		 682 tda18271_write_regs(fe, R_EB13, 1);
683
255b5113 684 /* search for rf band */
b92bf0f6 685 tda18271_calc_rf_band(fe, &freq);
5bea1cd3 686
255b5113 687 /* search for gain taper */
b92bf0f6 688 tda18271_calc_gain_taper(fe, &freq);
5bea1cd3
MK		 689
690 tda18271_write_regs(fe, R_EP2, 1);
691 tda18271_write_regs(fe, R_EP1, 1);
692 tda18271_write_regs(fe, R_EP2, 1);
693 tda18271_write_regs(fe, R_EP1, 1);
694
695 regs[R_EB4] &= 0x07;
696 regs[R_EB4] |= 0x40;
697 tda18271_write_regs(fe, R_EB4, 1);
698
699 regs[R_EB7] = 0x40;
700 tda18271_write_regs(fe, R_EB7, 1);
701 msleep(10);
702
703 regs[R_EB20] = 0xec;
704 tda18271_write_regs(fe, R_EB20, 1);
705 msleep(60); /* RF tracking filter calibration completion */
706
707 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
708 tda18271_write_regs(fe, R_EP4, 1);
709
710 tda18271_write_regs(fe, R_EP1, 1);
711
b92bf0f6
MK		 712 /* RF tracking filter correction for VHF_Low band */
713 if (0 == tda18271_calc_rf_cal(fe, &freq))
5bea1cd3 714 tda18271_write_regs(fe, R_EB14, 1);
5bea1cd3
MK		 715
716 /* Channel Configuration */
717
718 switch (priv->mode) {
719 case TDA18271_ANALOG:
720 regs[R_EB22] = 0x2c;
721 break;
722 case TDA18271_DIGITAL:
723 regs[R_EB22] = 0x37;
724 break;
725 }
726 tda18271_write_regs(fe, R_EB22, 1);
727
728 regs[R_EP1] |= 0x40; /* set dis power level on */
729
730 /* set standard */
731 regs[R_EP3] &= ~0x1f; /* clear std bits */
732
733 /* see table 22 */
734 regs[R_EP3] |= std;
735
5bea1cd3
MK		 736 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
737
738 regs[R_EP4] &= ~0x1c; /* clear if level bits */
739 switch (priv->mode) {
740 case TDA18271_ANALOG:
741 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
742 break;
743 case TDA18271_DIGITAL:
744 regs[R_EP4] |= 0x04;
745 regs[R_MPD] |= 0x80;
746 break;
747 }
748
749 regs[R_EP4] &= ~0x80; /* turn this bit on only for fm */
750
b92bf0f6
MK		 751 /* image rejection validity */
752 tda18271_calc_ir_measure(fe, &freq);
5bea1cd3
MK		 753
754 /* calculate MAIN PLL */
755 N = freq + ifc;
756
fe0bf6d7 757 tda18271_calc_main_pll(fe, N);
5bea1cd3
MK		 758
759 tda18271_write_regs(fe, R_TM, 15);
760 msleep(5);
6ca04de3 761
5bea1cd3
MK		 762 return 0;
763}
764
765/* ------------------------------------------------------------------ */
766
767static int tda18271_set_params(struct dvb_frontend *fe,
768 struct dvb_frontend_parameters *params)
769{
770 struct tda18271_priv *priv = fe->tuner_priv;
255b5113 771 struct tda18271_std_map *std_map = priv->std;
5bea1cd3
MK		 772 u8 std;
773 u32 bw, sgIF = 0;
5bea1cd3
MK		 774 u32 freq = params->frequency;
775
255b5113
MK		 776 BUG_ON(!priv->tune || !priv->std);
777
5bea1cd3
MK		 778 priv->mode = TDA18271_DIGITAL;
779
780 /* see table 22 */
781 if (fe->ops.info.type == FE_ATSC) {
782 switch (params->u.vsb.modulation) {
783 case VSB_8:
784 case VSB_16:
255b5113
MK		 785 std = std_map->atsc_6.std_bits;
786 sgIF = std_map->atsc_6.if_freq;
5bea1cd3
MK		 787 break;
788 case QAM_64:
789 case QAM_256:
255b5113
MK		 790 std = std_map->qam_6.std_bits;
791 sgIF = std_map->qam_6.if_freq;
5bea1cd3
MK		 792 break;
793 default:
182519f4 794 tda_warn("modulation not set!\n");
5bea1cd3
MK		 795 return -EINVAL;
796 }
14e3c152
MK		 797#if 0
798 /* userspace request is already center adjusted */
5bea1cd3 799 freq += 1750000; /* Adjust to center (+1.75MHZ) */
14e3c152 800#endif
5bea1cd3
MK		 801 bw = 6000000;
802 } else if (fe->ops.info.type == FE_OFDM) {
803 switch (params->u.ofdm.bandwidth) {
804 case BANDWIDTH_6_MHZ:
5bea1cd3 805 bw = 6000000;
255b5113
MK		 806 std = std_map->dvbt_6.std_bits;
807 sgIF = std_map->dvbt_6.if_freq;
5bea1cd3
MK		 808 break;
809 case BANDWIDTH_7_MHZ:
5bea1cd3 810 bw = 7000000;
255b5113
MK		 811 std = std_map->dvbt_7.std_bits;
812 sgIF = std_map->dvbt_7.if_freq;
5bea1cd3
MK		 813 break;
814 case BANDWIDTH_8_MHZ:
5bea1cd3 815 bw = 8000000;
255b5113
MK		 816 std = std_map->dvbt_8.std_bits;
817 sgIF = std_map->dvbt_8.if_freq;
5bea1cd3
MK		 818 break;
819 default:
182519f4 820 tda_warn("bandwidth not set!\n");
5bea1cd3
MK		 821 return -EINVAL;
822 }
823 } else {
182519f4 824 tda_warn("modulation type not supported!\n");
5bea1cd3
MK		 825 return -EINVAL;
826 }
827
255b5113 828 return priv->tune(fe, sgIF, freq, bw, std);
5bea1cd3
MK		 829}
830
831static int tda18271_set_analog_params(struct dvb_frontend *fe,
832 struct analog_parameters *params)
833{
834 struct tda18271_priv *priv = fe->tuner_priv;
255b5113 835 struct tda18271_std_map *std_map = priv->std;
5bea1cd3 836 char *mode;
95af8a26
MK		 837 u8 std;
838 u32 sgIF, freq = params->frequency * 62500;
5bea1cd3 839
255b5113
MK		 840 BUG_ON(!priv->tune || !priv->std);
841
5bea1cd3
MK		 842 priv->mode = TDA18271_ANALOG;
843
5bea1cd3 844 if (params->std & V4L2_STD_MN) {
255b5113
MK		 845 std = std_map->atv_mn.std_bits;
846 sgIF = std_map->atv_mn.if_freq;
5bea1cd3
MK		 847 mode = "MN";
848 } else if (params->std & V4L2_STD_B) {
255b5113
MK		 849 std = std_map->atv_b.std_bits;
850 sgIF = std_map->atv_b.if_freq;
5bea1cd3
MK		 851 mode = "B";
852 } else if (params->std & V4L2_STD_GH) {
255b5113
MK		 853 std = std_map->atv_gh.std_bits;
854 sgIF = std_map->atv_gh.if_freq;
5bea1cd3
MK		 855 mode = "GH";
856 } else if (params->std & V4L2_STD_PAL_I) {
255b5113
MK		 857 std = std_map->atv_i.std_bits;
858 sgIF = std_map->atv_i.if_freq;
5bea1cd3
MK		 859 mode = "I";
860 } else if (params->std & V4L2_STD_DK) {
255b5113
MK		 861 std = std_map->atv_dk.std_bits;
862 sgIF = std_map->atv_dk.if_freq;
5bea1cd3
MK		 863 mode = "DK";
864 } else if (params->std & V4L2_STD_SECAM_L) {
255b5113
MK		 865 std = std_map->atv_l.std_bits;
866 sgIF = std_map->atv_l.if_freq;
5bea1cd3
MK		 867 mode = "L";
868 } else if (params->std & V4L2_STD_SECAM_LC) {
255b5113
MK		 869 std = std_map->atv_lc.std_bits;
870 sgIF = std_map->atv_lc.if_freq;
95af8a26 871 mode = "L'";
5bea1cd3 872 } else {
255b5113
MK		 873 std = std_map->atv_i.std_bits;
874 sgIF = std_map->atv_i.if_freq;
5bea1cd3
MK		 875 mode = "xx";
876 }
877
182519f4 878 tda_dbg("setting tda18271 to system %s\n", mode);
5bea1cd3 879
255b5113 880 return priv->tune(fe, sgIF, freq, 0, std);
5bea1cd3
MK		 881}
882
883static int tda18271_release(struct dvb_frontend *fe)
884{
885 kfree(fe->tuner_priv);
886 fe->tuner_priv = NULL;
887 return 0;
888}
889
890static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
891{
892 struct tda18271_priv *priv = fe->tuner_priv;
893 *frequency = priv->frequency;
894 return 0;
895}
896
897static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
898{
899 struct tda18271_priv *priv = fe->tuner_priv;
900 *bandwidth = priv->bandwidth;
901 return 0;
902}
903
49e7aaf0
MK		 904static int tda18271_get_id(struct dvb_frontend *fe)
905{
906 struct tda18271_priv *priv = fe->tuner_priv;
907 unsigned char *regs = priv->tda18271_regs;
908 char *name;
909 int ret = 0;
910
911 tda18271_read_regs(fe);
912
913 switch (regs[R_ID] & 0x7f) {
914 case 3:
915 name = "TDA18271HD/C1";
255b5113
MK		 916 priv->id = TDA18271HDC1;
917 priv->tune = tda18271c1_tune;
49e7aaf0
MK		 918 break;
919 case 4:
920 name = "TDA18271HD/C2";
255b5113
MK		 921 priv->id = TDA18271HDC2;
922 priv->tune = tda18271c2_tune;
49e7aaf0
MK		 923 break;
924 default:
925 name = "Unknown device";
926 ret = -EINVAL;
927 break;
928 }
929
182519f4 930 tda_info("%s detected @ %d-%04x%s\n", name,
49e7aaf0
MK		 931 i2c_adapter_id(priv->i2c_adap), priv->i2c_addr,
932 (0 == ret) ? "" : ", device not supported.");
933
934 return ret;
935}
936
5bea1cd3
MK		 937static struct dvb_tuner_ops tda18271_tuner_ops = {
938 .info = {
939 .name = "NXP TDA18271HD",
940 .frequency_min = 45000000,
941 .frequency_max = 864000000,
942 .frequency_step = 62500
943 },
efce8410 944 .init = tda18271_init,
5bea1cd3
MK		 945 .set_params = tda18271_set_params,
946 .set_analog_params = tda18271_set_analog_params,
947 .release = tda18271_release,
948 .get_frequency = tda18271_get_frequency,
949 .get_bandwidth = tda18271_get_bandwidth,
950};
951
952struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
e435f95c
MK		 953 struct i2c_adapter *i2c,
954 enum tda18271_i2c_gate gate)
5bea1cd3
MK		 955{
956 struct tda18271_priv *priv = NULL;
957
5bea1cd3
MK		 958 priv = kzalloc(sizeof(struct tda18271_priv), GFP_KERNEL);
959 if (priv == NULL)
960 return NULL;
961
962 priv->i2c_addr = addr;
963 priv->i2c_adap = i2c;
e435f95c 964 priv->gate = gate;
255b5113 965 priv->cal_initialized = false;
5bea1cd3 966
49e7aaf0
MK		 967 fe->tuner_priv = priv;
968
969 if (tda18271_get_id(fe) < 0)
970 goto fail;
971
255b5113
MK		 972 if (tda18271_assign_map_layout(fe) < 0)
973 goto fail;
974
5bea1cd3
MK		 975 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
976 sizeof(struct dvb_tuner_ops));
977
efce8410
MK		 978 tda18271_init_regs(fe);
979
5bea1cd3 980 return fe;
49e7aaf0
MK		 981fail:
982 tda18271_release(fe);
983 return NULL;
5bea1cd3
MK		 984}
985EXPORT_SYMBOL_GPL(tda18271_attach);
986MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
987MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
988MODULE_LICENSE("GPL");
255b5113 989MODULE_VERSION("0.2");
5bea1cd3
MK		 990
991/*
992 * Overrides for Emacs so that we follow Linus's tabbing style.
993 * ---------------------------------------------------------------------------
994 * Local variables:
995 * c-basic-offset: 8
996 * End:
997 */
Linux 6.x block layer and io_uring tree(s)