V4L/DVB (4027): Fixes after dvb_tuner_ops-conversion
[linux-2.6-block.git] / drivers / media / dvb / frontends / nxt6000.c
CommitLineData
1da177e4
LT
1/*
2 NxtWave Communications - NXT6000 demodulator driver
3
4 Copyright (C) 2002-2003 Florian Schirmer <jolt@tuxbox.org>
5 Copyright (C) 2003 Paul Andreassen <paul@andreassen.com.au>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/slab.h>
27
28#include "dvb_frontend.h"
29#include "nxt6000_priv.h"
30#include "nxt6000.h"
31
32
33
34struct nxt6000_state {
35 struct i2c_adapter* i2c;
36 struct dvb_frontend_ops ops;
37 /* configuration settings */
38 const struct nxt6000_config* config;
39 struct dvb_frontend frontend;
40};
41
42static int debug = 0;
43#define dprintk if (debug) printk
44
45static int nxt6000_writereg(struct nxt6000_state* state, u8 reg, u8 data)
46{
47 u8 buf[] = { reg, data };
48 struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 2 };
49 int ret;
50
51 if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1)
52 dprintk("nxt6000: nxt6000_write error (reg: 0x%02X, data: 0x%02X, ret: %d)\n", reg, data, ret);
53
54 return (ret != 1) ? -EFAULT : 0;
55}
56
57static u8 nxt6000_readreg(struct nxt6000_state* state, u8 reg)
58{
59 int ret;
60 u8 b0[] = { reg };
61 u8 b1[] = { 0 };
62 struct i2c_msg msgs[] = {
63 {.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 1},
64 {.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1}
65 };
66
67 ret = i2c_transfer(state->i2c, msgs, 2);
68
69 if (ret != 2)
70 dprintk("nxt6000: nxt6000_read error (reg: 0x%02X, ret: %d)\n", reg, ret);
71
72 return b1[0];
73}
74
75static void nxt6000_reset(struct nxt6000_state* state)
76{
77 u8 val;
78
79 val = nxt6000_readreg(state, OFDM_COR_CTL);
80
81 nxt6000_writereg(state, OFDM_COR_CTL, val & ~COREACT);
82 nxt6000_writereg(state, OFDM_COR_CTL, val | COREACT);
83}
84
85static int nxt6000_set_bandwidth(struct nxt6000_state* state, fe_bandwidth_t bandwidth)
86{
87 u16 nominal_rate;
88 int result;
89
90 switch (bandwidth) {
91
92 case BANDWIDTH_6_MHZ:
93 nominal_rate = 0x55B7;
94 break;
95
96 case BANDWIDTH_7_MHZ:
97 nominal_rate = 0x6400;
98 break;
99
100 case BANDWIDTH_8_MHZ:
101 nominal_rate = 0x7249;
102 break;
103
104 default:
105 return -EINVAL;
106 }
107
108 if ((result = nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, nominal_rate & 0xFF)) < 0)
109 return result;
110
111 return nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, (nominal_rate >> 8) & 0xFF);
112}
113
114static int nxt6000_set_guard_interval(struct nxt6000_state* state, fe_guard_interval_t guard_interval)
115{
116 switch (guard_interval) {
117
118 case GUARD_INTERVAL_1_32:
119 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x00 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
120
121 case GUARD_INTERVAL_1_16:
122 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x01 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
123
124 case GUARD_INTERVAL_AUTO:
125 case GUARD_INTERVAL_1_8:
126 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x02 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
127
128 case GUARD_INTERVAL_1_4:
129 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, 0x03 | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x03));
130
131 default:
132 return -EINVAL;
133 }
134}
135
136static int nxt6000_set_inversion(struct nxt6000_state* state, fe_spectral_inversion_t inversion)
137{
138 switch (inversion) {
139
140 case INVERSION_OFF:
141 return nxt6000_writereg(state, OFDM_ITB_CTL, 0x00);
142
143 case INVERSION_ON:
144 return nxt6000_writereg(state, OFDM_ITB_CTL, ITBINV);
145
146 default:
147 return -EINVAL;
148
149 }
150}
151
152static int nxt6000_set_transmission_mode(struct nxt6000_state* state, fe_transmit_mode_t transmission_mode)
153{
154 int result;
155
156 switch (transmission_mode) {
157
158 case TRANSMISSION_MODE_2K:
159 if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x00 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
160 return result;
161
162 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x00 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
163
164 case TRANSMISSION_MODE_8K:
165 case TRANSMISSION_MODE_AUTO:
166 if ((result = nxt6000_writereg(state, EN_DMD_RACQ, 0x02 | (nxt6000_readreg(state, EN_DMD_RACQ) & ~0x03))) < 0)
167 return result;
168
169 return nxt6000_writereg(state, OFDM_COR_MODEGUARD, (0x01 << 2) | (nxt6000_readreg(state, OFDM_COR_MODEGUARD) & ~0x04));
170
171 default:
172 return -EINVAL;
173
174 }
175}
176
177static void nxt6000_setup(struct dvb_frontend* fe)
178{
b8742700 179 struct nxt6000_state* state = fe->demodulator_priv;
1da177e4
LT
180
181 nxt6000_writereg(state, RS_COR_SYNC_PARAM, SYNC_PARAM);
182 nxt6000_writereg(state, BER_CTRL, /*(1 << 2) | */ (0x01 << 1) | 0x01);
3a4a5711
JS
183 nxt6000_writereg(state, VIT_BERTIME_2, 0x00); // BER Timer = 0x000200 * 256 = 131072 bits
184 nxt6000_writereg(state, VIT_BERTIME_1, 0x02); //
185 nxt6000_writereg(state, VIT_BERTIME_0, 0x00); //
186 nxt6000_writereg(state, VIT_COR_INTEN, 0x98); // Enable BER interrupts
187 nxt6000_writereg(state, VIT_COR_CTL, 0x82); // Enable BER measurement
188 nxt6000_writereg(state, VIT_COR_CTL, VIT_COR_RESYNC | 0x02 );
1da177e4
LT
189 nxt6000_writereg(state, OFDM_COR_CTL, (0x01 << 5) | (nxt6000_readreg(state, OFDM_COR_CTL) & 0x0F));
190 nxt6000_writereg(state, OFDM_COR_MODEGUARD, FORCEMODE8K | 0x02);
191 nxt6000_writereg(state, OFDM_AGC_CTL, AGCLAST | INITIAL_AGC_BW);
192 nxt6000_writereg(state, OFDM_ITB_FREQ_1, 0x06);
193 nxt6000_writereg(state, OFDM_ITB_FREQ_2, 0x31);
194 nxt6000_writereg(state, OFDM_CAS_CTL, (0x01 << 7) | (0x02 << 3) | 0x04);
195 nxt6000_writereg(state, CAS_FREQ, 0xBB); /* CHECKME */
196 nxt6000_writereg(state, OFDM_SYR_CTL, 1 << 2);
197 nxt6000_writereg(state, OFDM_PPM_CTL_1, PPM256);
198 nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_1, 0x49);
199 nxt6000_writereg(state, OFDM_TRL_NOMINALRATE_2, 0x72);
200 nxt6000_writereg(state, ANALOG_CONTROL_0, 1 << 5);
201 nxt6000_writereg(state, EN_DMD_RACQ, (1 << 7) | (3 << 4) | 2);
202 nxt6000_writereg(state, DIAG_CONFIG, TB_SET);
203
204 if (state->config->clock_inversion)
205 nxt6000_writereg(state, SUB_DIAG_MODE_SEL, CLKINVERSION);
206 else
207 nxt6000_writereg(state, SUB_DIAG_MODE_SEL, 0);
208
209 nxt6000_writereg(state, TS_FORMAT, 0);
1da177e4
LT
210}
211
212static void nxt6000_dump_status(struct nxt6000_state *state)
213{
214 u8 val;
215
216/*
217 printk("RS_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, RS_COR_STAT));
218 printk("VIT_SYNC_STATUS: 0x%02X\n", nxt6000_readreg(fe, VIT_SYNC_STATUS));
219 printk("OFDM_COR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_COR_STAT));
220 printk("OFDM_SYR_STAT: 0x%02X\n", nxt6000_readreg(fe, OFDM_SYR_STAT));
221 printk("OFDM_TPS_RCVD_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_1));
222 printk("OFDM_TPS_RCVD_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_2));
223 printk("OFDM_TPS_RCVD_3: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_3));
224 printk("OFDM_TPS_RCVD_4: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RCVD_4));
225 printk("OFDM_TPS_RESERVED_1: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_1));
226 printk("OFDM_TPS_RESERVED_2: 0x%02X\n", nxt6000_readreg(fe, OFDM_TPS_RESERVED_2));
227*/
228 printk("NXT6000 status:");
229
230 val = nxt6000_readreg(state, RS_COR_STAT);
231
232 printk(" DATA DESCR LOCK: %d,", val & 0x01);
233 printk(" DATA SYNC LOCK: %d,", (val >> 1) & 0x01);
234
235 val = nxt6000_readreg(state, VIT_SYNC_STATUS);
236
237 printk(" VITERBI LOCK: %d,", (val >> 7) & 0x01);
238
239 switch ((val >> 4) & 0x07) {
240
241 case 0x00:
242 printk(" VITERBI CODERATE: 1/2,");
243 break;
244
245 case 0x01:
246 printk(" VITERBI CODERATE: 2/3,");
247 break;
248
249 case 0x02:
250 printk(" VITERBI CODERATE: 3/4,");
251 break;
252
253 case 0x03:
254 printk(" VITERBI CODERATE: 5/6,");
255 break;
256
257 case 0x04:
258 printk(" VITERBI CODERATE: 7/8,");
259 break;
260
261 default:
262 printk(" VITERBI CODERATE: Reserved,");
263
264 }
265
266 val = nxt6000_readreg(state, OFDM_COR_STAT);
267
268 printk(" CHCTrack: %d,", (val >> 7) & 0x01);
269 printk(" TPSLock: %d,", (val >> 6) & 0x01);
270 printk(" SYRLock: %d,", (val >> 5) & 0x01);
271 printk(" AGCLock: %d,", (val >> 4) & 0x01);
272
273 switch (val & 0x0F) {
274
275 case 0x00:
276 printk(" CoreState: IDLE,");
277 break;
278
279 case 0x02:
280 printk(" CoreState: WAIT_AGC,");
281 break;
282
283 case 0x03:
284 printk(" CoreState: WAIT_SYR,");
285 break;
286
287 case 0x04:
288 printk(" CoreState: WAIT_PPM,");
289 break;
290
291 case 0x01:
292 printk(" CoreState: WAIT_TRL,");
293 break;
294
295 case 0x05:
296 printk(" CoreState: WAIT_TPS,");
297 break;
298
299 case 0x06:
300 printk(" CoreState: MONITOR_TPS,");
301 break;
302
303 default:
304 printk(" CoreState: Reserved,");
305
306 }
307
308 val = nxt6000_readreg(state, OFDM_SYR_STAT);
309
310 printk(" SYRLock: %d,", (val >> 4) & 0x01);
311 printk(" SYRMode: %s,", (val >> 2) & 0x01 ? "8K" : "2K");
312
313 switch ((val >> 4) & 0x03) {
314
315 case 0x00:
316 printk(" SYRGuard: 1/32,");
317 break;
318
319 case 0x01:
320 printk(" SYRGuard: 1/16,");
321 break;
322
323 case 0x02:
324 printk(" SYRGuard: 1/8,");
325 break;
326
327 case 0x03:
328 printk(" SYRGuard: 1/4,");
329 break;
330 }
331
332 val = nxt6000_readreg(state, OFDM_TPS_RCVD_3);
333
334 switch ((val >> 4) & 0x07) {
335
336 case 0x00:
337 printk(" TPSLP: 1/2,");
338 break;
339
340 case 0x01:
341 printk(" TPSLP: 2/3,");
342 break;
343
344 case 0x02:
345 printk(" TPSLP: 3/4,");
346 break;
347
348 case 0x03:
349 printk(" TPSLP: 5/6,");
350 break;
351
352 case 0x04:
353 printk(" TPSLP: 7/8,");
354 break;
355
356 default:
357 printk(" TPSLP: Reserved,");
358
359 }
360
361 switch (val & 0x07) {
362
363 case 0x00:
364 printk(" TPSHP: 1/2,");
365 break;
366
367 case 0x01:
368 printk(" TPSHP: 2/3,");
369 break;
370
371 case 0x02:
372 printk(" TPSHP: 3/4,");
373 break;
374
375 case 0x03:
376 printk(" TPSHP: 5/6,");
377 break;
378
379 case 0x04:
380 printk(" TPSHP: 7/8,");
381 break;
382
383 default:
384 printk(" TPSHP: Reserved,");
385
386 }
387
388 val = nxt6000_readreg(state, OFDM_TPS_RCVD_4);
389
390 printk(" TPSMode: %s,", val & 0x01 ? "8K" : "2K");
391
392 switch ((val >> 4) & 0x03) {
393
394 case 0x00:
395 printk(" TPSGuard: 1/32,");
396 break;
397
398 case 0x01:
399 printk(" TPSGuard: 1/16,");
400 break;
401
402 case 0x02:
403 printk(" TPSGuard: 1/8,");
404 break;
405
406 case 0x03:
407 printk(" TPSGuard: 1/4,");
408 break;
409
410 }
411
412 /* Strange magic required to gain access to RF_AGC_STATUS */
413 nxt6000_readreg(state, RF_AGC_VAL_1);
414 val = nxt6000_readreg(state, RF_AGC_STATUS);
415 val = nxt6000_readreg(state, RF_AGC_STATUS);
416
417 printk(" RF AGC LOCK: %d,", (val >> 4) & 0x01);
418 printk("\n");
419}
420
421static int nxt6000_read_status(struct dvb_frontend* fe, fe_status_t* status)
422{
423 u8 core_status;
b8742700 424 struct nxt6000_state* state = fe->demodulator_priv;
1da177e4
LT
425
426 *status = 0;
427
428 core_status = nxt6000_readreg(state, OFDM_COR_STAT);
429
430 if (core_status & AGCLOCKED)
431 *status |= FE_HAS_SIGNAL;
432
433 if (nxt6000_readreg(state, OFDM_SYR_STAT) & GI14_SYR_LOCK)
434 *status |= FE_HAS_CARRIER;
435
436 if (nxt6000_readreg(state, VIT_SYNC_STATUS) & VITINSYNC)
437 *status |= FE_HAS_VITERBI;
438
439 if (nxt6000_readreg(state, RS_COR_STAT) & RSCORESTATUS)
440 *status |= FE_HAS_SYNC;
441
442 if ((core_status & TPSLOCKED) && (*status == (FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)))
443 *status |= FE_HAS_LOCK;
444
445 if (debug)
446 nxt6000_dump_status(state);
447
448 return 0;
449}
450
451static int nxt6000_init(struct dvb_frontend* fe)
452{
b8742700 453 struct nxt6000_state* state = fe->demodulator_priv;
1da177e4
LT
454
455 nxt6000_reset(state);
456 nxt6000_setup(fe);
457
458 return 0;
459}
460
461static int nxt6000_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *param)
462{
b8742700 463 struct nxt6000_state* state = fe->demodulator_priv;
1da177e4
LT
464 int result;
465
605ee41c
AQ
466 if (fe->ops->tuner_ops.set_params) {
467 fe->ops->tuner_ops.set_params(fe, param);
468 if (fe->ops->i2c_gate_ctrl) fe->ops->i2c_gate_ctrl(fe, 0);
469 }
1da177e4
LT
470
471 if ((result = nxt6000_set_bandwidth(state, param->u.ofdm.bandwidth)) < 0)
472 return result;
473 if ((result = nxt6000_set_guard_interval(state, param->u.ofdm.guard_interval)) < 0)
474 return result;
475 if ((result = nxt6000_set_transmission_mode(state, param->u.ofdm.transmission_mode)) < 0)
476 return result;
477 if ((result = nxt6000_set_inversion(state, param->inversion)) < 0)
478 return result;
479
115eea4e 480 msleep(500);
1da177e4
LT
481 return 0;
482}
483
484static void nxt6000_release(struct dvb_frontend* fe)
485{
b8742700 486 struct nxt6000_state* state = fe->demodulator_priv;
1da177e4
LT
487 kfree(state);
488}
489
3a4a5711
JS
490static int nxt6000_read_snr(struct dvb_frontend* fe, u16* snr)
491{
b8742700 492 struct nxt6000_state* state = fe->demodulator_priv;
3a4a5711
JS
493
494 *snr = nxt6000_readreg( state, OFDM_CHC_SNR) / 8;
495
496 return 0;
497}
498
499static int nxt6000_read_ber(struct dvb_frontend* fe, u32* ber)
500{
b8742700 501 struct nxt6000_state* state = fe->demodulator_priv;
3a4a5711
JS
502
503 nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18 );
504
505 *ber = (nxt6000_readreg( state, VIT_BER_1 ) << 8 ) |
506 nxt6000_readreg( state, VIT_BER_0 );
507
508 nxt6000_writereg( state, VIT_COR_INTSTAT, 0x18); // Clear BER Done interrupts
509
510 return 0;
511}
512
513static int nxt6000_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
514{
b8742700 515 struct nxt6000_state* state = fe->demodulator_priv;
3a4a5711
JS
516
517 *signal_strength = (short) (511 -
518 (nxt6000_readreg(state, AGC_GAIN_1) +
519 ((nxt6000_readreg(state, AGC_GAIN_2) & 0x03) << 8)));
520
521 return 0;
522}
523
115eea4e
SO
524static int nxt6000_fe_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
525{
526 tune->min_delay_ms = 500;
527 return 0;
528}
529
605ee41c
AQ
530static int nxt6000_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
531{
532 struct nxt6000_state* state = fe->demodulator_priv;
533
534 if (enable) {
535 return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x01);
536 } else {
537 return nxt6000_writereg(state, ENABLE_TUNER_IIC, 0x00);
538 }
539}
540
1da177e4
LT
541static struct dvb_frontend_ops nxt6000_ops;
542
543struct dvb_frontend* nxt6000_attach(const struct nxt6000_config* config,
544 struct i2c_adapter* i2c)
545{
546 struct nxt6000_state* state = NULL;
547
548 /* allocate memory for the internal state */
b8742700 549 state = kmalloc(sizeof(struct nxt6000_state), GFP_KERNEL);
1da177e4
LT
550 if (state == NULL) goto error;
551
552 /* setup the state */
553 state->config = config;
554 state->i2c = i2c;
555 memcpy(&state->ops, &nxt6000_ops, sizeof(struct dvb_frontend_ops));
556
557 /* check if the demod is there */
558 if (nxt6000_readreg(state, OFDM_MSC_REV) != NXT6000ASICDEVICE) goto error;
559
560 /* create dvb_frontend */
561 state->frontend.ops = &state->ops;
562 state->frontend.demodulator_priv = state;
563 return &state->frontend;
564
565error:
566 kfree(state);
567 return NULL;
568}
569
570static struct dvb_frontend_ops nxt6000_ops = {
571
572 .info = {
573 .name = "NxtWave NXT6000 DVB-T",
574 .type = FE_OFDM,
575 .frequency_min = 0,
576 .frequency_max = 863250000,
577 .frequency_stepsize = 62500,
578 /*.frequency_tolerance = *//* FIXME: 12% of SR */
579 .symbol_rate_min = 0, /* FIXME */
580 .symbol_rate_max = 9360000, /* FIXME */
581 .symbol_rate_tolerance = 4000,
582 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
50c25fff
MK
583 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
584 FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
585 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
586 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
587 FE_CAN_HIERARCHY_AUTO,
1da177e4
LT
588 },
589
590 .release = nxt6000_release,
591
592 .init = nxt6000_init,
605ee41c 593 .i2c_gate_ctrl = nxt6000_i2c_gate_ctrl,
1da177e4 594
115eea4e
SO
595 .get_tune_settings = nxt6000_fe_get_tune_settings,
596
1da177e4
LT
597 .set_frontend = nxt6000_set_frontend,
598
599 .read_status = nxt6000_read_status,
3a4a5711
JS
600 .read_ber = nxt6000_read_ber,
601 .read_signal_strength = nxt6000_read_signal_strength,
602 .read_snr = nxt6000_read_snr,
1da177e4
LT
603};
604
605module_param(debug, int, 0644);
606MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
607
608MODULE_DESCRIPTION("NxtWave NXT6000 DVB-T demodulator driver");
609MODULE_AUTHOR("Florian Schirmer");
610MODULE_LICENSE("GPL");
611
612EXPORT_SYMBOL(nxt6000_attach);