[linux-2.6-block.git] / drivers / media / dvb / frontends / mb86a20s.c

/*
 *   Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
 *
 *   Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
 *   Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
 *
 *   FIXME: Need to port to DVB v5.2 API
 *
 *   This program is free software; you can redistribute it and/or
 *   modify it under the terms of the GNU General Public License as
 *   published by the Free Software Foundation version 2.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 *   General Public License for more details.
 */

#include <linux/kernel.h>
#include <asm/div64.h>

#include "dvb_frontend.h"
#include "mb86a20s.h"

static int debug = 1;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");

#define rc(args...)  do {						\
	printk(KERN_ERR  "mb86a20s: " args);				\
} while (0)

#define dprintk(args...)						\
	do {								\
		if (debug) {						\
			printk(KERN_DEBUG "mb86a20s: %s: ", __func__);	\
			printk(args);					\
		}							\
	} while (0)

struct mb86a20s_state {
	struct i2c_adapter *i2c;
	const struct mb86a20s_config *config;

	struct dvb_frontend frontend;

	bool need_init;
};

struct regdata {
	u8 reg;
	u8 data;
};

/*
 * Initialization sequence: Use whatevere default values that PV SBTVD
 * does on its initialisation, obtained via USB snoop
 */
static struct regdata mb86a20s_init[] = {
	{ 0x70, 0x0f },
	{ 0x70, 0xff },
	{ 0x08, 0x01 },
	{ 0x09, 0x3e },
	{ 0x50, 0xd1 },
	{ 0x51, 0x22 },
	{ 0x39, 0x01 },
	{ 0x71, 0x00 },
	{ 0x28, 0x2a },
	{ 0x29, 0x00 },
	{ 0x2a, 0xff },
	{ 0x2b, 0x80 },
	{ 0x28, 0x20 },
	{ 0x29, 0x33 },
	{ 0x2a, 0xdf },
	{ 0x2b, 0xa9 },
	{ 0x3b, 0x21 },
	{ 0x3c, 0x3a },
	{ 0x01, 0x0d },
	{ 0x04, 0x08 },
	{ 0x05, 0x05 },
	{ 0x04, 0x0e },
	{ 0x05, 0x00 },
	{ 0x04, 0x0f },
	{ 0x05, 0x14 },
	{ 0x04, 0x0b },
	{ 0x05, 0x8c },
	{ 0x04, 0x00 },
	{ 0x05, 0x00 },
	{ 0x04, 0x01 },
	{ 0x05, 0x07 },
	{ 0x04, 0x02 },
	{ 0x05, 0x0f },
	{ 0x04, 0x03 },
	{ 0x05, 0xa0 },
	{ 0x04, 0x09 },
	{ 0x05, 0x00 },
	{ 0x04, 0x0a },
	{ 0x05, 0xff },
	{ 0x04, 0x27 },
	{ 0x05, 0x64 },
	{ 0x04, 0x28 },
	{ 0x05, 0x00 },
	{ 0x04, 0x1e },
	{ 0x05, 0xff },
	{ 0x04, 0x29 },
	{ 0x05, 0x0a },
	{ 0x04, 0x32 },
	{ 0x05, 0x0a },
	{ 0x04, 0x14 },
	{ 0x05, 0x02 },
	{ 0x04, 0x04 },
	{ 0x05, 0x00 },
	{ 0x04, 0x05 },
	{ 0x05, 0x22 },
	{ 0x04, 0x06 },
	{ 0x05, 0x0e },
	{ 0x04, 0x07 },
	{ 0x05, 0xd8 },
	{ 0x04, 0x12 },
	{ 0x05, 0x00 },
	{ 0x04, 0x13 },
	{ 0x05, 0xff },
	{ 0x52, 0x01 },
	{ 0x50, 0xa7 },
	{ 0x51, 0x00 },
	{ 0x50, 0xa8 },
	{ 0x51, 0xff },
	{ 0x50, 0xa9 },
	{ 0x51, 0xff },
	{ 0x50, 0xaa },
	{ 0x51, 0x00 },
	{ 0x50, 0xab },
	{ 0x51, 0xff },
	{ 0x50, 0xac },
	{ 0x51, 0xff },
	{ 0x50, 0xad },
	{ 0x51, 0x00 },
	{ 0x50, 0xae },
	{ 0x51, 0xff },
	{ 0x50, 0xaf },
	{ 0x51, 0xff },
	{ 0x5e, 0x07 },
	{ 0x50, 0xdc },
	{ 0x51, 0x01 },
	{ 0x50, 0xdd },
	{ 0x51, 0xf4 },
	{ 0x50, 0xde },
	{ 0x51, 0x01 },
	{ 0x50, 0xdf },
	{ 0x51, 0xf4 },
	{ 0x50, 0xe0 },
	{ 0x51, 0x01 },
	{ 0x50, 0xe1 },
	{ 0x51, 0xf4 },
	{ 0x50, 0xb0 },
	{ 0x51, 0x07 },
	{ 0x50, 0xb2 },
	{ 0x51, 0xff },
	{ 0x50, 0xb3 },
	{ 0x51, 0xff },
	{ 0x50, 0xb4 },
	{ 0x51, 0xff },
	{ 0x50, 0xb5 },
	{ 0x51, 0xff },
	{ 0x50, 0xb6 },
	{ 0x51, 0xff },
	{ 0x50, 0xb7 },
	{ 0x51, 0xff },
	{ 0x50, 0x50 },
	{ 0x51, 0x02 },
	{ 0x50, 0x51 },
	{ 0x51, 0x04 },
	{ 0x45, 0x04 },
	{ 0x48, 0x04 },
	{ 0x50, 0xd5 },
	{ 0x51, 0x01 },		/* Serial */
	{ 0x50, 0xd6 },
	{ 0x51, 0x1f },
	{ 0x50, 0xd2 },
	{ 0x51, 0x03 },
	{ 0x50, 0xd7 },
	{ 0x51, 0x3f },
	{ 0x1c, 0x01 },
	{ 0x28, 0x06 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x03 },
	{ 0x28, 0x07 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x0d },
	{ 0x28, 0x08 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x02 },
	{ 0x28, 0x09 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x01 },
	{ 0x28, 0x0a },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x21 },
	{ 0x28, 0x0b },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x29 },
	{ 0x28, 0x0c },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x16 },
	{ 0x28, 0x0d },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x31 },
	{ 0x28, 0x0e },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x0e },
	{ 0x28, 0x0f },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x4e },
	{ 0x28, 0x10 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x46 },
	{ 0x28, 0x11 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x0f },
	{ 0x28, 0x12 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x56 },
	{ 0x28, 0x13 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x35 },
	{ 0x28, 0x14 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0xbe },
	{ 0x28, 0x15 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0x84 },
	{ 0x28, 0x16 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x03 },
	{ 0x2b, 0xee },
	{ 0x28, 0x17 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x98 },
	{ 0x28, 0x18 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x00 },
	{ 0x2b, 0x9f },
	{ 0x28, 0x19 },
	{ 0x29, 0x00 },
	{ 0x2a, 0x07 },
	{ 0x2b, 0xb2 },
	{ 0x28, 0x1a },
	{ 0x29, 0x00 },
	{ 0x2a, 0x06 },
	{ 0x2b, 0xc2 },
	{ 0x28, 0x1b },
	{ 0x29, 0x00 },
	{ 0x2a, 0x07 },
	{ 0x2b, 0x4a },
	{ 0x28, 0x1c },
	{ 0x29, 0x00 },
	{ 0x2a, 0x01 },
	{ 0x2b, 0xbc },
	{ 0x28, 0x1d },
	{ 0x29, 0x00 },
	{ 0x2a, 0x04 },
	{ 0x2b, 0xba },
	{ 0x28, 0x1e },
	{ 0x29, 0x00 },
	{ 0x2a, 0x06 },
	{ 0x2b, 0x14 },
	{ 0x50, 0x1e },
	{ 0x51, 0x5d },
	{ 0x50, 0x22 },
	{ 0x51, 0x00 },
	{ 0x50, 0x23 },
	{ 0x51, 0xc8 },
	{ 0x50, 0x24 },
	{ 0x51, 0x00 },
	{ 0x50, 0x25 },
	{ 0x51, 0xf0 },
	{ 0x50, 0x26 },
	{ 0x51, 0x00 },
	{ 0x50, 0x27 },
	{ 0x51, 0xc3 },
	{ 0x50, 0x39 },
	{ 0x51, 0x02 },
	{ 0x50, 0xd5 },
	{ 0x51, 0x01 },
	{ 0xd0, 0x00 },
};

static struct regdata mb86a20s_reset_reception[] = {
	{ 0x70, 0xf0 },
	{ 0x70, 0xff },
	{ 0x08, 0x01 },
	{ 0x08, 0x00 },
};

static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
			     u8 i2c_addr, int reg, int data)
{
	u8 buf[] = { reg, data };
	struct i2c_msg msg = {
		.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
	};
	int rc;

	rc = i2c_transfer(state->i2c, &msg, 1);
	if (rc != 1) {
		printk("%s: writereg error (rc == %i, reg == 0x%02x,"
			 " data == 0x%02x)\n", __func__, rc, reg, data);
		return rc;
	}

	return 0;
}

static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
				     u8 i2c_addr, struct regdata *rd, int size)
{
	int i, rc;

	for (i = 0; i < size; i++) {
		rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
					   rd[i].data);
		if (rc < 0)
			return rc;
	}
	return 0;
}

static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
				u8 i2c_addr, u8 reg)
{
	u8 val;
	int rc;
	struct i2c_msg msg[] = {
		{ .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
		{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
	};

	rc = i2c_transfer(state->i2c, msg, 2);

	if (rc != 2) {
		rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
		return rc;
	}

	return val;
}

#define mb86a20s_readreg(state, reg) \
	mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
#define mb86a20s_writereg(state, reg, val) \
	mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
#define mb86a20s_writeregdata(state, regdata) \
	mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
	regdata, ARRAY_SIZE(regdata))

static int mb86a20s_initfe(struct dvb_frontend *fe)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	int rc;
	u8  regD5 = 1;

	dprintk("\n");

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0);

	/* Initialize the frontend */
	rc = mb86a20s_writeregdata(state, mb86a20s_init);
	if (rc < 0)
		goto err;

	if (!state->config->is_serial) {
		regD5 &= ~1;

		rc = mb86a20s_writereg(state, 0x50, 0xd5);
		if (rc < 0)
			goto err;
		rc = mb86a20s_writereg(state, 0x51, regD5);
		if (rc < 0)
			goto err;
	}

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1);

err:
	if (rc < 0) {
		state->need_init = true;
		printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
	} else {
		state->need_init = false;
		dprintk("Initialization succeeded.\n");
	}
	return rc;
}

static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	unsigned rf_max, rf_min, rf;
	u8	 val;

	dprintk("\n");

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0);

	/* Does a binary search to get RF strength */
	rf_max = 0xfff;
	rf_min = 0;
	do {
		rf = (rf_max + rf_min) / 2;
		mb86a20s_writereg(state, 0x04, 0x1f);
		mb86a20s_writereg(state, 0x05, rf >> 8);
		mb86a20s_writereg(state, 0x04, 0x20);
		mb86a20s_writereg(state, 0x04, rf);

		val = mb86a20s_readreg(state, 0x02);
		if (val & 0x08)
			rf_min = (rf_max + rf_min) / 2;
		else
			rf_max = (rf_max + rf_min) / 2;
		if (rf_max - rf_min < 4) {
			*strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
			break;
		}
	} while (1);

	dprintk("signal strength = %d\n", *strength);

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1);

	return 0;
}

static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	u8 val;

	dprintk("\n");
	*status = 0;

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0);
	val = mb86a20s_readreg(state, 0x0a) & 0xf;
	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1);

	if (val >= 2)
		*status |= FE_HAS_SIGNAL;

	if (val >= 4)
		*status |= FE_HAS_CARRIER;

	if (val >= 5)
		*status |= FE_HAS_VITERBI;

	if (val >= 7)
		*status |= FE_HAS_SYNC;

	if (val >= 8)				/* Maybe 9? */
		*status |= FE_HAS_LOCK;

	dprintk("val = %d, status = 0x%02x\n", val, *status);

	return 0;
}

static int mb86a20s_set_frontend(struct dvb_frontend *fe)
{
	struct mb86a20s_state *state = fe->demodulator_priv;
	int rc;
#if 0
	/*
	 * FIXME: Properly implement the set frontend properties
	 */
	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
#endif

	dprintk("\n");

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1);
	dprintk("Calling tuner set parameters\n");
	fe->ops.tuner_ops.set_params(fe);

	/*
	 * Make it more reliable: if, for some reason, the initial
	 * device initialization doesn't happen, initialize it when
	 * a SBTVD parameters are adjusted.
	 *
	 * Unfortunately, due to a hard to track bug at tda829x/tda18271,
	 * the agc callback logic is not called during DVB attach time,
	 * causing mb86a20s to not be initialized with Kworld SBTVD.
	 * So, this hack is needed, in order to make Kworld SBTVD to work.
	 */
	if (state->need_init)
		mb86a20s_initfe(fe);

	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 0);
	rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
	if (fe->ops.i2c_gate_ctrl)
		fe->ops.i2c_gate_ctrl(fe, 1);

	return rc;
}

static int mb86a20s_get_frontend(struct dvb_frontend *fe)
{
	struct dtv_frontend_properties *p = &fe->dtv_property_cache;

	/* FIXME: For now, it does nothing */

	p->bandwidth_hz = 6000000;
	p->transmission_mode = TRANSMISSION_MODE_AUTO;
	p->guard_interval = GUARD_INTERVAL_AUTO;
	p->isdbt_partial_reception = 0;

	return 0;
}

static int mb86a20s_tune(struct dvb_frontend *fe,
			bool re_tune,
			unsigned int mode_flags,
			unsigned int *delay,
			fe_status_t *status)
{
	int rc = 0;

	dprintk("\n");

	if (re_tune)
		rc = mb86a20s_set_frontend(fe);

	if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
		mb86a20s_read_status(fe, status);

	return rc;
}

static void mb86a20s_release(struct dvb_frontend *fe)
{
	struct mb86a20s_state *state = fe->demodulator_priv;

	dprintk("\n");

	kfree(state);
}

static struct dvb_frontend_ops mb86a20s_ops;

struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
				    struct i2c_adapter *i2c)
{
	u8	rev;

	/* allocate memory for the internal state */
	struct mb86a20s_state *state =
		kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);

	dprintk("\n");
	if (state == NULL) {
		rc("Unable to kzalloc\n");
		goto error;
	}

	/* setup the state */
	state->config = config;
	state->i2c = i2c;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &mb86a20s_ops,
		sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;

	/* Check if it is a mb86a20s frontend */
	rev = mb86a20s_readreg(state, 0);

	if (rev == 0x13) {
		printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
	} else {
		printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
		       rev);
		goto error;
	}

	return &state->frontend;

error:
	kfree(state);
	return NULL;
}
EXPORT_SYMBOL(mb86a20s_attach);

static struct dvb_frontend_ops mb86a20s_ops = {
	.delsys = { SYS_ISDBT },
	/* Use dib8000 values per default */
	.info = {
		.name = "Fujitsu mb86A20s",
		.type = FE_OFDM,
		.caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
			FE_CAN_FEC_1_2  | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
			FE_CAN_FEC_5_6  | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
			FE_CAN_QPSK     | FE_CAN_QAM_16  | FE_CAN_QAM_64 |
			FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
			FE_CAN_GUARD_INTERVAL_AUTO    | FE_CAN_HIERARCHY_AUTO,
		/* Actually, those values depend on the used tuner */
		.frequency_min = 45000000,
		.frequency_max = 864000000,
		.frequency_stepsize = 62500,
	},

	.release = mb86a20s_release,

	.init = mb86a20s_initfe,
	.set_frontend = mb86a20s_set_frontend,
	.get_frontend = mb86a20s_get_frontend,
	.read_status = mb86a20s_read_status,
	.read_signal_strength = mb86a20s_read_signal_strength,
	.tune = mb86a20s_tune,
};

MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
b9ede79a MCC	1	/*
	2	* Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
	3	*
	4	* Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
	5	* Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
	6	*
	7	* FIXME: Need to port to DVB v5.2 API
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation version 2.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*/
	18
	19	#include <linux/kernel.h>
	20	#include <asm/div64.h>
	21
	22	#include "dvb_frontend.h"
	23	#include "mb86a20s.h"
	24
	25	static int debug = 1;
	26	module_param(debug, int, 0644);
	27	MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
	28
	29	#define rc(args...) do { \
	30	printk(KERN_ERR "mb86a20s: " args); \
	31	} while (0)
	32
	33	#define dprintk(args...) \
	34	do { \
	35	if (debug) { \
	36	printk(KERN_DEBUG "mb86a20s: %s: ", __func__); \
	37	printk(args); \
	38	} \
	39	} while (0)
	40
	41	struct mb86a20s_state {
	42	struct i2c_adapter *i2c;
	43	const struct mb86a20s_config *config;
	44
	45	struct dvb_frontend frontend;
c736a5f2 MCC	46
c736a5f2 MCC	47	bool need_init;
b9ede79a MCC	48	};
	49
	50	struct regdata {
	51	u8 reg;
	52	u8 data;
	53	};
	54
	55	/*
	56	* Initialization sequence: Use whatevere default values that PV SBTVD
	57	* does on its initialisation, obtained via USB snoop
	58	*/
	59	static struct regdata mb86a20s_init[] = {
	60	{ 0x70, 0x0f },
	61	{ 0x70, 0xff },
	62	{ 0x08, 0x01 },
	63	{ 0x09, 0x3e },
	64	{ 0x50, 0xd1 },
	65	{ 0x51, 0x22 },
	66	{ 0x39, 0x01 },
	67	{ 0x71, 0x00 },
	68	{ 0x28, 0x2a },
	69	{ 0x29, 0x00 },
	70	{ 0x2a, 0xff },
	71	{ 0x2b, 0x80 },
	72	{ 0x28, 0x20 },
	73	{ 0x29, 0x33 },
	74	{ 0x2a, 0xdf },
	75	{ 0x2b, 0xa9 },
	76	{ 0x3b, 0x21 },
	77	{ 0x3c, 0x3a },
	78	{ 0x01, 0x0d },
	79	{ 0x04, 0x08 },
	80	{ 0x05, 0x05 },
	81	{ 0x04, 0x0e },
	82	{ 0x05, 0x00 },
	83	{ 0x04, 0x0f },
	84	{ 0x05, 0x14 },
	85	{ 0x04, 0x0b },
	86	{ 0x05, 0x8c },
	87	{ 0x04, 0x00 },
	88	{ 0x05, 0x00 },
	89	{ 0x04, 0x01 },
	90	{ 0x05, 0x07 },
	91	{ 0x04, 0x02 },
	92	{ 0x05, 0x0f },
	93	{ 0x04, 0x03 },
	94	{ 0x05, 0xa0 },
	95	{ 0x04, 0x09 },
	96	{ 0x05, 0x00 },
	97	{ 0x04, 0x0a },
	98	{ 0x05, 0xff },
	99	{ 0x04, 0x27 },
	100	{ 0x05, 0x64 },
	101	{ 0x04, 0x28 },
	102	{ 0x05, 0x00 },
	103	{ 0x04, 0x1e },
	104	{ 0x05, 0xff },
	105	{ 0x04, 0x29 },
	106	{ 0x05, 0x0a },
	107	{ 0x04, 0x32 },
	108	{ 0x05, 0x0a },
	109	{ 0x04, 0x14 },
	110	{ 0x05, 0x02 },
	111	{ 0x04, 0x04 },
112	{ 0x05, 0x00 },
113	{ 0x04, 0x05 },
114	{ 0x05, 0x22 },
115	{ 0x04, 0x06 },
116	{ 0x05, 0x0e },
117	{ 0x04, 0x07 },
118	{ 0x05, 0xd8 },
119	{ 0x04, 0x12 },
120	{ 0x05, 0x00 },
121	{ 0x04, 0x13 },
122	{ 0x05, 0xff },
123	{ 0x52, 0x01 },
124	{ 0x50, 0xa7 },
125	{ 0x51, 0x00 },
126	{ 0x50, 0xa8 },
127	{ 0x51, 0xff },
128	{ 0x50, 0xa9 },
129	{ 0x51, 0xff },
130	{ 0x50, 0xaa },
131	{ 0x51, 0x00 },
132	{ 0x50, 0xab },
133	{ 0x51, 0xff },
134	{ 0x50, 0xac },
135	{ 0x51, 0xff },
136	{ 0x50, 0xad },
137	{ 0x51, 0x00 },
138	{ 0x50, 0xae },
139	{ 0x51, 0xff },
140	{ 0x50, 0xaf },
141	{ 0x51, 0xff },
142	{ 0x5e, 0x07 },
143	{ 0x50, 0xdc },
144	{ 0x51, 0x01 },
145	{ 0x50, 0xdd },
146	{ 0x51, 0xf4 },
147	{ 0x50, 0xde },
148	{ 0x51, 0x01 },
149	{ 0x50, 0xdf },
150	{ 0x51, 0xf4 },
151	{ 0x50, 0xe0 },
152	{ 0x51, 0x01 },
153	{ 0x50, 0xe1 },
154	{ 0x51, 0xf4 },
155	{ 0x50, 0xb0 },
156	{ 0x51, 0x07 },
157	{ 0x50, 0xb2 },
158	{ 0x51, 0xff },
159	{ 0x50, 0xb3 },
160	{ 0x51, 0xff },
161	{ 0x50, 0xb4 },
162	{ 0x51, 0xff },
163	{ 0x50, 0xb5 },
164	{ 0x51, 0xff },
165	{ 0x50, 0xb6 },
166	{ 0x51, 0xff },
167	{ 0x50, 0xb7 },
168	{ 0x51, 0xff },
169	{ 0x50, 0x50 },
170	{ 0x51, 0x02 },
171	{ 0x50, 0x51 },
172	{ 0x51, 0x04 },
173	{ 0x45, 0x04 },
174	{ 0x48, 0x04 },
175	{ 0x50, 0xd5 },
7572f9c5	176	{ 0x51, 0x01 }, /* Serial */
b9ede79a MCC	177	{ 0x50, 0xd6 },
	178	{ 0x51, 0x1f },
	179	{ 0x50, 0xd2 },
	180	{ 0x51, 0x03 },
	181	{ 0x50, 0xd7 },
	182	{ 0x51, 0x3f },
	183	{ 0x1c, 0x01 },
	184	{ 0x28, 0x06 },
	185	{ 0x29, 0x00 },
	186	{ 0x2a, 0x00 },
	187	{ 0x2b, 0x03 },
	188	{ 0x28, 0x07 },
	189	{ 0x29, 0x00 },
	190	{ 0x2a, 0x00 },
	191	{ 0x2b, 0x0d },
	192	{ 0x28, 0x08 },
	193	{ 0x29, 0x00 },
	194	{ 0x2a, 0x00 },
	195	{ 0x2b, 0x02 },
	196	{ 0x28, 0x09 },
	197	{ 0x29, 0x00 },
	198	{ 0x2a, 0x00 },
	199	{ 0x2b, 0x01 },
	200	{ 0x28, 0x0a },
	201	{ 0x29, 0x00 },
	202	{ 0x2a, 0x00 },
	203	{ 0x2b, 0x21 },
	204	{ 0x28, 0x0b },
	205	{ 0x29, 0x00 },
	206	{ 0x2a, 0x00 },
	207	{ 0x2b, 0x29 },
	208	{ 0x28, 0x0c },
	209	{ 0x29, 0x00 },
	210	{ 0x2a, 0x00 },
	211	{ 0x2b, 0x16 },
	212	{ 0x28, 0x0d },
	213	{ 0x29, 0x00 },
	214	{ 0x2a, 0x00 },
	215	{ 0x2b, 0x31 },
	216	{ 0x28, 0x0e },
	217	{ 0x29, 0x00 },
	218	{ 0x2a, 0x00 },
	219	{ 0x2b, 0x0e },
	220	{ 0x28, 0x0f },
	221	{ 0x29, 0x00 },
	222	{ 0x2a, 0x00 },
	223	{ 0x2b, 0x4e },
	224	{ 0x28, 0x10 },
	225	{ 0x29, 0x00 },
	226	{ 0x2a, 0x00 },
	227	{ 0x2b, 0x46 },
	228	{ 0x28, 0x11 },
	229	{ 0x29, 0x00 },
	230	{ 0x2a, 0x00 },
	231	{ 0x2b, 0x0f },
	232	{ 0x28, 0x12 },
	233	{ 0x29, 0x00 },
	234	{ 0x2a, 0x00 },
	235	{ 0x2b, 0x56 },
	236	{ 0x28, 0x13 },
	237	{ 0x29, 0x00 },
	238	{ 0x2a, 0x00 },
	239	{ 0x2b, 0x35 },
	240	{ 0x28, 0x14 },
241	{ 0x29, 0x00 },
242	{ 0x2a, 0x01 },
243	{ 0x2b, 0xbe },
244	{ 0x28, 0x15 },
245	{ 0x29, 0x00 },
246	{ 0x2a, 0x01 },
247	{ 0x2b, 0x84 },
248	{ 0x28, 0x16 },
249	{ 0x29, 0x00 },
250	{ 0x2a, 0x03 },
251	{ 0x2b, 0xee },
252	{ 0x28, 0x17 },
253	{ 0x29, 0x00 },
254	{ 0x2a, 0x00 },
255	{ 0x2b, 0x98 },
256	{ 0x28, 0x18 },
257	{ 0x29, 0x00 },
258	{ 0x2a, 0x00 },
259	{ 0x2b, 0x9f },
260	{ 0x28, 0x19 },
261	{ 0x29, 0x00 },
262	{ 0x2a, 0x07 },
263	{ 0x2b, 0xb2 },
264	{ 0x28, 0x1a },
265	{ 0x29, 0x00 },
266	{ 0x2a, 0x06 },
267	{ 0x2b, 0xc2 },
268	{ 0x28, 0x1b },
269	{ 0x29, 0x00 },
270	{ 0x2a, 0x07 },
271	{ 0x2b, 0x4a },
272	{ 0x28, 0x1c },
273	{ 0x29, 0x00 },
274	{ 0x2a, 0x01 },
275	{ 0x2b, 0xbc },
276	{ 0x28, 0x1d },
277	{ 0x29, 0x00 },
278	{ 0x2a, 0x04 },
279	{ 0x2b, 0xba },
280	{ 0x28, 0x1e },
281	{ 0x29, 0x00 },
282	{ 0x2a, 0x06 },
283	{ 0x2b, 0x14 },
284	{ 0x50, 0x1e },
285	{ 0x51, 0x5d },
286	{ 0x50, 0x22 },
287	{ 0x51, 0x00 },
288	{ 0x50, 0x23 },
289	{ 0x51, 0xc8 },
290	{ 0x50, 0x24 },
291	{ 0x51, 0x00 },
292	{ 0x50, 0x25 },
293	{ 0x51, 0xf0 },
294	{ 0x50, 0x26 },
295	{ 0x51, 0x00 },
296	{ 0x50, 0x27 },
297	{ 0x51, 0xc3 },
298	{ 0x50, 0x39 },
299	{ 0x51, 0x02 },
300	{ 0x50, 0xd5 },
301	{ 0x51, 0x01 },
302	{ 0xd0, 0x00 },
303	};
304
305	static struct regdata mb86a20s_reset_reception[] = {
306	{ 0x70, 0xf0 },
307	{ 0x70, 0xff },
308	{ 0x08, 0x01 },
309	{ 0x08, 0x00 },
310	};
311
312	static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
313	u8 i2c_addr, int reg, int data)
314	{
315	u8 buf[] = { reg, data };
316	struct i2c_msg msg = {
317	.addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
318	};
319	int rc;
320
321	rc = i2c_transfer(state->i2c, &msg, 1);
322	if (rc != 1) {
7570800c	323	printk("%s: writereg error (rc == %i, reg == 0x%02x,"
b9ede79a MCC	324	" data == 0x%02x)\n", __func__, rc, reg, data);
	325	return rc;
	326	}
	327
	328	return 0;
	329	}
	330
	331	static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
	332	u8 i2c_addr, struct regdata *rd, int size)
	333	{
	334	int i, rc;
	335
	336	for (i = 0; i < size; i++) {
	337	rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
	338	rd[i].data);
	339	if (rc < 0)
	340	return rc;
	341	}
	342	return 0;
	343	}
	344
	345	static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
	346	u8 i2c_addr, u8 reg)
	347	{
	348	u8 val;
	349	int rc;
	350	struct i2c_msg msg[] = {
	351	{ .addr = i2c_addr, .flags = 0, .buf = &reg, .len = 1 },
	352	{ .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
	353	};
	354
	355	rc = i2c_transfer(state->i2c, msg, 2);
	356
	357	if (rc != 2) {
7570800c	358	rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
b9ede79a MCC	359	return rc;
	360	}
	361
	362	return val;
	363	}
	364
	365	#define mb86a20s_readreg(state, reg) \
	366	mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
	367	#define mb86a20s_writereg(state, reg, val) \
	368	mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
	369	#define mb86a20s_writeregdata(state, regdata) \
	370	mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
	371	regdata, ARRAY_SIZE(regdata))
	372
	373	static int mb86a20s_initfe(struct dvb_frontend *fe)
	374	{
	375	struct mb86a20s_state *state = fe->demodulator_priv;
	376	int rc;
7572f9c5	377	u8 regD5 = 1;
b9ede79a MCC	378
	379	dprintk("\n");
	380
68541cda MCC	381	if (fe->ops.i2c_gate_ctrl)
	382	fe->ops.i2c_gate_ctrl(fe, 0);
	383
b9ede79a MCC	384	/* Initialize the frontend */
	385	rc = mb86a20s_writeregdata(state, mb86a20s_init);
	386	if (rc < 0)
c736a5f2	387	goto err;
b9ede79a	388
7572f9c5 MCC	389	if (!state->config->is_serial) {
	390	regD5 &= ~1;
	391
	392	rc = mb86a20s_writereg(state, 0x50, 0xd5);
	393	if (rc < 0)
c736a5f2	394	goto err;
7572f9c5 MCC	395	rc = mb86a20s_writereg(state, 0x51, regD5);
7572f9c5 MCC	396	if (rc < 0)
c736a5f2	397	goto err;
7572f9c5 MCC	398	}
7572f9c5 MCC	399
68541cda MCC	400	if (fe->ops.i2c_gate_ctrl)
	401	fe->ops.i2c_gate_ctrl(fe, 1);
	402
c736a5f2 MCC	403	err:
	404	if (rc < 0) {
	405	state->need_init = true;
	406	printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
	407	} else {
	408	state->need_init = false;
25985edc	409	dprintk("Initialization succeeded.\n");
c736a5f2 MCC	410	}
c736a5f2 MCC	411	return rc;
b9ede79a MCC	412	}
	413
	414	static int mb86a20s_read_signal_strength(struct dvb_frontend fe, u16 strength)
	415	{
	416	struct mb86a20s_state *state = fe->demodulator_priv;
	417	unsigned rf_max, rf_min, rf;
	418	u8 val;
	419
	420	dprintk("\n");
	421
68541cda MCC	422	if (fe->ops.i2c_gate_ctrl)
	423	fe->ops.i2c_gate_ctrl(fe, 0);
	424
b9ede79a MCC	425	/* Does a binary search to get RF strength */
	426	rf_max = 0xfff;
	427	rf_min = 0;
	428	do {
	429	rf = (rf_max + rf_min) / 2;
	430	mb86a20s_writereg(state, 0x04, 0x1f);
	431	mb86a20s_writereg(state, 0x05, rf >> 8);
	432	mb86a20s_writereg(state, 0x04, 0x20);
	433	mb86a20s_writereg(state, 0x04, rf);
	434
	435	val = mb86a20s_readreg(state, 0x02);
	436	if (val & 0x08)
	437	rf_min = (rf_max + rf_min) / 2;
	438	else
	439	rf_max = (rf_max + rf_min) / 2;
	440	if (rf_max - rf_min < 4) {
	441	strength = (((rf_max + rf_min) / 2) 65535) / 4095;
	442	break;
	443	}
	444	} while (1);
	445
	446	dprintk("signal strength = %d\n", *strength);
	447
68541cda MCC	448	if (fe->ops.i2c_gate_ctrl)
	449	fe->ops.i2c_gate_ctrl(fe, 1);
	450
b9ede79a MCC	451	return 0;
	452	}
	453
	454	static int mb86a20s_read_status(struct dvb_frontend fe, fe_status_t status)
	455	{
	456	struct mb86a20s_state *state = fe->demodulator_priv;
	457	u8 val;
	458
	459	dprintk("\n");
	460	*status = 0;
	461
68541cda MCC	462	if (fe->ops.i2c_gate_ctrl)
68541cda MCC	463	fe->ops.i2c_gate_ctrl(fe, 0);
b9ede79a	464	val = mb86a20s_readreg(state, 0x0a) & 0xf;
68541cda MCC	465	if (fe->ops.i2c_gate_ctrl)
68541cda MCC	466	fe->ops.i2c_gate_ctrl(fe, 1);
b9ede79a MCC	467
	468	if (val >= 2)
	469	*status \|= FE_HAS_SIGNAL;
	470
	471	if (val >= 4)
	472	*status \|= FE_HAS_CARRIER;
	473
	474	if (val >= 5)
	475	*status \|= FE_HAS_VITERBI;
	476
	477	if (val >= 7)
	478	*status \|= FE_HAS_SYNC;
	479
	480	if (val >= 8) /* Maybe 9? */
	481	*status \|= FE_HAS_LOCK;
	482
	483	dprintk("val = %d, status = 0x%02x\n", val, *status);
	484
	485	return 0;
	486	}
	487
2d76e22b	488	static int mb86a20s_set_frontend(struct dvb_frontend *fe)
b9ede79a MCC	489	{
	490	struct mb86a20s_state *state = fe->demodulator_priv;
	491	int rc;
2d76e22b MCC	492	#if 0
	493	/*
	494	* FIXME: Properly implement the set frontend properties
	495	*/
	496	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
	497	#endif
b9ede79a MCC	498
	499	dprintk("\n");
	500
68541cda MCC	501	if (fe->ops.i2c_gate_ctrl)
68541cda MCC	502	fe->ops.i2c_gate_ctrl(fe, 1);
c736a5f2	503	dprintk("Calling tuner set parameters\n");
14d24d14	504	fe->ops.tuner_ops.set_params(fe);
68541cda	505
c736a5f2 MCC	506	/*
	507	* Make it more reliable: if, for some reason, the initial
	508	* device initialization doesn't happen, initialize it when
	509	* a SBTVD parameters are adjusted.
	510	*
	511	* Unfortunately, due to a hard to track bug at tda829x/tda18271,
	512	* the agc callback logic is not called during DVB attach time,
	513	* causing mb86a20s to not be initialized with Kworld SBTVD.
	514	* So, this hack is needed, in order to make Kworld SBTVD to work.
	515	*/
	516	if (state->need_init)
	517	mb86a20s_initfe(fe);
	518
68541cda MCC	519	if (fe->ops.i2c_gate_ctrl)
68541cda MCC	520	fe->ops.i2c_gate_ctrl(fe, 0);
b9ede79a	521	rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
68541cda MCC	522	if (fe->ops.i2c_gate_ctrl)
68541cda MCC	523	fe->ops.i2c_gate_ctrl(fe, 1);
b9ede79a MCC	524
	525	return rc;
	526	}
	527
7c61d80a	528	static int mb86a20s_get_frontend(struct dvb_frontend *fe)
b9ede79a	529	{
7c61d80a	530	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
b9ede79a MCC	531
	532	/* FIXME: For now, it does nothing */
	533
2d76e22b MCC	534	p->bandwidth_hz = 6000000;
	535	p->transmission_mode = TRANSMISSION_MODE_AUTO;
	536	p->guard_interval = GUARD_INTERVAL_AUTO;
	537	p->isdbt_partial_reception = 0;
b9ede79a MCC	538
	539	return 0;
	540	}
	541
	542	static int mb86a20s_tune(struct dvb_frontend *fe,
7e072221	543	bool re_tune,
b9ede79a MCC	544	unsigned int mode_flags,
	545	unsigned int *delay,
	546	fe_status_t *status)
	547	{
	548	int rc = 0;
	549
	550	dprintk("\n");
	551
7e072221	552	if (re_tune)
2d76e22b	553	rc = mb86a20s_set_frontend(fe);
b9ede79a MCC	554
	555	if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
	556	mb86a20s_read_status(fe, status);
	557
	558	return rc;
	559	}
	560
	561	static void mb86a20s_release(struct dvb_frontend *fe)
	562	{
	563	struct mb86a20s_state *state = fe->demodulator_priv;
	564
	565	dprintk("\n");
	566
	567	kfree(state);
	568	}
	569
	570	static struct dvb_frontend_ops mb86a20s_ops;
	571
	572	struct dvb_frontend mb86a20s_attach(const struct mb86a20s_config config,
	573	struct i2c_adapter *i2c)
	574	{
	575	u8 rev;
	576
	577	/* allocate memory for the internal state */
	578	struct mb86a20s_state *state =
	579	kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
	580
	581	dprintk("\n");
	582	if (state == NULL) {
	583	rc("Unable to kzalloc\n");
	584	goto error;
	585	}
	586
	587	/* setup the state */
	588	state->config = config;
	589	state->i2c = i2c;
	590
	591	/* create dvb_frontend */
	592	memcpy(&state->frontend.ops, &mb86a20s_ops,
	593	sizeof(struct dvb_frontend_ops));
	594	state->frontend.demodulator_priv = state;
	595
	596	/* Check if it is a mb86a20s frontend */
	597	rev = mb86a20s_readreg(state, 0);
	598
	599	if (rev == 0x13) {
	600	printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
	601	} else {
	602	printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
	603	rev);
	604	goto error;
	605	}
	606
	607	return &state->frontend;
	608
	609	error:
	610	kfree(state);
	611	return NULL;
	612	}
	613	EXPORT_SYMBOL(mb86a20s_attach);
	614
	615	static struct dvb_frontend_ops mb86a20s_ops = {
2d76e22b	616	.delsys = { SYS_ISDBT },
b9ede79a MCC	617	/* Use dib8000 values per default */
	618	.info = {
	619	.name = "Fujitsu mb86A20s",
	620	.type = FE_OFDM,
	621	.caps = FE_CAN_INVERSION_AUTO \| FE_CAN_RECOVER \|
	622	FE_CAN_FEC_1_2 \| FE_CAN_FEC_2_3 \| FE_CAN_FEC_3_4 \|
	623	FE_CAN_FEC_5_6 \| FE_CAN_FEC_7_8 \| FE_CAN_FEC_AUTO \|
	624	FE_CAN_QPSK \| FE_CAN_QAM_16 \| FE_CAN_QAM_64 \|
	625	FE_CAN_TRANSMISSION_MODE_AUTO \| FE_CAN_QAM_AUTO \|
	626	FE_CAN_GUARD_INTERVAL_AUTO \| FE_CAN_HIERARCHY_AUTO,
	627	/* Actually, those values depend on the used tuner */
	628	.frequency_min = 45000000,
	629	.frequency_max = 864000000,
	630	.frequency_stepsize = 62500,
	631	},
	632
	633	.release = mb86a20s_release,
	634
	635	.init = mb86a20s_initfe,
2d76e22b MCC	636	.set_frontend = mb86a20s_set_frontend,
2d76e22b MCC	637	.get_frontend = mb86a20s_get_frontend,
b9ede79a MCC	638	.read_status = mb86a20s_read_status,
	639	.read_signal_strength = mb86a20s_read_signal_strength,
	640	.tune = mb86a20s_tune,
	641	};
	642
	643	MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
	644	MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
	645	MODULE_LICENSE("GPL");