[linux-block.git] / drivers / media / dvb / frontends / au8522.c

/*
    Auvitek AU8522 QAM/8VSB demodulator driver

    Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include "dvb_frontend.h"
#include "dvb-pll.h"
#include "au8522.h"

struct au8522_state {

	struct i2c_adapter *i2c;

	/* configuration settings */
	const struct au8522_config *config;

	struct dvb_frontend frontend;

	u32 current_frequency;
	fe_modulation_t current_modulation;

};

static int debug;

#define dprintk(arg...) do {		\
	if (debug) 			\
		 printk(arg); 		\
	} while (0)

/* 16 bit registers, 8 bit values */
static int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
{
	int ret;
	u8 buf [] = { reg >> 8, reg & 0xff, data };

	struct i2c_msg msg = { .addr = state->config->demod_address,
			       .flags = 0, .buf = buf, .len = 3 };

	ret = i2c_transfer(state->i2c, &msg, 1);

	if (ret != 1)
		printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "
		       "ret == %i)\n", __func__, reg, data, ret);

	return (ret != 1) ? -1 : 0;
}

static u8 au8522_readreg(struct au8522_state *state, u16 reg)
{
	int ret;
	u8 b0 [] = { reg >> 8, reg & 0xff };
	u8 b1 [] = { 0 };

	struct i2c_msg msg [] = {
		{ .addr = state->config->demod_address, .flags = 0,
		  .buf = b0, .len = 2 },
		{ .addr = state->config->demod_address, .flags = I2C_M_RD,
		  .buf = b1, .len = 1 } };

	ret = i2c_transfer(state->i2c, msg, 2);

	if (ret != 2)
		printk(KERN_ERR "%s: readreg error (ret == %i)\n",
		       __func__, ret);
	return b1[0];
}

static int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
	struct au8522_state *state = fe->demodulator_priv;

	dprintk("%s(%d)\n", __func__, enable);

	if (enable)
		return au8522_writereg(state, 0x106, 1);
	else
		return au8522_writereg(state, 0x106, 0);
}

struct mse2snr_tab {
	u16 val;
	u16 data;
};

/* VSB SNR lookup table */
static struct mse2snr_tab vsb_mse2snr_tab[] = {
	{   0, 270 },
	{   2, 250 },
	{   3, 240 },
	{   5, 230 },
	{   7, 220 },
	{   9, 210 },
	{  12, 200 },
	{  13, 195 },
	{  15, 190 },
	{  17, 185 },
	{  19, 180 },
	{  21, 175 },
	{  24, 170 },
	{  27, 165 },
	{  31, 160 },
	{  32, 158 },
	{  33, 156 },
	{  36, 152 },
	{  37, 150 },
	{  39, 148 },
	{  40, 146 },
	{  41, 144 },
	{  43, 142 },
	{  44, 140 },
	{  48, 135 },
	{  50, 130 },
	{  43, 142 },
	{  53, 125 },
	{  56, 120 },
	{ 256, 115 },
};

/* QAM64 SNR lookup table */
static struct mse2snr_tab qam64_mse2snr_tab[] = {
	{  15,   0 },
	{  16, 290 },
	{  17, 288 },
	{  18, 286 },
	{  19, 284 },
	{  20, 282 },
	{  21, 281 },
	{  22, 279 },
	{  23, 277 },
	{  24, 275 },
	{  25, 273 },
	{  26, 271 },
	{  27, 269 },
	{  28, 268 },
	{  29, 266 },
	{  30, 264 },
	{  31, 262 },
	{  32, 260 },
	{  33, 259 },
	{  34, 258 },
	{  35, 256 },
	{  36, 255 },
	{  37, 254 },
	{  38, 252 },
	{  39, 251 },
	{  40, 250 },
	{  41, 249 },
	{  42, 248 },
	{  43, 246 },
	{  44, 245 },
	{  45, 244 },
	{  46, 242 },
	{  47, 241 },
	{  48, 240 },
	{  50, 239 },
	{  51, 238 },
	{  53, 237 },
	{  54, 236 },
	{  56, 235 },
	{  57, 234 },
	{  59, 233 },
	{  60, 232 },
	{  62, 231 },
	{  63, 230 },
	{  65, 229 },
	{  67, 228 },
	{  68, 227 },
	{  70, 226 },
	{  71, 225 },
	{  73, 224 },
	{  74, 223 },
	{  76, 222 },
	{  78, 221 },
	{  80, 220 },
	{  82, 219 },
	{  85, 218 },
	{  88, 217 },
	{  90, 216 },
	{  92, 215 },
	{  93, 214 },
	{  94, 212 },
	{  95, 211 },
	{  97, 210 },
	{  99, 209 },
	{ 101, 208 },
	{ 102, 207 },
	{ 104, 206 },
	{ 107, 205 },
	{ 111, 204 },
	{ 114, 203 },
	{ 118, 202 },
	{ 122, 201 },
	{ 125, 200 },
	{ 128, 199 },
	{ 130, 198 },
	{ 132, 197 },
	{ 256, 190 },
};

/* QAM256 SNR lookup table */
static struct mse2snr_tab qam256_mse2snr_tab[] = {
	{  16,   0 },
	{  17, 400 },
	{  18, 398 },
	{  19, 396 },
	{  20, 394 },
	{  21, 392 },
	{  22, 390 },
	{  23, 388 },
	{  24, 386 },
	{  25, 384 },
	{  26, 382 },
	{  27, 380 },
	{  28, 379 },
	{  29, 378 },
	{  30, 377 },
	{  31, 376 },
	{  32, 375 },
	{  33, 374 },
	{  34, 373 },
	{  35, 372 },
	{  36, 371 },
	{  37, 370 },
	{  38, 362 },
	{  39, 354 },
	{  40, 346 },
	{  41, 338 },
	{  42, 330 },
	{  43, 328 },
	{  44, 326 },
	{  45, 324 },
	{  46, 322 },
	{  47, 320 },
	{  48, 319 },
	{  49, 318 },
	{  50, 317 },
	{  51, 316 },
	{  52, 315 },
	{  53, 314 },
	{  54, 313 },
	{  55, 312 },
	{  56, 311 },
	{  57, 310 },
	{  58, 308 },
	{  59, 306 },
	{  60, 304 },
	{  61, 302 },
	{  62, 300 },
	{  63, 298 },
	{  65, 295 },
	{  68, 294 },
	{  70, 293 },
	{  73, 292 },
	{  76, 291 },
	{  78, 290 },
	{  79, 289 },
	{  81, 288 },
	{  82, 287 },
	{  83, 286 },
	{  84, 285 },
	{  85, 284 },
	{  86, 283 },
	{  88, 282 },
	{  89, 281 },
	{ 256, 280 },
};

static int au8522_mse2snr_lookup(struct mse2snr_tab *tab, int sz, int mse,
				 u16 *snr)
{
	int i, ret = -EINVAL;
	dprintk("%s()\n", __func__);

	for (i = 0; i < sz; i++) {
		if (mse < tab[i].val) {
			*snr = tab[i].data;
			ret = 0;
			break;
		}
	}
	dprintk("%s() snr=%d\n", __func__, *snr);
	return ret;
}

/* VSB Modulation table */
static struct {
	u16 reg;
	u16 data;
} VSB_mod_tab[] = {
	{ 0x8090, 0x84 },
	{ 0x4092, 0x11 },
	{ 0x2005, 0x00 },
	{ 0x8091, 0x80 },
	{ 0x80a3, 0x0c },
	{ 0x80a4, 0xe8 },
	{ 0x8081, 0xc4 },
	{ 0x80a5, 0x40 },
	{ 0x80a7, 0x40 },
	{ 0x80a6, 0x67 },
	{ 0x8262, 0x20 },
	{ 0x821c, 0x30 },
	{ 0x80d8, 0x1a },
	{ 0x8227, 0xa0 },
	{ 0x8121, 0xff },
	{ 0x80a8, 0xf0 },
	{ 0x80a9, 0x05 },
	{ 0x80aa, 0x77 },
	{ 0x80ab, 0xf0 },
	{ 0x80ac, 0x05 },
	{ 0x80ad, 0x77 },
	{ 0x80ae, 0x41 },
	{ 0x80af, 0x66 },
	{ 0x821b, 0xcc },
	{ 0x821d, 0x80 },
	{ 0x80b5, 0xfb },
	{ 0x80b6, 0x8e },
	{ 0x80b7, 0x39 },
	{ 0x80a4, 0xe8 },
	{ 0x8231, 0x13 },
};

/* QAM Modulation table */
static struct {
	u16 reg;
	u16 data;
} QAM_mod_tab[] = {
	{ 0x80a3, 0x09 },
	{ 0x80a4, 0x00 },
	{ 0x8081, 0xc4 },
	{ 0x80a5, 0x40 },
	{ 0x80b5, 0xfb },
	{ 0x80b6, 0x8e },
	{ 0x80b7, 0x39 },
	{ 0x80aa, 0x77 },
	{ 0x80ad, 0x77 },
	{ 0x80a6, 0x67 },
	{ 0x8262, 0x20 },
	{ 0x821c, 0x30 },
	{ 0x80b8, 0x3e },
	{ 0x80b9, 0xf0 },
	{ 0x80ba, 0x01 },
	{ 0x80bb, 0x18 },
	{ 0x80bc, 0x50 },
	{ 0x80bd, 0x00 },
	{ 0x80be, 0xea },
	{ 0x80bf, 0xef },
	{ 0x80c0, 0xfc },
	{ 0x80c1, 0xbd },
	{ 0x80c2, 0x1f },
	{ 0x80c3, 0xfc },
	{ 0x80c4, 0xdd },
	{ 0x80c5, 0xaf },
	{ 0x80c6, 0x00 },
	{ 0x80c7, 0x38 },
	{ 0x80c8, 0x30 },
	{ 0x80c9, 0x05 },
	{ 0x80ca, 0x4a },
	{ 0x80cb, 0xd0 },
	{ 0x80cc, 0x01 },
	{ 0x80cd, 0xd9 },
	{ 0x80ce, 0x6f },
	{ 0x80cf, 0xf9 },
	{ 0x80d0, 0x70 },
	{ 0x80d1, 0xdf },
	{ 0x80d2, 0xf7 },
	{ 0x80d3, 0xc2 },
	{ 0x80d4, 0xdf },
	{ 0x80d5, 0x02 },
	{ 0x80d6, 0x9a },
	{ 0x80d7, 0xd0 },
	{ 0x8250, 0x0d },
	{ 0x8251, 0xcd },
	{ 0x8252, 0xe0 },
	{ 0x8253, 0x05 },
	{ 0x8254, 0xa7 },
	{ 0x8255, 0xff },
	{ 0x8256, 0xed },
	{ 0x8257, 0x5b },
	{ 0x8258, 0xae },
	{ 0x8259, 0xe6 },
	{ 0x825a, 0x3d },
	{ 0x825b, 0x0f },
	{ 0x825c, 0x0d },
	{ 0x825d, 0xea },
	{ 0x825e, 0xf2 },
	{ 0x825f, 0x51 },
	{ 0x8260, 0xf5 },
	{ 0x8261, 0x06 },
	{ 0x821a, 0x00 },
	{ 0x8546, 0x40 },
	{ 0x8210, 0x26 },
	{ 0x8211, 0xf6 },
	{ 0x8212, 0x84 },
	{ 0x8213, 0x02 },
	{ 0x8502, 0x01 },
	{ 0x8121, 0x04 },
	{ 0x8122, 0x04 },
	{ 0x852e, 0x10 },
	{ 0x80a4, 0xca },
	{ 0x80a7, 0x40 },
	{ 0x8526, 0x01 },
};

static int au8522_enable_modulation(struct dvb_frontend *fe,
				    fe_modulation_t m)
{
	struct au8522_state *state = fe->demodulator_priv;
	int i;

	dprintk("%s(0x%08x)\n", __func__, m);

	switch (m) {
	case VSB_8:
		dprintk("%s() VSB_8\n", __func__);
		for (i = 0; i < ARRAY_SIZE(VSB_mod_tab); i++)
			au8522_writereg(state,
				VSB_mod_tab[i].reg,
				VSB_mod_tab[i].data);
		break;
	case QAM_64:
	case QAM_256:
		dprintk("%s() QAM 64/256\n", __func__);
		for (i = 0; i < ARRAY_SIZE(QAM_mod_tab); i++)
			au8522_writereg(state,
				QAM_mod_tab[i].reg,
				QAM_mod_tab[i].data);
		break;
	default:
		dprintk("%s() Invalid modulation\n", __func__);
		return -EINVAL;
	}

	state->current_modulation = m;

	return 0;
}

/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
static int au8522_set_frontend(struct dvb_frontend *fe,
			       struct dvb_frontend_parameters *p)
{
	struct au8522_state *state = fe->demodulator_priv;

	dprintk("%s(frequency=%d)\n", __func__, p->frequency);

	state->current_frequency = p->frequency;

	au8522_enable_modulation(fe, p->u.vsb.modulation);

	/* Allow the demod to settle */
	msleep(100);

	if (fe->ops.tuner_ops.set_params) {
		if (fe->ops.i2c_gate_ctrl)
			fe->ops.i2c_gate_ctrl(fe, 1);
		fe->ops.tuner_ops.set_params(fe, p);
		if (fe->ops.i2c_gate_ctrl)
			fe->ops.i2c_gate_ctrl(fe, 0);
	}

	return 0;
}

/* Reset the demod hardware and reset all of the configuration registers
   to a default state. */
static int au8522_init(struct dvb_frontend *fe)
{
	struct au8522_state *state = fe->demodulator_priv;
	dprintk("%s()\n", __func__);

	au8522_writereg(state, 0xa4, 1 << 5);

	au8522_i2c_gate_ctrl(fe, 1);

	return 0;
}

static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
	struct au8522_state *state = fe->demodulator_priv;
	u8 reg;
	u32 tuner_status = 0;

	*status = 0;

	if (state->current_modulation == VSB_8) {
		dprintk("%s() Checking VSB_8\n", __func__);
		reg = au8522_readreg(state, 0x4088);
		if (reg & 0x01)
			*status |= FE_HAS_VITERBI;
		if (reg & 0x02)
			*status |= FE_HAS_LOCK | FE_HAS_SYNC;
	} else {
		dprintk("%s() Checking QAM\n", __func__);
		reg = au8522_readreg(state, 0x4541);
		if (reg & 0x80)
			*status |= FE_HAS_VITERBI;
		if (reg & 0x20)
			*status |= FE_HAS_LOCK | FE_HAS_SYNC;
	}

	switch (state->config->status_mode) {
	case AU8522_DEMODLOCKING:
		dprintk("%s() DEMODLOCKING\n", __func__);
		if (*status & FE_HAS_VITERBI)
			*status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
		break;
	case AU8522_TUNERLOCKING:
		/* Get the tuner status */
		dprintk("%s() TUNERLOCKING\n", __func__);
		if (fe->ops.tuner_ops.get_status) {
			if (fe->ops.i2c_gate_ctrl)
				fe->ops.i2c_gate_ctrl(fe, 1);

			fe->ops.tuner_ops.get_status(fe, &tuner_status);

			if (fe->ops.i2c_gate_ctrl)
				fe->ops.i2c_gate_ctrl(fe, 0);
		}
		if (tuner_status)
			*status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
		break;
	}

	dprintk("%s() status 0x%08x\n", __func__, *status);

	return 0;
}

static int au8522_read_snr(struct dvb_frontend *fe, u16 *snr)
{
	struct au8522_state *state = fe->demodulator_priv;
	int ret = -EINVAL;

	dprintk("%s()\n", __func__);

	if (state->current_modulation == QAM_256)
		ret = au8522_mse2snr_lookup(qam256_mse2snr_tab,
					    ARRAY_SIZE(qam256_mse2snr_tab),
					    au8522_readreg(state, 0x4522),
					    snr);
	else if (state->current_modulation == QAM_64)
		ret = au8522_mse2snr_lookup(qam64_mse2snr_tab,
					    ARRAY_SIZE(qam64_mse2snr_tab),
					    au8522_readreg(state, 0x4522),
					    snr);
	else /* VSB_8 */
		ret = au8522_mse2snr_lookup(vsb_mse2snr_tab,
					    ARRAY_SIZE(vsb_mse2snr_tab),
					    au8522_readreg(state, 0x4311),
					    snr);

	return ret;
}

static int au8522_read_signal_strength(struct dvb_frontend *fe,
				       u16 *signal_strength)
{
	return au8522_read_snr(fe, signal_strength);
}

static int au8522_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
	struct au8522_state *state = fe->demodulator_priv;

	if (state->current_modulation == VSB_8)
		*ucblocks = au8522_readreg(state, 0x4087);
	else
		*ucblocks = au8522_readreg(state, 0x4543);

	return 0;
}

static int au8522_read_ber(struct dvb_frontend *fe, u32 *ber)
{
	return au8522_read_ucblocks(fe, ber);
}

static int au8522_get_frontend(struct dvb_frontend *fe,
				struct dvb_frontend_parameters *p)
{
	struct au8522_state *state = fe->demodulator_priv;

	p->frequency = state->current_frequency;
	p->u.vsb.modulation = state->current_modulation;

	return 0;
}

static int au8522_get_tune_settings(struct dvb_frontend *fe,
				    struct dvb_frontend_tune_settings *tune)
{
	tune->min_delay_ms = 1000;
	return 0;
}

static void au8522_release(struct dvb_frontend *fe)
{
	struct au8522_state *state = fe->demodulator_priv;
	kfree(state);
}

static struct dvb_frontend_ops au8522_ops;

struct dvb_frontend *au8522_attach(const struct au8522_config *config,
				   struct i2c_adapter *i2c)
{
	struct au8522_state *state = NULL;

	/* allocate memory for the internal state */
	state = kmalloc(sizeof(struct au8522_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;
	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &au8522_ops,
	       sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;

	if (au8522_init(&state->frontend) != 0) {
		printk(KERN_ERR "%s: Failed to initialize correctly\n",
			__func__);
		goto error;
	}

	/* Note: Leaving the I2C gate open here. */
	au8522_i2c_gate_ctrl(&state->frontend, 1);

	return &state->frontend;

error:
	kfree(state);
	return NULL;
}
EXPORT_SYMBOL(au8522_attach);

static struct dvb_frontend_ops au8522_ops = {

	.info = {
		.name			= "Auvitek AU8522 QAM/8VSB Frontend",
		.type			= FE_ATSC,
		.frequency_min		= 54000000,
		.frequency_max		= 858000000,
		.frequency_stepsize	= 62500,
		.caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
	},

	.init                 = au8522_init,
	.i2c_gate_ctrl        = au8522_i2c_gate_ctrl,
	.set_frontend         = au8522_set_frontend,
	.get_frontend         = au8522_get_frontend,
	.get_tune_settings    = au8522_get_tune_settings,
	.read_status          = au8522_read_status,
	.read_ber             = au8522_read_ber,
	.read_signal_strength = au8522_read_signal_strength,
	.read_snr             = au8522_read_snr,
	.read_ucblocks        = au8522_read_ucblocks,
	.release              = au8522_release,
};

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Enable verbose debug messages");

MODULE_DESCRIPTION("Auvitek AU8522 QAM-B/ATSC Demodulator driver");
MODULE_AUTHOR("Steven Toth");
MODULE_LICENSE("GPL");
Commit	Line	Data
265a6510 ST	1	/*
	2	Auvitek AU8522 QAM/8VSB demodulator driver
	3
	4	Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
	18	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19
	20	*/
	21
	22	#include <linux/kernel.h>
	23	#include <linux/init.h>
	24	#include <linux/module.h>
	25	#include <linux/string.h>
	26	#include <linux/slab.h>
	27	#include <linux/delay.h>
	28	#include "dvb_frontend.h"
	29	#include "dvb-pll.h"
	30	#include "au8522.h"
	31
	32	struct au8522_state {
	33
e059b0fa	34	struct i2c_adapter *i2c;
265a6510 ST	35
265a6510 ST	36	/* configuration settings */
e059b0fa	37	const struct au8522_config *config;
265a6510 ST	38
	39	struct dvb_frontend frontend;
	40
	41	u32 current_frequency;
	42	fe_modulation_t current_modulation;
	43
	44	};
	45
18d73c58 MCC	46	static int debug;
	47
	48	#define dprintk(arg...) do { \
	49	if (debug) \
353a2761	50	printk(arg); \
18d73c58	51	} while (0)
265a6510 ST	52
265a6510 ST	53	/* 16 bit registers, 8 bit values */
e059b0fa	54	static int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
265a6510 ST	55	{
	56	int ret;
	57	u8 buf [] = { reg >> 8, reg & 0xff, data };
	58
	59	struct i2c_msg msg = { .addr = state->config->demod_address,
	60	.flags = 0, .buf = buf, .len = 3 };
	61
	62	ret = i2c_transfer(state->i2c, &msg, 1);
	63
	64	if (ret != 1)
	65	printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "
ce1719a6	66	"ret == %i)\n", __func__, reg, data, ret);
265a6510 ST	67
	68	return (ret != 1) ? -1 : 0;
	69	}
	70
e059b0fa	71	static u8 au8522_readreg(struct au8522_state *state, u16 reg)
265a6510 ST	72	{
	73	int ret;
	74	u8 b0 [] = { reg >> 8, reg & 0xff };
	75	u8 b1 [] = { 0 };
	76
	77	struct i2c_msg msg [] = {
	78	{ .addr = state->config->demod_address, .flags = 0,
	79	.buf = b0, .len = 2 },
	80	{ .addr = state->config->demod_address, .flags = I2C_M_RD,
	81	.buf = b1, .len = 1 } };
	82
	83	ret = i2c_transfer(state->i2c, msg, 2);
	84
	85	if (ret != 2)
ce1719a6 MK	86	printk(KERN_ERR "%s: readreg error (ret == %i)\n",
ce1719a6 MK	87	__func__, ret);
265a6510 ST	88	return b1[0];
	89	}
	90
e059b0fa	91	static int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
265a6510	92	{
e059b0fa	93	struct au8522_state *state = fe->demodulator_priv;
265a6510	94
ce1719a6	95	dprintk("%s(%d)\n", __func__, enable);
265a6510 ST	96
	97	if (enable)
	98	return au8522_writereg(state, 0x106, 1);
	99	else
	100	return au8522_writereg(state, 0x106, 0);
	101	}
	102
0daa5de7	103	struct mse2snr_tab {
f01699b4 ST	104	u16 val;
f01699b4 ST	105	u16 data;
0daa5de7 MK	106	};
	107
	108	/* VSB SNR lookup table */
	109	static struct mse2snr_tab vsb_mse2snr_tab[] = {
f01699b4 ST	110	{ 0, 270 },
	111	{ 2, 250 },
	112	{ 3, 240 },
	113	{ 5, 230 },
	114	{ 7, 220 },
	115	{ 9, 210 },
	116	{ 12, 200 },
	117	{ 13, 195 },
	118	{ 15, 190 },
	119	{ 17, 185 },
	120	{ 19, 180 },
	121	{ 21, 175 },
	122	{ 24, 170 },
	123	{ 27, 165 },
	124	{ 31, 160 },
	125	{ 32, 158 },
	126	{ 33, 156 },
	127	{ 36, 152 },
	128	{ 37, 150 },
	129	{ 39, 148 },
	130	{ 40, 146 },
	131	{ 41, 144 },
	132	{ 43, 142 },
	133	{ 44, 140 },
	134	{ 48, 135 },
	135	{ 50, 130 },
	136	{ 43, 142 },
	137	{ 53, 125 },
	138	{ 56, 120 },
	139	{ 256, 115 },
	140	};
	141
	142	/* QAM64 SNR lookup table */
0daa5de7	143	static struct mse2snr_tab qam64_mse2snr_tab[] = {
f01699b4 ST	144	{ 15, 0 },
	145	{ 16, 290 },
	146	{ 17, 288 },
	147	{ 18, 286 },
	148	{ 19, 284 },
	149	{ 20, 282 },
	150	{ 21, 281 },
	151	{ 22, 279 },
	152	{ 23, 277 },
	153	{ 24, 275 },
	154	{ 25, 273 },
	155	{ 26, 271 },
	156	{ 27, 269 },
	157	{ 28, 268 },
	158	{ 29, 266 },
	159	{ 30, 264 },
	160	{ 31, 262 },
	161	{ 32, 260 },
	162	{ 33, 259 },
	163	{ 34, 258 },
	164	{ 35, 256 },
	165	{ 36, 255 },
	166	{ 37, 254 },
	167	{ 38, 252 },
	168	{ 39, 251 },
	169	{ 40, 250 },
	170	{ 41, 249 },
	171	{ 42, 248 },
	172	{ 43, 246 },
	173	{ 44, 245 },
	174	{ 45, 244 },
	175	{ 46, 242 },
	176	{ 47, 241 },
	177	{ 48, 240 },
	178	{ 50, 239 },
	179	{ 51, 238 },
	180	{ 53, 237 },
	181	{ 54, 236 },
	182	{ 56, 235 },
	183	{ 57, 234 },
	184	{ 59, 233 },
	185	{ 60, 232 },
	186	{ 62, 231 },
	187	{ 63, 230 },
	188	{ 65, 229 },
	189	{ 67, 228 },
	190	{ 68, 227 },
	191	{ 70, 226 },
	192	{ 71, 225 },
	193	{ 73, 224 },
	194	{ 74, 223 },
	195	{ 76, 222 },
	196	{ 78, 221 },
	197	{ 80, 220 },
	198	{ 82, 219 },
	199	{ 85, 218 },
	200	{ 88, 217 },
	201	{ 90, 216 },
	202	{ 92, 215 },
	203	{ 93, 214 },
	204	{ 94, 212 },
	205	{ 95, 211 },
	206	{ 97, 210 },
	207	{ 99, 209 },
208	{ 101, 208 },
209	{ 102, 207 },
210	{ 104, 206 },
211	{ 107, 205 },
212	{ 111, 204 },
213	{ 114, 203 },
214	{ 118, 202 },
215	{ 122, 201 },
216	{ 125, 200 },
217	{ 128, 199 },
218	{ 130, 198 },
219	{ 132, 197 },
220	{ 256, 190 },
221	};
222
223	/* QAM256 SNR lookup table */
0daa5de7	224	static struct mse2snr_tab qam256_mse2snr_tab[] = {
f01699b4 ST	225	{ 16, 0 },
	226	{ 17, 400 },
	227	{ 18, 398 },
	228	{ 19, 396 },
	229	{ 20, 394 },
	230	{ 21, 392 },
	231	{ 22, 390 },
	232	{ 23, 388 },
	233	{ 24, 386 },
	234	{ 25, 384 },
	235	{ 26, 382 },
	236	{ 27, 380 },
	237	{ 28, 379 },
	238	{ 29, 378 },
	239	{ 30, 377 },
	240	{ 31, 376 },
	241	{ 32, 375 },
	242	{ 33, 374 },
	243	{ 34, 373 },
	244	{ 35, 372 },
	245	{ 36, 371 },
	246	{ 37, 370 },
	247	{ 38, 362 },
	248	{ 39, 354 },
	249	{ 40, 346 },
	250	{ 41, 338 },
	251	{ 42, 330 },
	252	{ 43, 328 },
	253	{ 44, 326 },
	254	{ 45, 324 },
	255	{ 46, 322 },
	256	{ 47, 320 },
	257	{ 48, 319 },
	258	{ 49, 318 },
	259	{ 50, 317 },
	260	{ 51, 316 },
	261	{ 52, 315 },
	262	{ 53, 314 },
	263	{ 54, 313 },
	264	{ 55, 312 },
	265	{ 56, 311 },
	266	{ 57, 310 },
	267	{ 58, 308 },
	268	{ 59, 306 },
	269	{ 60, 304 },
	270	{ 61, 302 },
	271	{ 62, 300 },
	272	{ 63, 298 },
	273	{ 65, 295 },
	274	{ 68, 294 },
	275	{ 70, 293 },
	276	{ 73, 292 },
	277	{ 76, 291 },
	278	{ 78, 290 },
	279	{ 79, 289 },
	280	{ 81, 288 },
	281	{ 82, 287 },
	282	{ 83, 286 },
	283	{ 84, 285 },
	284	{ 85, 284 },
	285	{ 86, 283 },
	286	{ 88, 282 },
	287	{ 89, 281 },
	288	{ 256, 280 },
289	};
290
18d73c58 MCC	291	static int au8522_mse2snr_lookup(struct mse2snr_tab *tab, int sz, int mse,
18d73c58 MCC	292	u16 *snr)
f01699b4 ST	293	{
	294	int i, ret = -EINVAL;
	295	dprintk("%s()\n", __func__);
	296
0daa5de7 MK	297	for (i = 0; i < sz; i++) {
	298	if (mse < tab[i].val) {
	299	*snr = tab[i].data;
f01699b4 ST	300	ret = 0;
	301	break;
	302	}
	303	}
	304	dprintk("%s() snr=%d\n", __func__, *snr);
	305	return ret;
	306	}
	307
	308	/* VSB Modulation table */
	309	static struct {
	310	u16 reg;
	311	u16 data;
	312	} VSB_mod_tab[] = {
	313	{ 0x8090, 0x84 },
	314	{ 0x4092, 0x11 },
	315	{ 0x2005, 0x00 },
	316	{ 0x8091, 0x80 },
	317	{ 0x80a3, 0x0c },
	318	{ 0x80a4, 0xe8 },
	319	{ 0x8081, 0xc4 },
	320	{ 0x80a5, 0x40 },
	321	{ 0x80a7, 0x40 },
	322	{ 0x80a6, 0x67 },
	323	{ 0x8262, 0x20 },
	324	{ 0x821c, 0x30 },
	325	{ 0x80d8, 0x1a },
	326	{ 0x8227, 0xa0 },
	327	{ 0x8121, 0xff },
	328	{ 0x80a8, 0xf0 },
	329	{ 0x80a9, 0x05 },
	330	{ 0x80aa, 0x77 },
	331	{ 0x80ab, 0xf0 },
	332	{ 0x80ac, 0x05 },
	333	{ 0x80ad, 0x77 },
	334	{ 0x80ae, 0x41 },
	335	{ 0x80af, 0x66 },
	336	{ 0x821b, 0xcc },
	337	{ 0x821d, 0x80 },
	338	{ 0x80b5, 0xfb },
	339	{ 0x80b6, 0x8e },
	340	{ 0x80b7, 0x39 },
	341	{ 0x80a4, 0xe8 },
	342	{ 0x8231, 0x13 },
	343	};
	344
	345	/* QAM Modulation table */
	346	static struct {
	347	u16 reg;
	348	u16 data;
	349	} QAM_mod_tab[] = {
	350	{ 0x80a3, 0x09 },
	351	{ 0x80a4, 0x00 },
	352	{ 0x8081, 0xc4 },
	353	{ 0x80a5, 0x40 },
	354	{ 0x80b5, 0xfb },
	355	{ 0x80b6, 0x8e },
	356	{ 0x80b7, 0x39 },
	357	{ 0x80aa, 0x77 },
	358	{ 0x80ad, 0x77 },
	359	{ 0x80a6, 0x67 },
	360	{ 0x8262, 0x20 },
	361	{ 0x821c, 0x30 },
	362	{ 0x80b8, 0x3e },
	363	{ 0x80b9, 0xf0 },
364	{ 0x80ba, 0x01 },
365	{ 0x80bb, 0x18 },
366	{ 0x80bc, 0x50 },
367	{ 0x80bd, 0x00 },
368	{ 0x80be, 0xea },
369	{ 0x80bf, 0xef },
370	{ 0x80c0, 0xfc },
371	{ 0x80c1, 0xbd },
372	{ 0x80c2, 0x1f },
373	{ 0x80c3, 0xfc },
374	{ 0x80c4, 0xdd },
375	{ 0x80c5, 0xaf },
376	{ 0x80c6, 0x00 },
377	{ 0x80c7, 0x38 },
378	{ 0x80c8, 0x30 },
379	{ 0x80c9, 0x05 },
380	{ 0x80ca, 0x4a },
381	{ 0x80cb, 0xd0 },
382	{ 0x80cc, 0x01 },
383	{ 0x80cd, 0xd9 },
384	{ 0x80ce, 0x6f },
385	{ 0x80cf, 0xf9 },
386	{ 0x80d0, 0x70 },
387	{ 0x80d1, 0xdf },
388	{ 0x80d2, 0xf7 },
389	{ 0x80d3, 0xc2 },
390	{ 0x80d4, 0xdf },
391	{ 0x80d5, 0x02 },
392	{ 0x80d6, 0x9a },
393	{ 0x80d7, 0xd0 },
394	{ 0x8250, 0x0d },
395	{ 0x8251, 0xcd },
396	{ 0x8252, 0xe0 },
397	{ 0x8253, 0x05 },
398	{ 0x8254, 0xa7 },
399	{ 0x8255, 0xff },
400	{ 0x8256, 0xed },
401	{ 0x8257, 0x5b },
402	{ 0x8258, 0xae },
403	{ 0x8259, 0xe6 },
404	{ 0x825a, 0x3d },
405	{ 0x825b, 0x0f },
406	{ 0x825c, 0x0d },
407	{ 0x825d, 0xea },
408	{ 0x825e, 0xf2 },
409	{ 0x825f, 0x51 },
410	{ 0x8260, 0xf5 },
411	{ 0x8261, 0x06 },
412	{ 0x821a, 0x00 },
413	{ 0x8546, 0x40 },
414	{ 0x8210, 0x26 },
415	{ 0x8211, 0xf6 },
416	{ 0x8212, 0x84 },
417	{ 0x8213, 0x02 },
418	{ 0x8502, 0x01 },
419	{ 0x8121, 0x04 },
420	{ 0x8122, 0x04 },
421	{ 0x852e, 0x10 },
422	{ 0x80a4, 0xca },
423	{ 0x80a7, 0x40 },
424	{ 0x8526, 0x01 },
425	};
426
e059b0fa MK	427	static int au8522_enable_modulation(struct dvb_frontend *fe,
e059b0fa MK	428	fe_modulation_t m)
265a6510	429	{
e059b0fa	430	struct au8522_state *state = fe->demodulator_priv;
f01699b4	431	int i;
265a6510	432
ce1719a6	433	dprintk("%s(0x%08x)\n", __func__, m);
265a6510	434
18d73c58	435	switch (m) {
265a6510	436	case VSB_8:
ce1719a6	437	dprintk("%s() VSB_8\n", __func__);
f01699b4 ST	438	for (i = 0; i < ARRAY_SIZE(VSB_mod_tab); i++)
	439	au8522_writereg(state,
	440	VSB_mod_tab[i].reg,
	441	VSB_mod_tab[i].data);
265a6510 ST	442	break;
	443	case QAM_64:
	444	case QAM_256:
f01699b4 ST	445	dprintk("%s() QAM 64/256\n", __func__);
	446	for (i = 0; i < ARRAY_SIZE(QAM_mod_tab); i++)
	447	au8522_writereg(state,
	448	QAM_mod_tab[i].reg,
	449	QAM_mod_tab[i].data);
265a6510 ST	450	break;
265a6510 ST	451	default:
ce1719a6	452	dprintk("%s() Invalid modulation\n", __func__);
265a6510 ST	453	return -EINVAL;
	454	}
	455
	456	state->current_modulation = m;
	457
	458	return 0;
	459	}
	460
	461	/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
e059b0fa MK	462	static int au8522_set_frontend(struct dvb_frontend *fe,
e059b0fa MK	463	struct dvb_frontend_parameters *p)
265a6510	464	{
e059b0fa	465	struct au8522_state *state = fe->demodulator_priv;
265a6510	466
ce1719a6	467	dprintk("%s(frequency=%d)\n", __func__, p->frequency);
265a6510 ST	468
	469	state->current_frequency = p->frequency;
	470
	471	au8522_enable_modulation(fe, p->u.vsb.modulation);
	472
	473	/* Allow the demod to settle */
	474	msleep(100);
	475
	476	if (fe->ops.tuner_ops.set_params) {
18d73c58 MCC	477	if (fe->ops.i2c_gate_ctrl)
18d73c58 MCC	478	fe->ops.i2c_gate_ctrl(fe, 1);
265a6510	479	fe->ops.tuner_ops.set_params(fe, p);
18d73c58 MCC	480	if (fe->ops.i2c_gate_ctrl)
18d73c58 MCC	481	fe->ops.i2c_gate_ctrl(fe, 0);
265a6510 ST	482	}
	483
	484	return 0;
	485	}
	486
	487	/* Reset the demod hardware and reset all of the configuration registers
	488	to a default state. */
e059b0fa	489	static int au8522_init(struct dvb_frontend *fe)
265a6510	490	{
e059b0fa	491	struct au8522_state *state = fe->demodulator_priv;
ce1719a6	492	dprintk("%s()\n", __func__);
265a6510 ST	493
	494	au8522_writereg(state, 0xa4, 1 << 5);
	495
	496	au8522_i2c_gate_ctrl(fe, 1);
	497
	498	return 0;
	499	}
	500
e059b0fa	501	static int au8522_read_status(struct dvb_frontend fe, fe_status_t status)
265a6510	502	{
e059b0fa	503	struct au8522_state *state = fe->demodulator_priv;
265a6510 ST	504	u8 reg;
	505	u32 tuner_status = 0;
	506
	507	*status = 0;
	508
	509	if (state->current_modulation == VSB_8) {
ce1719a6	510	dprintk("%s() Checking VSB_8\n", __func__);
265a6510	511	reg = au8522_readreg(state, 0x4088);
e059b0fa	512	if (reg & 0x01)
265a6510	513	*status \|= FE_HAS_VITERBI;
e059b0fa	514	if (reg & 0x02)
265a6510 ST	515	*status \|= FE_HAS_LOCK \| FE_HAS_SYNC;
265a6510 ST	516	} else {
ce1719a6	517	dprintk("%s() Checking QAM\n", __func__);
265a6510	518	reg = au8522_readreg(state, 0x4541);
e059b0fa	519	if (reg & 0x80)
265a6510	520	*status \|= FE_HAS_VITERBI;
e059b0fa	521	if (reg & 0x20)
265a6510 ST	522	*status \|= FE_HAS_LOCK \| FE_HAS_SYNC;
	523	}
	524
18d73c58	525	switch (state->config->status_mode) {
265a6510	526	case AU8522_DEMODLOCKING:
ce1719a6	527	dprintk("%s() DEMODLOCKING\n", __func__);
265a6510 ST	528	if (*status & FE_HAS_VITERBI)
	529	*status \|= FE_HAS_CARRIER \| FE_HAS_SIGNAL;
	530	break;
	531	case AU8522_TUNERLOCKING:
	532	/* Get the tuner status */
ce1719a6	533	dprintk("%s() TUNERLOCKING\n", __func__);
265a6510 ST	534	if (fe->ops.tuner_ops.get_status) {
	535	if (fe->ops.i2c_gate_ctrl)
	536	fe->ops.i2c_gate_ctrl(fe, 1);
	537
	538	fe->ops.tuner_ops.get_status(fe, &tuner_status);
	539
	540	if (fe->ops.i2c_gate_ctrl)
	541	fe->ops.i2c_gate_ctrl(fe, 0);
	542	}
	543	if (tuner_status)
	544	*status \|= FE_HAS_CARRIER \| FE_HAS_SIGNAL;
	545	break;
	546	}
	547
ce1719a6	548	dprintk("%s() status 0x%08x\n", __func__, *status);
265a6510 ST	549
	550	return 0;
	551	}
	552
f01699b4	553	static int au8522_read_snr(struct dvb_frontend fe, u16 snr)
fb8152cb MK	554	{
fb8152cb MK	555	struct au8522_state *state = fe->demodulator_priv;
f01699b4	556	int ret = -EINVAL;
fb8152cb	557
ce1719a6	558	dprintk("%s()\n", __func__);
265a6510	559
f01699b4	560	if (state->current_modulation == QAM_256)
0daa5de7 MK	561	ret = au8522_mse2snr_lookup(qam256_mse2snr_tab,
	562	ARRAY_SIZE(qam256_mse2snr_tab),
	563	au8522_readreg(state, 0x4522),
	564	snr);
f01699b4	565	else if (state->current_modulation == QAM_64)
0daa5de7 MK	566	ret = au8522_mse2snr_lookup(qam64_mse2snr_tab,
	567	ARRAY_SIZE(qam64_mse2snr_tab),
	568	au8522_readreg(state, 0x4522),
	569	snr);
f01699b4	570	else /* VSB_8 */
0daa5de7 MK	571	ret = au8522_mse2snr_lookup(vsb_mse2snr_tab,
	572	ARRAY_SIZE(vsb_mse2snr_tab),
	573	au8522_readreg(state, 0x4311),
	574	snr);
f01699b4 ST	575
f01699b4 ST	576	return ret;
265a6510 ST	577	}
265a6510 ST	578
e059b0fa MK	579	static int au8522_read_signal_strength(struct dvb_frontend *fe,
e059b0fa MK	580	u16 *signal_strength)
265a6510 ST	581	{
	582	return au8522_read_snr(fe, signal_strength);
	583	}
	584
e059b0fa	585	static int au8522_read_ucblocks(struct dvb_frontend fe, u32 ucblocks)
265a6510	586	{
e059b0fa	587	struct au8522_state *state = fe->demodulator_priv;
265a6510	588
8973dc4b MK	589	if (state->current_modulation == VSB_8)
	590	*ucblocks = au8522_readreg(state, 0x4087);
	591	else
	592	*ucblocks = au8522_readreg(state, 0x4543);
265a6510 ST	593
	594	return 0;
	595	}
	596
e059b0fa	597	static int au8522_read_ber(struct dvb_frontend fe, u32 ber)
265a6510 ST	598	{
	599	return au8522_read_ucblocks(fe, ber);
	600	}
	601
e059b0fa	602	static int au8522_get_frontend(struct dvb_frontend *fe,
265a6510 ST	603	struct dvb_frontend_parameters *p)
265a6510 ST	604	{
e059b0fa	605	struct au8522_state *state = fe->demodulator_priv;
265a6510 ST	606
	607	p->frequency = state->current_frequency;
	608	p->u.vsb.modulation = state->current_modulation;
	609
	610	return 0;
	611	}
	612
e059b0fa MK	613	static int au8522_get_tune_settings(struct dvb_frontend *fe,
e059b0fa MK	614	struct dvb_frontend_tune_settings *tune)
265a6510 ST	615	{
	616	tune->min_delay_ms = 1000;
	617	return 0;
	618	}
	619
e059b0fa	620	static void au8522_release(struct dvb_frontend *fe)
265a6510	621	{
e059b0fa	622	struct au8522_state *state = fe->demodulator_priv;
265a6510 ST	623	kfree(state);
	624	}
	625
	626	static struct dvb_frontend_ops au8522_ops;
	627
e059b0fa MK	628	struct dvb_frontend au8522_attach(const struct au8522_config config,
e059b0fa MK	629	struct i2c_adapter *i2c)
265a6510	630	{
e059b0fa	631	struct au8522_state *state = NULL;
265a6510 ST	632
	633	/* allocate memory for the internal state */
	634	state = kmalloc(sizeof(struct au8522_state), GFP_KERNEL);
	635	if (state == NULL)
	636	goto error;
	637
	638	/* setup the state */
	639	state->config = config;
	640	state->i2c = i2c;
	641	/* create dvb_frontend */
	642	memcpy(&state->frontend.ops, &au8522_ops,
	643	sizeof(struct dvb_frontend_ops));
	644	state->frontend.demodulator_priv = state;
	645
	646	if (au8522_init(&state->frontend) != 0) {
	647	printk(KERN_ERR "%s: Failed to initialize correctly\n",
ce1719a6	648	__func__);
265a6510 ST	649	goto error;
	650	}
	651
	652	/* Note: Leaving the I2C gate open here. */
	653	au8522_i2c_gate_ctrl(&state->frontend, 1);
	654
	655	return &state->frontend;
	656
	657	error:
	658	kfree(state);
	659	return NULL;
	660	}
18d73c58	661	EXPORT_SYMBOL(au8522_attach);
265a6510 ST	662
	663	static struct dvb_frontend_ops au8522_ops = {
	664
	665	.info = {
	666	.name = "Auvitek AU8522 QAM/8VSB Frontend",
	667	.type = FE_ATSC,
	668	.frequency_min = 54000000,
	669	.frequency_max = 858000000,
	670	.frequency_stepsize = 62500,
	671	.caps = FE_CAN_QAM_64 \| FE_CAN_QAM_256 \| FE_CAN_8VSB
	672	},
	673
	674	.init = au8522_init,
	675	.i2c_gate_ctrl = au8522_i2c_gate_ctrl,
	676	.set_frontend = au8522_set_frontend,
	677	.get_frontend = au8522_get_frontend,
	678	.get_tune_settings = au8522_get_tune_settings,
	679	.read_status = au8522_read_status,
	680	.read_ber = au8522_read_ber,
	681	.read_signal_strength = au8522_read_signal_strength,
	682	.read_snr = au8522_read_snr,
	683	.read_ucblocks = au8522_read_ucblocks,
	684	.release = au8522_release,
	685	};
	686
	687	module_param(debug, int, 0644);
	688	MODULE_PARM_DESC(debug, "Enable verbose debug messages");
	689
	690	MODULE_DESCRIPTION("Auvitek AU8522 QAM-B/ATSC Demodulator driver");
	691	MODULE_AUTHOR("Steven Toth");
	692	MODULE_LICENSE("GPL");