include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[linux-2.6-block.git] / drivers / media / dvb / dm1105 / dm1105.c
CommitLineData
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1/*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
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22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/proc_fs.h>
27#include <linux/pci.h>
28#include <linux/dma-mapping.h>
29#include <linux/input.h>
5a0e3ad6 30#include <linux/slab.h>
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31#include <media/ir-common.h>
32
33#include "demux.h"
34#include "dmxdev.h"
35#include "dvb_demux.h"
36#include "dvb_frontend.h"
37#include "dvb_net.h"
38#include "dvbdev.h"
39#include "dvb-pll.h"
40
41#include "stv0299.h"
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42#include "stv0288.h"
43#include "stb6000.h"
04ad28c9 44#include "si21xx.h"
35d9c427 45#include "cx24116.h"
a611d0ca 46#include "z0194a.h"
b4a0e816 47#include "ds3000.h"
a611d0ca 48
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49#define UNSET (-1U)
50
51#define DM1105_BOARD_NOAUTO UNSET
52#define DM1105_BOARD_UNKNOWN 0
53#define DM1105_BOARD_DVBWORLD_2002 1
54#define DM1105_BOARD_DVBWORLD_2004 2
55#define DM1105_BOARD_AXESS_DM05 3
56
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57/* ----------------------------------------------- */
58/*
59 * PCI ID's
60 */
61#ifndef PCI_VENDOR_ID_TRIGEM
62#define PCI_VENDOR_ID_TRIGEM 0x109f
63#endif
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64#ifndef PCI_VENDOR_ID_AXESS
65#define PCI_VENDOR_ID_AXESS 0x195d
66#endif
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67#ifndef PCI_DEVICE_ID_DM1105
68#define PCI_DEVICE_ID_DM1105 0x036f
69#endif
70#ifndef PCI_DEVICE_ID_DW2002
71#define PCI_DEVICE_ID_DW2002 0x2002
72#endif
73#ifndef PCI_DEVICE_ID_DW2004
74#define PCI_DEVICE_ID_DW2004 0x2004
75#endif
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76#ifndef PCI_DEVICE_ID_DM05
77#define PCI_DEVICE_ID_DM05 0x1105
78#endif
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79/* ----------------------------------------------- */
80/* sdmc dm1105 registers */
81
82/* TS Control */
83#define DM1105_TSCTR 0x00
84#define DM1105_DTALENTH 0x04
85
86/* GPIO Interface */
87#define DM1105_GPIOVAL 0x08
88#define DM1105_GPIOCTR 0x0c
89
90/* PID serial number */
91#define DM1105_PIDN 0x10
92
93/* Odd-even secret key select */
94#define DM1105_CWSEL 0x14
95
96/* Host Command Interface */
97#define DM1105_HOST_CTR 0x18
98#define DM1105_HOST_AD 0x1c
99
100/* PCI Interface */
101#define DM1105_CR 0x30
102#define DM1105_RST 0x34
103#define DM1105_STADR 0x38
104#define DM1105_RLEN 0x3c
105#define DM1105_WRP 0x40
106#define DM1105_INTCNT 0x44
107#define DM1105_INTMAK 0x48
108#define DM1105_INTSTS 0x4c
109
110/* CW Value */
111#define DM1105_ODD 0x50
112#define DM1105_EVEN 0x58
113
114/* PID Value */
115#define DM1105_PID 0x60
116
117/* IR Control */
118#define DM1105_IRCTR 0x64
119#define DM1105_IRMODE 0x68
120#define DM1105_SYSTEMCODE 0x6c
121#define DM1105_IRCODE 0x70
122
123/* Unknown Values */
124#define DM1105_ENCRYPT 0x74
125#define DM1105_VER 0x7c
126
127/* I2C Interface */
128#define DM1105_I2CCTR 0x80
129#define DM1105_I2CSTS 0x81
130#define DM1105_I2CDAT 0x82
131#define DM1105_I2C_RA 0x83
132/* ----------------------------------------------- */
133/* Interrupt Mask Bits */
134
135#define INTMAK_TSIRQM 0x01
136#define INTMAK_HIRQM 0x04
137#define INTMAK_IRM 0x08
138#define INTMAK_ALLMASK (INTMAK_TSIRQM | \
139 INTMAK_HIRQM | \
140 INTMAK_IRM)
141#define INTMAK_NONEMASK 0x00
142
143/* Interrupt Status Bits */
144#define INTSTS_TSIRQ 0x01
145#define INTSTS_HIRQ 0x04
146#define INTSTS_IR 0x08
147
148/* IR Control Bits */
149#define DM1105_IR_EN 0x01
150#define DM1105_SYS_CHK 0x02
151#define DM1105_REP_FLG 0x08
152
153/* EEPROM addr */
154#define IIC_24C01_addr 0xa0
155/* Max board count */
156#define DM1105_MAX 0x04
157
158#define DRIVER_NAME "dm1105"
159
160#define DM1105_DMA_PACKETS 47
161#define DM1105_DMA_PACKET_LENGTH (128*4)
162#define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
163
164/* GPIO's for LNB power control */
165#define DM1105_LNB_MASK 0x00000000
d8300df9 166#define DM1105_LNB_OFF 0x00020000
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167#define DM1105_LNB_13V 0x00010100
168#define DM1105_LNB_18V 0x00000100
169
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170/* GPIO's for LNB power control for Axess DM05 */
171#define DM05_LNB_MASK 0x00000000
d8300df9 172#define DM05_LNB_OFF 0x00020000/* actually 13v */
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173#define DM05_LNB_13V 0x00020000
174#define DM05_LNB_18V 0x00030000
175
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176static unsigned int card[] = {[0 ... 3] = UNSET };
177module_param_array(card, int, NULL, 0444);
178MODULE_PARM_DESC(card, "card type");
179
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180static int ir_debug;
181module_param(ir_debug, int, 0644);
182MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
183
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184static unsigned int dm1105_devcount;
185
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186DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
187
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188struct dm1105_board {
189 char *name;
190};
191
192struct dm1105_subid {
193 u16 subvendor;
194 u16 subdevice;
195 u32 card;
196};
197
198static const struct dm1105_board dm1105_boards[] = {
199 [DM1105_BOARD_UNKNOWN] = {
200 .name = "UNKNOWN/GENERIC",
201 },
202 [DM1105_BOARD_DVBWORLD_2002] = {
203 .name = "DVBWorld PCI 2002",
204 },
205 [DM1105_BOARD_DVBWORLD_2004] = {
206 .name = "DVBWorld PCI 2004",
207 },
208 [DM1105_BOARD_AXESS_DM05] = {
209 .name = "Axess/EasyTv DM05",
210 },
211};
212
213static const struct dm1105_subid dm1105_subids[] = {
214 {
215 .subvendor = 0x0000,
216 .subdevice = 0x2002,
217 .card = DM1105_BOARD_DVBWORLD_2002,
218 }, {
219 .subvendor = 0x0001,
220 .subdevice = 0x2002,
221 .card = DM1105_BOARD_DVBWORLD_2002,
222 }, {
223 .subvendor = 0x0000,
224 .subdevice = 0x2004,
225 .card = DM1105_BOARD_DVBWORLD_2004,
226 }, {
227 .subvendor = 0x0001,
228 .subdevice = 0x2004,
229 .card = DM1105_BOARD_DVBWORLD_2004,
230 }, {
231 .subvendor = 0x195d,
232 .subdevice = 0x1105,
233 .card = DM1105_BOARD_AXESS_DM05,
234 },
235};
236
237static void dm1105_card_list(struct pci_dev *pci)
238{
239 int i;
240
241 if (0 == pci->subsystem_vendor &&
242 0 == pci->subsystem_device) {
243 printk(KERN_ERR
244 "dm1105: Your board has no valid PCI Subsystem ID\n"
245 "dm1105: and thus can't be autodetected\n"
246 "dm1105: Please pass card=<n> insmod option to\n"
247 "dm1105: workaround that. Redirect complaints to\n"
248 "dm1105: the vendor of the TV card. Best regards,\n"
249 "dm1105: -- tux\n");
250 } else {
251 printk(KERN_ERR
252 "dm1105: Your board isn't known (yet) to the driver.\n"
253 "dm1105: You can try to pick one of the existing\n"
254 "dm1105: card configs via card=<n> insmod option.\n"
255 "dm1105: Updating to the latest version might help\n"
256 "dm1105: as well.\n");
257 }
258 printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
259 "insmod option:\n");
260 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
261 printk(KERN_ERR "dm1105: card=%d -> %s\n",
262 i, dm1105_boards[i].name);
263}
264
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265/* infrared remote control */
266struct infrared {
a611d0ca 267 struct input_dev *input_dev;
b72857dd 268 struct ir_input_state ir;
a611d0ca 269 char input_phys[32];
b72857dd 270 struct work_struct work;
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IL
271 u32 ir_command;
272};
273
34d2f9bf 274struct dm1105_dev {
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275 /* pci */
276 struct pci_dev *pdev;
277 u8 __iomem *io_mem;
278
279 /* ir */
280 struct infrared ir;
281
282 /* dvb */
283 struct dmx_frontend hw_frontend;
284 struct dmx_frontend mem_frontend;
285 struct dmxdev dmxdev;
286 struct dvb_adapter dvb_adapter;
287 struct dvb_demux demux;
288 struct dvb_frontend *fe;
289 struct dvb_net dvbnet;
290 unsigned int full_ts_users;
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291 unsigned int boardnr;
292 int nr;
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293
294 /* i2c */
295 struct i2c_adapter i2c_adap;
296
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297 /* irq */
298 struct work_struct work;
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299 struct workqueue_struct *wq;
300 char wqn[16];
d1498ffc 301
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302 /* dma */
303 dma_addr_t dma_addr;
304 unsigned char *ts_buf;
305 u32 wrp;
d1498ffc 306 u32 nextwrp;
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307 u32 buffer_size;
308 unsigned int PacketErrorCount;
309 unsigned int dmarst;
310 spinlock_t lock;
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311};
312
34d2f9bf 313#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
a611d0ca 314
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315#define dm_readb(reg) inb(dm_io_mem(reg))
316#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
317
318#define dm_readw(reg) inw(dm_io_mem(reg))
319#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
320
321#define dm_readl(reg) inl(dm_io_mem(reg))
322#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
323
324#define dm_andorl(reg, mask, value) \
325 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
326 ((value) & (mask)), (dm_io_mem(reg)))
327
328#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
329#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
330
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331static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
332 struct i2c_msg *msgs, int num)
333{
34d2f9bf 334 struct dm1105_dev *dev ;
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IL
335
336 int addr, rc, i, j, k, len, byte, data;
337 u8 status;
338
34d2f9bf 339 dev = i2c_adap->algo_data;
a611d0ca 340 for (i = 0; i < num; i++) {
5eb3291f 341 dm_writeb(DM1105_I2CCTR, 0x00);
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IL
342 if (msgs[i].flags & I2C_M_RD) {
343 /* read bytes */
344 addr = msgs[i].addr << 1;
345 addr |= 1;
5eb3291f 346 dm_writeb(DM1105_I2CDAT, addr);
a611d0ca 347 for (byte = 0; byte < msgs[i].len; byte++)
5eb3291f 348 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
a611d0ca 349
5eb3291f 350 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
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IL
351 for (j = 0; j < 55; j++) {
352 mdelay(10);
5eb3291f 353 status = dm_readb(DM1105_I2CSTS);
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IL
354 if ((status & 0xc0) == 0x40)
355 break;
356 }
357 if (j >= 55)
358 return -1;
359
360 for (byte = 0; byte < msgs[i].len; byte++) {
5eb3291f 361 rc = dm_readb(DM1105_I2CDAT + byte + 1);
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IL
362 if (rc < 0)
363 goto err;
364 msgs[i].buf[byte] = rc;
365 }
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IL
366 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
367 /* prepaired for cx24116 firmware */
368 /* Write in small blocks */
369 len = msgs[i].len - 1;
370 k = 1;
371 do {
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IL
372 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
373 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
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IL
374 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
375 data = msgs[i].buf[k + byte];
5eb3291f 376 dm_writeb(DM1105_I2CDAT + byte + 2, data);
a611d0ca 377 }
5eb3291f 378 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
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IL
379 for (j = 0; j < 25; j++) {
380 mdelay(10);
5eb3291f 381 status = dm_readb(DM1105_I2CSTS);
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IL
382 if ((status & 0xc0) == 0x40)
383 break;
384 }
385
386 if (j >= 25)
387 return -1;
ed7c847a
IL
388
389 k += 48;
390 len -= 48;
391 } while (len > 0);
392 } else {
393 /* write bytes */
5eb3291f 394 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
ed7c847a
IL
395 for (byte = 0; byte < msgs[i].len; byte++) {
396 data = msgs[i].buf[byte];
5eb3291f 397 dm_writeb(DM1105_I2CDAT + byte + 1, data);
ed7c847a 398 }
5eb3291f 399 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
ed7c847a
IL
400 for (j = 0; j < 25; j++) {
401 mdelay(10);
5eb3291f 402 status = dm_readb(DM1105_I2CSTS);
ed7c847a
IL
403 if ((status & 0xc0) == 0x40)
404 break;
a611d0ca 405 }
ed7c847a
IL
406
407 if (j >= 25)
408 return -1;
a611d0ca
IL
409 }
410 }
411 return num;
412 err:
413 return rc;
414}
415
416static u32 functionality(struct i2c_adapter *adap)
417{
418 return I2C_FUNC_I2C;
419}
420
421static struct i2c_algorithm dm1105_algo = {
422 .master_xfer = dm1105_i2c_xfer,
423 .functionality = functionality,
424};
425
34d2f9bf 426static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
a611d0ca 427{
34d2f9bf 428 return container_of(feed->demux, struct dm1105_dev, demux);
a611d0ca
IL
429}
430
34d2f9bf 431static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
a611d0ca 432{
34d2f9bf 433 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
a611d0ca
IL
434}
435
34d2f9bf 436static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
a611d0ca 437{
34d2f9bf 438 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
d8300df9 439 u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
a611d0ca 440
34d2f9bf 441 switch (dev->boardnr) {
d8300df9 442 case DM1105_BOARD_AXESS_DM05:
519a4bdc 443 lnb_mask = DM05_LNB_MASK;
d8300df9 444 lnb_off = DM05_LNB_OFF;
519a4bdc
IL
445 lnb_13v = DM05_LNB_13V;
446 lnb_18v = DM05_LNB_18V;
447 break;
d8300df9
IL
448 case DM1105_BOARD_DVBWORLD_2002:
449 case DM1105_BOARD_DVBWORLD_2004:
519a4bdc
IL
450 default:
451 lnb_mask = DM1105_LNB_MASK;
d8300df9 452 lnb_off = DM1105_LNB_OFF;
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IL
453 lnb_13v = DM1105_LNB_13V;
454 lnb_18v = DM1105_LNB_18V;
455 }
456
5eb3291f 457 dm_writel(DM1105_GPIOCTR, lnb_mask);
519a4bdc 458 if (voltage == SEC_VOLTAGE_18)
5eb3291f 459 dm_writel(DM1105_GPIOVAL, lnb_18v);
d8300df9 460 else if (voltage == SEC_VOLTAGE_13)
5eb3291f 461 dm_writel(DM1105_GPIOVAL, lnb_13v);
d8300df9 462 else
5eb3291f 463 dm_writel(DM1105_GPIOVAL, lnb_off);
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IL
464
465 return 0;
466}
467
34d2f9bf 468static void dm1105_set_dma_addr(struct dm1105_dev *dev)
a611d0ca 469{
5eb3291f 470 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
a611d0ca
IL
471}
472
34d2f9bf 473static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
a611d0ca 474{
34d2f9bf
IL
475 dev->ts_buf = pci_alloc_consistent(dev->pdev,
476 6 * DM1105_DMA_BYTES,
477 &dev->dma_addr);
a611d0ca 478
34d2f9bf 479 return !dev->ts_buf;
a611d0ca
IL
480}
481
34d2f9bf 482static void dm1105_dma_unmap(struct dm1105_dev *dev)
a611d0ca 483{
34d2f9bf
IL
484 pci_free_consistent(dev->pdev,
485 6 * DM1105_DMA_BYTES,
486 dev->ts_buf,
487 dev->dma_addr);
a611d0ca
IL
488}
489
34d2f9bf 490static void dm1105_enable_irqs(struct dm1105_dev *dev)
a611d0ca 491{
5eb3291f
IL
492 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
493 dm_writeb(DM1105_CR, 1);
a611d0ca
IL
494}
495
34d2f9bf 496static void dm1105_disable_irqs(struct dm1105_dev *dev)
a611d0ca 497{
5eb3291f
IL
498 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
499 dm_writeb(DM1105_CR, 0);
a611d0ca
IL
500}
501
34d2f9bf 502static int dm1105_start_feed(struct dvb_demux_feed *f)
a611d0ca 503{
34d2f9bf 504 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 505
34d2f9bf
IL
506 if (dev->full_ts_users++ == 0)
507 dm1105_enable_irqs(dev);
a611d0ca
IL
508
509 return 0;
510}
511
34d2f9bf 512static int dm1105_stop_feed(struct dvb_demux_feed *f)
a611d0ca 513{
34d2f9bf 514 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 515
34d2f9bf
IL
516 if (--dev->full_ts_users == 0)
517 dm1105_disable_irqs(dev);
a611d0ca
IL
518
519 return 0;
520}
521
b72857dd
IL
522/* ir work handler */
523static void dm1105_emit_key(struct work_struct *work)
a611d0ca 524{
b72857dd 525 struct infrared *ir = container_of(work, struct infrared, work);
a611d0ca
IL
526 u32 ircom = ir->ir_command;
527 u8 data;
a611d0ca 528
d1498ffc
IL
529 if (ir_debug)
530 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
531
a611d0ca
IL
532 data = (ircom >> 8) & 0x7f;
533
8573b74a 534 ir_input_keydown(ir->input_dev, &ir->ir, data);
b72857dd 535 ir_input_nokey(ir->input_dev, &ir->ir);
a611d0ca
IL
536}
537
d1498ffc
IL
538/* work handler */
539static void dm1105_dmx_buffer(struct work_struct *work)
540{
34d2f9bf 541 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
d1498ffc 542 unsigned int nbpackets;
34d2f9bf
IL
543 u32 oldwrp = dev->wrp;
544 u32 nextwrp = dev->nextwrp;
d1498ffc 545
34d2f9bf
IL
546 if (!((dev->ts_buf[oldwrp] == 0x47) &&
547 (dev->ts_buf[oldwrp + 188] == 0x47) &&
548 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
549 dev->PacketErrorCount++;
d1498ffc 550 /* bad packet found */
34d2f9bf
IL
551 if ((dev->PacketErrorCount >= 2) &&
552 (dev->dmarst == 0)) {
5eb3291f 553 dm_writeb(DM1105_RST, 1);
34d2f9bf
IL
554 dev->wrp = 0;
555 dev->PacketErrorCount = 0;
556 dev->dmarst = 0;
d1498ffc
IL
557 return;
558 }
559 }
560
561 if (nextwrp < oldwrp) {
34d2f9bf
IL
562 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
563 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
d1498ffc
IL
564 } else
565 nbpackets = (nextwrp - oldwrp) / 188;
566
34d2f9bf
IL
567 dev->wrp = nextwrp;
568 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
d1498ffc
IL
569}
570
34d2f9bf 571static irqreturn_t dm1105_irq(int irq, void *dev_id)
a611d0ca 572{
34d2f9bf 573 struct dm1105_dev *dev = dev_id;
a611d0ca
IL
574
575 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
5eb3291f
IL
576 unsigned int intsts = dm_readb(DM1105_INTSTS);
577 dm_writeb(DM1105_INTSTS, intsts);
a611d0ca
IL
578
579 switch (intsts) {
580 case INTSTS_TSIRQ:
581 case (INTSTS_TSIRQ | INTSTS_IR):
5eb3291f 582 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
34d2f9bf 583 queue_work(dev->wq, &dev->work);
a611d0ca
IL
584 break;
585 case INTSTS_IR:
5eb3291f 586 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
34d2f9bf 587 schedule_work(&dev->ir.work);
a611d0ca
IL
588 break;
589 }
a611d0ca 590
d1498ffc 591 return IRQ_HANDLED;
a611d0ca
IL
592}
593
34d2f9bf 594int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
a611d0ca
IL
595{
596 struct input_dev *input_dev;
715a2233 597 struct ir_scancode_table *ir_codes = &ir_codes_dm1105_nec_table;
971e8298 598 u64 ir_type = IR_TYPE_OTHER;
b72857dd 599 int err = -ENOMEM;
a611d0ca
IL
600
601 input_dev = input_allocate_device();
602 if (!input_dev)
603 return -ENOMEM;
604
605 dm1105->ir.input_dev = input_dev;
606 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
607 "pci-%s/ir0", pci_name(dm1105->pdev));
608
579e7d60 609 err = ir_input_init(input_dev, &dm1105->ir.ir, ir_type);
055cd556
MCC
610 if (err < 0) {
611 input_free_device(input_dev);
612 return err;
613 }
614
a611d0ca 615 input_dev->name = "DVB on-card IR receiver";
a611d0ca
IL
616 input_dev->phys = dm1105->ir.input_phys;
617 input_dev->id.bustype = BUS_PCI;
b72857dd 618 input_dev->id.version = 1;
a611d0ca
IL
619 if (dm1105->pdev->subsystem_vendor) {
620 input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
621 input_dev->id.product = dm1105->pdev->subsystem_device;
622 } else {
623 input_dev->id.vendor = dm1105->pdev->vendor;
624 input_dev->id.product = dm1105->pdev->device;
625 }
b72857dd 626
a611d0ca 627 input_dev->dev.parent = &dm1105->pdev->dev;
b72857dd
IL
628
629 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
630
e93854da 631 err = ir_input_register(input_dev, ir_codes, NULL);
a611d0ca 632
579e7d60 633 return err;
a611d0ca
IL
634}
635
34d2f9bf 636void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
a611d0ca 637{
38ef6aa8 638 ir_input_unregister(dm1105->ir.input_dev);
a611d0ca
IL
639}
640
34d2f9bf 641static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
a611d0ca 642{
34d2f9bf 643 dm1105_disable_irqs(dev);
a611d0ca 644
5eb3291f 645 dm_writeb(DM1105_HOST_CTR, 0);
a611d0ca
IL
646
647 /*DATALEN 188,*/
5eb3291f 648 dm_writeb(DM1105_DTALENTH, 188);
a611d0ca 649 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
5eb3291f 650 dm_writew(DM1105_TSCTR, 0xc10a);
a611d0ca
IL
651
652 /* map DMA and set address */
34d2f9bf
IL
653 dm1105_dma_map(dev);
654 dm1105_set_dma_addr(dev);
a611d0ca 655 /* big buffer */
5eb3291f
IL
656 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
657 dm_writeb(DM1105_INTCNT, 47);
a611d0ca
IL
658
659 /* IR NEC mode enable */
5eb3291f
IL
660 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
661 dm_writeb(DM1105_IRMODE, 0);
662 dm_writew(DM1105_SYSTEMCODE, 0);
a611d0ca
IL
663
664 return 0;
665}
666
34d2f9bf 667static void dm1105_hw_exit(struct dm1105_dev *dev)
a611d0ca 668{
34d2f9bf 669 dm1105_disable_irqs(dev);
a611d0ca
IL
670
671 /* IR disable */
5eb3291f
IL
672 dm_writeb(DM1105_IRCTR, 0);
673 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
a611d0ca 674
34d2f9bf 675 dm1105_dma_unmap(dev);
a611d0ca 676}
e4aab64c 677
d4305c68
IL
678static struct stv0299_config sharp_z0194a_config = {
679 .demod_address = 0x68,
680 .inittab = sharp_z0194a_inittab,
681 .mclk = 88000000UL,
682 .invert = 1,
683 .skip_reinit = 0,
684 .lock_output = STV0299_LOCKOUTPUT_1,
685 .volt13_op0_op1 = STV0299_VOLT13_OP1,
686 .min_delay_ms = 100,
687 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
688};
689
a611d0ca
IL
690static struct stv0288_config earda_config = {
691 .demod_address = 0x68,
692 .min_delay_ms = 100,
693};
694
695static struct si21xx_config serit_config = {
696 .demod_address = 0x68,
697 .min_delay_ms = 100,
698
699};
700
701static struct cx24116_config serit_sp2633_config = {
702 .demod_address = 0x55,
703};
a611d0ca 704
b4a0e816
IL
705static struct ds3000_config dvbworld_ds3000_config = {
706 .demod_address = 0x68,
707};
708
34d2f9bf 709static int __devinit frontend_init(struct dm1105_dev *dev)
a611d0ca
IL
710{
711 int ret;
712
34d2f9bf 713 switch (dev->boardnr) {
d8300df9 714 case DM1105_BOARD_DVBWORLD_2004:
34d2f9bf 715 dev->fe = dvb_attach(
519a4bdc 716 cx24116_attach, &serit_sp2633_config,
34d2f9bf
IL
717 &dev->i2c_adap);
718 if (dev->fe) {
719 dev->fe->ops.set_voltage = dm1105_set_voltage;
b4a0e816
IL
720 break;
721 }
722
34d2f9bf 723 dev->fe = dvb_attach(
b4a0e816 724 ds3000_attach, &dvbworld_ds3000_config,
34d2f9bf
IL
725 &dev->i2c_adap);
726 if (dev->fe)
727 dev->fe->ops.set_voltage = dm1105_set_voltage;
a611d0ca 728
519a4bdc 729 break;
d8300df9
IL
730 case DM1105_BOARD_DVBWORLD_2002:
731 case DM1105_BOARD_AXESS_DM05:
519a4bdc 732 default:
34d2f9bf 733 dev->fe = dvb_attach(
519a4bdc 734 stv0299_attach, &sharp_z0194a_config,
34d2f9bf
IL
735 &dev->i2c_adap);
736 if (dev->fe) {
737 dev->fe->ops.set_voltage = dm1105_set_voltage;
738 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
739 &dev->i2c_adap, DVB_PLL_OPERA1);
519a4bdc 740 break;
a611d0ca 741 }
e4aab64c 742
34d2f9bf 743 dev->fe = dvb_attach(
519a4bdc 744 stv0288_attach, &earda_config,
34d2f9bf
IL
745 &dev->i2c_adap);
746 if (dev->fe) {
747 dev->fe->ops.set_voltage = dm1105_set_voltage;
748 dvb_attach(stb6000_attach, dev->fe, 0x61,
749 &dev->i2c_adap);
519a4bdc 750 break;
a611d0ca 751 }
e4aab64c 752
34d2f9bf 753 dev->fe = dvb_attach(
519a4bdc 754 si21xx_attach, &serit_config,
34d2f9bf
IL
755 &dev->i2c_adap);
756 if (dev->fe)
757 dev->fe->ops.set_voltage = dm1105_set_voltage;
519a4bdc 758
a611d0ca
IL
759 }
760
34d2f9bf
IL
761 if (!dev->fe) {
762 dev_err(&dev->pdev->dev, "could not attach frontend\n");
a611d0ca
IL
763 return -ENODEV;
764 }
765
34d2f9bf 766 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
a611d0ca 767 if (ret < 0) {
34d2f9bf
IL
768 if (dev->fe->ops.release)
769 dev->fe->ops.release(dev->fe);
770 dev->fe = NULL;
a611d0ca
IL
771 return ret;
772 }
773
774 return 0;
775}
776
34d2f9bf 777static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
a611d0ca
IL
778{
779 static u8 command[1] = { 0x28 };
780
781 struct i2c_msg msg[] = {
519a4bdc
IL
782 {
783 .addr = IIC_24C01_addr >> 1,
784 .flags = 0,
785 .buf = command,
786 .len = 1
787 }, {
788 .addr = IIC_24C01_addr >> 1,
789 .flags = I2C_M_RD,
790 .buf = mac,
791 .len = 6
792 },
a611d0ca
IL
793 };
794
34d2f9bf
IL
795 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
796 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
a611d0ca
IL
797}
798
799static int __devinit dm1105_probe(struct pci_dev *pdev,
800 const struct pci_device_id *ent)
801{
34d2f9bf 802 struct dm1105_dev *dev;
a611d0ca
IL
803 struct dvb_adapter *dvb_adapter;
804 struct dvb_demux *dvbdemux;
805 struct dmx_demux *dmx;
806 int ret = -ENOMEM;
d8300df9 807 int i;
a611d0ca 808
34d2f9bf
IL
809 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
810 if (!dev)
d1498ffc 811 return -ENOMEM;
a611d0ca 812
d8300df9 813 /* board config */
34d2f9bf
IL
814 dev->nr = dm1105_devcount;
815 dev->boardnr = UNSET;
816 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
817 dev->boardnr = card[dev->nr];
818 for (i = 0; UNSET == dev->boardnr &&
d8300df9
IL
819 i < ARRAY_SIZE(dm1105_subids); i++)
820 if (pdev->subsystem_vendor ==
821 dm1105_subids[i].subvendor &&
822 pdev->subsystem_device ==
823 dm1105_subids[i].subdevice)
34d2f9bf 824 dev->boardnr = dm1105_subids[i].card;
d8300df9 825
34d2f9bf
IL
826 if (UNSET == dev->boardnr) {
827 dev->boardnr = DM1105_BOARD_UNKNOWN;
d8300df9
IL
828 dm1105_card_list(pdev);
829 }
830
831 dm1105_devcount++;
34d2f9bf
IL
832 dev->pdev = pdev;
833 dev->buffer_size = 5 * DM1105_DMA_BYTES;
834 dev->PacketErrorCount = 0;
835 dev->dmarst = 0;
a611d0ca
IL
836
837 ret = pci_enable_device(pdev);
838 if (ret < 0)
839 goto err_kfree;
840
284901a9 841 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
a611d0ca
IL
842 if (ret < 0)
843 goto err_pci_disable_device;
844
845 pci_set_master(pdev);
846
847 ret = pci_request_regions(pdev, DRIVER_NAME);
848 if (ret < 0)
849 goto err_pci_disable_device;
850
34d2f9bf
IL
851 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
852 if (!dev->io_mem) {
a611d0ca
IL
853 ret = -EIO;
854 goto err_pci_release_regions;
855 }
856
34d2f9bf
IL
857 spin_lock_init(&dev->lock);
858 pci_set_drvdata(pdev, dev);
a611d0ca 859
34d2f9bf 860 ret = dm1105_hw_init(dev);
a611d0ca 861 if (ret < 0)
d1498ffc 862 goto err_pci_iounmap;
a611d0ca
IL
863
864 /* i2c */
34d2f9bf
IL
865 i2c_set_adapdata(&dev->i2c_adap, dev);
866 strcpy(dev->i2c_adap.name, DRIVER_NAME);
867 dev->i2c_adap.owner = THIS_MODULE;
868 dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
869 dev->i2c_adap.dev.parent = &pdev->dev;
870 dev->i2c_adap.algo = &dm1105_algo;
871 dev->i2c_adap.algo_data = dev;
872 ret = i2c_add_adapter(&dev->i2c_adap);
a611d0ca
IL
873
874 if (ret < 0)
34d2f9bf 875 goto err_dm1105_hw_exit;
a611d0ca
IL
876
877 /* dvb */
34d2f9bf 878 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
a611d0ca
IL
879 THIS_MODULE, &pdev->dev, adapter_nr);
880 if (ret < 0)
881 goto err_i2c_del_adapter;
882
34d2f9bf 883 dvb_adapter = &dev->dvb_adapter;
a611d0ca 884
34d2f9bf 885 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
a611d0ca 886
34d2f9bf 887 dvbdemux = &dev->demux;
a611d0ca
IL
888 dvbdemux->filternum = 256;
889 dvbdemux->feednum = 256;
34d2f9bf
IL
890 dvbdemux->start_feed = dm1105_start_feed;
891 dvbdemux->stop_feed = dm1105_stop_feed;
a611d0ca
IL
892 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
893 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
894 ret = dvb_dmx_init(dvbdemux);
895 if (ret < 0)
896 goto err_dvb_unregister_adapter;
897
898 dmx = &dvbdemux->dmx;
34d2f9bf
IL
899 dev->dmxdev.filternum = 256;
900 dev->dmxdev.demux = dmx;
901 dev->dmxdev.capabilities = 0;
a611d0ca 902
34d2f9bf 903 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
a611d0ca
IL
904 if (ret < 0)
905 goto err_dvb_dmx_release;
906
34d2f9bf 907 dev->hw_frontend.source = DMX_FRONTEND_0;
a611d0ca 908
34d2f9bf 909 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
910 if (ret < 0)
911 goto err_dvb_dmxdev_release;
912
34d2f9bf 913 dev->mem_frontend.source = DMX_MEMORY_FE;
a611d0ca 914
34d2f9bf 915 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
a611d0ca
IL
916 if (ret < 0)
917 goto err_remove_hw_frontend;
918
34d2f9bf 919 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
920 if (ret < 0)
921 goto err_remove_mem_frontend;
922
34d2f9bf 923 ret = frontend_init(dev);
a611d0ca
IL
924 if (ret < 0)
925 goto err_disconnect_frontend;
926
34d2f9bf
IL
927 dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
928 dm1105_ir_init(dev);
d1498ffc 929
34d2f9bf
IL
930 INIT_WORK(&dev->work, dm1105_dmx_buffer);
931 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
932 dev->wq = create_singlethread_workqueue(dev->wqn);
933 if (!dev->wq)
519a4bdc 934 goto err_dvb_net;
d1498ffc 935
34d2f9bf
IL
936 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
937 DRIVER_NAME, dev);
d1498ffc 938 if (ret < 0)
519a4bdc 939 goto err_workqueue;
d1498ffc
IL
940
941 return 0;
a611d0ca 942
519a4bdc 943err_workqueue:
34d2f9bf 944 destroy_workqueue(dev->wq);
519a4bdc 945err_dvb_net:
34d2f9bf 946 dvb_net_release(&dev->dvbnet);
a611d0ca
IL
947err_disconnect_frontend:
948 dmx->disconnect_frontend(dmx);
949err_remove_mem_frontend:
34d2f9bf 950 dmx->remove_frontend(dmx, &dev->mem_frontend);
a611d0ca 951err_remove_hw_frontend:
34d2f9bf 952 dmx->remove_frontend(dmx, &dev->hw_frontend);
a611d0ca 953err_dvb_dmxdev_release:
34d2f9bf 954 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
955err_dvb_dmx_release:
956 dvb_dmx_release(dvbdemux);
957err_dvb_unregister_adapter:
958 dvb_unregister_adapter(dvb_adapter);
959err_i2c_del_adapter:
34d2f9bf
IL
960 i2c_del_adapter(&dev->i2c_adap);
961err_dm1105_hw_exit:
962 dm1105_hw_exit(dev);
a611d0ca 963err_pci_iounmap:
34d2f9bf 964 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
965err_pci_release_regions:
966 pci_release_regions(pdev);
967err_pci_disable_device:
968 pci_disable_device(pdev);
969err_kfree:
970 pci_set_drvdata(pdev, NULL);
34d2f9bf 971 kfree(dev);
d1498ffc 972 return ret;
a611d0ca
IL
973}
974
975static void __devexit dm1105_remove(struct pci_dev *pdev)
976{
34d2f9bf
IL
977 struct dm1105_dev *dev = pci_get_drvdata(pdev);
978 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
979 struct dvb_demux *dvbdemux = &dev->demux;
a611d0ca
IL
980 struct dmx_demux *dmx = &dvbdemux->dmx;
981
34d2f9bf 982 dm1105_ir_exit(dev);
a611d0ca 983 dmx->close(dmx);
34d2f9bf
IL
984 dvb_net_release(&dev->dvbnet);
985 if (dev->fe)
986 dvb_unregister_frontend(dev->fe);
a611d0ca
IL
987
988 dmx->disconnect_frontend(dmx);
34d2f9bf
IL
989 dmx->remove_frontend(dmx, &dev->mem_frontend);
990 dmx->remove_frontend(dmx, &dev->hw_frontend);
991 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
992 dvb_dmx_release(dvbdemux);
993 dvb_unregister_adapter(dvb_adapter);
34d2f9bf
IL
994 if (&dev->i2c_adap)
995 i2c_del_adapter(&dev->i2c_adap);
a611d0ca 996
34d2f9bf 997 dm1105_hw_exit(dev);
a611d0ca 998 synchronize_irq(pdev->irq);
34d2f9bf
IL
999 free_irq(pdev->irq, dev);
1000 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
1001 pci_release_regions(pdev);
1002 pci_disable_device(pdev);
1003 pci_set_drvdata(pdev, NULL);
d8300df9 1004 dm1105_devcount--;
34d2f9bf 1005 kfree(dev);
a611d0ca
IL
1006}
1007
1008static struct pci_device_id dm1105_id_table[] __devinitdata = {
1009 {
1010 .vendor = PCI_VENDOR_ID_TRIGEM,
1011 .device = PCI_DEVICE_ID_DM1105,
1012 .subvendor = PCI_ANY_ID,
d8300df9 1013 .subdevice = PCI_ANY_ID,
519a4bdc
IL
1014 }, {
1015 .vendor = PCI_VENDOR_ID_AXESS,
1016 .device = PCI_DEVICE_ID_DM05,
d8300df9
IL
1017 .subvendor = PCI_ANY_ID,
1018 .subdevice = PCI_ANY_ID,
a611d0ca
IL
1019 }, {
1020 /* empty */
1021 },
1022};
1023
1024MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1025
1026static struct pci_driver dm1105_driver = {
1027 .name = DRIVER_NAME,
1028 .id_table = dm1105_id_table,
1029 .probe = dm1105_probe,
1030 .remove = __devexit_p(dm1105_remove),
1031};
1032
1033static int __init dm1105_init(void)
1034{
1035 return pci_register_driver(&dm1105_driver);
1036}
1037
1038static void __exit dm1105_exit(void)
1039{
1040 pci_unregister_driver(&dm1105_driver);
1041}
1042
1043module_init(dm1105_init);
1044module_exit(dm1105_exit);
1045
1046MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1047MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1048MODULE_LICENSE("GPL");