Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
[linux-2.6-block.git] / drivers / media / dvb / bt8xx / dst.c
CommitLineData
1da177e4 1/*
50b215a0
JS
2 Frontend/Card driver for TwinHan DST Frontend
3 Copyright (C) 2003 Jamie Honan
4 Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
1da177e4 5
50b215a0
JS
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
1da177e4 10
50b215a0
JS
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
1da177e4 15
50b215a0
JS
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4
LT
19*/
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/string.h>
25#include <linux/slab.h>
26#include <linux/vmalloc.h>
27#include <linux/delay.h>
28#include <asm/div64.h>
1da177e4
LT
29#include "dvb_frontend.h"
30#include "dst_priv.h"
50b215a0
JS
31#include "dst_common.h"
32
50b215a0
JS
33static unsigned int verbose = 1;
34module_param(verbose, int, 0644);
35MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
36
50b215a0
JS
37static unsigned int dst_addons;
38module_param(dst_addons, int, 0644);
4a2cc126 39MODULE_PARM_DESC(dst_addons, "CA daughterboard, default is 0 (No addons)");
1da177e4 40
8cfba630
MA
41static unsigned int dst_algo;
42module_param(dst_algo, int, 0644);
43MODULE_PARM_DESC(dst_algo, "tuning algo: default is 0=(SW), 1=(HW)");
44
a427de6f
MA
45#define HAS_LOCK 1
46#define ATTEMPT_TUNE 2
47#define HAS_POWER 4
48
49#define DST_ERROR 0
50#define DST_NOTICE 1
51#define DST_INFO 2
52#define DST_DEBUG 3
53
9500c7b0
MA
54#define dprintk(x, y, z, format, arg...) do { \
55 if (z) { \
56 if ((x > DST_ERROR) && (x > y)) \
57 printk(KERN_ERR "dst(%d) %s: " format "\n", \
58 state->bt->nr, __func__ , ##arg); \
59 else if ((x > DST_NOTICE) && (x > y)) \
60 printk(KERN_NOTICE "dst(%d) %s: " format "\n", \
61 state->bt->nr, __func__ , ##arg); \
62 else if ((x > DST_INFO) && (x > y)) \
63 printk(KERN_INFO "dst(%d) %s: " format "\n", \
64 state->bt->nr, __func__ , ##arg); \
65 else if ((x > DST_DEBUG) && (x > y)) \
66 printk(KERN_DEBUG "dst(%d) %s: " format "\n", \
67 state->bt->nr, __func__ , ##arg); \
68 } else { \
69 if (x > y) \
70 printk(format, ##arg); \
71 } \
a427de6f
MA
72} while(0)
73
b00ef4b8 74static int dst_command(struct dst_state *state, u8 *data, u8 len);
a427de6f
MA
75
76static void dst_packsize(struct dst_state *state, int psize)
1da177e4
LT
77{
78 union dst_gpio_packet bits;
79
80 bits.psize = psize;
81 bt878_device_control(state->bt, DST_IG_TS, &bits);
82}
83
b00ef4b8
AB
84static int dst_gpio_outb(struct dst_state *state, u32 mask, u32 enbb,
85 u32 outhigh, int delay)
1da177e4
LT
86{
87 union dst_gpio_packet enb;
88 union dst_gpio_packet bits;
89 int err;
90
91 enb.enb.mask = mask;
92 enb.enb.enable = enbb;
50b215a0 93
a427de6f 94 dprintk(verbose, DST_INFO, 1, "mask=[%04x], enbb=[%04x], outhigh=[%04x]", mask, enbb, outhigh);
1da177e4 95 if ((err = bt878_device_control(state->bt, DST_IG_ENABLE, &enb)) < 0) {
a427de6f 96 dprintk(verbose, DST_INFO, 1, "dst_gpio_enb error (err == %i, mask == %02x, enb == %02x)", err, mask, enbb);
1da177e4
LT
97 return -EREMOTEIO;
98 }
8385e46f 99 udelay(1000);
1da177e4
LT
100 /* because complete disabling means no output, no need to do output packet */
101 if (enbb == 0)
102 return 0;
50b215a0
JS
103 if (delay)
104 msleep(10);
1da177e4
LT
105 bits.outp.mask = enbb;
106 bits.outp.highvals = outhigh;
1da177e4 107 if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
a427de6f 108 dprintk(verbose, DST_INFO, 1, "dst_gpio_outb error (err == %i, enbb == %02x, outhigh == %02x)", err, enbb, outhigh);
1da177e4
LT
109 return -EREMOTEIO;
110 }
a427de6f 111
1da177e4
LT
112 return 0;
113}
114
b00ef4b8 115static int dst_gpio_inb(struct dst_state *state, u8 *result)
1da177e4
LT
116{
117 union dst_gpio_packet rd_packet;
118 int err;
119
120 *result = 0;
1da177e4 121 if ((err = bt878_device_control(state->bt, DST_IG_READ, &rd_packet)) < 0) {
6cd94745 122 dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb error (err == %i)", err);
1da177e4
LT
123 return -EREMOTEIO;
124 }
1da177e4 125 *result = (u8) rd_packet.rd.value;
a427de6f 126
1da177e4
LT
127 return 0;
128}
129
50b215a0 130int rdc_reset_state(struct dst_state *state)
1da177e4 131{
a427de6f 132 dprintk(verbose, DST_INFO, 1, "Resetting state machine");
50b215a0 133 if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, 0, NO_DELAY) < 0) {
a427de6f 134 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
135 return -1;
136 }
1da177e4 137 msleep(10);
50b215a0 138 if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, RDC_8820_INT, NO_DELAY) < 0) {
a427de6f 139 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
140 msleep(10);
141 return -1;
142 }
143
1da177e4
LT
144 return 0;
145}
50b215a0 146EXPORT_SYMBOL(rdc_reset_state);
1da177e4 147
b00ef4b8 148static int rdc_8820_reset(struct dst_state *state)
1da177e4 149{
a427de6f 150 dprintk(verbose, DST_DEBUG, 1, "Resetting DST");
50b215a0 151 if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, 0, NO_DELAY) < 0) {
a427de6f 152 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
153 return -1;
154 }
8385e46f 155 udelay(1000);
50b215a0 156 if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, RDC_8820_RESET, DELAY) < 0) {
a427de6f 157 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
158 return -1;
159 }
160
1da177e4
LT
161 return 0;
162}
163
b00ef4b8 164static int dst_pio_enable(struct dst_state *state)
1da177e4 165{
50b215a0 166 if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_ENABLE, 0, NO_DELAY) < 0) {
a427de6f 167 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
168 return -1;
169 }
8385e46f 170 udelay(1000);
a427de6f 171
50b215a0
JS
172 return 0;
173}
50b215a0
JS
174
175int dst_pio_disable(struct dst_state *state)
176{
177 if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_DISABLE, RDC_8820_PIO_0_DISABLE, NO_DELAY) < 0) {
a427de6f 178 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
179 return -1;
180 }
8385e46f
JS
181 if (state->type_flags & DST_TYPE_HAS_FW_1)
182 udelay(1000);
50b215a0 183
1da177e4
LT
184 return 0;
185}
50b215a0 186EXPORT_SYMBOL(dst_pio_disable);
1da177e4 187
50b215a0 188int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode)
1da177e4
LT
189{
190 u8 reply;
1da177e4 191 int i;
50b215a0 192
1da177e4 193 for (i = 0; i < 200; i++) {
50b215a0 194 if (dst_gpio_inb(state, &reply) < 0) {
a427de6f 195 dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb ERROR !");
50b215a0
JS
196 return -1;
197 }
50b215a0 198 if ((reply & RDC_8820_PIO_0_ENABLE) == 0) {
a427de6f 199 dprintk(verbose, DST_INFO, 1, "dst wait ready after %d", i);
1da177e4
LT
200 return 1;
201 }
b46dd445 202 msleep(10);
50b215a0 203 }
a427de6f 204 dprintk(verbose, DST_NOTICE, 1, "dst wait NOT ready after %d", i);
50b215a0
JS
205
206 return 0;
207}
208EXPORT_SYMBOL(dst_wait_dst_ready);
209
210int dst_error_recovery(struct dst_state *state)
211{
a427de6f 212 dprintk(verbose, DST_NOTICE, 1, "Trying to return from previous errors.");
50b215a0
JS
213 dst_pio_disable(state);
214 msleep(10);
215 dst_pio_enable(state);
216 msleep(10);
217
218 return 0;
219}
220EXPORT_SYMBOL(dst_error_recovery);
221
222int dst_error_bailout(struct dst_state *state)
223{
a427de6f 224 dprintk(verbose, DST_INFO, 1, "Trying to bailout from previous error.");
50b215a0
JS
225 rdc_8820_reset(state);
226 dst_pio_disable(state);
227 msleep(10);
228
229 return 0;
230}
231EXPORT_SYMBOL(dst_error_bailout);
232
a427de6f 233int dst_comm_init(struct dst_state *state)
50b215a0 234{
a427de6f 235 dprintk(verbose, DST_INFO, 1, "Initializing DST.");
50b215a0 236 if ((dst_pio_enable(state)) < 0) {
a427de6f 237 dprintk(verbose, DST_ERROR, 1, "PIO Enable Failed");
50b215a0
JS
238 return -1;
239 }
240 if ((rdc_reset_state(state)) < 0) {
a427de6f 241 dprintk(verbose, DST_ERROR, 1, "RDC 8820 State RESET Failed.");
50b215a0 242 return -1;
1da177e4 243 }
8385e46f
JS
244 if (state->type_flags & DST_TYPE_HAS_FW_1)
245 msleep(100);
246 else
247 msleep(5);
248
1da177e4
LT
249 return 0;
250}
50b215a0 251EXPORT_SYMBOL(dst_comm_init);
1da177e4 252
50b215a0 253int write_dst(struct dst_state *state, u8 *data, u8 len)
1da177e4
LT
254{
255 struct i2c_msg msg = {
a427de6f
MA
256 .addr = state->config->demod_address,
257 .flags = 0,
258 .buf = data,
259 .len = len
1da177e4 260 };
50b215a0 261
1da177e4 262 int err;
a427de6f
MA
263 u8 cnt, i;
264
265 dprintk(verbose, DST_NOTICE, 0, "writing [ ");
266 for (i = 0; i < len; i++)
267 dprintk(verbose, DST_NOTICE, 0, "%02x ", data[i]);
268 dprintk(verbose, DST_NOTICE, 0, "]\n");
269
50b215a0 270 for (cnt = 0; cnt < 2; cnt++) {
1da177e4 271 if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
a427de6f 272 dprintk(verbose, DST_INFO, 1, "_write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, data[0]);
50b215a0 273 dst_error_recovery(state);
1da177e4
LT
274 continue;
275 } else
276 break;
277 }
50b215a0 278 if (cnt >= 2) {
a427de6f 279 dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
50b215a0
JS
280 dst_error_bailout(state);
281
282 return -1;
283 }
284
1da177e4
LT
285 return 0;
286}
50b215a0 287EXPORT_SYMBOL(write_dst);
1da177e4 288
a427de6f 289int read_dst(struct dst_state *state, u8 *ret, u8 len)
1da177e4 290{
a427de6f
MA
291 struct i2c_msg msg = {
292 .addr = state->config->demod_address,
293 .flags = I2C_M_RD,
294 .buf = ret,
295 .len = len
296 };
297
1da177e4
LT
298 int err;
299 int cnt;
300
50b215a0 301 for (cnt = 0; cnt < 2; cnt++) {
1da177e4 302 if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
a427de6f 303 dprintk(verbose, DST_INFO, 1, "read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, ret[0]);
50b215a0 304 dst_error_recovery(state);
1da177e4
LT
305 continue;
306 } else
307 break;
308 }
50b215a0 309 if (cnt >= 2) {
a427de6f 310 dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
50b215a0
JS
311 dst_error_bailout(state);
312
313 return -1;
314 }
a427de6f
MA
315 dprintk(verbose, DST_DEBUG, 1, "reply is 0x%x", ret[0]);
316 for (err = 1; err < len; err++)
317 dprintk(verbose, DST_DEBUG, 0, " 0x%x", ret[err]);
318 if (err > 1)
319 dprintk(verbose, DST_DEBUG, 0, "\n");
50b215a0 320
1da177e4
LT
321 return 0;
322}
50b215a0 323EXPORT_SYMBOL(read_dst);
1da177e4 324
7d53421c 325static int dst_set_polarization(struct dst_state *state)
1da177e4 326{
7d53421c 327 switch (state->voltage) {
a427de6f
MA
328 case SEC_VOLTAGE_13: /* Vertical */
329 dprintk(verbose, DST_INFO, 1, "Polarization=[Vertical]");
330 state->tx_tuna[8] &= ~0x40;
331 break;
332 case SEC_VOLTAGE_18: /* Horizontal */
333 dprintk(verbose, DST_INFO, 1, "Polarization=[Horizontal]");
334 state->tx_tuna[8] |= 0x40;
335 break;
336 case SEC_VOLTAGE_OFF:
337 break;
7d53421c
MA
338 }
339
340 return 0;
341}
342
343static int dst_set_freq(struct dst_state *state, u32 freq)
344{
1da177e4 345 state->frequency = freq;
a427de6f 346 dprintk(verbose, DST_INFO, 1, "set Frequency %u", freq);
1da177e4 347
1da177e4
LT
348 if (state->dst_type == DST_TYPE_IS_SAT) {
349 freq = freq / 1000;
350 if (freq < 950 || freq > 2150)
351 return -EINVAL;
7d53421c
MA
352 state->tx_tuna[2] = (freq >> 8);
353 state->tx_tuna[3] = (u8) freq;
354 state->tx_tuna[4] = 0x01;
355 state->tx_tuna[8] &= ~0x04;
356 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
357 if (freq < 1531)
358 state->tx_tuna[8] |= 0x04;
359 }
1da177e4
LT
360 } else if (state->dst_type == DST_TYPE_IS_TERR) {
361 freq = freq / 1000;
362 if (freq < 137000 || freq > 858000)
363 return -EINVAL;
7d53421c
MA
364 state->tx_tuna[2] = (freq >> 16) & 0xff;
365 state->tx_tuna[3] = (freq >> 8) & 0xff;
366 state->tx_tuna[4] = (u8) freq;
1da177e4 367 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
62867429 368 freq = freq / 1000;
7d53421c
MA
369 state->tx_tuna[2] = (freq >> 16) & 0xff;
370 state->tx_tuna[3] = (freq >> 8) & 0xff;
371 state->tx_tuna[4] = (u8) freq;
ed3d1065
MA
372 } else if (state->dst_type == DST_TYPE_IS_ATSC) {
373 freq = freq / 1000;
374 if (freq < 51000 || freq > 858000)
375 return -EINVAL;
376 state->tx_tuna[2] = (freq >> 16) & 0xff;
377 state->tx_tuna[3] = (freq >> 8) & 0xff;
378 state->tx_tuna[4] = (u8) freq;
379 state->tx_tuna[5] = 0x00; /* ATSC */
380 state->tx_tuna[6] = 0x00;
381 if (state->dst_hw_cap & DST_TYPE_HAS_ANALOG)
382 state->tx_tuna[7] = 0x00; /* Digital */
1da177e4
LT
383 } else
384 return -EINVAL;
a427de6f 385
1da177e4
LT
386 return 0;
387}
388
a427de6f 389static int dst_set_bandwidth(struct dst_state *state, fe_bandwidth_t bandwidth)
1da177e4 390{
1da177e4
LT
391 state->bandwidth = bandwidth;
392
393 if (state->dst_type != DST_TYPE_IS_TERR)
0851fb48 394 return -EOPNOTSUPP;
1da177e4 395
1da177e4 396 switch (bandwidth) {
a427de6f
MA
397 case BANDWIDTH_6_MHZ:
398 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
399 state->tx_tuna[7] = 0x06;
400 else {
401 state->tx_tuna[6] = 0x06;
402 state->tx_tuna[7] = 0x00;
403 }
404 break;
405 case BANDWIDTH_7_MHZ:
406 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
407 state->tx_tuna[7] = 0x07;
408 else {
409 state->tx_tuna[6] = 0x07;
410 state->tx_tuna[7] = 0x00;
411 }
412 break;
413 case BANDWIDTH_8_MHZ:
414 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
415 state->tx_tuna[7] = 0x08;
416 else {
417 state->tx_tuna[6] = 0x08;
418 state->tx_tuna[7] = 0x00;
419 }
420 break;
421 default:
422 return -EINVAL;
1da177e4 423 }
a427de6f 424
1da177e4
LT
425 return 0;
426}
427
a427de6f 428static int dst_set_inversion(struct dst_state *state, fe_spectral_inversion_t inversion)
1da177e4 429{
1da177e4 430 state->inversion = inversion;
1da177e4 431 switch (inversion) {
a427de6f
MA
432 case INVERSION_OFF: /* Inversion = Normal */
433 state->tx_tuna[8] &= ~0x80;
434 break;
435 case INVERSION_ON:
436 state->tx_tuna[8] |= 0x80;
437 break;
438 default:
439 return -EINVAL;
1da177e4 440 }
a427de6f 441
1da177e4
LT
442 return 0;
443}
444
a427de6f 445static int dst_set_fec(struct dst_state *state, fe_code_rate_t fec)
1da177e4
LT
446{
447 state->fec = fec;
448 return 0;
449}
450
a427de6f 451static fe_code_rate_t dst_get_fec(struct dst_state *state)
1da177e4
LT
452{
453 return state->fec;
454}
455
a427de6f 456static int dst_set_symbolrate(struct dst_state *state, u32 srate)
1da177e4 457{
1da177e4
LT
458 u32 symcalc;
459 u64 sval;
460
461 state->symbol_rate = srate;
1da177e4 462 if (state->dst_type == DST_TYPE_IS_TERR) {
0851fb48 463 return -EOPNOTSUPP;
1da177e4 464 }
a427de6f 465 dprintk(verbose, DST_INFO, 1, "set symrate %u", srate);
1da177e4 466 srate /= 1000;
63ad4e44
MA
467 if (state->dst_type == DST_TYPE_IS_SAT) {
468 if (state->type_flags & DST_TYPE_HAS_SYMDIV) {
469 sval = srate;
470 sval <<= 20;
471 do_div(sval, 88000);
472 symcalc = (u32) sval;
473 dprintk(verbose, DST_INFO, 1, "set symcalc %u", symcalc);
474 state->tx_tuna[5] = (u8) (symcalc >> 12);
475 state->tx_tuna[6] = (u8) (symcalc >> 4);
476 state->tx_tuna[7] = (u8) (symcalc << 4);
477 } else {
478 state->tx_tuna[5] = (u8) (srate >> 16) & 0x7f;
479 state->tx_tuna[6] = (u8) (srate >> 8);
480 state->tx_tuna[7] = (u8) srate;
481 }
482 state->tx_tuna[8] &= ~0x20;
483 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
484 if (srate > 8000)
485 state->tx_tuna[8] |= 0x20;
486 }
487 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
488 dprintk(verbose, DST_DEBUG, 1, "%s", state->fw_name);
489 if (!strncmp(state->fw_name, "DCTNEW", 6)) {
490 state->tx_tuna[5] = (u8) (srate >> 8);
491 state->tx_tuna[6] = (u8) srate;
492 state->tx_tuna[7] = 0x00;
493 } else if (!strncmp(state->fw_name, "DCT-CI", 6)) {
494 state->tx_tuna[5] = 0x00;
495 state->tx_tuna[6] = (u8) (srate >> 8);
496 state->tx_tuna[7] = (u8) srate;
497 }
1da177e4 498 }
1da177e4
LT
499 return 0;
500}
501
7d53421c
MA
502static int dst_set_modulation(struct dst_state *state, fe_modulation_t modulation)
503{
504 if (state->dst_type != DST_TYPE_IS_CABLE)
0851fb48 505 return -EOPNOTSUPP;
7d53421c
MA
506
507 state->modulation = modulation;
508 switch (modulation) {
a427de6f
MA
509 case QAM_16:
510 state->tx_tuna[8] = 0x10;
511 break;
512 case QAM_32:
513 state->tx_tuna[8] = 0x20;
514 break;
515 case QAM_64:
516 state->tx_tuna[8] = 0x40;
517 break;
518 case QAM_128:
519 state->tx_tuna[8] = 0x80;
520 break;
521 case QAM_256:
63ad4e44
MA
522 if (!strncmp(state->fw_name, "DCTNEW", 6))
523 state->tx_tuna[8] = 0xff;
524 else if (!strncmp(state->fw_name, "DCT-CI", 6))
525 state->tx_tuna[8] = 0x00;
a427de6f
MA
526 break;
527 case QPSK:
528 case QAM_AUTO:
529 case VSB_8:
530 case VSB_16:
531 default:
532 return -EINVAL;
7d53421c
MA
533
534 }
535
536 return 0;
537}
538
539static fe_modulation_t dst_get_modulation(struct dst_state *state)
540{
541 return state->modulation;
542}
543
544
a427de6f 545u8 dst_check_sum(u8 *buf, u32 len)
1da177e4
LT
546{
547 u32 i;
548 u8 val = 0;
549 if (!len)
550 return 0;
551 for (i = 0; i < len; i++) {
552 val += buf[i];
553 }
554 return ((~val) + 1);
555}
50b215a0 556EXPORT_SYMBOL(dst_check_sum);
1da177e4 557
6cd94745 558static void dst_type_flags_print(struct dst_state *state)
1da177e4 559{
6cd94745
SAH
560 u32 type_flags = state->type_flags;
561
a427de6f 562 dprintk(verbose, DST_ERROR, 0, "DST type flags :");
7ef53b1a
MA
563 if (type_flags & DST_TYPE_HAS_TS188)
564 dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner", DST_TYPE_HAS_TS188);
1da5e8d3
MA
565 if (type_flags & DST_TYPE_HAS_NEWTUNE_2)
566 dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner 2", DST_TYPE_HAS_NEWTUNE_2);
1da177e4 567 if (type_flags & DST_TYPE_HAS_TS204)
a427de6f 568 dprintk(verbose, DST_ERROR, 0, " 0x%x ts204", DST_TYPE_HAS_TS204);
cdd4208c
MA
569 if (type_flags & DST_TYPE_HAS_VLF)
570 dprintk(verbose, DST_ERROR, 0, " 0x%x VLF", DST_TYPE_HAS_VLF);
1da177e4 571 if (type_flags & DST_TYPE_HAS_SYMDIV)
a427de6f 572 dprintk(verbose, DST_ERROR, 0, " 0x%x symdiv", DST_TYPE_HAS_SYMDIV);
50b215a0 573 if (type_flags & DST_TYPE_HAS_FW_1)
a427de6f 574 dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 1", DST_TYPE_HAS_FW_1);
50b215a0 575 if (type_flags & DST_TYPE_HAS_FW_2)
a427de6f 576 dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 2", DST_TYPE_HAS_FW_2);
50b215a0 577 if (type_flags & DST_TYPE_HAS_FW_3)
a427de6f
MA
578 dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 3", DST_TYPE_HAS_FW_3);
579 dprintk(verbose, DST_ERROR, 0, "\n");
1da177e4
LT
580}
581
50b215a0 582
6cd94745 583static int dst_type_print(struct dst_state *state, u8 type)
1da177e4
LT
584{
585 char *otype;
586 switch (type) {
587 case DST_TYPE_IS_SAT:
588 otype = "satellite";
589 break;
50b215a0 590
1da177e4
LT
591 case DST_TYPE_IS_TERR:
592 otype = "terrestrial";
593 break;
50b215a0 594
1da177e4
LT
595 case DST_TYPE_IS_CABLE:
596 otype = "cable";
597 break;
50b215a0 598
bc7386ba
MA
599 case DST_TYPE_IS_ATSC:
600 otype = "atsc";
601 break;
602
1da177e4 603 default:
a427de6f 604 dprintk(verbose, DST_INFO, 1, "invalid dst type %d", type);
1da177e4
LT
605 return -EINVAL;
606 }
a427de6f 607 dprintk(verbose, DST_INFO, 1, "DST type: %s", otype);
50b215a0 608
1da177e4
LT
609 return 0;
610}
611
b00ef4b8 612static struct tuner_types tuner_list[] = {
b633c6d6 613 {
4e7024bd 614 .tuner_type = TUNER_TYPE_L64724,
364f255a 615 .tuner_name = "L 64724",
4e7024bd
MA
616 .board_name = "UNKNOWN",
617 .fw_name = "UNKNOWN"
b633c6d6
MA
618 },
619
620 {
4e7024bd 621 .tuner_type = TUNER_TYPE_STV0299,
364f255a 622 .tuner_name = "STV 0299",
4e7024bd
MA
623 .board_name = "VP1020",
624 .fw_name = "DST-MOT"
b633c6d6
MA
625 },
626
627 {
4e7024bd
MA
628 .tuner_type = TUNER_TYPE_STV0299,
629 .tuner_name = "STV 0299",
630 .board_name = "VP1020",
631 .fw_name = "DST-03T"
632 },
633
634 {
635 .tuner_type = TUNER_TYPE_MB86A15,
364f255a 636 .tuner_name = "MB 86A15",
4e7024bd
MA
637 .board_name = "VP1022",
638 .fw_name = "DST-03T"
b633c6d6 639 },
364f255a
MA
640
641 {
4e7024bd
MA
642 .tuner_type = TUNER_TYPE_MB86A15,
643 .tuner_name = "MB 86A15",
644 .board_name = "VP1025",
645 .fw_name = "DST-03T"
646 },
647
648 {
649 .tuner_type = TUNER_TYPE_STV0299,
650 .tuner_name = "STV 0299",
651 .board_name = "VP1030",
652 .fw_name = "DST-CI"
653 },
654
655 {
656 .tuner_type = TUNER_TYPE_STV0299,
657 .tuner_name = "STV 0299",
658 .board_name = "VP1030",
659 .fw_name = "DSTMCI"
660 },
661
63ad4e44
MA
662 {
663 .tuner_type = TUNER_TYPE_UNKNOWN,
664 .tuner_name = "UNKNOWN",
665 .board_name = "VP2021",
666 .fw_name = "DCTNEW"
667 },
668
4e7024bd
MA
669 {
670 .tuner_type = TUNER_TYPE_UNKNOWN,
671 .tuner_name = "UNKNOWN",
672 .board_name = "VP2030",
673 .fw_name = "DCT-CI"
674 },
675
676 {
677 .tuner_type = TUNER_TYPE_UNKNOWN,
678 .tuner_name = "UNKNOWN",
679 .board_name = "VP2031",
680 .fw_name = "DCT-CI"
681 },
682
683 {
684 .tuner_type = TUNER_TYPE_UNKNOWN,
685 .tuner_name = "UNKNOWN",
686 .board_name = "VP2040",
687 .fw_name = "DCT-CI"
688 },
689
690 {
691 .tuner_type = TUNER_TYPE_UNKNOWN,
692 .tuner_name = "UNKNOWN",
693 .board_name = "VP3020",
694 .fw_name = "DTTFTA"
695 },
696
697 {
698 .tuner_type = TUNER_TYPE_UNKNOWN,
699 .tuner_name = "UNKNOWN",
700 .board_name = "VP3021",
701 .fw_name = "DTTFTA"
702 },
703
704 {
705 .tuner_type = TUNER_TYPE_TDA10046,
706 .tuner_name = "TDA10046",
707 .board_name = "VP3040",
708 .fw_name = "DTT-CI"
709 },
710
711 {
712 .tuner_type = TUNER_TYPE_UNKNOWN,
713 .tuner_name = "UNKNOWN",
714 .board_name = "VP3051",
715 .fw_name = "DTTNXT"
716 },
717
718 {
719 .tuner_type = TUNER_TYPE_NXT200x,
720 .tuner_name = "NXT200x",
721 .board_name = "VP3220",
722 .fw_name = "ATSCDI"
723 },
724
725 {
726 .tuner_type = TUNER_TYPE_NXT200x,
727 .tuner_name = "NXT200x",
728 .board_name = "VP3250",
729 .fw_name = "ATSCAD"
730 },
b633c6d6
MA
731};
732
50b215a0
JS
733/*
734 Known cards list
735 Satellite
736 -------------------
e6ac699a 737 200103A
50b215a0
JS
738 VP-1020 DST-MOT LG(old), TS=188
739
740 VP-1020 DST-03T LG(new), TS=204
741 VP-1022 DST-03T LG(new), TS=204
742 VP-1025 DST-03T LG(new), TS=204
743
744 VP-1030 DSTMCI, LG(new), TS=188
745 VP-1032 DSTMCI, LG(new), TS=188
746
747 Cable
748 -------------------
749 VP-2030 DCT-CI, Samsung, TS=204
750 VP-2021 DCT-CI, Unknown, TS=204
751 VP-2031 DCT-CI, Philips, TS=188
752 VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
753 VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
754
755 Terrestrial
756 -------------------
757 VP-3050 DTTNXT TS=188
758 VP-3040 DTT-CI, Philips, TS=188
759 VP-3040 DTT-CI, Philips, TS=204
760
761 ATSC
762 -------------------
763 VP-3220 ATSCDI, TS=188
764 VP-3250 ATSCAD, TS=188
765
766*/
767
47a9e50e 768static struct dst_types dst_tlist[] = {
e6ac699a
JS
769 {
770 .device_id = "200103A",
771 .offset = 0,
772 .dst_type = DST_TYPE_IS_SAT,
7d53421c 773 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS,
396cffd6
MA
774 .dst_feature = 0,
775 .tuner_type = 0
e6ac699a
JS
776 }, /* obsolete */
777
50b215a0
JS
778 {
779 .device_id = "DST-020",
780 .offset = 0,
781 .dst_type = DST_TYPE_IS_SAT,
782 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
396cffd6
MA
783 .dst_feature = 0,
784 .tuner_type = 0
50b215a0
JS
785 }, /* obsolete */
786
787 {
788 .device_id = "DST-030",
789 .offset = 0,
790 .dst_type = DST_TYPE_IS_SAT,
7ef53b1a 791 .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
396cffd6
MA
792 .dst_feature = 0,
793 .tuner_type = 0
50b215a0
JS
794 }, /* obsolete */
795
796 {
797 .device_id = "DST-03T",
798 .offset = 0,
799 .dst_type = DST_TYPE_IS_SAT,
800 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_2,
801 .dst_feature = DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | DST_TYPE_HAS_DISEQC5
396cffd6 802 | DST_TYPE_HAS_MAC | DST_TYPE_HAS_MOTO,
b633c6d6 803 .tuner_type = TUNER_TYPE_MULTI
50b215a0
JS
804 },
805
806 {
807 .device_id = "DST-MOT",
808 .offset = 0,
809 .dst_type = DST_TYPE_IS_SAT,
810 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
396cffd6
MA
811 .dst_feature = 0,
812 .tuner_type = 0
50b215a0
JS
813 }, /* obsolete */
814
815 {
816 .device_id = "DST-CI",
817 .offset = 1,
818 .dst_type = DST_TYPE_IS_SAT,
c65f1c57 819 .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_1,
396cffd6
MA
820 .dst_feature = DST_TYPE_HAS_CA,
821 .tuner_type = 0
8385e46f 822 }, /* An OEM board */
50b215a0
JS
823
824 {
825 .device_id = "DSTMCI",
826 .offset = 1,
827 .dst_type = DST_TYPE_IS_SAT,
cdd4208c 828 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT | DST_TYPE_HAS_VLF,
50b215a0 829 .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4
396cffd6
MA
830 | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC,
831 .tuner_type = TUNER_TYPE_MULTI
50b215a0
JS
832 },
833
834 {
835 .device_id = "DSTFCI",
836 .offset = 1,
837 .dst_type = DST_TYPE_IS_SAT,
7ef53b1a 838 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
396cffd6
MA
839 .dst_feature = 0,
840 .tuner_type = 0
50b215a0
JS
841 }, /* unknown to vendor */
842
843 {
844 .device_id = "DCT-CI",
845 .offset = 1,
846 .dst_type = DST_TYPE_IS_CABLE,
cdd4208c 847 .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_VLF,
396cffd6
MA
848 .dst_feature = DST_TYPE_HAS_CA,
849 .tuner_type = 0
50b215a0
JS
850 },
851
852 {
853 .device_id = "DCTNEW",
854 .offset = 1,
855 .dst_type = DST_TYPE_IS_CABLE,
7ef53b1a 856 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_3 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_MULTI_FE,
396cffd6
MA
857 .dst_feature = 0,
858 .tuner_type = 0
50b215a0
JS
859 },
860
861 {
862 .device_id = "DTT-CI",
863 .offset = 1,
864 .dst_type = DST_TYPE_IS_TERR,
cdd4208c 865 .type_flags = DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_VLF,
396cffd6
MA
866 .dst_feature = DST_TYPE_HAS_CA,
867 .tuner_type = 0
50b215a0
JS
868 },
869
870 {
871 .device_id = "DTTDIG",
872 .offset = 1,
873 .dst_type = DST_TYPE_IS_TERR,
874 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
875 .dst_feature = 0,
876 .tuner_type = 0
50b215a0
JS
877 },
878
879 {
880 .device_id = "DTTNXT",
881 .offset = 1,
882 .dst_type = DST_TYPE_IS_TERR,
883 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
884 .dst_feature = DST_TYPE_HAS_ANALOG,
885 .tuner_type = 0
50b215a0
JS
886 },
887
888 {
889 .device_id = "ATSCDI",
890 .offset = 1,
891 .dst_type = DST_TYPE_IS_ATSC,
892 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
893 .dst_feature = 0,
894 .tuner_type = 0
50b215a0
JS
895 },
896
897 {
898 .device_id = "ATSCAD",
899 .offset = 1,
900 .dst_type = DST_TYPE_IS_ATSC,
c65f1c57 901 .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD,
396cffd6
MA
902 .dst_feature = DST_TYPE_HAS_MAC | DST_TYPE_HAS_ANALOG,
903 .tuner_type = 0
50b215a0
JS
904 },
905
906 { }
907
908};
909
62121b1f
MA
910static int dst_get_mac(struct dst_state *state)
911{
912 u8 get_mac[] = { 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
913 get_mac[7] = dst_check_sum(get_mac, 7);
914 if (dst_command(state, get_mac, 8) < 0) {
915 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
916 return -1;
917 }
918 memset(&state->mac_address, '\0', 8);
919 memcpy(&state->mac_address, &state->rxbuffer, 6);
920 dprintk(verbose, DST_ERROR, 1, "MAC Address=[%02x:%02x:%02x:%02x:%02x:%02x]",
921 state->mac_address[0], state->mac_address[1], state->mac_address[2],
922 state->mac_address[4], state->mac_address[5], state->mac_address[6]);
923
924 return 0;
925}
926
927static int dst_fw_ver(struct dst_state *state)
928{
929 u8 get_ver[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
930 get_ver[7] = dst_check_sum(get_ver, 7);
931 if (dst_command(state, get_ver, 8) < 0) {
932 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
933 return -1;
934 }
935 memset(&state->fw_version, '\0', 8);
936 memcpy(&state->fw_version, &state->rxbuffer, 8);
937 dprintk(verbose, DST_ERROR, 1, "Firmware Ver = %x.%x Build = %02x, on %x:%x, %x-%x-20%02x",
938 state->fw_version[0] >> 4, state->fw_version[0] & 0x0f,
939 state->fw_version[1],
940 state->fw_version[5], state->fw_version[6],
941 state->fw_version[4], state->fw_version[3], state->fw_version[2]);
942
943 return 0;
944}
945
946static int dst_card_type(struct dst_state *state)
947{
364f255a
MA
948 int j;
949 struct tuner_types *p_tuner_list = NULL;
950
62121b1f
MA
951 u8 get_type[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
952 get_type[7] = dst_check_sum(get_type, 7);
953 if (dst_command(state, get_type, 8) < 0) {
954 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
955 return -1;
956 }
957 memset(&state->card_info, '\0', 8);
351634d2 958 memcpy(&state->card_info, &state->rxbuffer, 7);
62121b1f
MA
959 dprintk(verbose, DST_ERROR, 1, "Device Model=[%s]", &state->card_info[0]);
960
364f255a
MA
961 for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
962 if (!strcmp(&state->card_info[0], p_tuner_list->board_name)) {
963 state->tuner_type = p_tuner_list->tuner_type;
6cd94745 964 dprintk(verbose, DST_ERROR, 1, "DST has [%s] tuner, tuner type=[%d]",
364f255a
MA
965 p_tuner_list->tuner_name, p_tuner_list->tuner_type);
966 }
967 }
968
62121b1f
MA
969 return 0;
970}
971
972static int dst_get_vendor(struct dst_state *state)
973{
974 u8 get_vendor[] = { 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
975 get_vendor[7] = dst_check_sum(get_vendor, 7);
976 if (dst_command(state, get_vendor, 8) < 0) {
977 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
978 return -1;
979 }
980 memset(&state->vendor, '\0', 8);
351634d2 981 memcpy(&state->vendor, &state->rxbuffer, 7);
62121b1f
MA
982 dprintk(verbose, DST_ERROR, 1, "Vendor=[%s]", &state->vendor[0]);
983
984 return 0;
985}
50b215a0 986
de1e6ec9
MA
987static void debug_dst_buffer(struct dst_state *state)
988{
989 int i;
990
991 if (verbose > 2) {
992 printk("%s: [", __func__);
993 for (i = 0; i < 8; i++)
994 printk(" %02x", state->rxbuffer[i]);
995 printk("]\n");
996 }
997}
998
999static int dst_check_stv0299(struct dst_state *state)
1000{
1001 u8 check_stv0299[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1002
1003 check_stv0299[7] = dst_check_sum(check_stv0299, 7);
1004 if (dst_command(state, check_stv0299, 8) < 0) {
1005 dprintk(verbose, DST_ERROR, 1, "Cmd=[0x04] failed");
1006 return -1;
1007 }
1008 debug_dst_buffer(state);
1009
1010 if (memcmp(&check_stv0299, &state->rxbuffer, 8)) {
1011 dprintk(verbose, DST_ERROR, 1, "Found a STV0299 NIM");
1012 state->tuner_type = TUNER_TYPE_STV0299;
1013 return 0;
1014 }
1015
1016 return -1;
1017}
1018
1019static int dst_check_mb86a15(struct dst_state *state)
1020{
1021 u8 check_mb86a15[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1022
1023 check_mb86a15[7] = dst_check_sum(check_mb86a15, 7);
1024 if (dst_command(state, check_mb86a15, 8) < 0) {
1025 dprintk(verbose, DST_ERROR, 1, "Cmd=[0x10], failed");
1026 return -1;
1027 }
1028 debug_dst_buffer(state);
1029
1030 if (memcmp(&check_mb86a15, &state->rxbuffer, 8) < 0) {
1031 dprintk(verbose, DST_ERROR, 1, "Found a MB86A15 NIM");
1032 state->tuner_type = TUNER_TYPE_MB86A15;
1033 return 0;
1034 }
1035
1036 return -1;
1037}
1038
29b2f784
MA
1039static int dst_get_tuner_info(struct dst_state *state)
1040{
1041 u8 get_tuner_1[] = { 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1042 u8 get_tuner_2[] = { 0x00, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1043
1044 get_tuner_1[7] = dst_check_sum(get_tuner_1, 7);
1045 get_tuner_2[7] = dst_check_sum(get_tuner_2, 7);
c65f1c57 1046 dprintk(verbose, DST_ERROR, 1, "DST TYpe = MULTI FE");
29b2f784 1047 if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
c65f1c57
MA
1048 if (dst_command(state, get_tuner_1, 8) < 0) {
1049 dprintk(verbose, DST_INFO, 1, "Cmd=[0x13], Unsupported");
cdd4208c 1050 goto force;
29b2f784
MA
1051 }
1052 } else {
c65f1c57
MA
1053 if (dst_command(state, get_tuner_2, 8) < 0) {
1054 dprintk(verbose, DST_INFO, 1, "Cmd=[0xb], Unsupported");
cdd4208c 1055 goto force;
29b2f784
MA
1056 }
1057 }
1058 memset(&state->board_info, '\0', 8);
1059 memcpy(&state->board_info, &state->rxbuffer, 8);
1060 if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
c65f1c57 1061 dprintk(verbose, DST_ERROR, 1, "DST type has TS=188");
c65f1c57
MA
1062 }
1063 if (state->board_info[0] == 0xbc) {
5aef20ae 1064 if (state->type_flags != DST_TYPE_IS_ATSC)
7ef53b1a 1065 state->type_flags |= DST_TYPE_HAS_TS188;
3da2f4c0 1066 else
1da5e8d3 1067 state->type_flags |= DST_TYPE_HAS_NEWTUNE_2;
3da2f4c0 1068
5aef20ae
MA
1069 if (state->board_info[1] == 0x01) {
1070 state->dst_hw_cap |= DST_TYPE_HAS_DBOARD;
1071 dprintk(verbose, DST_ERROR, 1, "DST has Daughterboard");
1072 }
29b2f784
MA
1073 }
1074
1075 return 0;
cdd4208c
MA
1076force:
1077 if (!strncmp(state->fw_name, "DCT-CI", 6)) {
1078 state->type_flags |= DST_TYPE_HAS_TS204;
1079 dprintk(verbose, DST_ERROR, 1, "Forcing [%s] to TS188", state->fw_name);
1080 }
1081
1082 return -1;
29b2f784
MA
1083}
1084
50b215a0 1085static int dst_get_device_id(struct dst_state *state)
1da177e4 1086{
50b215a0
JS
1087 u8 reply;
1088
b633c6d6 1089 int i, j;
de1e6ec9
MA
1090 struct dst_types *p_dst_type = NULL;
1091 struct tuner_types *p_tuner_list = NULL;
b633c6d6 1092
50b215a0
JS
1093 u8 use_dst_type = 0;
1094 u32 use_type_flags = 0;
1da177e4 1095
50b215a0 1096 static u8 device_type[8] = {0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
1da177e4 1097
de1e6ec9 1098 state->tuner_type = 0;
50b215a0
JS
1099 device_type[7] = dst_check_sum(device_type, 7);
1100
1101 if (write_dst(state, device_type, FIXED_COMM))
1102 return -1; /* Write failed */
50b215a0
JS
1103 if ((dst_pio_disable(state)) < 0)
1104 return -1;
50b215a0
JS
1105 if (read_dst(state, &reply, GET_ACK))
1106 return -1; /* Read failure */
50b215a0 1107 if (reply != ACK) {
a427de6f 1108 dprintk(verbose, DST_INFO, 1, "Write not Acknowledged! [Reply=0x%02x]", reply);
50b215a0 1109 return -1; /* Unack'd write */
1da177e4 1110 }
50b215a0
JS
1111 if (!dst_wait_dst_ready(state, DEVICE_INIT))
1112 return -1; /* DST not ready yet */
50b215a0
JS
1113 if (read_dst(state, state->rxbuffer, FIXED_COMM))
1114 return -1;
1115
1116 dst_pio_disable(state);
50b215a0 1117 if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
a427de6f 1118 dprintk(verbose, DST_INFO, 1, "Checksum failure!");
50b215a0 1119 return -1; /* Checksum failure */
1da177e4 1120 }
50b215a0
JS
1121 state->rxbuffer[7] = '\0';
1122
a427de6f 1123 for (i = 0, p_dst_type = dst_tlist; i < ARRAY_SIZE(dst_tlist); i++, p_dst_type++) {
50b215a0
JS
1124 if (!strncmp (&state->rxbuffer[p_dst_type->offset], p_dst_type->device_id, strlen (p_dst_type->device_id))) {
1125 use_type_flags = p_dst_type->type_flags;
1126 use_dst_type = p_dst_type->dst_type;
1127
1128 /* Card capabilities */
1129 state->dst_hw_cap = p_dst_type->dst_feature;
6cd94745 1130 dprintk(verbose, DST_ERROR, 1, "Recognise [%s]", p_dst_type->device_id);
63ad4e44 1131 strncpy(&state->fw_name[0], p_dst_type->device_id, 6);
de1e6ec9
MA
1132 /* Multiple tuners */
1133 if (p_dst_type->tuner_type & TUNER_TYPE_MULTI) {
b32474cb
MA
1134 switch (use_dst_type) {
1135 case DST_TYPE_IS_SAT:
1136 /* STV0299 check */
1137 if (dst_check_stv0299(state) < 0) {
1138 dprintk(verbose, DST_ERROR, 1, "Unsupported");
1139 state->tuner_type = TUNER_TYPE_MB86A15;
1140 }
1141 break;
1142 default:
1143 break;
1144 }
de1e6ec9
MA
1145 if (dst_check_mb86a15(state) < 0)
1146 dprintk(verbose, DST_ERROR, 1, "Unsupported");
1147 /* Single tuner */
1148 } else {
b633c6d6 1149 state->tuner_type = p_dst_type->tuner_type;
de1e6ec9
MA
1150 }
1151 for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
1152 if (!(strncmp(p_dst_type->device_id, p_tuner_list->fw_name, 7)) &&
1153 p_tuner_list->tuner_type == state->tuner_type) {
1154 dprintk(verbose, DST_ERROR, 1, "[%s] has a [%s]",
1155 p_dst_type->device_id, p_tuner_list->tuner_name);
b633c6d6
MA
1156 }
1157 }
1da177e4
LT
1158 break;
1159 }
1160 }
50b215a0 1161
0496daa7 1162 if (i >= ARRAY_SIZE(dst_tlist)) {
a427de6f
MA
1163 dprintk(verbose, DST_ERROR, 1, "Unable to recognize %s or %s", &state->rxbuffer[0], &state->rxbuffer[1]);
1164 dprintk(verbose, DST_ERROR, 1, "please email linux-dvb@linuxtv.org with this type in");
1da177e4
LT
1165 use_dst_type = DST_TYPE_IS_SAT;
1166 use_type_flags = DST_TYPE_HAS_SYMDIV;
1167 }
6cd94745 1168 dst_type_print(state, use_dst_type);
1da177e4
LT
1169 state->type_flags = use_type_flags;
1170 state->dst_type = use_dst_type;
6cd94745 1171 dst_type_flags_print(state);
1da177e4 1172
1da177e4
LT
1173 return 0;
1174}
1175
50b215a0
JS
1176static int dst_probe(struct dst_state *state)
1177{
3593cab5 1178 mutex_init(&state->dst_mutex);
2e506a0f
MA
1179 if (dst_addons & DST_TYPE_HAS_CA) {
1180 if ((rdc_8820_reset(state)) < 0) {
1181 dprintk(verbose, DST_ERROR, 1, "RDC 8820 RESET Failed.");
1182 return -1;
1183 }
4a2cc126 1184 msleep(4000);
2e506a0f 1185 } else {
4a2cc126 1186 msleep(100);
2e506a0f 1187 }
50b215a0 1188 if ((dst_comm_init(state)) < 0) {
a427de6f 1189 dprintk(verbose, DST_ERROR, 1, "DST Initialization Failed.");
50b215a0
JS
1190 return -1;
1191 }
8385e46f 1192 msleep(100);
50b215a0 1193 if (dst_get_device_id(state) < 0) {
a427de6f 1194 dprintk(verbose, DST_ERROR, 1, "unknown device.");
50b215a0
JS
1195 return -1;
1196 }
62121b1f
MA
1197 if (dst_get_mac(state) < 0) {
1198 dprintk(verbose, DST_INFO, 1, "MAC: Unsupported command");
62121b1f 1199 }
29b2f784
MA
1200 if ((state->type_flags & DST_TYPE_HAS_MULTI_FE) || (state->type_flags & DST_TYPE_HAS_FW_BUILD)) {
1201 if (dst_get_tuner_info(state) < 0)
1202 dprintk(verbose, DST_INFO, 1, "Tuner: Unsupported command");
1203 }
4c09aa72
MA
1204 if (state->type_flags & DST_TYPE_HAS_TS204) {
1205 dst_packsize(state, 204);
1206 }
62121b1f
MA
1207 if (state->type_flags & DST_TYPE_HAS_FW_BUILD) {
1208 if (dst_fw_ver(state) < 0) {
1209 dprintk(verbose, DST_INFO, 1, "FW: Unsupported command");
1210 return 0;
1211 }
1212 if (dst_card_type(state) < 0) {
1213 dprintk(verbose, DST_INFO, 1, "Card: Unsupported command");
1214 return 0;
1215 }
1216 if (dst_get_vendor(state) < 0) {
1217 dprintk(verbose, DST_INFO, 1, "Vendor: Unsupported command");
1218 return 0;
1219 }
1220 }
50b215a0
JS
1221
1222 return 0;
1223}
1224
b00ef4b8 1225static int dst_command(struct dst_state *state, u8 *data, u8 len)
1da177e4 1226{
1da177e4 1227 u8 reply;
d28d5762 1228
3593cab5 1229 mutex_lock(&state->dst_mutex);
50b215a0 1230 if ((dst_comm_init(state)) < 0) {
a427de6f 1231 dprintk(verbose, DST_NOTICE, 1, "DST Communication Initialization Failed.");
d28d5762 1232 goto error;
50b215a0 1233 }
50b215a0 1234 if (write_dst(state, data, len)) {
0851fb48 1235 dprintk(verbose, DST_INFO, 1, "Trying to recover.. ");
50b215a0 1236 if ((dst_error_recovery(state)) < 0) {
a427de6f 1237 dprintk(verbose, DST_ERROR, 1, "Recovery Failed.");
d28d5762 1238 goto error;
50b215a0 1239 }
d28d5762 1240 goto error;
1da177e4 1241 }
50b215a0 1242 if ((dst_pio_disable(state)) < 0) {
a427de6f 1243 dprintk(verbose, DST_ERROR, 1, "PIO Disable Failed.");
d28d5762 1244 goto error;
1da177e4 1245 }
8385e46f
JS
1246 if (state->type_flags & DST_TYPE_HAS_FW_1)
1247 udelay(3000);
50b215a0 1248 if (read_dst(state, &reply, GET_ACK)) {
a427de6f 1249 dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
50b215a0 1250 if ((dst_error_recovery(state)) < 0) {
a427de6f 1251 dprintk(verbose, DST_INFO, 1, "Recovery Failed.");
d28d5762 1252 goto error;
50b215a0 1253 }
d28d5762 1254 goto error;
50b215a0 1255 }
50b215a0 1256 if (reply != ACK) {
a427de6f 1257 dprintk(verbose, DST_INFO, 1, "write not acknowledged 0x%02x ", reply);
d28d5762 1258 goto error;
1da177e4
LT
1259 }
1260 if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
d28d5762 1261 goto error;
8385e46f
JS
1262 if (state->type_flags & DST_TYPE_HAS_FW_1)
1263 udelay(3000);
1264 else
1265 udelay(2000);
50b215a0 1266 if (!dst_wait_dst_ready(state, NO_DELAY))
d28d5762 1267 goto error;
50b215a0 1268 if (read_dst(state, state->rxbuffer, FIXED_COMM)) {
a427de6f 1269 dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
50b215a0 1270 if ((dst_error_recovery(state)) < 0) {
a427de6f 1271 dprintk(verbose, DST_INFO, 1, "Recovery failed.");
d28d5762 1272 goto error;
50b215a0 1273 }
d28d5762 1274 goto error;
1da177e4
LT
1275 }
1276 if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
a427de6f 1277 dprintk(verbose, DST_INFO, 1, "checksum failure");
d28d5762 1278 goto error;
1da177e4 1279 }
3593cab5 1280 mutex_unlock(&state->dst_mutex);
1da177e4 1281 return 0;
d28d5762
MA
1282
1283error:
3593cab5 1284 mutex_unlock(&state->dst_mutex);
d28d5762
MA
1285 return -EIO;
1286
1da177e4
LT
1287}
1288
a427de6f 1289static int dst_get_signal(struct dst_state *state)
1da177e4
LT
1290{
1291 int retval;
1292 u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb };
b2e62e7c 1293 //dprintk("%s: Getting Signal strength and other parameters\n", __func__);
1da177e4
LT
1294 if ((state->diseq_flags & ATTEMPT_TUNE) == 0) {
1295 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1296 return 0;
1297 }
1298 if (0 == (state->diseq_flags & HAS_LOCK)) {
1299 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1300 return 0;
1301 }
1302 if (time_after_eq(jiffies, state->cur_jiff + (HZ / 5))) {
1303 retval = dst_command(state, get_signal, 8);
1304 if (retval < 0)
1305 return retval;
1306 if (state->dst_type == DST_TYPE_IS_SAT) {
1307 state->decode_lock = ((state->rxbuffer[6] & 0x10) == 0) ? 1 : 0;
1308 state->decode_strength = state->rxbuffer[5] << 8;
1309 state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1310 } else if ((state->dst_type == DST_TYPE_IS_TERR) || (state->dst_type == DST_TYPE_IS_CABLE)) {
1311 state->decode_lock = (state->rxbuffer[1]) ? 1 : 0;
1312 state->decode_strength = state->rxbuffer[4] << 8;
1313 state->decode_snr = state->rxbuffer[3] << 8;
ed3d1065
MA
1314 } else if (state->dst_type == DST_TYPE_IS_ATSC) {
1315 state->decode_lock = (state->rxbuffer[6] == 0x00) ? 1 : 0;
1316 state->decode_strength = state->rxbuffer[4] << 8;
1317 state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1da177e4
LT
1318 }
1319 state->cur_jiff = jiffies;
1320 }
1321 return 0;
1322}
1323
a427de6f 1324static int dst_tone_power_cmd(struct dst_state *state)
1da177e4
LT
1325{
1326 u8 paket[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 };
1327
0851fb48
YP
1328 if (state->dst_type != DST_TYPE_IS_SAT)
1329 return -EOPNOTSUPP;
8f6da8f1 1330 paket[4] = state->tx_tuna[4];
86360a3e 1331 paket[2] = state->tx_tuna[2];
203fe8b3 1332 paket[3] = state->tx_tuna[3];
50b215a0 1333 paket[7] = dst_check_sum (paket, 7);
0851fb48 1334 return dst_command(state, paket, 8);
1da177e4
LT
1335}
1336
a427de6f 1337static int dst_get_tuna(struct dst_state *state)
1da177e4
LT
1338{
1339 int retval;
50b215a0 1340
1da177e4
LT
1341 if ((state->diseq_flags & ATTEMPT_TUNE) == 0)
1342 return 0;
1343 state->diseq_flags &= ~(HAS_LOCK);
50b215a0 1344 if (!dst_wait_dst_ready(state, NO_DELAY))
f1016dec 1345 return -EIO;
cdd4208c 1346 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44
MA
1347 !(state->dst_type == DST_TYPE_IS_ATSC))
1348
1da177e4 1349 retval = read_dst(state, state->rx_tuna, 10);
a427de6f 1350 else
50b215a0 1351 retval = read_dst(state, &state->rx_tuna[2], FIXED_COMM);
1da177e4 1352 if (retval < 0) {
a427de6f 1353 dprintk(verbose, DST_DEBUG, 1, "read not successful");
f1016dec 1354 return retval;
1da177e4 1355 }
cdd4208c 1356 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44 1357 !(state->dst_type == DST_TYPE_IS_CABLE) &&
7ef53b1a 1358 !(state->dst_type == DST_TYPE_IS_ATSC)) {
63ad4e44 1359
1da177e4 1360 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
a427de6f 1361 dprintk(verbose, DST_INFO, 1, "checksum failure ? ");
f1016dec 1362 return -EIO;
1da177e4
LT
1363 }
1364 } else {
1365 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[2], 7)) {
a427de6f 1366 dprintk(verbose, DST_INFO, 1, "checksum failure? ");
f1016dec 1367 return -EIO;
1da177e4
LT
1368 }
1369 }
1370 if (state->rx_tuna[2] == 0 && state->rx_tuna[3] == 0)
1371 return 0;
f5648e8a
TH
1372 if (state->dst_type == DST_TYPE_IS_SAT) {
1373 state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3];
1374 } else {
1375 state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 16) + (state->rx_tuna[3] << 8) + state->rx_tuna[4];
1376 }
1377 state->decode_freq = state->decode_freq * 1000;
1da177e4 1378 state->decode_lock = 1;
1da177e4 1379 state->diseq_flags |= HAS_LOCK;
7d53421c 1380
1da177e4
LT
1381 return 1;
1382}
1383
a427de6f 1384static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
1da177e4 1385
a427de6f 1386static int dst_write_tuna(struct dvb_frontend *fe)
1da177e4 1387{
a427de6f 1388 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1389 int retval;
1390 u8 reply;
1391
a427de6f 1392 dprintk(verbose, DST_INFO, 1, "type_flags 0x%x ", state->type_flags);
1da177e4
LT
1393 state->decode_freq = 0;
1394 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1395 if (state->dst_type == DST_TYPE_IS_SAT) {
1396 if (!(state->diseq_flags & HAS_POWER))
1397 dst_set_voltage(fe, SEC_VOLTAGE_13);
1398 }
1399 state->diseq_flags &= ~(HAS_LOCK | ATTEMPT_TUNE);
3593cab5 1400 mutex_lock(&state->dst_mutex);
50b215a0 1401 if ((dst_comm_init(state)) < 0) {
a427de6f 1402 dprintk(verbose, DST_DEBUG, 1, "DST Communication initialization failed.");
f1016dec 1403 goto error;
50b215a0 1404 }
63ad4e44 1405// if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
cdd4208c 1406 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44
MA
1407 (!(state->dst_type == DST_TYPE_IS_ATSC))) {
1408
1da177e4
LT
1409 state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[0], 9);
1410 retval = write_dst(state, &state->tx_tuna[0], 10);
1411 } else {
1412 state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[2], 7);
50b215a0 1413 retval = write_dst(state, &state->tx_tuna[2], FIXED_COMM);
1da177e4
LT
1414 }
1415 if (retval < 0) {
50b215a0 1416 dst_pio_disable(state);
a427de6f 1417 dprintk(verbose, DST_DEBUG, 1, "write not successful");
f1016dec 1418 goto werr;
1da177e4 1419 }
50b215a0 1420 if ((dst_pio_disable(state)) < 0) {
a427de6f 1421 dprintk(verbose, DST_DEBUG, 1, "DST PIO disable failed !");
f1016dec 1422 goto error;
50b215a0 1423 }
50b215a0 1424 if ((read_dst(state, &reply, GET_ACK) < 0)) {
a427de6f 1425 dprintk(verbose, DST_DEBUG, 1, "read verify not successful.");
f1016dec 1426 goto error;
1da177e4 1427 }
50b215a0 1428 if (reply != ACK) {
a427de6f 1429 dprintk(verbose, DST_DEBUG, 1, "write not acknowledged 0x%02x ", reply);
f1016dec 1430 goto error;
1da177e4
LT
1431 }
1432 state->diseq_flags |= ATTEMPT_TUNE;
f1016dec
HS
1433 retval = dst_get_tuna(state);
1434werr:
3593cab5 1435 mutex_unlock(&state->dst_mutex);
f1016dec 1436 return retval;
50b215a0 1437
f1016dec 1438error:
3593cab5 1439 mutex_unlock(&state->dst_mutex);
f1016dec 1440 return -EIO;
1da177e4
LT
1441}
1442
1443/*
1444 * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
1445 * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
1446 * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
1447 * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
1448 * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
1449 * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
1450 * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
1451 * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
1452 * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
1453 * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
1454 * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
1455 */
1456
a427de6f 1457static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
1da177e4 1458{
a427de6f 1459 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1460 u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
1461
226d97ec 1462 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1463 return -EOPNOTSUPP;
ceee5266
YP
1464 if (cmd->msg_len > 0 && cmd->msg_len < 5)
1465 memcpy(&paket[3], cmd->msg, cmd->msg_len);
1466 else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5)
1467 memcpy(&paket[2], cmd->msg, cmd->msg_len);
1468 else
1da177e4 1469 return -EINVAL;
1da177e4 1470 paket[7] = dst_check_sum(&paket[0], 7);
0851fb48 1471 return dst_command(state, paket, 8);
1da177e4
LT
1472}
1473
a427de6f 1474static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
1da177e4 1475{
0851fb48 1476 int need_cmd, retval = 0;
a427de6f 1477 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1478
1479 state->voltage = voltage;
226d97ec 1480 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1481 return -EOPNOTSUPP;
1da177e4
LT
1482
1483 need_cmd = 0;
50b215a0 1484
a427de6f
MA
1485 switch (voltage) {
1486 case SEC_VOLTAGE_13:
1487 case SEC_VOLTAGE_18:
1488 if ((state->diseq_flags & HAS_POWER) == 0)
1da177e4 1489 need_cmd = 1;
a427de6f
MA
1490 state->diseq_flags |= HAS_POWER;
1491 state->tx_tuna[4] = 0x01;
1492 break;
1493 case SEC_VOLTAGE_OFF:
1494 need_cmd = 1;
1495 state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
1496 state->tx_tuna[4] = 0x00;
1497 break;
1498 default:
1499 return -EINVAL;
1da177e4 1500 }
a427de6f 1501
50b215a0 1502 if (need_cmd)
0851fb48 1503 retval = dst_tone_power_cmd(state);
50b215a0 1504
0851fb48 1505 return retval;
1da177e4
LT
1506}
1507
a427de6f 1508static int dst_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
1da177e4 1509{
a427de6f 1510 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1511
1512 state->tone = tone;
226d97ec 1513 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1514 return -EOPNOTSUPP;
1da177e4 1515
1da177e4 1516 switch (tone) {
a427de6f
MA
1517 case SEC_TONE_OFF:
1518 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1519 state->tx_tuna[2] = 0x00;
1520 else
1521 state->tx_tuna[2] = 0xff;
1522 break;
50b215a0 1523
a427de6f
MA
1524 case SEC_TONE_ON:
1525 state->tx_tuna[2] = 0x02;
1526 break;
1527 default:
1528 return -EINVAL;
1da177e4 1529 }
0851fb48 1530 return dst_tone_power_cmd(state);
1da177e4
LT
1531}
1532
203fe8b3
MA
1533static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd)
1534{
1535 struct dst_state *state = fe->demodulator_priv;
1536
226d97ec 1537 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1538 return -EOPNOTSUPP;
203fe8b3 1539 state->minicmd = minicmd;
203fe8b3 1540 switch (minicmd) {
a427de6f
MA
1541 case SEC_MINI_A:
1542 state->tx_tuna[3] = 0x02;
1543 break;
1544 case SEC_MINI_B:
1545 state->tx_tuna[3] = 0xff;
1546 break;
203fe8b3 1547 }
0851fb48 1548 return dst_tone_power_cmd(state);
203fe8b3
MA
1549}
1550
1551
a427de6f 1552static int dst_init(struct dvb_frontend *fe)
1da177e4 1553{
a427de6f
MA
1554 struct dst_state *state = fe->demodulator_priv;
1555
1556 static u8 sat_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x00, 0x73, 0x21, 0x00, 0x00 };
1557 static u8 sat_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x55, 0xbd, 0x50, 0x00, 0x00 };
1558 static u8 ter_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1559 static u8 ter_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
cdd4208c
MA
1560 static u8 cab_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1561 static u8 cab_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1da5e8d3 1562 static u8 atsc_tuner[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
a427de6f 1563
7d53421c 1564 state->inversion = INVERSION_OFF;
1da177e4
LT
1565 state->voltage = SEC_VOLTAGE_13;
1566 state->tone = SEC_TONE_OFF;
1da177e4
LT
1567 state->diseq_flags = 0;
1568 state->k22 = 0x02;
1569 state->bandwidth = BANDWIDTH_7_MHZ;
1570 state->cur_jiff = jiffies;
a427de6f 1571 if (state->dst_type == DST_TYPE_IS_SAT)
cdd4208c 1572 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
a427de6f 1573 else if (state->dst_type == DST_TYPE_IS_TERR)
cdd4208c 1574 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? ter_tuna_188 : ter_tuna_204), sizeof (ter_tuna_204));
a427de6f 1575 else if (state->dst_type == DST_TYPE_IS_CABLE)
cdd4208c 1576 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? cab_tuna_188 : cab_tuna_204), sizeof (cab_tuna_204));
1c4e7339 1577 else if (state->dst_type == DST_TYPE_IS_ATSC)
1da5e8d3 1578 memcpy(state->tx_tuna, atsc_tuner, sizeof (atsc_tuner));
1da177e4
LT
1579
1580 return 0;
1581}
1582
a427de6f 1583static int dst_read_status(struct dvb_frontend *fe, fe_status_t *status)
1da177e4 1584{
a427de6f 1585 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1586
1587 *status = 0;
1588 if (state->diseq_flags & HAS_LOCK) {
7d53421c 1589// dst_get_signal(state); // don't require(?) to ask MCU
1da177e4
LT
1590 if (state->decode_lock)
1591 *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI;
1592 }
1593
1594 return 0;
1595}
1596
a427de6f 1597static int dst_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1da177e4 1598{
a427de6f 1599 struct dst_state *state = fe->demodulator_priv;
1da177e4 1600
0851fb48 1601 int retval = dst_get_signal(state);
1da177e4
LT
1602 *strength = state->decode_strength;
1603
0851fb48 1604 return retval;
1da177e4
LT
1605}
1606
a427de6f 1607static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
1da177e4 1608{
a427de6f 1609 struct dst_state *state = fe->demodulator_priv;
1da177e4 1610
0851fb48 1611 int retval = dst_get_signal(state);
1da177e4
LT
1612 *snr = state->decode_snr;
1613
0851fb48 1614 return retval;
1da177e4
LT
1615}
1616
8cfba630
MA
1617static int dst_set_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
1618{
0851fb48 1619 int retval = -EINVAL;
8cfba630
MA
1620 struct dst_state *state = fe->demodulator_priv;
1621
1622 if (p != NULL) {
0851fb48
YP
1623 retval = dst_set_freq(state, p->frequency);
1624 if(retval != 0)
1625 return retval;
8cfba630
MA
1626 dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
1627
1628 if (state->dst_type == DST_TYPE_IS_SAT) {
1629 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1630 dst_set_inversion(state, p->inversion);
1631 dst_set_fec(state, p->u.qpsk.fec_inner);
1632 dst_set_symbolrate(state, p->u.qpsk.symbol_rate);
1633 dst_set_polarization(state);
1634 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate);
1635
1636 } else if (state->dst_type == DST_TYPE_IS_TERR)
1637 dst_set_bandwidth(state, p->u.ofdm.bandwidth);
1638 else if (state->dst_type == DST_TYPE_IS_CABLE) {
1639 dst_set_fec(state, p->u.qam.fec_inner);
1640 dst_set_symbolrate(state, p->u.qam.symbol_rate);
1641 dst_set_modulation(state, p->u.qam.modulation);
1642 }
0851fb48 1643 retval = dst_write_tuna(fe);
8cfba630
MA
1644 }
1645
0851fb48 1646 return retval;
8cfba630
MA
1647}
1648
1649static int dst_tune_frontend(struct dvb_frontend* fe,
36cb557a
AQ
1650 struct dvb_frontend_parameters* p,
1651 unsigned int mode_flags,
3ea96615 1652 unsigned int *delay,
36cb557a 1653 fe_status_t *status)
1da177e4 1654{
a427de6f 1655 struct dst_state *state = fe->demodulator_priv;
1da177e4 1656
36cb557a
AQ
1657 if (p != NULL) {
1658 dst_set_freq(state, p->frequency);
1659 dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
50b215a0 1660
36cb557a
AQ
1661 if (state->dst_type == DST_TYPE_IS_SAT) {
1662 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1663 dst_set_inversion(state, p->inversion);
1664 dst_set_fec(state, p->u.qpsk.fec_inner);
1665 dst_set_symbolrate(state, p->u.qpsk.symbol_rate);
1666 dst_set_polarization(state);
1667 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->u.qpsk.symbol_rate);
1668
1669 } else if (state->dst_type == DST_TYPE_IS_TERR)
1670 dst_set_bandwidth(state, p->u.ofdm.bandwidth);
1671 else if (state->dst_type == DST_TYPE_IS_CABLE) {
1672 dst_set_fec(state, p->u.qam.fec_inner);
1673 dst_set_symbolrate(state, p->u.qam.symbol_rate);
1674 dst_set_modulation(state, p->u.qam.modulation);
1675 }
1676 dst_write_tuna(fe);
1da177e4 1677 }
1da177e4 1678
36cb557a
AQ
1679 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1680 dst_read_status(fe, status);
1681
1682 *delay = HZ/10;
1da177e4
LT
1683 return 0;
1684}
1685
8cfba630
MA
1686static int dst_get_tuning_algo(struct dvb_frontend *fe)
1687{
1688 return dst_algo;
1689}
1690
a427de6f 1691static int dst_get_frontend(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
1da177e4 1692{
a427de6f 1693 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1694
1695 p->frequency = state->decode_freq;
1da177e4 1696 if (state->dst_type == DST_TYPE_IS_SAT) {
7d53421c
MA
1697 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1698 p->inversion = state->inversion;
1da177e4
LT
1699 p->u.qpsk.symbol_rate = state->symbol_rate;
1700 p->u.qpsk.fec_inner = dst_get_fec(state);
1701 } else if (state->dst_type == DST_TYPE_IS_TERR) {
1702 p->u.ofdm.bandwidth = state->bandwidth;
1703 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
1704 p->u.qam.symbol_rate = state->symbol_rate;
1705 p->u.qam.fec_inner = dst_get_fec(state);
7d53421c 1706 p->u.qam.modulation = dst_get_modulation(state);
1da177e4
LT
1707 }
1708
1709 return 0;
1710}
1711
a427de6f 1712static void dst_release(struct dvb_frontend *fe)
1da177e4 1713{
a427de6f 1714 struct dst_state *state = fe->demodulator_priv;
bbdd11fa
MA
1715 if (state->dst_ca) {
1716 dvb_unregister_device(state->dst_ca);
149ef72d 1717#ifdef CONFIG_MEDIA_ATTACH
bbdd11fa
MA
1718 symbol_put(dst_ca_attach);
1719#endif
1720 }
1da177e4
LT
1721 kfree(state);
1722}
1723
1724static struct dvb_frontend_ops dst_dvbt_ops;
1725static struct dvb_frontend_ops dst_dvbs_ops;
1726static struct dvb_frontend_ops dst_dvbc_ops;
bc7386ba 1727static struct dvb_frontend_ops dst_atsc_ops;
1da177e4 1728
a427de6f 1729struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter)
1da177e4 1730{
50b215a0
JS
1731 /* check if the ASIC is there */
1732 if (dst_probe(state) < 0) {
2ea75330 1733 kfree(state);
50b215a0
JS
1734 return NULL;
1735 }
1da177e4 1736 /* determine settings based on type */
dea74869 1737 /* create dvb_frontend */
1da177e4
LT
1738 switch (state->dst_type) {
1739 case DST_TYPE_IS_TERR:
dea74869 1740 memcpy(&state->frontend.ops, &dst_dvbt_ops, sizeof(struct dvb_frontend_ops));
1da177e4
LT
1741 break;
1742 case DST_TYPE_IS_CABLE:
dea74869 1743 memcpy(&state->frontend.ops, &dst_dvbc_ops, sizeof(struct dvb_frontend_ops));
1da177e4
LT
1744 break;
1745 case DST_TYPE_IS_SAT:
dea74869 1746 memcpy(&state->frontend.ops, &dst_dvbs_ops, sizeof(struct dvb_frontend_ops));
1da177e4 1747 break;
bc7386ba
MA
1748 case DST_TYPE_IS_ATSC:
1749 memcpy(&state->frontend.ops, &dst_atsc_ops, sizeof(struct dvb_frontend_ops));
1750 break;
1da177e4 1751 default:
a427de6f 1752 dprintk(verbose, DST_ERROR, 1, "unknown DST type. please report to the LinuxTV.org DVB mailinglist.");
2ea75330 1753 kfree(state);
50b215a0 1754 return NULL;
1da177e4 1755 }
1da177e4 1756 state->frontend.demodulator_priv = state;
1da177e4 1757
50b215a0 1758 return state; /* Manu (DST is a card not a frontend) */
1da177e4
LT
1759}
1760
50b215a0
JS
1761EXPORT_SYMBOL(dst_attach);
1762
1da177e4
LT
1763static struct dvb_frontend_ops dst_dvbt_ops = {
1764
1765 .info = {
1766 .name = "DST DVB-T",
1767 .type = FE_OFDM,
1768 .frequency_min = 137000000,
1769 .frequency_max = 858000000,
1770 .frequency_stepsize = 166667,
1771 .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO
1772 },
1773
1774 .release = dst_release,
1da177e4 1775 .init = dst_init,
8cfba630
MA
1776 .tune = dst_tune_frontend,
1777 .set_frontend = dst_set_frontend,
1da177e4 1778 .get_frontend = dst_get_frontend,
cdd393cc 1779 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1780 .read_status = dst_read_status,
1781 .read_signal_strength = dst_read_signal_strength,
1782 .read_snr = dst_read_snr,
1783};
1784
1785static struct dvb_frontend_ops dst_dvbs_ops = {
1786
1787 .info = {
1788 .name = "DST DVB-S",
1789 .type = FE_QPSK,
1790 .frequency_min = 950000,
1791 .frequency_max = 2150000,
1792 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
1793 .frequency_tolerance = 29500,
1794 .symbol_rate_min = 1000000,
1795 .symbol_rate_max = 45000000,
1796 /* . symbol_rate_tolerance = ???,*/
1797 .caps = FE_CAN_FEC_AUTO | FE_CAN_QPSK
1798 },
1799
1800 .release = dst_release,
1da177e4 1801 .init = dst_init,
8cfba630
MA
1802 .tune = dst_tune_frontend,
1803 .set_frontend = dst_set_frontend,
1da177e4 1804 .get_frontend = dst_get_frontend,
cdd393cc 1805 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1806 .read_status = dst_read_status,
1807 .read_signal_strength = dst_read_signal_strength,
1808 .read_snr = dst_read_snr,
203fe8b3 1809 .diseqc_send_burst = dst_send_burst,
1da177e4
LT
1810 .diseqc_send_master_cmd = dst_set_diseqc,
1811 .set_voltage = dst_set_voltage,
1812 .set_tone = dst_set_tone,
1813};
1814
1815static struct dvb_frontend_ops dst_dvbc_ops = {
1816
1817 .info = {
1818 .name = "DST DVB-C",
1819 .type = FE_QAM,
1820 .frequency_stepsize = 62500,
1821 .frequency_min = 51000000,
1822 .frequency_max = 858000000,
1823 .symbol_rate_min = 1000000,
1824 .symbol_rate_max = 45000000,
1825 /* . symbol_rate_tolerance = ???,*/
1826 .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO
1827 },
1828
1829 .release = dst_release,
1da177e4 1830 .init = dst_init,
8cfba630
MA
1831 .tune = dst_tune_frontend,
1832 .set_frontend = dst_set_frontend,
1da177e4 1833 .get_frontend = dst_get_frontend,
cdd393cc 1834 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1835 .read_status = dst_read_status,
1836 .read_signal_strength = dst_read_signal_strength,
1837 .read_snr = dst_read_snr,
1838};
1839
bc7386ba
MA
1840static struct dvb_frontend_ops dst_atsc_ops = {
1841 .info = {
1842 .name = "DST ATSC",
1843 .type = FE_ATSC,
1844 .frequency_stepsize = 62500,
1845 .frequency_min = 510000000,
1846 .frequency_max = 858000000,
1847 .symbol_rate_min = 1000000,
1848 .symbol_rate_max = 45000000,
1849 .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
1850 },
1851
1852 .release = dst_release,
1853 .init = dst_init,
8cfba630
MA
1854 .tune = dst_tune_frontend,
1855 .set_frontend = dst_set_frontend,
bc7386ba 1856 .get_frontend = dst_get_frontend,
cdd393cc 1857 .get_frontend_algo = dst_get_tuning_algo,
bc7386ba
MA
1858 .read_status = dst_read_status,
1859 .read_signal_strength = dst_read_signal_strength,
1860 .read_snr = dst_read_snr,
1861};
1862
1863MODULE_DESCRIPTION("DST DVB-S/T/C/ATSC Combo Frontend driver");
50b215a0 1864MODULE_AUTHOR("Jamie Honan, Manu Abraham");
1da177e4 1865MODULE_LICENSE("GPL");