[media] dvb-core: Don't pass DVBv3 parameters on tune() fops
[linux-2.6-block.git] / drivers / media / dvb / bt8xx / dst.c
CommitLineData
1da177e4 1/*
50b215a0
JS
2 Frontend/Card driver for TwinHan DST Frontend
3 Copyright (C) 2003 Jamie Honan
4 Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
1da177e4 5
50b215a0
JS
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
1da177e4 10
50b215a0
JS
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
1da177e4 15
50b215a0
JS
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4
LT
19*/
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/string.h>
25#include <linux/slab.h>
26#include <linux/vmalloc.h>
27#include <linux/delay.h>
28#include <asm/div64.h>
1da177e4
LT
29#include "dvb_frontend.h"
30#include "dst_priv.h"
50b215a0
JS
31#include "dst_common.h"
32
50b215a0
JS
33static unsigned int verbose = 1;
34module_param(verbose, int, 0644);
35MODULE_PARM_DESC(verbose, "verbose startup messages, default is 1 (yes)");
36
50b215a0
JS
37static unsigned int dst_addons;
38module_param(dst_addons, int, 0644);
4a2cc126 39MODULE_PARM_DESC(dst_addons, "CA daughterboard, default is 0 (No addons)");
1da177e4 40
8cfba630
MA
41static unsigned int dst_algo;
42module_param(dst_algo, int, 0644);
43MODULE_PARM_DESC(dst_algo, "tuning algo: default is 0=(SW), 1=(HW)");
44
a427de6f
MA
45#define HAS_LOCK 1
46#define ATTEMPT_TUNE 2
47#define HAS_POWER 4
48
49#define DST_ERROR 0
50#define DST_NOTICE 1
51#define DST_INFO 2
52#define DST_DEBUG 3
53
9500c7b0
MA
54#define dprintk(x, y, z, format, arg...) do { \
55 if (z) { \
56 if ((x > DST_ERROR) && (x > y)) \
57 printk(KERN_ERR "dst(%d) %s: " format "\n", \
58 state->bt->nr, __func__ , ##arg); \
59 else if ((x > DST_NOTICE) && (x > y)) \
60 printk(KERN_NOTICE "dst(%d) %s: " format "\n", \
61 state->bt->nr, __func__ , ##arg); \
62 else if ((x > DST_INFO) && (x > y)) \
63 printk(KERN_INFO "dst(%d) %s: " format "\n", \
64 state->bt->nr, __func__ , ##arg); \
65 else if ((x > DST_DEBUG) && (x > y)) \
66 printk(KERN_DEBUG "dst(%d) %s: " format "\n", \
67 state->bt->nr, __func__ , ##arg); \
68 } else { \
69 if (x > y) \
70 printk(format, ##arg); \
71 } \
a427de6f
MA
72} while(0)
73
b00ef4b8 74static int dst_command(struct dst_state *state, u8 *data, u8 len);
a427de6f
MA
75
76static void dst_packsize(struct dst_state *state, int psize)
1da177e4
LT
77{
78 union dst_gpio_packet bits;
79
80 bits.psize = psize;
81 bt878_device_control(state->bt, DST_IG_TS, &bits);
82}
83
b00ef4b8
AB
84static int dst_gpio_outb(struct dst_state *state, u32 mask, u32 enbb,
85 u32 outhigh, int delay)
1da177e4
LT
86{
87 union dst_gpio_packet enb;
88 union dst_gpio_packet bits;
89 int err;
90
91 enb.enb.mask = mask;
92 enb.enb.enable = enbb;
50b215a0 93
a427de6f 94 dprintk(verbose, DST_INFO, 1, "mask=[%04x], enbb=[%04x], outhigh=[%04x]", mask, enbb, outhigh);
1da177e4 95 if ((err = bt878_device_control(state->bt, DST_IG_ENABLE, &enb)) < 0) {
a427de6f 96 dprintk(verbose, DST_INFO, 1, "dst_gpio_enb error (err == %i, mask == %02x, enb == %02x)", err, mask, enbb);
1da177e4
LT
97 return -EREMOTEIO;
98 }
8385e46f 99 udelay(1000);
1da177e4
LT
100 /* because complete disabling means no output, no need to do output packet */
101 if (enbb == 0)
102 return 0;
50b215a0
JS
103 if (delay)
104 msleep(10);
1da177e4
LT
105 bits.outp.mask = enbb;
106 bits.outp.highvals = outhigh;
1da177e4 107 if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
a427de6f 108 dprintk(verbose, DST_INFO, 1, "dst_gpio_outb error (err == %i, enbb == %02x, outhigh == %02x)", err, enbb, outhigh);
1da177e4
LT
109 return -EREMOTEIO;
110 }
a427de6f 111
1da177e4
LT
112 return 0;
113}
114
b00ef4b8 115static int dst_gpio_inb(struct dst_state *state, u8 *result)
1da177e4
LT
116{
117 union dst_gpio_packet rd_packet;
118 int err;
119
120 *result = 0;
1da177e4 121 if ((err = bt878_device_control(state->bt, DST_IG_READ, &rd_packet)) < 0) {
6cd94745 122 dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb error (err == %i)", err);
1da177e4
LT
123 return -EREMOTEIO;
124 }
1da177e4 125 *result = (u8) rd_packet.rd.value;
a427de6f 126
1da177e4
LT
127 return 0;
128}
129
50b215a0 130int rdc_reset_state(struct dst_state *state)
1da177e4 131{
a427de6f 132 dprintk(verbose, DST_INFO, 1, "Resetting state machine");
50b215a0 133 if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, 0, NO_DELAY) < 0) {
a427de6f 134 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
135 return -1;
136 }
1da177e4 137 msleep(10);
50b215a0 138 if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, RDC_8820_INT, NO_DELAY) < 0) {
a427de6f 139 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
140 msleep(10);
141 return -1;
142 }
143
1da177e4
LT
144 return 0;
145}
50b215a0 146EXPORT_SYMBOL(rdc_reset_state);
1da177e4 147
b00ef4b8 148static int rdc_8820_reset(struct dst_state *state)
1da177e4 149{
a427de6f 150 dprintk(verbose, DST_DEBUG, 1, "Resetting DST");
50b215a0 151 if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, 0, NO_DELAY) < 0) {
a427de6f 152 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
153 return -1;
154 }
8385e46f 155 udelay(1000);
50b215a0 156 if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, RDC_8820_RESET, DELAY) < 0) {
a427de6f 157 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
158 return -1;
159 }
160
1da177e4
LT
161 return 0;
162}
163
b00ef4b8 164static int dst_pio_enable(struct dst_state *state)
1da177e4 165{
50b215a0 166 if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_ENABLE, 0, NO_DELAY) < 0) {
a427de6f 167 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
168 return -1;
169 }
8385e46f 170 udelay(1000);
a427de6f 171
50b215a0
JS
172 return 0;
173}
50b215a0
JS
174
175int dst_pio_disable(struct dst_state *state)
176{
177 if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_DISABLE, RDC_8820_PIO_0_DISABLE, NO_DELAY) < 0) {
a427de6f 178 dprintk(verbose, DST_ERROR, 1, "dst_gpio_outb ERROR !");
50b215a0
JS
179 return -1;
180 }
8385e46f
JS
181 if (state->type_flags & DST_TYPE_HAS_FW_1)
182 udelay(1000);
50b215a0 183
1da177e4
LT
184 return 0;
185}
50b215a0 186EXPORT_SYMBOL(dst_pio_disable);
1da177e4 187
50b215a0 188int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode)
1da177e4
LT
189{
190 u8 reply;
1da177e4 191 int i;
50b215a0 192
1da177e4 193 for (i = 0; i < 200; i++) {
50b215a0 194 if (dst_gpio_inb(state, &reply) < 0) {
a427de6f 195 dprintk(verbose, DST_ERROR, 1, "dst_gpio_inb ERROR !");
50b215a0
JS
196 return -1;
197 }
50b215a0 198 if ((reply & RDC_8820_PIO_0_ENABLE) == 0) {
a427de6f 199 dprintk(verbose, DST_INFO, 1, "dst wait ready after %d", i);
1da177e4
LT
200 return 1;
201 }
b46dd445 202 msleep(10);
50b215a0 203 }
a427de6f 204 dprintk(verbose, DST_NOTICE, 1, "dst wait NOT ready after %d", i);
50b215a0
JS
205
206 return 0;
207}
208EXPORT_SYMBOL(dst_wait_dst_ready);
209
210int dst_error_recovery(struct dst_state *state)
211{
a427de6f 212 dprintk(verbose, DST_NOTICE, 1, "Trying to return from previous errors.");
50b215a0
JS
213 dst_pio_disable(state);
214 msleep(10);
215 dst_pio_enable(state);
216 msleep(10);
217
218 return 0;
219}
220EXPORT_SYMBOL(dst_error_recovery);
221
222int dst_error_bailout(struct dst_state *state)
223{
a427de6f 224 dprintk(verbose, DST_INFO, 1, "Trying to bailout from previous error.");
50b215a0
JS
225 rdc_8820_reset(state);
226 dst_pio_disable(state);
227 msleep(10);
228
229 return 0;
230}
231EXPORT_SYMBOL(dst_error_bailout);
232
a427de6f 233int dst_comm_init(struct dst_state *state)
50b215a0 234{
a427de6f 235 dprintk(verbose, DST_INFO, 1, "Initializing DST.");
50b215a0 236 if ((dst_pio_enable(state)) < 0) {
a427de6f 237 dprintk(verbose, DST_ERROR, 1, "PIO Enable Failed");
50b215a0
JS
238 return -1;
239 }
240 if ((rdc_reset_state(state)) < 0) {
a427de6f 241 dprintk(verbose, DST_ERROR, 1, "RDC 8820 State RESET Failed.");
50b215a0 242 return -1;
1da177e4 243 }
8385e46f
JS
244 if (state->type_flags & DST_TYPE_HAS_FW_1)
245 msleep(100);
246 else
247 msleep(5);
248
1da177e4
LT
249 return 0;
250}
50b215a0 251EXPORT_SYMBOL(dst_comm_init);
1da177e4 252
50b215a0 253int write_dst(struct dst_state *state, u8 *data, u8 len)
1da177e4
LT
254{
255 struct i2c_msg msg = {
a427de6f
MA
256 .addr = state->config->demod_address,
257 .flags = 0,
258 .buf = data,
259 .len = len
1da177e4 260 };
50b215a0 261
1da177e4 262 int err;
a427de6f
MA
263 u8 cnt, i;
264
265 dprintk(verbose, DST_NOTICE, 0, "writing [ ");
266 for (i = 0; i < len; i++)
267 dprintk(verbose, DST_NOTICE, 0, "%02x ", data[i]);
268 dprintk(verbose, DST_NOTICE, 0, "]\n");
269
50b215a0 270 for (cnt = 0; cnt < 2; cnt++) {
1da177e4 271 if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
a427de6f 272 dprintk(verbose, DST_INFO, 1, "_write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, data[0]);
50b215a0 273 dst_error_recovery(state);
1da177e4
LT
274 continue;
275 } else
276 break;
277 }
50b215a0 278 if (cnt >= 2) {
a427de6f 279 dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
50b215a0
JS
280 dst_error_bailout(state);
281
282 return -1;
283 }
284
1da177e4
LT
285 return 0;
286}
50b215a0 287EXPORT_SYMBOL(write_dst);
1da177e4 288
a427de6f 289int read_dst(struct dst_state *state, u8 *ret, u8 len)
1da177e4 290{
a427de6f
MA
291 struct i2c_msg msg = {
292 .addr = state->config->demod_address,
293 .flags = I2C_M_RD,
294 .buf = ret,
295 .len = len
296 };
297
1da177e4
LT
298 int err;
299 int cnt;
300
50b215a0 301 for (cnt = 0; cnt < 2; cnt++) {
1da177e4 302 if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
a427de6f 303 dprintk(verbose, DST_INFO, 1, "read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)", err, len, ret[0]);
50b215a0 304 dst_error_recovery(state);
1da177e4
LT
305 continue;
306 } else
307 break;
308 }
50b215a0 309 if (cnt >= 2) {
a427de6f 310 dprintk(verbose, DST_INFO, 1, "RDC 8820 RESET");
50b215a0
JS
311 dst_error_bailout(state);
312
313 return -1;
314 }
a427de6f
MA
315 dprintk(verbose, DST_DEBUG, 1, "reply is 0x%x", ret[0]);
316 for (err = 1; err < len; err++)
317 dprintk(verbose, DST_DEBUG, 0, " 0x%x", ret[err]);
318 if (err > 1)
319 dprintk(verbose, DST_DEBUG, 0, "\n");
50b215a0 320
1da177e4
LT
321 return 0;
322}
50b215a0 323EXPORT_SYMBOL(read_dst);
1da177e4 324
7d53421c 325static int dst_set_polarization(struct dst_state *state)
1da177e4 326{
7d53421c 327 switch (state->voltage) {
a427de6f
MA
328 case SEC_VOLTAGE_13: /* Vertical */
329 dprintk(verbose, DST_INFO, 1, "Polarization=[Vertical]");
330 state->tx_tuna[8] &= ~0x40;
331 break;
332 case SEC_VOLTAGE_18: /* Horizontal */
333 dprintk(verbose, DST_INFO, 1, "Polarization=[Horizontal]");
334 state->tx_tuna[8] |= 0x40;
335 break;
336 case SEC_VOLTAGE_OFF:
337 break;
7d53421c
MA
338 }
339
340 return 0;
341}
342
343static int dst_set_freq(struct dst_state *state, u32 freq)
344{
1da177e4 345 state->frequency = freq;
a427de6f 346 dprintk(verbose, DST_INFO, 1, "set Frequency %u", freq);
1da177e4 347
1da177e4
LT
348 if (state->dst_type == DST_TYPE_IS_SAT) {
349 freq = freq / 1000;
350 if (freq < 950 || freq > 2150)
351 return -EINVAL;
7d53421c
MA
352 state->tx_tuna[2] = (freq >> 8);
353 state->tx_tuna[3] = (u8) freq;
354 state->tx_tuna[4] = 0x01;
355 state->tx_tuna[8] &= ~0x04;
356 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
357 if (freq < 1531)
358 state->tx_tuna[8] |= 0x04;
359 }
1da177e4
LT
360 } else if (state->dst_type == DST_TYPE_IS_TERR) {
361 freq = freq / 1000;
362 if (freq < 137000 || freq > 858000)
363 return -EINVAL;
7d53421c
MA
364 state->tx_tuna[2] = (freq >> 16) & 0xff;
365 state->tx_tuna[3] = (freq >> 8) & 0xff;
366 state->tx_tuna[4] = (u8) freq;
1da177e4 367 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
62867429 368 freq = freq / 1000;
7d53421c
MA
369 state->tx_tuna[2] = (freq >> 16) & 0xff;
370 state->tx_tuna[3] = (freq >> 8) & 0xff;
371 state->tx_tuna[4] = (u8) freq;
ed3d1065
MA
372 } else if (state->dst_type == DST_TYPE_IS_ATSC) {
373 freq = freq / 1000;
374 if (freq < 51000 || freq > 858000)
375 return -EINVAL;
376 state->tx_tuna[2] = (freq >> 16) & 0xff;
377 state->tx_tuna[3] = (freq >> 8) & 0xff;
378 state->tx_tuna[4] = (u8) freq;
379 state->tx_tuna[5] = 0x00; /* ATSC */
380 state->tx_tuna[6] = 0x00;
381 if (state->dst_hw_cap & DST_TYPE_HAS_ANALOG)
382 state->tx_tuna[7] = 0x00; /* Digital */
1da177e4
LT
383 } else
384 return -EINVAL;
a427de6f 385
1da177e4
LT
386 return 0;
387}
388
5942c679 389static int dst_set_bandwidth(struct dst_state *state, u32 bandwidth)
1da177e4 390{
1da177e4
LT
391 state->bandwidth = bandwidth;
392
393 if (state->dst_type != DST_TYPE_IS_TERR)
0851fb48 394 return -EOPNOTSUPP;
1da177e4 395
1da177e4 396 switch (bandwidth) {
5942c679 397 case 6000000:
a427de6f
MA
398 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
399 state->tx_tuna[7] = 0x06;
400 else {
401 state->tx_tuna[6] = 0x06;
402 state->tx_tuna[7] = 0x00;
403 }
404 break;
5942c679 405 case 7000000:
a427de6f
MA
406 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
407 state->tx_tuna[7] = 0x07;
408 else {
409 state->tx_tuna[6] = 0x07;
410 state->tx_tuna[7] = 0x00;
411 }
412 break;
5942c679 413 case 8000000:
a427de6f
MA
414 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
415 state->tx_tuna[7] = 0x08;
416 else {
417 state->tx_tuna[6] = 0x08;
418 state->tx_tuna[7] = 0x00;
419 }
420 break;
421 default:
422 return -EINVAL;
1da177e4 423 }
a427de6f 424
1da177e4
LT
425 return 0;
426}
427
a427de6f 428static int dst_set_inversion(struct dst_state *state, fe_spectral_inversion_t inversion)
1da177e4 429{
1da177e4 430 state->inversion = inversion;
1da177e4 431 switch (inversion) {
a427de6f
MA
432 case INVERSION_OFF: /* Inversion = Normal */
433 state->tx_tuna[8] &= ~0x80;
434 break;
435 case INVERSION_ON:
436 state->tx_tuna[8] |= 0x80;
437 break;
438 default:
439 return -EINVAL;
1da177e4 440 }
a427de6f 441
1da177e4
LT
442 return 0;
443}
444
a427de6f 445static int dst_set_fec(struct dst_state *state, fe_code_rate_t fec)
1da177e4
LT
446{
447 state->fec = fec;
448 return 0;
449}
450
a427de6f 451static fe_code_rate_t dst_get_fec(struct dst_state *state)
1da177e4
LT
452{
453 return state->fec;
454}
455
a427de6f 456static int dst_set_symbolrate(struct dst_state *state, u32 srate)
1da177e4 457{
1da177e4
LT
458 u32 symcalc;
459 u64 sval;
460
461 state->symbol_rate = srate;
1da177e4 462 if (state->dst_type == DST_TYPE_IS_TERR) {
0851fb48 463 return -EOPNOTSUPP;
1da177e4 464 }
a427de6f 465 dprintk(verbose, DST_INFO, 1, "set symrate %u", srate);
1da177e4 466 srate /= 1000;
63ad4e44
MA
467 if (state->dst_type == DST_TYPE_IS_SAT) {
468 if (state->type_flags & DST_TYPE_HAS_SYMDIV) {
469 sval = srate;
470 sval <<= 20;
471 do_div(sval, 88000);
472 symcalc = (u32) sval;
473 dprintk(verbose, DST_INFO, 1, "set symcalc %u", symcalc);
474 state->tx_tuna[5] = (u8) (symcalc >> 12);
475 state->tx_tuna[6] = (u8) (symcalc >> 4);
476 state->tx_tuna[7] = (u8) (symcalc << 4);
477 } else {
478 state->tx_tuna[5] = (u8) (srate >> 16) & 0x7f;
479 state->tx_tuna[6] = (u8) (srate >> 8);
480 state->tx_tuna[7] = (u8) srate;
481 }
482 state->tx_tuna[8] &= ~0x20;
483 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
484 if (srate > 8000)
485 state->tx_tuna[8] |= 0x20;
486 }
487 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
488 dprintk(verbose, DST_DEBUG, 1, "%s", state->fw_name);
489 if (!strncmp(state->fw_name, "DCTNEW", 6)) {
490 state->tx_tuna[5] = (u8) (srate >> 8);
491 state->tx_tuna[6] = (u8) srate;
492 state->tx_tuna[7] = 0x00;
493 } else if (!strncmp(state->fw_name, "DCT-CI", 6)) {
494 state->tx_tuna[5] = 0x00;
495 state->tx_tuna[6] = (u8) (srate >> 8);
496 state->tx_tuna[7] = (u8) srate;
497 }
1da177e4 498 }
1da177e4
LT
499 return 0;
500}
501
7d53421c
MA
502static int dst_set_modulation(struct dst_state *state, fe_modulation_t modulation)
503{
504 if (state->dst_type != DST_TYPE_IS_CABLE)
0851fb48 505 return -EOPNOTSUPP;
7d53421c
MA
506
507 state->modulation = modulation;
508 switch (modulation) {
a427de6f
MA
509 case QAM_16:
510 state->tx_tuna[8] = 0x10;
511 break;
512 case QAM_32:
513 state->tx_tuna[8] = 0x20;
514 break;
515 case QAM_64:
516 state->tx_tuna[8] = 0x40;
517 break;
518 case QAM_128:
519 state->tx_tuna[8] = 0x80;
520 break;
521 case QAM_256:
63ad4e44
MA
522 if (!strncmp(state->fw_name, "DCTNEW", 6))
523 state->tx_tuna[8] = 0xff;
524 else if (!strncmp(state->fw_name, "DCT-CI", 6))
525 state->tx_tuna[8] = 0x00;
a427de6f
MA
526 break;
527 case QPSK:
528 case QAM_AUTO:
529 case VSB_8:
530 case VSB_16:
531 default:
532 return -EINVAL;
7d53421c
MA
533
534 }
535
536 return 0;
537}
538
539static fe_modulation_t dst_get_modulation(struct dst_state *state)
540{
541 return state->modulation;
542}
543
544
a427de6f 545u8 dst_check_sum(u8 *buf, u32 len)
1da177e4
LT
546{
547 u32 i;
548 u8 val = 0;
549 if (!len)
550 return 0;
551 for (i = 0; i < len; i++) {
552 val += buf[i];
553 }
554 return ((~val) + 1);
555}
50b215a0 556EXPORT_SYMBOL(dst_check_sum);
1da177e4 557
6cd94745 558static void dst_type_flags_print(struct dst_state *state)
1da177e4 559{
6cd94745
SAH
560 u32 type_flags = state->type_flags;
561
a427de6f 562 dprintk(verbose, DST_ERROR, 0, "DST type flags :");
7ef53b1a
MA
563 if (type_flags & DST_TYPE_HAS_TS188)
564 dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner", DST_TYPE_HAS_TS188);
1da5e8d3
MA
565 if (type_flags & DST_TYPE_HAS_NEWTUNE_2)
566 dprintk(verbose, DST_ERROR, 0, " 0x%x newtuner 2", DST_TYPE_HAS_NEWTUNE_2);
1da177e4 567 if (type_flags & DST_TYPE_HAS_TS204)
a427de6f 568 dprintk(verbose, DST_ERROR, 0, " 0x%x ts204", DST_TYPE_HAS_TS204);
cdd4208c
MA
569 if (type_flags & DST_TYPE_HAS_VLF)
570 dprintk(verbose, DST_ERROR, 0, " 0x%x VLF", DST_TYPE_HAS_VLF);
1da177e4 571 if (type_flags & DST_TYPE_HAS_SYMDIV)
a427de6f 572 dprintk(verbose, DST_ERROR, 0, " 0x%x symdiv", DST_TYPE_HAS_SYMDIV);
50b215a0 573 if (type_flags & DST_TYPE_HAS_FW_1)
a427de6f 574 dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 1", DST_TYPE_HAS_FW_1);
50b215a0 575 if (type_flags & DST_TYPE_HAS_FW_2)
a427de6f 576 dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 2", DST_TYPE_HAS_FW_2);
50b215a0 577 if (type_flags & DST_TYPE_HAS_FW_3)
a427de6f
MA
578 dprintk(verbose, DST_ERROR, 0, " 0x%x firmware version = 3", DST_TYPE_HAS_FW_3);
579 dprintk(verbose, DST_ERROR, 0, "\n");
1da177e4
LT
580}
581
50b215a0 582
6cd94745 583static int dst_type_print(struct dst_state *state, u8 type)
1da177e4
LT
584{
585 char *otype;
586 switch (type) {
587 case DST_TYPE_IS_SAT:
588 otype = "satellite";
589 break;
50b215a0 590
1da177e4
LT
591 case DST_TYPE_IS_TERR:
592 otype = "terrestrial";
593 break;
50b215a0 594
1da177e4
LT
595 case DST_TYPE_IS_CABLE:
596 otype = "cable";
597 break;
50b215a0 598
bc7386ba
MA
599 case DST_TYPE_IS_ATSC:
600 otype = "atsc";
601 break;
602
1da177e4 603 default:
a427de6f 604 dprintk(verbose, DST_INFO, 1, "invalid dst type %d", type);
1da177e4
LT
605 return -EINVAL;
606 }
a427de6f 607 dprintk(verbose, DST_INFO, 1, "DST type: %s", otype);
50b215a0 608
1da177e4
LT
609 return 0;
610}
611
b00ef4b8 612static struct tuner_types tuner_list[] = {
b633c6d6 613 {
4e7024bd 614 .tuner_type = TUNER_TYPE_L64724,
364f255a 615 .tuner_name = "L 64724",
4e7024bd
MA
616 .board_name = "UNKNOWN",
617 .fw_name = "UNKNOWN"
b633c6d6
MA
618 },
619
620 {
4e7024bd 621 .tuner_type = TUNER_TYPE_STV0299,
364f255a 622 .tuner_name = "STV 0299",
4e7024bd
MA
623 .board_name = "VP1020",
624 .fw_name = "DST-MOT"
b633c6d6
MA
625 },
626
627 {
4e7024bd
MA
628 .tuner_type = TUNER_TYPE_STV0299,
629 .tuner_name = "STV 0299",
630 .board_name = "VP1020",
631 .fw_name = "DST-03T"
632 },
633
634 {
635 .tuner_type = TUNER_TYPE_MB86A15,
364f255a 636 .tuner_name = "MB 86A15",
4e7024bd
MA
637 .board_name = "VP1022",
638 .fw_name = "DST-03T"
b633c6d6 639 },
364f255a
MA
640
641 {
4e7024bd
MA
642 .tuner_type = TUNER_TYPE_MB86A15,
643 .tuner_name = "MB 86A15",
644 .board_name = "VP1025",
645 .fw_name = "DST-03T"
646 },
647
648 {
649 .tuner_type = TUNER_TYPE_STV0299,
650 .tuner_name = "STV 0299",
651 .board_name = "VP1030",
652 .fw_name = "DST-CI"
653 },
654
655 {
656 .tuner_type = TUNER_TYPE_STV0299,
657 .tuner_name = "STV 0299",
658 .board_name = "VP1030",
659 .fw_name = "DSTMCI"
660 },
661
63ad4e44
MA
662 {
663 .tuner_type = TUNER_TYPE_UNKNOWN,
664 .tuner_name = "UNKNOWN",
665 .board_name = "VP2021",
666 .fw_name = "DCTNEW"
667 },
668
4e7024bd
MA
669 {
670 .tuner_type = TUNER_TYPE_UNKNOWN,
671 .tuner_name = "UNKNOWN",
672 .board_name = "VP2030",
673 .fw_name = "DCT-CI"
674 },
675
676 {
677 .tuner_type = TUNER_TYPE_UNKNOWN,
678 .tuner_name = "UNKNOWN",
679 .board_name = "VP2031",
680 .fw_name = "DCT-CI"
681 },
682
683 {
684 .tuner_type = TUNER_TYPE_UNKNOWN,
685 .tuner_name = "UNKNOWN",
686 .board_name = "VP2040",
687 .fw_name = "DCT-CI"
688 },
689
690 {
691 .tuner_type = TUNER_TYPE_UNKNOWN,
692 .tuner_name = "UNKNOWN",
693 .board_name = "VP3020",
694 .fw_name = "DTTFTA"
695 },
696
697 {
698 .tuner_type = TUNER_TYPE_UNKNOWN,
699 .tuner_name = "UNKNOWN",
700 .board_name = "VP3021",
701 .fw_name = "DTTFTA"
702 },
703
704 {
705 .tuner_type = TUNER_TYPE_TDA10046,
706 .tuner_name = "TDA10046",
707 .board_name = "VP3040",
708 .fw_name = "DTT-CI"
709 },
710
711 {
712 .tuner_type = TUNER_TYPE_UNKNOWN,
713 .tuner_name = "UNKNOWN",
714 .board_name = "VP3051",
715 .fw_name = "DTTNXT"
716 },
717
718 {
719 .tuner_type = TUNER_TYPE_NXT200x,
720 .tuner_name = "NXT200x",
721 .board_name = "VP3220",
722 .fw_name = "ATSCDI"
723 },
724
725 {
726 .tuner_type = TUNER_TYPE_NXT200x,
727 .tuner_name = "NXT200x",
728 .board_name = "VP3250",
729 .fw_name = "ATSCAD"
730 },
b633c6d6
MA
731};
732
50b215a0
JS
733/*
734 Known cards list
735 Satellite
736 -------------------
e6ac699a 737 200103A
50b215a0
JS
738 VP-1020 DST-MOT LG(old), TS=188
739
740 VP-1020 DST-03T LG(new), TS=204
741 VP-1022 DST-03T LG(new), TS=204
742 VP-1025 DST-03T LG(new), TS=204
743
744 VP-1030 DSTMCI, LG(new), TS=188
745 VP-1032 DSTMCI, LG(new), TS=188
746
747 Cable
748 -------------------
749 VP-2030 DCT-CI, Samsung, TS=204
750 VP-2021 DCT-CI, Unknown, TS=204
751 VP-2031 DCT-CI, Philips, TS=188
752 VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
753 VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
754
755 Terrestrial
756 -------------------
757 VP-3050 DTTNXT TS=188
758 VP-3040 DTT-CI, Philips, TS=188
759 VP-3040 DTT-CI, Philips, TS=204
760
761 ATSC
762 -------------------
763 VP-3220 ATSCDI, TS=188
764 VP-3250 ATSCAD, TS=188
765
766*/
767
47a9e50e 768static struct dst_types dst_tlist[] = {
e6ac699a
JS
769 {
770 .device_id = "200103A",
771 .offset = 0,
772 .dst_type = DST_TYPE_IS_SAT,
7d53421c 773 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS,
396cffd6
MA
774 .dst_feature = 0,
775 .tuner_type = 0
e6ac699a
JS
776 }, /* obsolete */
777
50b215a0
JS
778 {
779 .device_id = "DST-020",
780 .offset = 0,
781 .dst_type = DST_TYPE_IS_SAT,
782 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
396cffd6
MA
783 .dst_feature = 0,
784 .tuner_type = 0
50b215a0
JS
785 }, /* obsolete */
786
787 {
788 .device_id = "DST-030",
789 .offset = 0,
790 .dst_type = DST_TYPE_IS_SAT,
7ef53b1a 791 .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
396cffd6
MA
792 .dst_feature = 0,
793 .tuner_type = 0
50b215a0
JS
794 }, /* obsolete */
795
796 {
797 .device_id = "DST-03T",
798 .offset = 0,
799 .dst_type = DST_TYPE_IS_SAT,
800 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_2,
801 .dst_feature = DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | DST_TYPE_HAS_DISEQC5
396cffd6 802 | DST_TYPE_HAS_MAC | DST_TYPE_HAS_MOTO,
b633c6d6 803 .tuner_type = TUNER_TYPE_MULTI
50b215a0
JS
804 },
805
806 {
807 .device_id = "DST-MOT",
808 .offset = 0,
809 .dst_type = DST_TYPE_IS_SAT,
810 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
396cffd6
MA
811 .dst_feature = 0,
812 .tuner_type = 0
50b215a0
JS
813 }, /* obsolete */
814
815 {
816 .device_id = "DST-CI",
817 .offset = 1,
818 .dst_type = DST_TYPE_IS_SAT,
c65f1c57 819 .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_1,
396cffd6
MA
820 .dst_feature = DST_TYPE_HAS_CA,
821 .tuner_type = 0
8385e46f 822 }, /* An OEM board */
50b215a0
JS
823
824 {
825 .device_id = "DSTMCI",
826 .offset = 1,
827 .dst_type = DST_TYPE_IS_SAT,
cdd4208c 828 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT | DST_TYPE_HAS_VLF,
50b215a0 829 .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4
396cffd6
MA
830 | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC,
831 .tuner_type = TUNER_TYPE_MULTI
50b215a0
JS
832 },
833
834 {
835 .device_id = "DSTFCI",
836 .offset = 1,
837 .dst_type = DST_TYPE_IS_SAT,
7ef53b1a 838 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
396cffd6
MA
839 .dst_feature = 0,
840 .tuner_type = 0
50b215a0
JS
841 }, /* unknown to vendor */
842
843 {
844 .device_id = "DCT-CI",
845 .offset = 1,
846 .dst_type = DST_TYPE_IS_CABLE,
cdd4208c 847 .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_VLF,
396cffd6
MA
848 .dst_feature = DST_TYPE_HAS_CA,
849 .tuner_type = 0
50b215a0
JS
850 },
851
852 {
853 .device_id = "DCTNEW",
854 .offset = 1,
855 .dst_type = DST_TYPE_IS_CABLE,
7ef53b1a 856 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_3 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_MULTI_FE,
396cffd6
MA
857 .dst_feature = 0,
858 .tuner_type = 0
50b215a0
JS
859 },
860
861 {
862 .device_id = "DTT-CI",
863 .offset = 1,
864 .dst_type = DST_TYPE_IS_TERR,
cdd4208c 865 .type_flags = DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_VLF,
396cffd6
MA
866 .dst_feature = DST_TYPE_HAS_CA,
867 .tuner_type = 0
50b215a0
JS
868 },
869
870 {
871 .device_id = "DTTDIG",
872 .offset = 1,
873 .dst_type = DST_TYPE_IS_TERR,
874 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
875 .dst_feature = 0,
876 .tuner_type = 0
50b215a0
JS
877 },
878
879 {
880 .device_id = "DTTNXT",
881 .offset = 1,
882 .dst_type = DST_TYPE_IS_TERR,
883 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
884 .dst_feature = DST_TYPE_HAS_ANALOG,
885 .tuner_type = 0
50b215a0
JS
886 },
887
888 {
889 .device_id = "ATSCDI",
890 .offset = 1,
891 .dst_type = DST_TYPE_IS_ATSC,
892 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
893 .dst_feature = 0,
894 .tuner_type = 0
50b215a0
JS
895 },
896
897 {
898 .device_id = "ATSCAD",
899 .offset = 1,
900 .dst_type = DST_TYPE_IS_ATSC,
c65f1c57 901 .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD,
396cffd6
MA
902 .dst_feature = DST_TYPE_HAS_MAC | DST_TYPE_HAS_ANALOG,
903 .tuner_type = 0
50b215a0
JS
904 },
905
906 { }
907
908};
909
62121b1f
MA
910static int dst_get_mac(struct dst_state *state)
911{
912 u8 get_mac[] = { 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
913 get_mac[7] = dst_check_sum(get_mac, 7);
914 if (dst_command(state, get_mac, 8) < 0) {
915 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
916 return -1;
917 }
918 memset(&state->mac_address, '\0', 8);
919 memcpy(&state->mac_address, &state->rxbuffer, 6);
7c510e4b 920 dprintk(verbose, DST_ERROR, 1, "MAC Address=[%pM]", state->mac_address);
62121b1f
MA
921
922 return 0;
923}
924
925static int dst_fw_ver(struct dst_state *state)
926{
927 u8 get_ver[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
928 get_ver[7] = dst_check_sum(get_ver, 7);
929 if (dst_command(state, get_ver, 8) < 0) {
930 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
931 return -1;
932 }
62121b1f
MA
933 memcpy(&state->fw_version, &state->rxbuffer, 8);
934 dprintk(verbose, DST_ERROR, 1, "Firmware Ver = %x.%x Build = %02x, on %x:%x, %x-%x-20%02x",
935 state->fw_version[0] >> 4, state->fw_version[0] & 0x0f,
936 state->fw_version[1],
937 state->fw_version[5], state->fw_version[6],
938 state->fw_version[4], state->fw_version[3], state->fw_version[2]);
939
940 return 0;
941}
942
943static int dst_card_type(struct dst_state *state)
944{
364f255a
MA
945 int j;
946 struct tuner_types *p_tuner_list = NULL;
947
62121b1f
MA
948 u8 get_type[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
949 get_type[7] = dst_check_sum(get_type, 7);
950 if (dst_command(state, get_type, 8) < 0) {
951 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
952 return -1;
953 }
954 memset(&state->card_info, '\0', 8);
351634d2 955 memcpy(&state->card_info, &state->rxbuffer, 7);
62121b1f
MA
956 dprintk(verbose, DST_ERROR, 1, "Device Model=[%s]", &state->card_info[0]);
957
364f255a
MA
958 for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
959 if (!strcmp(&state->card_info[0], p_tuner_list->board_name)) {
960 state->tuner_type = p_tuner_list->tuner_type;
6cd94745 961 dprintk(verbose, DST_ERROR, 1, "DST has [%s] tuner, tuner type=[%d]",
364f255a
MA
962 p_tuner_list->tuner_name, p_tuner_list->tuner_type);
963 }
964 }
965
62121b1f
MA
966 return 0;
967}
968
969static int dst_get_vendor(struct dst_state *state)
970{
971 u8 get_vendor[] = { 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
972 get_vendor[7] = dst_check_sum(get_vendor, 7);
973 if (dst_command(state, get_vendor, 8) < 0) {
974 dprintk(verbose, DST_INFO, 1, "Unsupported Command");
975 return -1;
976 }
977 memset(&state->vendor, '\0', 8);
351634d2 978 memcpy(&state->vendor, &state->rxbuffer, 7);
62121b1f
MA
979 dprintk(verbose, DST_ERROR, 1, "Vendor=[%s]", &state->vendor[0]);
980
981 return 0;
982}
50b215a0 983
de1e6ec9
MA
984static void debug_dst_buffer(struct dst_state *state)
985{
986 int i;
987
988 if (verbose > 2) {
989 printk("%s: [", __func__);
990 for (i = 0; i < 8; i++)
991 printk(" %02x", state->rxbuffer[i]);
992 printk("]\n");
993 }
994}
995
996static int dst_check_stv0299(struct dst_state *state)
997{
998 u8 check_stv0299[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
999
1000 check_stv0299[7] = dst_check_sum(check_stv0299, 7);
1001 if (dst_command(state, check_stv0299, 8) < 0) {
1002 dprintk(verbose, DST_ERROR, 1, "Cmd=[0x04] failed");
1003 return -1;
1004 }
1005 debug_dst_buffer(state);
1006
1007 if (memcmp(&check_stv0299, &state->rxbuffer, 8)) {
1008 dprintk(verbose, DST_ERROR, 1, "Found a STV0299 NIM");
1009 state->tuner_type = TUNER_TYPE_STV0299;
1010 return 0;
1011 }
1012
1013 return -1;
1014}
1015
1016static int dst_check_mb86a15(struct dst_state *state)
1017{
1018 u8 check_mb86a15[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1019
1020 check_mb86a15[7] = dst_check_sum(check_mb86a15, 7);
1021 if (dst_command(state, check_mb86a15, 8) < 0) {
1022 dprintk(verbose, DST_ERROR, 1, "Cmd=[0x10], failed");
1023 return -1;
1024 }
1025 debug_dst_buffer(state);
1026
1027 if (memcmp(&check_mb86a15, &state->rxbuffer, 8) < 0) {
1028 dprintk(verbose, DST_ERROR, 1, "Found a MB86A15 NIM");
1029 state->tuner_type = TUNER_TYPE_MB86A15;
1030 return 0;
1031 }
1032
1033 return -1;
1034}
1035
29b2f784
MA
1036static int dst_get_tuner_info(struct dst_state *state)
1037{
1038 u8 get_tuner_1[] = { 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1039 u8 get_tuner_2[] = { 0x00, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1040
1041 get_tuner_1[7] = dst_check_sum(get_tuner_1, 7);
1042 get_tuner_2[7] = dst_check_sum(get_tuner_2, 7);
c65f1c57 1043 dprintk(verbose, DST_ERROR, 1, "DST TYpe = MULTI FE");
29b2f784 1044 if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
c65f1c57
MA
1045 if (dst_command(state, get_tuner_1, 8) < 0) {
1046 dprintk(verbose, DST_INFO, 1, "Cmd=[0x13], Unsupported");
cdd4208c 1047 goto force;
29b2f784
MA
1048 }
1049 } else {
c65f1c57
MA
1050 if (dst_command(state, get_tuner_2, 8) < 0) {
1051 dprintk(verbose, DST_INFO, 1, "Cmd=[0xb], Unsupported");
cdd4208c 1052 goto force;
29b2f784
MA
1053 }
1054 }
29b2f784
MA
1055 memcpy(&state->board_info, &state->rxbuffer, 8);
1056 if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
c65f1c57 1057 dprintk(verbose, DST_ERROR, 1, "DST type has TS=188");
c65f1c57
MA
1058 }
1059 if (state->board_info[0] == 0xbc) {
3227c860 1060 if (state->dst_type != DST_TYPE_IS_ATSC)
7ef53b1a 1061 state->type_flags |= DST_TYPE_HAS_TS188;
3da2f4c0 1062 else
1da5e8d3 1063 state->type_flags |= DST_TYPE_HAS_NEWTUNE_2;
3da2f4c0 1064
5aef20ae
MA
1065 if (state->board_info[1] == 0x01) {
1066 state->dst_hw_cap |= DST_TYPE_HAS_DBOARD;
1067 dprintk(verbose, DST_ERROR, 1, "DST has Daughterboard");
1068 }
29b2f784
MA
1069 }
1070
1071 return 0;
cdd4208c
MA
1072force:
1073 if (!strncmp(state->fw_name, "DCT-CI", 6)) {
1074 state->type_flags |= DST_TYPE_HAS_TS204;
1075 dprintk(verbose, DST_ERROR, 1, "Forcing [%s] to TS188", state->fw_name);
1076 }
1077
1078 return -1;
29b2f784
MA
1079}
1080
50b215a0 1081static int dst_get_device_id(struct dst_state *state)
1da177e4 1082{
50b215a0
JS
1083 u8 reply;
1084
b633c6d6 1085 int i, j;
de1e6ec9
MA
1086 struct dst_types *p_dst_type = NULL;
1087 struct tuner_types *p_tuner_list = NULL;
b633c6d6 1088
50b215a0
JS
1089 u8 use_dst_type = 0;
1090 u32 use_type_flags = 0;
1da177e4 1091
50b215a0 1092 static u8 device_type[8] = {0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
1da177e4 1093
de1e6ec9 1094 state->tuner_type = 0;
50b215a0
JS
1095 device_type[7] = dst_check_sum(device_type, 7);
1096
1097 if (write_dst(state, device_type, FIXED_COMM))
1098 return -1; /* Write failed */
50b215a0
JS
1099 if ((dst_pio_disable(state)) < 0)
1100 return -1;
50b215a0
JS
1101 if (read_dst(state, &reply, GET_ACK))
1102 return -1; /* Read failure */
50b215a0 1103 if (reply != ACK) {
a427de6f 1104 dprintk(verbose, DST_INFO, 1, "Write not Acknowledged! [Reply=0x%02x]", reply);
50b215a0 1105 return -1; /* Unack'd write */
1da177e4 1106 }
50b215a0
JS
1107 if (!dst_wait_dst_ready(state, DEVICE_INIT))
1108 return -1; /* DST not ready yet */
50b215a0
JS
1109 if (read_dst(state, state->rxbuffer, FIXED_COMM))
1110 return -1;
1111
1112 dst_pio_disable(state);
50b215a0 1113 if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
a427de6f 1114 dprintk(verbose, DST_INFO, 1, "Checksum failure!");
50b215a0 1115 return -1; /* Checksum failure */
1da177e4 1116 }
50b215a0
JS
1117 state->rxbuffer[7] = '\0';
1118
a427de6f 1119 for (i = 0, p_dst_type = dst_tlist; i < ARRAY_SIZE(dst_tlist); i++, p_dst_type++) {
50b215a0
JS
1120 if (!strncmp (&state->rxbuffer[p_dst_type->offset], p_dst_type->device_id, strlen (p_dst_type->device_id))) {
1121 use_type_flags = p_dst_type->type_flags;
1122 use_dst_type = p_dst_type->dst_type;
1123
1124 /* Card capabilities */
1125 state->dst_hw_cap = p_dst_type->dst_feature;
6cd94745 1126 dprintk(verbose, DST_ERROR, 1, "Recognise [%s]", p_dst_type->device_id);
63ad4e44 1127 strncpy(&state->fw_name[0], p_dst_type->device_id, 6);
de1e6ec9
MA
1128 /* Multiple tuners */
1129 if (p_dst_type->tuner_type & TUNER_TYPE_MULTI) {
b32474cb
MA
1130 switch (use_dst_type) {
1131 case DST_TYPE_IS_SAT:
1132 /* STV0299 check */
1133 if (dst_check_stv0299(state) < 0) {
1134 dprintk(verbose, DST_ERROR, 1, "Unsupported");
1135 state->tuner_type = TUNER_TYPE_MB86A15;
1136 }
1137 break;
1138 default:
1139 break;
1140 }
de1e6ec9
MA
1141 if (dst_check_mb86a15(state) < 0)
1142 dprintk(verbose, DST_ERROR, 1, "Unsupported");
1143 /* Single tuner */
1144 } else {
b633c6d6 1145 state->tuner_type = p_dst_type->tuner_type;
de1e6ec9
MA
1146 }
1147 for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
1148 if (!(strncmp(p_dst_type->device_id, p_tuner_list->fw_name, 7)) &&
1149 p_tuner_list->tuner_type == state->tuner_type) {
1150 dprintk(verbose, DST_ERROR, 1, "[%s] has a [%s]",
1151 p_dst_type->device_id, p_tuner_list->tuner_name);
b633c6d6
MA
1152 }
1153 }
1da177e4
LT
1154 break;
1155 }
1156 }
50b215a0 1157
0496daa7 1158 if (i >= ARRAY_SIZE(dst_tlist)) {
a427de6f
MA
1159 dprintk(verbose, DST_ERROR, 1, "Unable to recognize %s or %s", &state->rxbuffer[0], &state->rxbuffer[1]);
1160 dprintk(verbose, DST_ERROR, 1, "please email linux-dvb@linuxtv.org with this type in");
1da177e4
LT
1161 use_dst_type = DST_TYPE_IS_SAT;
1162 use_type_flags = DST_TYPE_HAS_SYMDIV;
1163 }
6cd94745 1164 dst_type_print(state, use_dst_type);
1da177e4
LT
1165 state->type_flags = use_type_flags;
1166 state->dst_type = use_dst_type;
6cd94745 1167 dst_type_flags_print(state);
1da177e4 1168
1da177e4
LT
1169 return 0;
1170}
1171
50b215a0
JS
1172static int dst_probe(struct dst_state *state)
1173{
3593cab5 1174 mutex_init(&state->dst_mutex);
2e506a0f
MA
1175 if (dst_addons & DST_TYPE_HAS_CA) {
1176 if ((rdc_8820_reset(state)) < 0) {
1177 dprintk(verbose, DST_ERROR, 1, "RDC 8820 RESET Failed.");
1178 return -1;
1179 }
4a2cc126 1180 msleep(4000);
2e506a0f 1181 } else {
4a2cc126 1182 msleep(100);
2e506a0f 1183 }
50b215a0 1184 if ((dst_comm_init(state)) < 0) {
a427de6f 1185 dprintk(verbose, DST_ERROR, 1, "DST Initialization Failed.");
50b215a0
JS
1186 return -1;
1187 }
8385e46f 1188 msleep(100);
50b215a0 1189 if (dst_get_device_id(state) < 0) {
a427de6f 1190 dprintk(verbose, DST_ERROR, 1, "unknown device.");
50b215a0
JS
1191 return -1;
1192 }
62121b1f
MA
1193 if (dst_get_mac(state) < 0) {
1194 dprintk(verbose, DST_INFO, 1, "MAC: Unsupported command");
62121b1f 1195 }
29b2f784
MA
1196 if ((state->type_flags & DST_TYPE_HAS_MULTI_FE) || (state->type_flags & DST_TYPE_HAS_FW_BUILD)) {
1197 if (dst_get_tuner_info(state) < 0)
1198 dprintk(verbose, DST_INFO, 1, "Tuner: Unsupported command");
1199 }
4c09aa72
MA
1200 if (state->type_flags & DST_TYPE_HAS_TS204) {
1201 dst_packsize(state, 204);
1202 }
62121b1f
MA
1203 if (state->type_flags & DST_TYPE_HAS_FW_BUILD) {
1204 if (dst_fw_ver(state) < 0) {
1205 dprintk(verbose, DST_INFO, 1, "FW: Unsupported command");
1206 return 0;
1207 }
1208 if (dst_card_type(state) < 0) {
1209 dprintk(verbose, DST_INFO, 1, "Card: Unsupported command");
1210 return 0;
1211 }
1212 if (dst_get_vendor(state) < 0) {
1213 dprintk(verbose, DST_INFO, 1, "Vendor: Unsupported command");
1214 return 0;
1215 }
1216 }
50b215a0
JS
1217
1218 return 0;
1219}
1220
b00ef4b8 1221static int dst_command(struct dst_state *state, u8 *data, u8 len)
1da177e4 1222{
1da177e4 1223 u8 reply;
d28d5762 1224
3593cab5 1225 mutex_lock(&state->dst_mutex);
50b215a0 1226 if ((dst_comm_init(state)) < 0) {
a427de6f 1227 dprintk(verbose, DST_NOTICE, 1, "DST Communication Initialization Failed.");
d28d5762 1228 goto error;
50b215a0 1229 }
50b215a0 1230 if (write_dst(state, data, len)) {
0851fb48 1231 dprintk(verbose, DST_INFO, 1, "Trying to recover.. ");
50b215a0 1232 if ((dst_error_recovery(state)) < 0) {
a427de6f 1233 dprintk(verbose, DST_ERROR, 1, "Recovery Failed.");
d28d5762 1234 goto error;
50b215a0 1235 }
d28d5762 1236 goto error;
1da177e4 1237 }
50b215a0 1238 if ((dst_pio_disable(state)) < 0) {
a427de6f 1239 dprintk(verbose, DST_ERROR, 1, "PIO Disable Failed.");
d28d5762 1240 goto error;
1da177e4 1241 }
8385e46f 1242 if (state->type_flags & DST_TYPE_HAS_FW_1)
c4e3fd94 1243 mdelay(3);
50b215a0 1244 if (read_dst(state, &reply, GET_ACK)) {
a427de6f 1245 dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
50b215a0 1246 if ((dst_error_recovery(state)) < 0) {
a427de6f 1247 dprintk(verbose, DST_INFO, 1, "Recovery Failed.");
d28d5762 1248 goto error;
50b215a0 1249 }
d28d5762 1250 goto error;
50b215a0 1251 }
50b215a0 1252 if (reply != ACK) {
a427de6f 1253 dprintk(verbose, DST_INFO, 1, "write not acknowledged 0x%02x ", reply);
d28d5762 1254 goto error;
1da177e4
LT
1255 }
1256 if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
d28d5762 1257 goto error;
8385e46f 1258 if (state->type_flags & DST_TYPE_HAS_FW_1)
c4e3fd94 1259 mdelay(3);
8385e46f
JS
1260 else
1261 udelay(2000);
50b215a0 1262 if (!dst_wait_dst_ready(state, NO_DELAY))
d28d5762 1263 goto error;
50b215a0 1264 if (read_dst(state, state->rxbuffer, FIXED_COMM)) {
a427de6f 1265 dprintk(verbose, DST_DEBUG, 1, "Trying to recover.. ");
50b215a0 1266 if ((dst_error_recovery(state)) < 0) {
a427de6f 1267 dprintk(verbose, DST_INFO, 1, "Recovery failed.");
d28d5762 1268 goto error;
50b215a0 1269 }
d28d5762 1270 goto error;
1da177e4
LT
1271 }
1272 if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
a427de6f 1273 dprintk(verbose, DST_INFO, 1, "checksum failure");
d28d5762 1274 goto error;
1da177e4 1275 }
3593cab5 1276 mutex_unlock(&state->dst_mutex);
1da177e4 1277 return 0;
d28d5762
MA
1278
1279error:
3593cab5 1280 mutex_unlock(&state->dst_mutex);
d28d5762
MA
1281 return -EIO;
1282
1da177e4
LT
1283}
1284
a427de6f 1285static int dst_get_signal(struct dst_state *state)
1da177e4
LT
1286{
1287 int retval;
1288 u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb };
b2e62e7c 1289 //dprintk("%s: Getting Signal strength and other parameters\n", __func__);
1da177e4
LT
1290 if ((state->diseq_flags & ATTEMPT_TUNE) == 0) {
1291 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1292 return 0;
1293 }
1294 if (0 == (state->diseq_flags & HAS_LOCK)) {
1295 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1296 return 0;
1297 }
1298 if (time_after_eq(jiffies, state->cur_jiff + (HZ / 5))) {
1299 retval = dst_command(state, get_signal, 8);
1300 if (retval < 0)
1301 return retval;
1302 if (state->dst_type == DST_TYPE_IS_SAT) {
1303 state->decode_lock = ((state->rxbuffer[6] & 0x10) == 0) ? 1 : 0;
1304 state->decode_strength = state->rxbuffer[5] << 8;
1305 state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1306 } else if ((state->dst_type == DST_TYPE_IS_TERR) || (state->dst_type == DST_TYPE_IS_CABLE)) {
1307 state->decode_lock = (state->rxbuffer[1]) ? 1 : 0;
1308 state->decode_strength = state->rxbuffer[4] << 8;
1309 state->decode_snr = state->rxbuffer[3] << 8;
ed3d1065
MA
1310 } else if (state->dst_type == DST_TYPE_IS_ATSC) {
1311 state->decode_lock = (state->rxbuffer[6] == 0x00) ? 1 : 0;
1312 state->decode_strength = state->rxbuffer[4] << 8;
1313 state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1da177e4
LT
1314 }
1315 state->cur_jiff = jiffies;
1316 }
1317 return 0;
1318}
1319
a427de6f 1320static int dst_tone_power_cmd(struct dst_state *state)
1da177e4
LT
1321{
1322 u8 paket[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 };
1323
0851fb48
YP
1324 if (state->dst_type != DST_TYPE_IS_SAT)
1325 return -EOPNOTSUPP;
8f6da8f1 1326 paket[4] = state->tx_tuna[4];
86360a3e 1327 paket[2] = state->tx_tuna[2];
203fe8b3 1328 paket[3] = state->tx_tuna[3];
50b215a0 1329 paket[7] = dst_check_sum (paket, 7);
0851fb48 1330 return dst_command(state, paket, 8);
1da177e4
LT
1331}
1332
a427de6f 1333static int dst_get_tuna(struct dst_state *state)
1da177e4
LT
1334{
1335 int retval;
50b215a0 1336
1da177e4
LT
1337 if ((state->diseq_flags & ATTEMPT_TUNE) == 0)
1338 return 0;
1339 state->diseq_flags &= ~(HAS_LOCK);
50b215a0 1340 if (!dst_wait_dst_ready(state, NO_DELAY))
f1016dec 1341 return -EIO;
cdd4208c 1342 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44
MA
1343 !(state->dst_type == DST_TYPE_IS_ATSC))
1344
1da177e4 1345 retval = read_dst(state, state->rx_tuna, 10);
a427de6f 1346 else
50b215a0 1347 retval = read_dst(state, &state->rx_tuna[2], FIXED_COMM);
1da177e4 1348 if (retval < 0) {
a427de6f 1349 dprintk(verbose, DST_DEBUG, 1, "read not successful");
f1016dec 1350 return retval;
1da177e4 1351 }
cdd4208c 1352 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
f0289efa 1353 !(state->dst_type == DST_TYPE_IS_ATSC)) {
63ad4e44 1354
1da177e4 1355 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
a427de6f 1356 dprintk(verbose, DST_INFO, 1, "checksum failure ? ");
f1016dec 1357 return -EIO;
1da177e4
LT
1358 }
1359 } else {
1360 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[2], 7)) {
a427de6f 1361 dprintk(verbose, DST_INFO, 1, "checksum failure? ");
f1016dec 1362 return -EIO;
1da177e4
LT
1363 }
1364 }
1365 if (state->rx_tuna[2] == 0 && state->rx_tuna[3] == 0)
1366 return 0;
f5648e8a
TH
1367 if (state->dst_type == DST_TYPE_IS_SAT) {
1368 state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3];
1369 } else {
1370 state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 16) + (state->rx_tuna[3] << 8) + state->rx_tuna[4];
1371 }
1372 state->decode_freq = state->decode_freq * 1000;
1da177e4 1373 state->decode_lock = 1;
1da177e4 1374 state->diseq_flags |= HAS_LOCK;
7d53421c 1375
1da177e4
LT
1376 return 1;
1377}
1378
a427de6f 1379static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
1da177e4 1380
a427de6f 1381static int dst_write_tuna(struct dvb_frontend *fe)
1da177e4 1382{
a427de6f 1383 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1384 int retval;
1385 u8 reply;
1386
a427de6f 1387 dprintk(verbose, DST_INFO, 1, "type_flags 0x%x ", state->type_flags);
1da177e4
LT
1388 state->decode_freq = 0;
1389 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1390 if (state->dst_type == DST_TYPE_IS_SAT) {
1391 if (!(state->diseq_flags & HAS_POWER))
1392 dst_set_voltage(fe, SEC_VOLTAGE_13);
1393 }
1394 state->diseq_flags &= ~(HAS_LOCK | ATTEMPT_TUNE);
3593cab5 1395 mutex_lock(&state->dst_mutex);
50b215a0 1396 if ((dst_comm_init(state)) < 0) {
a427de6f 1397 dprintk(verbose, DST_DEBUG, 1, "DST Communication initialization failed.");
f1016dec 1398 goto error;
50b215a0 1399 }
63ad4e44 1400// if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
cdd4208c 1401 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44
MA
1402 (!(state->dst_type == DST_TYPE_IS_ATSC))) {
1403
1da177e4
LT
1404 state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[0], 9);
1405 retval = write_dst(state, &state->tx_tuna[0], 10);
1406 } else {
1407 state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[2], 7);
50b215a0 1408 retval = write_dst(state, &state->tx_tuna[2], FIXED_COMM);
1da177e4
LT
1409 }
1410 if (retval < 0) {
50b215a0 1411 dst_pio_disable(state);
a427de6f 1412 dprintk(verbose, DST_DEBUG, 1, "write not successful");
f1016dec 1413 goto werr;
1da177e4 1414 }
50b215a0 1415 if ((dst_pio_disable(state)) < 0) {
a427de6f 1416 dprintk(verbose, DST_DEBUG, 1, "DST PIO disable failed !");
f1016dec 1417 goto error;
50b215a0 1418 }
50b215a0 1419 if ((read_dst(state, &reply, GET_ACK) < 0)) {
a427de6f 1420 dprintk(verbose, DST_DEBUG, 1, "read verify not successful.");
f1016dec 1421 goto error;
1da177e4 1422 }
50b215a0 1423 if (reply != ACK) {
a427de6f 1424 dprintk(verbose, DST_DEBUG, 1, "write not acknowledged 0x%02x ", reply);
f1016dec 1425 goto error;
1da177e4
LT
1426 }
1427 state->diseq_flags |= ATTEMPT_TUNE;
f1016dec
HS
1428 retval = dst_get_tuna(state);
1429werr:
3593cab5 1430 mutex_unlock(&state->dst_mutex);
f1016dec 1431 return retval;
50b215a0 1432
f1016dec 1433error:
3593cab5 1434 mutex_unlock(&state->dst_mutex);
f1016dec 1435 return -EIO;
1da177e4
LT
1436}
1437
1438/*
1439 * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
1440 * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
1441 * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
1442 * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
1443 * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
1444 * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
1445 * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
1446 * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
1447 * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
1448 * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
1449 * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
1450 */
1451
a427de6f 1452static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
1da177e4 1453{
a427de6f 1454 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1455 u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
1456
226d97ec 1457 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1458 return -EOPNOTSUPP;
ceee5266
YP
1459 if (cmd->msg_len > 0 && cmd->msg_len < 5)
1460 memcpy(&paket[3], cmd->msg, cmd->msg_len);
1461 else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5)
1462 memcpy(&paket[2], cmd->msg, cmd->msg_len);
1463 else
1da177e4 1464 return -EINVAL;
1da177e4 1465 paket[7] = dst_check_sum(&paket[0], 7);
0851fb48 1466 return dst_command(state, paket, 8);
1da177e4
LT
1467}
1468
a427de6f 1469static int dst_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
1da177e4 1470{
0851fb48 1471 int need_cmd, retval = 0;
a427de6f 1472 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1473
1474 state->voltage = voltage;
226d97ec 1475 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1476 return -EOPNOTSUPP;
1da177e4
LT
1477
1478 need_cmd = 0;
50b215a0 1479
a427de6f
MA
1480 switch (voltage) {
1481 case SEC_VOLTAGE_13:
1482 case SEC_VOLTAGE_18:
1483 if ((state->diseq_flags & HAS_POWER) == 0)
1da177e4 1484 need_cmd = 1;
a427de6f
MA
1485 state->diseq_flags |= HAS_POWER;
1486 state->tx_tuna[4] = 0x01;
1487 break;
1488 case SEC_VOLTAGE_OFF:
1489 need_cmd = 1;
1490 state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
1491 state->tx_tuna[4] = 0x00;
1492 break;
1493 default:
1494 return -EINVAL;
1da177e4 1495 }
a427de6f 1496
50b215a0 1497 if (need_cmd)
0851fb48 1498 retval = dst_tone_power_cmd(state);
50b215a0 1499
0851fb48 1500 return retval;
1da177e4
LT
1501}
1502
a427de6f 1503static int dst_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
1da177e4 1504{
a427de6f 1505 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1506
1507 state->tone = tone;
226d97ec 1508 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1509 return -EOPNOTSUPP;
1da177e4 1510
1da177e4 1511 switch (tone) {
a427de6f
MA
1512 case SEC_TONE_OFF:
1513 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1514 state->tx_tuna[2] = 0x00;
1515 else
1516 state->tx_tuna[2] = 0xff;
1517 break;
50b215a0 1518
a427de6f
MA
1519 case SEC_TONE_ON:
1520 state->tx_tuna[2] = 0x02;
1521 break;
1522 default:
1523 return -EINVAL;
1da177e4 1524 }
0851fb48 1525 return dst_tone_power_cmd(state);
1da177e4
LT
1526}
1527
203fe8b3
MA
1528static int dst_send_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t minicmd)
1529{
1530 struct dst_state *state = fe->demodulator_priv;
1531
226d97ec 1532 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1533 return -EOPNOTSUPP;
203fe8b3 1534 state->minicmd = minicmd;
203fe8b3 1535 switch (minicmd) {
a427de6f
MA
1536 case SEC_MINI_A:
1537 state->tx_tuna[3] = 0x02;
1538 break;
1539 case SEC_MINI_B:
1540 state->tx_tuna[3] = 0xff;
1541 break;
203fe8b3 1542 }
0851fb48 1543 return dst_tone_power_cmd(state);
203fe8b3
MA
1544}
1545
1546
a427de6f 1547static int dst_init(struct dvb_frontend *fe)
1da177e4 1548{
a427de6f
MA
1549 struct dst_state *state = fe->demodulator_priv;
1550
1551 static u8 sat_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x00, 0x73, 0x21, 0x00, 0x00 };
1552 static u8 sat_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x55, 0xbd, 0x50, 0x00, 0x00 };
1553 static u8 ter_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1554 static u8 ter_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
cdd4208c
MA
1555 static u8 cab_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1556 static u8 cab_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1da5e8d3 1557 static u8 atsc_tuner[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
a427de6f 1558
7d53421c 1559 state->inversion = INVERSION_OFF;
1da177e4
LT
1560 state->voltage = SEC_VOLTAGE_13;
1561 state->tone = SEC_TONE_OFF;
1da177e4
LT
1562 state->diseq_flags = 0;
1563 state->k22 = 0x02;
5942c679 1564 state->bandwidth = 7000000;
1da177e4 1565 state->cur_jiff = jiffies;
a427de6f 1566 if (state->dst_type == DST_TYPE_IS_SAT)
cdd4208c 1567 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
a427de6f 1568 else if (state->dst_type == DST_TYPE_IS_TERR)
cdd4208c 1569 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? ter_tuna_188 : ter_tuna_204), sizeof (ter_tuna_204));
a427de6f 1570 else if (state->dst_type == DST_TYPE_IS_CABLE)
cdd4208c 1571 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? cab_tuna_188 : cab_tuna_204), sizeof (cab_tuna_204));
1c4e7339 1572 else if (state->dst_type == DST_TYPE_IS_ATSC)
1da5e8d3 1573 memcpy(state->tx_tuna, atsc_tuner, sizeof (atsc_tuner));
1da177e4
LT
1574
1575 return 0;
1576}
1577
a427de6f 1578static int dst_read_status(struct dvb_frontend *fe, fe_status_t *status)
1da177e4 1579{
a427de6f 1580 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1581
1582 *status = 0;
1583 if (state->diseq_flags & HAS_LOCK) {
7d53421c 1584// dst_get_signal(state); // don't require(?) to ask MCU
1da177e4
LT
1585 if (state->decode_lock)
1586 *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI;
1587 }
1588
1589 return 0;
1590}
1591
a427de6f 1592static int dst_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1da177e4 1593{
a427de6f 1594 struct dst_state *state = fe->demodulator_priv;
1da177e4 1595
0851fb48 1596 int retval = dst_get_signal(state);
1da177e4
LT
1597 *strength = state->decode_strength;
1598
0851fb48 1599 return retval;
1da177e4
LT
1600}
1601
a427de6f 1602static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
1da177e4 1603{
a427de6f 1604 struct dst_state *state = fe->demodulator_priv;
1da177e4 1605
0851fb48 1606 int retval = dst_get_signal(state);
1da177e4
LT
1607 *snr = state->decode_snr;
1608
0851fb48 1609 return retval;
1da177e4
LT
1610}
1611
5942c679 1612static int dst_set_frontend(struct dvb_frontend *fe)
8cfba630 1613{
5942c679 1614 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0851fb48 1615 int retval = -EINVAL;
8cfba630
MA
1616 struct dst_state *state = fe->demodulator_priv;
1617
1618 if (p != NULL) {
0851fb48
YP
1619 retval = dst_set_freq(state, p->frequency);
1620 if(retval != 0)
1621 return retval;
8cfba630
MA
1622 dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
1623
1624 if (state->dst_type == DST_TYPE_IS_SAT) {
1625 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1626 dst_set_inversion(state, p->inversion);
5942c679
MCC
1627 dst_set_fec(state, p->fec_inner);
1628 dst_set_symbolrate(state, p->symbol_rate);
8cfba630 1629 dst_set_polarization(state);
5942c679 1630 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->symbol_rate);
8cfba630
MA
1631
1632 } else if (state->dst_type == DST_TYPE_IS_TERR)
5942c679 1633 dst_set_bandwidth(state, p->bandwidth_hz);
8cfba630 1634 else if (state->dst_type == DST_TYPE_IS_CABLE) {
5942c679
MCC
1635 dst_set_fec(state, p->fec_inner);
1636 dst_set_symbolrate(state, p->symbol_rate);
1637 dst_set_modulation(state, p->modulation);
8cfba630 1638 }
0851fb48 1639 retval = dst_write_tuna(fe);
8cfba630
MA
1640 }
1641
0851fb48 1642 return retval;
8cfba630
MA
1643}
1644
1645static int dst_tune_frontend(struct dvb_frontend* fe,
7e072221 1646 bool re_tune,
36cb557a 1647 unsigned int mode_flags,
3ea96615 1648 unsigned int *delay,
36cb557a 1649 fe_status_t *status)
1da177e4 1650{
a427de6f 1651 struct dst_state *state = fe->demodulator_priv;
7e072221 1652 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4 1653
7e072221 1654 if (re_tune) {
36cb557a
AQ
1655 dst_set_freq(state, p->frequency);
1656 dprintk(verbose, DST_DEBUG, 1, "Set Frequency=[%d]", p->frequency);
50b215a0 1657
36cb557a
AQ
1658 if (state->dst_type == DST_TYPE_IS_SAT) {
1659 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1660 dst_set_inversion(state, p->inversion);
7e072221
MCC
1661 dst_set_fec(state, p->fec_inner);
1662 dst_set_symbolrate(state, p->symbol_rate);
36cb557a 1663 dst_set_polarization(state);
7e072221 1664 dprintk(verbose, DST_DEBUG, 1, "Set Symbolrate=[%d]", p->symbol_rate);
36cb557a
AQ
1665
1666 } else if (state->dst_type == DST_TYPE_IS_TERR)
7e072221 1667 dst_set_bandwidth(state, p->bandwidth_hz);
36cb557a 1668 else if (state->dst_type == DST_TYPE_IS_CABLE) {
7e072221
MCC
1669 dst_set_fec(state, p->fec_inner);
1670 dst_set_symbolrate(state, p->symbol_rate);
1671 dst_set_modulation(state, p->modulation);
36cb557a
AQ
1672 }
1673 dst_write_tuna(fe);
1da177e4 1674 }
1da177e4 1675
36cb557a
AQ
1676 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1677 dst_read_status(fe, status);
1678
1679 *delay = HZ/10;
1da177e4
LT
1680 return 0;
1681}
1682
8cfba630
MA
1683static int dst_get_tuning_algo(struct dvb_frontend *fe)
1684{
a00d0bb8 1685 return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
8cfba630
MA
1686}
1687
5942c679 1688static int dst_get_frontend(struct dvb_frontend *fe, struct dtv_frontend_properties *p)
1da177e4 1689{
a427de6f 1690 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1691
1692 p->frequency = state->decode_freq;
1da177e4 1693 if (state->dst_type == DST_TYPE_IS_SAT) {
7d53421c
MA
1694 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1695 p->inversion = state->inversion;
5942c679
MCC
1696 p->symbol_rate = state->symbol_rate;
1697 p->fec_inner = dst_get_fec(state);
1da177e4 1698 } else if (state->dst_type == DST_TYPE_IS_TERR) {
5942c679 1699 p->bandwidth_hz = state->bandwidth;
1da177e4 1700 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
5942c679
MCC
1701 p->symbol_rate = state->symbol_rate;
1702 p->fec_inner = dst_get_fec(state);
1703 p->modulation = dst_get_modulation(state);
1da177e4
LT
1704 }
1705
1706 return 0;
1707}
1708
a427de6f 1709static void dst_release(struct dvb_frontend *fe)
1da177e4 1710{
a427de6f 1711 struct dst_state *state = fe->demodulator_priv;
bbdd11fa
MA
1712 if (state->dst_ca) {
1713 dvb_unregister_device(state->dst_ca);
149ef72d 1714#ifdef CONFIG_MEDIA_ATTACH
bbdd11fa
MA
1715 symbol_put(dst_ca_attach);
1716#endif
1717 }
1da177e4
LT
1718 kfree(state);
1719}
1720
1721static struct dvb_frontend_ops dst_dvbt_ops;
1722static struct dvb_frontend_ops dst_dvbs_ops;
1723static struct dvb_frontend_ops dst_dvbc_ops;
bc7386ba 1724static struct dvb_frontend_ops dst_atsc_ops;
1da177e4 1725
a427de6f 1726struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter)
1da177e4 1727{
50b215a0
JS
1728 /* check if the ASIC is there */
1729 if (dst_probe(state) < 0) {
2ea75330 1730 kfree(state);
50b215a0
JS
1731 return NULL;
1732 }
1da177e4 1733 /* determine settings based on type */
dea74869 1734 /* create dvb_frontend */
1da177e4
LT
1735 switch (state->dst_type) {
1736 case DST_TYPE_IS_TERR:
dea74869 1737 memcpy(&state->frontend.ops, &dst_dvbt_ops, sizeof(struct dvb_frontend_ops));
1da177e4
LT
1738 break;
1739 case DST_TYPE_IS_CABLE:
dea74869 1740 memcpy(&state->frontend.ops, &dst_dvbc_ops, sizeof(struct dvb_frontend_ops));
1da177e4
LT
1741 break;
1742 case DST_TYPE_IS_SAT:
dea74869 1743 memcpy(&state->frontend.ops, &dst_dvbs_ops, sizeof(struct dvb_frontend_ops));
1da177e4 1744 break;
bc7386ba
MA
1745 case DST_TYPE_IS_ATSC:
1746 memcpy(&state->frontend.ops, &dst_atsc_ops, sizeof(struct dvb_frontend_ops));
1747 break;
1da177e4 1748 default:
a427de6f 1749 dprintk(verbose, DST_ERROR, 1, "unknown DST type. please report to the LinuxTV.org DVB mailinglist.");
2ea75330 1750 kfree(state);
50b215a0 1751 return NULL;
1da177e4 1752 }
1da177e4 1753 state->frontend.demodulator_priv = state;
1da177e4 1754
50b215a0 1755 return state; /* Manu (DST is a card not a frontend) */
1da177e4
LT
1756}
1757
50b215a0
JS
1758EXPORT_SYMBOL(dst_attach);
1759
1da177e4 1760static struct dvb_frontend_ops dst_dvbt_ops = {
5942c679 1761 .delsys = { SYS_DVBT },
1da177e4
LT
1762 .info = {
1763 .name = "DST DVB-T",
1764 .type = FE_OFDM,
1765 .frequency_min = 137000000,
1766 .frequency_max = 858000000,
1767 .frequency_stepsize = 166667,
c75079cc
A
1768 .caps = FE_CAN_FEC_AUTO |
1769 FE_CAN_QAM_AUTO |
1770 FE_CAN_QAM_16 |
1771 FE_CAN_QAM_32 |
1772 FE_CAN_QAM_64 |
1773 FE_CAN_QAM_128 |
1774 FE_CAN_QAM_256 |
1775 FE_CAN_TRANSMISSION_MODE_AUTO |
1776 FE_CAN_GUARD_INTERVAL_AUTO
1da177e4
LT
1777 },
1778
1779 .release = dst_release,
1da177e4 1780 .init = dst_init,
8cfba630 1781 .tune = dst_tune_frontend,
5942c679
MCC
1782 .set_frontend = dst_set_frontend,
1783 .get_frontend = dst_get_frontend,
cdd393cc 1784 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1785 .read_status = dst_read_status,
1786 .read_signal_strength = dst_read_signal_strength,
1787 .read_snr = dst_read_snr,
1788};
1789
1790static struct dvb_frontend_ops dst_dvbs_ops = {
5942c679 1791 .delsys = { SYS_DVBS },
1da177e4
LT
1792 .info = {
1793 .name = "DST DVB-S",
1794 .type = FE_QPSK,
1795 .frequency_min = 950000,
1796 .frequency_max = 2150000,
1797 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
1798 .frequency_tolerance = 29500,
1799 .symbol_rate_min = 1000000,
1800 .symbol_rate_max = 45000000,
1801 /* . symbol_rate_tolerance = ???,*/
1802 .caps = FE_CAN_FEC_AUTO | FE_CAN_QPSK
1803 },
1804
1805 .release = dst_release,
1da177e4 1806 .init = dst_init,
8cfba630 1807 .tune = dst_tune_frontend,
5942c679
MCC
1808 .set_frontend = dst_set_frontend,
1809 .get_frontend = dst_get_frontend,
cdd393cc 1810 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1811 .read_status = dst_read_status,
1812 .read_signal_strength = dst_read_signal_strength,
1813 .read_snr = dst_read_snr,
203fe8b3 1814 .diseqc_send_burst = dst_send_burst,
1da177e4
LT
1815 .diseqc_send_master_cmd = dst_set_diseqc,
1816 .set_voltage = dst_set_voltage,
1817 .set_tone = dst_set_tone,
1818};
1819
1820static struct dvb_frontend_ops dst_dvbc_ops = {
5942c679 1821 .delsys = { SYS_DVBC_ANNEX_A },
1da177e4
LT
1822 .info = {
1823 .name = "DST DVB-C",
1824 .type = FE_QAM,
1825 .frequency_stepsize = 62500,
1826 .frequency_min = 51000000,
1827 .frequency_max = 858000000,
1828 .symbol_rate_min = 1000000,
1829 .symbol_rate_max = 45000000,
f0289efa
KW
1830 .caps = FE_CAN_FEC_AUTO |
1831 FE_CAN_QAM_AUTO |
1832 FE_CAN_QAM_16 |
1833 FE_CAN_QAM_32 |
1834 FE_CAN_QAM_64 |
1835 FE_CAN_QAM_128 |
1836 FE_CAN_QAM_256
1da177e4
LT
1837 },
1838
1839 .release = dst_release,
1da177e4 1840 .init = dst_init,
8cfba630 1841 .tune = dst_tune_frontend,
5942c679
MCC
1842 .set_frontend = dst_set_frontend,
1843 .get_frontend = dst_get_frontend,
cdd393cc 1844 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1845 .read_status = dst_read_status,
1846 .read_signal_strength = dst_read_signal_strength,
1847 .read_snr = dst_read_snr,
1848};
1849
bc7386ba
MA
1850static struct dvb_frontend_ops dst_atsc_ops = {
1851 .info = {
1852 .name = "DST ATSC",
1853 .type = FE_ATSC,
1854 .frequency_stepsize = 62500,
1855 .frequency_min = 510000000,
1856 .frequency_max = 858000000,
1857 .symbol_rate_min = 1000000,
1858 .symbol_rate_max = 45000000,
1859 .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
1860 },
1861
1862 .release = dst_release,
1863 .init = dst_init,
8cfba630 1864 .tune = dst_tune_frontend,
5942c679
MCC
1865 .set_frontend = dst_set_frontend,
1866 .get_frontend = dst_get_frontend,
cdd393cc 1867 .get_frontend_algo = dst_get_tuning_algo,
bc7386ba
MA
1868 .read_status = dst_read_status,
1869 .read_signal_strength = dst_read_signal_strength,
1870 .read_snr = dst_read_snr,
1871};
1872
1873MODULE_DESCRIPTION("DST DVB-S/T/C/ATSC Combo Frontend driver");
50b215a0 1874MODULE_AUTHOR("Jamie Honan, Manu Abraham");
1da177e4 1875MODULE_LICENSE("GPL");