Commit | Line | Data |
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8d009a0c DF |
1 | /* |
2 | * Driver for Xceive XC4000 "QAM/8VSB single chip tuner" | |
3 | * | |
4 | * Copyright (c) 2007 Xceive Corporation | |
5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> | |
6 | * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com> | |
7 | * Copyright (c) 2009 Davide Ferri <d.ferri@zero11.it> | |
341747be | 8 | * Copyright (c) 2010 Istvan Varga <istvan_v@mailbox.hu> |
8d009a0c DF |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
8d009a0c DF |
18 | * GNU General Public License for more details. |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/videodev2.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/dvb/frontend.h> | |
30 | #include <linux/i2c.h> | |
5614942b | 31 | #include <linux/mutex.h> |
11091a31 | 32 | #include <asm/unaligned.h> |
8d009a0c DF |
33 | |
34 | #include "dvb_frontend.h" | |
35 | ||
36 | #include "xc4000.h" | |
37 | #include "tuner-i2c.h" | |
11091a31 | 38 | #include "tuner-xc2028-types.h" |
8d009a0c | 39 | |
4922cec5 | 40 | static int debug; |
8d009a0c | 41 | module_param(debug, int, 0644); |
341747be | 42 | MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off))."); |
8d009a0c DF |
43 | |
44 | static int no_poweroff; | |
45 | module_param(no_poweroff, int, 0644); | |
341747be | 46 | MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, " |
47 | "0 (default): use device-specific default mode)."); | |
923137a4 IV |
48 | |
49 | static int audio_std; | |
50 | module_param(audio_std, int, 0644); | |
341747be | 51 | MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly " |
52 | "needs to know what audio standard is needed for some video standards " | |
53 | "with audio A2 or NICAM. The valid settings are a sum of:\n" | |
54 | " 1: use NICAM/B or A2/B instead of NICAM/A or A2/A\n" | |
55 | " 2: use A2 instead of NICAM or BTSC\n" | |
56 | " 4: use SECAM/K3 instead of K1\n" | |
57 | " 8: use PAL-D/K audio for SECAM-D/K\n" | |
58 | "16: use FM radio input 1 instead of input 2\n" | |
59 | "32: use mono audio (the lower three bits are ignored)"); | |
fa285bc1 IV |
60 | |
61 | static char firmware_name[30]; | |
62 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); | |
341747be | 63 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " |
64 | "default firmware name."); | |
fa285bc1 | 65 | |
8d009a0c DF |
66 | static DEFINE_MUTEX(xc4000_list_mutex); |
67 | static LIST_HEAD(hybrid_tuner_instance_list); | |
68 | ||
69 | #define dprintk(level, fmt, arg...) if (debug >= level) \ | |
70 | printk(KERN_INFO "%s: " fmt, "xc4000", ## arg) | |
71 | ||
11091a31 DH |
72 | /* struct for storing firmware table */ |
73 | struct firmware_description { | |
74 | unsigned int type; | |
75 | v4l2_std_id id; | |
76 | __u16 int_freq; | |
77 | unsigned char *ptr; | |
78 | unsigned int size; | |
79 | }; | |
80 | ||
81 | struct firmware_properties { | |
82 | unsigned int type; | |
83 | v4l2_std_id id; | |
84 | v4l2_std_id std_req; | |
85 | __u16 int_freq; | |
86 | unsigned int scode_table; | |
e3bb7c60 | 87 | int scode_nr; |
11091a31 | 88 | }; |
8d009a0c DF |
89 | |
90 | struct xc4000_priv { | |
91 | struct tuner_i2c_props i2c_props; | |
92 | struct list_head hybrid_tuner_instance_list; | |
11091a31 | 93 | struct firmware_description *firm; |
fbe4a29f | 94 | int firm_size; |
fbe4a29f IV |
95 | u32 if_khz; |
96 | u32 freq_hz; | |
97 | u32 bandwidth; | |
98 | u8 video_standard; | |
99 | u8 rf_mode; | |
8edeb6eb | 100 | u8 default_pm; |
101 | u8 dvb_amplitude; | |
102 | u8 set_smoothedcvbs; | |
fbe4a29f | 103 | u8 ignore_i2c_write_errors; |
8edeb6eb | 104 | __u16 firm_version; |
d0962382 | 105 | struct firmware_properties cur_fw; |
fbe4a29f IV |
106 | __u16 hwmodel; |
107 | __u16 hwvers; | |
5614942b | 108 | struct mutex lock; |
8d009a0c DF |
109 | }; |
110 | ||
341747be | 111 | #define XC4000_AUDIO_STD_B 1 |
112 | #define XC4000_AUDIO_STD_A2 2 | |
113 | #define XC4000_AUDIO_STD_K3 4 | |
114 | #define XC4000_AUDIO_STD_L 8 | |
115 | #define XC4000_AUDIO_STD_INPUT1 16 | |
116 | #define XC4000_AUDIO_STD_MONO 32 | |
117 | ||
118 | #define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw" | |
119 | ||
8d009a0c | 120 | /* Misc Defines */ |
4911085f | 121 | #define MAX_TV_STANDARD 24 |
8d009a0c | 122 | #define XC_MAX_I2C_WRITE_LENGTH 64 |
5272f6b1 | 123 | #define XC_POWERED_DOWN 0x80000000U |
8d009a0c DF |
124 | |
125 | /* Signal Types */ | |
126 | #define XC_RF_MODE_AIR 0 | |
127 | #define XC_RF_MODE_CABLE 1 | |
128 | ||
8d009a0c DF |
129 | /* Product id */ |
130 | #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000 | |
7db98fe6 IV |
131 | #define XC_PRODUCT_ID_XC4000 0x0FA0 |
132 | #define XC_PRODUCT_ID_XC4100 0x1004 | |
8d009a0c | 133 | |
ee4c3cd6 | 134 | /* Registers (Write-only) */ |
8d009a0c DF |
135 | #define XREG_INIT 0x00 |
136 | #define XREG_VIDEO_MODE 0x01 | |
137 | #define XREG_AUDIO_MODE 0x02 | |
138 | #define XREG_RF_FREQ 0x03 | |
139 | #define XREG_D_CODE 0x04 | |
ee4c3cd6 DH |
140 | #define XREG_DIRECTSITTING_MODE 0x05 |
141 | #define XREG_SEEK_MODE 0x06 | |
142 | #define XREG_POWER_DOWN 0x08 | |
143 | #define XREG_SIGNALSOURCE 0x0A | |
30f544ec | 144 | #define XREG_SMOOTHEDCVBS 0x0E |
ee4c3cd6 | 145 | #define XREG_AMPLITUDE 0x10 |
8d009a0c | 146 | |
ee4c3cd6 | 147 | /* Registers (Read-only) */ |
8d009a0c DF |
148 | #define XREG_ADC_ENV 0x00 |
149 | #define XREG_QUALITY 0x01 | |
150 | #define XREG_FRAME_LINES 0x02 | |
151 | #define XREG_HSYNC_FREQ 0x03 | |
152 | #define XREG_LOCK 0x04 | |
153 | #define XREG_FREQ_ERROR 0x05 | |
154 | #define XREG_SNR 0x06 | |
155 | #define XREG_VERSION 0x07 | |
156 | #define XREG_PRODUCT_ID 0x08 | |
8d009a0c DF |
157 | |
158 | /* | |
159 | Basic firmware description. This will remain with | |
160 | the driver for documentation purposes. | |
161 | ||
162 | This represents an I2C firmware file encoded as a | |
163 | string of unsigned char. Format is as follows: | |
164 | ||
165 | char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB | |
166 | char[1 ]=len0_LSB -> length of first write transaction | |
167 | char[2 ]=data0 -> first byte to be sent | |
168 | char[3 ]=data1 | |
169 | char[4 ]=data2 | |
170 | char[ ]=... | |
171 | char[M ]=dataN -> last byte to be sent | |
172 | char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB | |
173 | char[M+2]=len1_LSB -> length of second write transaction | |
174 | char[M+3]=data0 | |
175 | char[M+4]=data1 | |
176 | ... | |
177 | etc. | |
178 | ||
179 | The [len] value should be interpreted as follows: | |
180 | ||
181 | len= len_MSB _ len_LSB | |
182 | len=1111_1111_1111_1111 : End of I2C_SEQUENCE | |
183 | len=0000_0000_0000_0000 : Reset command: Do hardware reset | |
184 | len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) | |
185 | len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms | |
186 | ||
187 | For the RESET and WAIT commands, the two following bytes will contain | |
188 | immediately the length of the following transaction. | |
8d009a0c | 189 | */ |
fbe4a29f | 190 | |
8d009a0c | 191 | struct XC_TV_STANDARD { |
fbe4a29f | 192 | const char *Name; |
341747be | 193 | u16 audio_mode; |
194 | u16 video_mode; | |
4911085f | 195 | u16 int_freq; |
8d009a0c DF |
196 | }; |
197 | ||
198 | /* Tuner standards */ | |
ed23db32 DH |
199 | #define XC4000_MN_NTSC_PAL_BTSC 0 |
200 | #define XC4000_MN_NTSC_PAL_A2 1 | |
201 | #define XC4000_MN_NTSC_PAL_EIAJ 2 | |
202 | #define XC4000_MN_NTSC_PAL_Mono 3 | |
203 | #define XC4000_BG_PAL_A2 4 | |
204 | #define XC4000_BG_PAL_NICAM 5 | |
205 | #define XC4000_BG_PAL_MONO 6 | |
206 | #define XC4000_I_PAL_NICAM 7 | |
207 | #define XC4000_I_PAL_NICAM_MONO 8 | |
208 | #define XC4000_DK_PAL_A2 9 | |
209 | #define XC4000_DK_PAL_NICAM 10 | |
210 | #define XC4000_DK_PAL_MONO 11 | |
211 | #define XC4000_DK_SECAM_A2DK1 12 | |
e3bb7c60 MCC |
212 | #define XC4000_DK_SECAM_A2LDK3 13 |
213 | #define XC4000_DK_SECAM_A2MONO 14 | |
4911085f IV |
214 | #define XC4000_DK_SECAM_NICAM 15 |
215 | #define XC4000_L_SECAM_NICAM 16 | |
216 | #define XC4000_LC_SECAM_NICAM 17 | |
217 | #define XC4000_DTV6 18 | |
218 | #define XC4000_DTV8 19 | |
219 | #define XC4000_DTV7_8 20 | |
220 | #define XC4000_DTV7 21 | |
221 | #define XC4000_FM_Radio_INPUT2 22 | |
222 | #define XC4000_FM_Radio_INPUT1 23 | |
8d009a0c | 223 | |
341747be | 224 | static struct XC_TV_STANDARD xc4000_standard[MAX_TV_STANDARD] = { |
4911085f IV |
225 | {"M/N-NTSC/PAL-BTSC", 0x0000, 0x80A0, 4500}, |
226 | {"M/N-NTSC/PAL-A2", 0x0000, 0x80A0, 4600}, | |
227 | {"M/N-NTSC/PAL-EIAJ", 0x0040, 0x80A0, 4500}, | |
228 | {"M/N-NTSC/PAL-Mono", 0x0078, 0x80A0, 4500}, | |
229 | {"B/G-PAL-A2", 0x0000, 0x8159, 5640}, | |
230 | {"B/G-PAL-NICAM", 0x0004, 0x8159, 5740}, | |
231 | {"B/G-PAL-MONO", 0x0078, 0x8159, 5500}, | |
232 | {"I-PAL-NICAM", 0x0080, 0x8049, 6240}, | |
233 | {"I-PAL-NICAM-MONO", 0x0078, 0x8049, 6000}, | |
234 | {"D/K-PAL-A2", 0x0000, 0x8049, 6380}, | |
235 | {"D/K-PAL-NICAM", 0x0080, 0x8049, 6200}, | |
236 | {"D/K-PAL-MONO", 0x0078, 0x8049, 6500}, | |
237 | {"D/K-SECAM-A2 DK1", 0x0000, 0x8049, 6340}, | |
238 | {"D/K-SECAM-A2 L/DK3", 0x0000, 0x8049, 6000}, | |
239 | {"D/K-SECAM-A2 MONO", 0x0078, 0x8049, 6500}, | |
240 | {"D/K-SECAM-NICAM", 0x0080, 0x8049, 6200}, | |
241 | {"L-SECAM-NICAM", 0x8080, 0x0009, 6200}, | |
242 | {"L'-SECAM-NICAM", 0x8080, 0x4009, 6200}, | |
243 | {"DTV6", 0x00C0, 0x8002, 0}, | |
244 | {"DTV8", 0x00C0, 0x800B, 0}, | |
245 | {"DTV7/8", 0x00C0, 0x801B, 0}, | |
246 | {"DTV7", 0x00C0, 0x8007, 0}, | |
941830c9 MCC |
247 | {"FM Radio-INPUT2", 0x0008, 0x9800, 10700}, |
248 | {"FM Radio-INPUT1", 0x0008, 0x9000, 10700} | |
8d009a0c DF |
249 | }; |
250 | ||
8d009a0c | 251 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val); |
341747be | 252 | static int xc4000_tuner_reset(struct dvb_frontend *fe); |
f4312e2f | 253 | static void xc_debug_dump(struct xc4000_priv *priv); |
8d009a0c DF |
254 | |
255 | static int xc_send_i2c_data(struct xc4000_priv *priv, u8 *buf, int len) | |
256 | { | |
257 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, | |
258 | .flags = 0, .buf = buf, .len = len }; | |
8d009a0c | 259 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { |
799ed11a DH |
260 | if (priv->ignore_i2c_write_errors == 0) { |
261 | printk(KERN_ERR "xc4000: I2C write failed (len=%i)\n", | |
262 | len); | |
263 | if (len == 4) { | |
941830c9 | 264 | printk(KERN_ERR "bytes %02x %02x %02x %02x\n", buf[0], |
799ed11a DH |
265 | buf[1], buf[2], buf[3]); |
266 | } | |
341747be | 267 | return -EREMOTEIO; |
799ed11a | 268 | } |
8d009a0c | 269 | } |
341747be | 270 | return 0; |
8d009a0c DF |
271 | } |
272 | ||
341747be | 273 | static int xc4000_tuner_reset(struct dvb_frontend *fe) |
8d009a0c DF |
274 | { |
275 | struct xc4000_priv *priv = fe->tuner_priv; | |
276 | int ret; | |
277 | ||
278 | dprintk(1, "%s()\n", __func__); | |
279 | ||
280 | if (fe->callback) { | |
281 | ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
282 | fe->dvb->priv : | |
283 | priv->i2c_props.adap->algo_data, | |
284 | DVB_FRONTEND_COMPONENT_TUNER, | |
285 | XC4000_TUNER_RESET, 0); | |
286 | if (ret) { | |
287 | printk(KERN_ERR "xc4000: reset failed\n"); | |
341747be | 288 | return -EREMOTEIO; |
8d009a0c DF |
289 | } |
290 | } else { | |
341747be | 291 | printk(KERN_ERR "xc4000: no tuner reset callback function, " |
292 | "fatal\n"); | |
293 | return -EINVAL; | |
8d009a0c | 294 | } |
341747be | 295 | return 0; |
8d009a0c DF |
296 | } |
297 | ||
298 | static int xc_write_reg(struct xc4000_priv *priv, u16 regAddr, u16 i2cData) | |
299 | { | |
300 | u8 buf[4]; | |
8d009a0c DF |
301 | int result; |
302 | ||
303 | buf[0] = (regAddr >> 8) & 0xFF; | |
304 | buf[1] = regAddr & 0xFF; | |
305 | buf[2] = (i2cData >> 8) & 0xFF; | |
306 | buf[3] = i2cData & 0xFF; | |
307 | result = xc_send_i2c_data(priv, buf, 4); | |
8d009a0c DF |
308 | |
309 | return result; | |
310 | } | |
311 | ||
312 | static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence) | |
313 | { | |
314 | struct xc4000_priv *priv = fe->tuner_priv; | |
315 | ||
316 | int i, nbytes_to_send, result; | |
317 | unsigned int len, pos, index; | |
318 | u8 buf[XC_MAX_I2C_WRITE_LENGTH]; | |
319 | ||
320 | index = 0; | |
321 | while ((i2c_sequence[index] != 0xFF) || | |
322 | (i2c_sequence[index + 1] != 0xFF)) { | |
323 | len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; | |
324 | if (len == 0x0000) { | |
325 | /* RESET command */ | |
341747be | 326 | /* NOTE: this is ignored, as the reset callback was */ |
327 | /* already called by check_firmware() */ | |
8d009a0c | 328 | index += 2; |
8d009a0c DF |
329 | } else if (len & 0x8000) { |
330 | /* WAIT command */ | |
341747be | 331 | msleep(len & 0x7FFF); |
8d009a0c DF |
332 | index += 2; |
333 | } else { | |
334 | /* Send i2c data whilst ensuring individual transactions | |
335 | * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. | |
336 | */ | |
337 | index += 2; | |
338 | buf[0] = i2c_sequence[index]; | |
339 | buf[1] = i2c_sequence[index + 1]; | |
340 | pos = 2; | |
341 | while (pos < len) { | |
342 | if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) | |
343 | nbytes_to_send = | |
344 | XC_MAX_I2C_WRITE_LENGTH; | |
345 | else | |
346 | nbytes_to_send = (len - pos + 2); | |
347 | for (i = 2; i < nbytes_to_send; i++) { | |
348 | buf[i] = i2c_sequence[index + pos + | |
349 | i - 2]; | |
350 | } | |
351 | result = xc_send_i2c_data(priv, buf, | |
352 | nbytes_to_send); | |
353 | ||
341747be | 354 | if (result != 0) |
8d009a0c DF |
355 | return result; |
356 | ||
357 | pos += nbytes_to_send - 2; | |
358 | } | |
359 | index += len; | |
360 | } | |
361 | } | |
341747be | 362 | return 0; |
8d009a0c DF |
363 | } |
364 | ||
341747be | 365 | static int xc_set_tv_standard(struct xc4000_priv *priv, |
366 | u16 video_mode, u16 audio_mode) | |
8d009a0c DF |
367 | { |
368 | int ret; | |
341747be | 369 | dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode); |
8d009a0c DF |
370 | dprintk(1, "%s() Standard = %s\n", |
371 | __func__, | |
341747be | 372 | xc4000_standard[priv->video_standard].Name); |
8d009a0c | 373 | |
799ed11a DH |
374 | /* Don't complain when the request fails because of i2c stretching */ |
375 | priv->ignore_i2c_write_errors = 1; | |
376 | ||
341747be | 377 | ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode); |
378 | if (ret == 0) | |
379 | ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode); | |
8d009a0c | 380 | |
799ed11a DH |
381 | priv->ignore_i2c_write_errors = 0; |
382 | ||
8d009a0c DF |
383 | return ret; |
384 | } | |
385 | ||
341747be | 386 | static int xc_set_signal_source(struct xc4000_priv *priv, u16 rf_mode) |
8d009a0c DF |
387 | { |
388 | dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, | |
389 | rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); | |
390 | ||
391 | if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { | |
392 | rf_mode = XC_RF_MODE_CABLE; | |
393 | printk(KERN_ERR | |
394 | "%s(), Invalid mode, defaulting to CABLE", | |
395 | __func__); | |
396 | } | |
397 | return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode); | |
398 | } | |
399 | ||
400 | static const struct dvb_tuner_ops xc4000_tuner_ops; | |
401 | ||
341747be | 402 | static int xc_set_rf_frequency(struct xc4000_priv *priv, u32 freq_hz) |
8d009a0c DF |
403 | { |
404 | u16 freq_code; | |
405 | ||
406 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | |
407 | ||
408 | if ((freq_hz > xc4000_tuner_ops.info.frequency_max) || | |
341747be | 409 | (freq_hz < xc4000_tuner_ops.info.frequency_min)) |
410 | return -EINVAL; | |
8d009a0c DF |
411 | |
412 | freq_code = (u16)(freq_hz / 15625); | |
413 | ||
414 | /* WAS: Starting in firmware version 1.1.44, Xceive recommends using the | |
415 | FINERFREQ for all normal tuning (the doc indicates reg 0x03 should | |
416 | only be used for fast scanning for channel lock) */ | |
341747be | 417 | /* WAS: XREG_FINERFREQ */ |
418 | return xc_write_reg(priv, XREG_RF_FREQ, freq_code); | |
8d009a0c DF |
419 | } |
420 | ||
341747be | 421 | static int xc_get_adc_envelope(struct xc4000_priv *priv, u16 *adc_envelope) |
8d009a0c DF |
422 | { |
423 | return xc4000_readreg(priv, XREG_ADC_ENV, adc_envelope); | |
424 | } | |
425 | ||
426 | static int xc_get_frequency_error(struct xc4000_priv *priv, u32 *freq_error_hz) | |
427 | { | |
428 | int result; | |
429 | u16 regData; | |
430 | u32 tmp; | |
431 | ||
432 | result = xc4000_readreg(priv, XREG_FREQ_ERROR, ®Data); | |
341747be | 433 | if (result != 0) |
8d009a0c DF |
434 | return result; |
435 | ||
1368ceb2 IV |
436 | tmp = (u32)regData & 0xFFFFU; |
437 | tmp = (tmp < 0x8000U ? tmp : 0x10000U - tmp); | |
438 | (*freq_error_hz) = tmp * 15625; | |
8d009a0c DF |
439 | return result; |
440 | } | |
441 | ||
442 | static int xc_get_lock_status(struct xc4000_priv *priv, u16 *lock_status) | |
443 | { | |
444 | return xc4000_readreg(priv, XREG_LOCK, lock_status); | |
445 | } | |
446 | ||
447 | static int xc_get_version(struct xc4000_priv *priv, | |
448 | u8 *hw_majorversion, u8 *hw_minorversion, | |
449 | u8 *fw_majorversion, u8 *fw_minorversion) | |
450 | { | |
451 | u16 data; | |
452 | int result; | |
453 | ||
454 | result = xc4000_readreg(priv, XREG_VERSION, &data); | |
341747be | 455 | if (result != 0) |
8d009a0c DF |
456 | return result; |
457 | ||
458 | (*hw_majorversion) = (data >> 12) & 0x0F; | |
459 | (*hw_minorversion) = (data >> 8) & 0x0F; | |
460 | (*fw_majorversion) = (data >> 4) & 0x0F; | |
461 | (*fw_minorversion) = data & 0x0F; | |
462 | ||
463 | return 0; | |
464 | } | |
465 | ||
8d009a0c DF |
466 | static int xc_get_hsync_freq(struct xc4000_priv *priv, u32 *hsync_freq_hz) |
467 | { | |
468 | u16 regData; | |
469 | int result; | |
470 | ||
471 | result = xc4000_readreg(priv, XREG_HSYNC_FREQ, ®Data); | |
341747be | 472 | if (result != 0) |
8d009a0c DF |
473 | return result; |
474 | ||
475 | (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100; | |
476 | return result; | |
477 | } | |
478 | ||
479 | static int xc_get_frame_lines(struct xc4000_priv *priv, u16 *frame_lines) | |
480 | { | |
481 | return xc4000_readreg(priv, XREG_FRAME_LINES, frame_lines); | |
482 | } | |
483 | ||
484 | static int xc_get_quality(struct xc4000_priv *priv, u16 *quality) | |
485 | { | |
486 | return xc4000_readreg(priv, XREG_QUALITY, quality); | |
487 | } | |
488 | ||
341747be | 489 | static u16 xc_wait_for_lock(struct xc4000_priv *priv) |
8d009a0c | 490 | { |
341747be | 491 | u16 lock_state = 0; |
492 | int watchdog_count = 40; | |
493 | ||
494 | while ((lock_state == 0) && (watchdog_count > 0)) { | |
495 | xc_get_lock_status(priv, &lock_state); | |
496 | if (lock_state != 1) { | |
497 | msleep(5); | |
498 | watchdog_count--; | |
8d009a0c DF |
499 | } |
500 | } | |
341747be | 501 | return lock_state; |
8d009a0c DF |
502 | } |
503 | ||
e75873c1 | 504 | static int xc_tune_channel(struct xc4000_priv *priv, u32 freq_hz) |
8d009a0c | 505 | { |
e75873c1 IV |
506 | int found = 1; |
507 | int result; | |
8d009a0c DF |
508 | |
509 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | |
510 | ||
799ed11a DH |
511 | /* Don't complain when the request fails because of i2c stretching */ |
512 | priv->ignore_i2c_write_errors = 1; | |
341747be | 513 | result = xc_set_rf_frequency(priv, freq_hz); |
799ed11a DH |
514 | priv->ignore_i2c_write_errors = 0; |
515 | ||
341747be | 516 | if (result != 0) |
8d009a0c DF |
517 | return 0; |
518 | ||
e75873c1 IV |
519 | /* wait for lock only in analog TV mode */ |
520 | if ((priv->cur_fw.type & (FM | DTV6 | DTV7 | DTV78 | DTV8)) == 0) { | |
341747be | 521 | if (xc_wait_for_lock(priv) != 1) |
e75873c1 | 522 | found = 0; |
8d009a0c DF |
523 | } |
524 | ||
f4312e2f IV |
525 | /* Wait for stats to stabilize. |
526 | * Frame Lines needs two frame times after initial lock | |
527 | * before it is valid. | |
528 | */ | |
341747be | 529 | msleep(debug ? 100 : 10); |
f4312e2f IV |
530 | |
531 | if (debug) | |
532 | xc_debug_dump(priv); | |
533 | ||
8d009a0c DF |
534 | return found; |
535 | } | |
536 | ||
537 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val) | |
538 | { | |
539 | u8 buf[2] = { reg >> 8, reg & 0xff }; | |
540 | u8 bval[2] = { 0, 0 }; | |
541 | struct i2c_msg msg[2] = { | |
542 | { .addr = priv->i2c_props.addr, | |
543 | .flags = 0, .buf = &buf[0], .len = 2 }, | |
544 | { .addr = priv->i2c_props.addr, | |
545 | .flags = I2C_M_RD, .buf = &bval[0], .len = 2 }, | |
546 | }; | |
547 | ||
548 | if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) { | |
941830c9 | 549 | printk(KERN_ERR "xc4000: I2C read failed\n"); |
8d009a0c DF |
550 | return -EREMOTEIO; |
551 | } | |
552 | ||
553 | *val = (bval[0] << 8) | bval[1]; | |
341747be | 554 | return 0; |
8d009a0c DF |
555 | } |
556 | ||
e3bb7c60 | 557 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
d0962382 DH |
558 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
559 | { | |
560 | if (type & BASE) | |
941830c9 | 561 | printk(KERN_CONT "BASE "); |
d0962382 | 562 | if (type & INIT1) |
941830c9 | 563 | printk(KERN_CONT "INIT1 "); |
d0962382 | 564 | if (type & F8MHZ) |
941830c9 | 565 | printk(KERN_CONT "F8MHZ "); |
d0962382 | 566 | if (type & MTS) |
941830c9 | 567 | printk(KERN_CONT "MTS "); |
d0962382 | 568 | if (type & D2620) |
941830c9 | 569 | printk(KERN_CONT "D2620 "); |
d0962382 | 570 | if (type & D2633) |
941830c9 | 571 | printk(KERN_CONT "D2633 "); |
d0962382 | 572 | if (type & DTV6) |
941830c9 | 573 | printk(KERN_CONT "DTV6 "); |
d0962382 | 574 | if (type & QAM) |
941830c9 | 575 | printk(KERN_CONT "QAM "); |
d0962382 | 576 | if (type & DTV7) |
941830c9 | 577 | printk(KERN_CONT "DTV7 "); |
d0962382 | 578 | if (type & DTV78) |
941830c9 | 579 | printk(KERN_CONT "DTV78 "); |
d0962382 | 580 | if (type & DTV8) |
941830c9 | 581 | printk(KERN_CONT "DTV8 "); |
d0962382 | 582 | if (type & FM) |
941830c9 | 583 | printk(KERN_CONT "FM "); |
d0962382 | 584 | if (type & INPUT1) |
941830c9 | 585 | printk(KERN_CONT "INPUT1 "); |
d0962382 | 586 | if (type & LCD) |
941830c9 | 587 | printk(KERN_CONT "LCD "); |
d0962382 | 588 | if (type & NOGD) |
941830c9 | 589 | printk(KERN_CONT "NOGD "); |
d0962382 | 590 | if (type & MONO) |
941830c9 | 591 | printk(KERN_CONT "MONO "); |
d0962382 | 592 | if (type & ATSC) |
941830c9 | 593 | printk(KERN_CONT "ATSC "); |
d0962382 | 594 | if (type & IF) |
941830c9 | 595 | printk(KERN_CONT "IF "); |
d0962382 | 596 | if (type & LG60) |
941830c9 | 597 | printk(KERN_CONT "LG60 "); |
d0962382 | 598 | if (type & ATI638) |
941830c9 | 599 | printk(KERN_CONT "ATI638 "); |
d0962382 | 600 | if (type & OREN538) |
941830c9 | 601 | printk(KERN_CONT "OREN538 "); |
d0962382 | 602 | if (type & OREN36) |
941830c9 | 603 | printk(KERN_CONT "OREN36 "); |
d0962382 | 604 | if (type & TOYOTA388) |
941830c9 | 605 | printk(KERN_CONT "TOYOTA388 "); |
d0962382 | 606 | if (type & TOYOTA794) |
941830c9 | 607 | printk(KERN_CONT "TOYOTA794 "); |
d0962382 | 608 | if (type & DIBCOM52) |
941830c9 | 609 | printk(KERN_CONT "DIBCOM52 "); |
d0962382 | 610 | if (type & ZARLINK456) |
941830c9 | 611 | printk(KERN_CONT "ZARLINK456 "); |
d0962382 | 612 | if (type & CHINA) |
941830c9 | 613 | printk(KERN_CONT "CHINA "); |
d0962382 | 614 | if (type & F6MHZ) |
941830c9 | 615 | printk(KERN_CONT "F6MHZ "); |
d0962382 | 616 | if (type & INPUT2) |
941830c9 | 617 | printk(KERN_CONT "INPUT2 "); |
d0962382 | 618 | if (type & SCODE) |
941830c9 | 619 | printk(KERN_CONT "SCODE "); |
d0962382 | 620 | if (type & HAS_IF) |
941830c9 | 621 | printk(KERN_CONT "HAS_IF_%d ", int_freq); |
d0962382 DH |
622 | } |
623 | ||
11091a31 DH |
624 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
625 | v4l2_std_id *id) | |
626 | { | |
627 | struct xc4000_priv *priv = fe->tuner_priv; | |
3db95704 IV |
628 | int i, best_i = -1; |
629 | unsigned int best_nr_diffs = 255U; | |
11091a31 | 630 | |
11091a31 | 631 | if (!priv->firm) { |
341747be | 632 | printk(KERN_ERR "Error! firmware not loaded\n"); |
11091a31 DH |
633 | return -EINVAL; |
634 | } | |
635 | ||
636 | if (((type & ~SCODE) == 0) && (*id == 0)) | |
637 | *id = V4L2_STD_PAL; | |
638 | ||
11091a31 DH |
639 | /* Seek for generic video standard match */ |
640 | for (i = 0; i < priv->firm_size; i++) { | |
3db95704 IV |
641 | v4l2_std_id id_diff_mask = |
642 | (priv->firm[i].id ^ (*id)) & (*id); | |
643 | unsigned int type_diff_mask = | |
644 | (priv->firm[i].type ^ type) | |
645 | & (BASE_TYPES | DTV_TYPES | LCD | NOGD | MONO | SCODE); | |
646 | unsigned int nr_diffs; | |
647 | ||
648 | if (type_diff_mask | |
649 | & (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE)) | |
11091a31 DH |
650 | continue; |
651 | ||
3db95704 IV |
652 | nr_diffs = hweight64(id_diff_mask) + hweight32(type_diff_mask); |
653 | if (!nr_diffs) /* Supports all the requested standards */ | |
654 | goto found; | |
11091a31 | 655 | |
3db95704 IV |
656 | if (nr_diffs < best_nr_diffs) { |
657 | best_nr_diffs = nr_diffs; | |
11091a31 DH |
658 | best_i = i; |
659 | } | |
660 | } | |
661 | ||
3db95704 IV |
662 | /* FIXME: Would make sense to seek for type "hint" match ? */ |
663 | if (best_i < 0) { | |
664 | i = -ENOENT; | |
665 | goto ret; | |
666 | } | |
667 | ||
668 | if (best_nr_diffs > 0U) { | |
941830c9 MCC |
669 | printk(KERN_WARNING |
670 | "Selecting best matching firmware (%u bits differ) for " | |
341747be | 671 | "type=(%x), id %016llx:\n", |
672 | best_nr_diffs, type, (unsigned long long)*id); | |
11091a31 | 673 | i = best_i; |
11091a31 DH |
674 | } |
675 | ||
11091a31 DH |
676 | found: |
677 | *id = priv->firm[i].id; | |
678 | ||
679 | ret: | |
11091a31 | 680 | if (debug) { |
941830c9 | 681 | printk(KERN_DEBUG "%s firmware for type=", |
341747be | 682 | (i < 0) ? "Can't find" : "Found"); |
d0962382 | 683 | dump_firm_type(type); |
941830c9 | 684 | printk(KERN_DEBUG "(%x), id %016llx.\n", type, (unsigned long long)*id); |
11091a31 DH |
685 | } |
686 | return i; | |
687 | } | |
688 | ||
689 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, | |
690 | v4l2_std_id *id) | |
691 | { | |
692 | struct xc4000_priv *priv = fe->tuner_priv; | |
693 | int pos, rc; | |
31f880e2 | 694 | unsigned char *p; |
11091a31 | 695 | |
11091a31 DH |
696 | pos = seek_firmware(fe, type, id); |
697 | if (pos < 0) | |
698 | return pos; | |
699 | ||
11091a31 | 700 | p = priv->firm[pos].ptr; |
11091a31 | 701 | |
799ed11a DH |
702 | /* Don't complain when the request fails because of i2c stretching */ |
703 | priv->ignore_i2c_write_errors = 1; | |
704 | ||
31f880e2 | 705 | rc = xc_load_i2c_sequence(fe, p); |
11091a31 | 706 | |
799ed11a DH |
707 | priv->ignore_i2c_write_errors = 0; |
708 | ||
31f880e2 | 709 | return rc; |
11091a31 DH |
710 | } |
711 | ||
8d009a0c DF |
712 | static int xc4000_fwupload(struct dvb_frontend *fe) |
713 | { | |
714 | struct xc4000_priv *priv = fe->tuner_priv; | |
11091a31 DH |
715 | const struct firmware *fw = NULL; |
716 | const unsigned char *p, *endp; | |
717 | int rc = 0; | |
718 | int n, n_array; | |
719 | char name[33]; | |
fbe4a29f | 720 | const char *fname; |
11091a31 | 721 | |
fa285bc1 IV |
722 | if (firmware_name[0] != '\0') |
723 | fname = firmware_name; | |
724 | else | |
725 | fname = XC4000_DEFAULT_FIRMWARE; | |
11091a31 | 726 | |
941830c9 | 727 | dprintk(1, "Reading firmware %s\n", fname); |
11091a31 DH |
728 | rc = request_firmware(&fw, fname, priv->i2c_props.adap->dev.parent); |
729 | if (rc < 0) { | |
730 | if (rc == -ENOENT) | |
941830c9 | 731 | printk(KERN_ERR "Error: firmware %s not found.\n", fname); |
11091a31 | 732 | else |
941830c9 | 733 | printk(KERN_ERR "Error %d while requesting firmware %s\n", |
341747be | 734 | rc, fname); |
8d009a0c | 735 | |
11091a31 DH |
736 | return rc; |
737 | } | |
738 | p = fw->data; | |
739 | endp = p + fw->size; | |
8d009a0c | 740 | |
11091a31 | 741 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
941830c9 MCC |
742 | printk(KERN_ERR "Error: firmware file %s has invalid size!\n", |
743 | fname); | |
11091a31 | 744 | goto corrupt; |
8d009a0c DF |
745 | } |
746 | ||
11091a31 | 747 | memcpy(name, p, sizeof(name) - 1); |
341747be | 748 | name[sizeof(name) - 1] = '\0'; |
11091a31 DH |
749 | p += sizeof(name) - 1; |
750 | ||
751 | priv->firm_version = get_unaligned_le16(p); | |
752 | p += 2; | |
753 | ||
754 | n_array = get_unaligned_le16(p); | |
755 | p += 2; | |
756 | ||
b6cdb5be DH |
757 | dprintk(1, "Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
758 | n_array, fname, name, | |
759 | priv->firm_version >> 8, priv->firm_version & 0xff); | |
11091a31 | 760 | |
1b7acf0c | 761 | priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL); |
11091a31 | 762 | if (priv->firm == NULL) { |
941830c9 | 763 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); |
11091a31 | 764 | rc = -ENOMEM; |
941830c9 | 765 | goto done; |
11091a31 DH |
766 | } |
767 | priv->firm_size = n_array; | |
768 | ||
769 | n = -1; | |
770 | while (p < endp) { | |
771 | __u32 type, size; | |
772 | v4l2_std_id id; | |
773 | __u16 int_freq = 0; | |
774 | ||
775 | n++; | |
776 | if (n >= n_array) { | |
941830c9 | 777 | printk(KERN_ERR "More firmware images in file than " |
fbe4a29f | 778 | "were expected!\n"); |
11091a31 DH |
779 | goto corrupt; |
780 | } | |
781 | ||
782 | /* Checks if there's enough bytes to read */ | |
783 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) | |
784 | goto header; | |
785 | ||
786 | type = get_unaligned_le32(p); | |
787 | p += sizeof(type); | |
788 | ||
789 | id = get_unaligned_le64(p); | |
790 | p += sizeof(id); | |
791 | ||
792 | if (type & HAS_IF) { | |
793 | int_freq = get_unaligned_le16(p); | |
794 | p += sizeof(int_freq); | |
795 | if (endp - p < sizeof(size)) | |
796 | goto header; | |
797 | } | |
798 | ||
799 | size = get_unaligned_le32(p); | |
800 | p += sizeof(size); | |
801 | ||
802 | if (!size || size > endp - p) { | |
941830c9 | 803 | printk(KERN_ERR "Firmware type (%x), id %llx is corrupted (size=%d, expected %d)\n", |
11091a31 DH |
804 | type, (unsigned long long)id, |
805 | (unsigned)(endp - p), size); | |
806 | goto corrupt; | |
807 | } | |
808 | ||
809 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); | |
810 | if (priv->firm[n].ptr == NULL) { | |
941830c9 | 811 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); |
11091a31 | 812 | rc = -ENOMEM; |
941830c9 | 813 | goto done; |
11091a31 | 814 | } |
d0962382 | 815 | |
11091a31 | 816 | if (debug) { |
941830c9 | 817 | printk(KERN_DEBUG "Reading firmware type "); |
d0962382 | 818 | dump_firm_type_and_int_freq(type, int_freq); |
941830c9 | 819 | printk(KERN_DEBUG "(%x), id %llx, size=%d.\n", |
11091a31 DH |
820 | type, (unsigned long long)id, size); |
821 | } | |
822 | ||
823 | memcpy(priv->firm[n].ptr, p, size); | |
824 | priv->firm[n].type = type; | |
825 | priv->firm[n].id = id; | |
826 | priv->firm[n].size = size; | |
827 | priv->firm[n].int_freq = int_freq; | |
828 | ||
829 | p += size; | |
8d009a0c DF |
830 | } |
831 | ||
11091a31 | 832 | if (n + 1 != priv->firm_size) { |
941830c9 | 833 | printk(KERN_ERR "Firmware file is incomplete!\n"); |
11091a31 DH |
834 | goto corrupt; |
835 | } | |
836 | ||
837 | goto done; | |
838 | ||
839 | header: | |
941830c9 | 840 | printk(KERN_ERR "Firmware header is incomplete!\n"); |
11091a31 DH |
841 | corrupt: |
842 | rc = -EINVAL; | |
941830c9 | 843 | printk(KERN_ERR "Error: firmware file is corrupted!\n"); |
11091a31 DH |
844 | |
845 | done: | |
8d009a0c | 846 | release_firmware(fw); |
11091a31 | 847 | if (rc == 0) |
b6cdb5be | 848 | dprintk(1, "Firmware files loaded.\n"); |
11091a31 DH |
849 | |
850 | return rc; | |
8d009a0c DF |
851 | } |
852 | ||
d0962382 DH |
853 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
854 | v4l2_std_id *id, __u16 int_freq, int scode) | |
855 | { | |
856 | struct xc4000_priv *priv = fe->tuner_priv; | |
ffce6266 IV |
857 | int pos, rc; |
858 | unsigned char *p; | |
859 | u8 scode_buf[13]; | |
860 | u8 indirect_mode[5]; | |
d0962382 | 861 | |
fe830364 | 862 | dprintk(1, "%s called int_freq=%d\n", __func__, int_freq); |
d0962382 DH |
863 | |
864 | if (!int_freq) { | |
865 | pos = seek_firmware(fe, type, id); | |
866 | if (pos < 0) | |
867 | return pos; | |
868 | } else { | |
869 | for (pos = 0; pos < priv->firm_size; pos++) { | |
870 | if ((priv->firm[pos].int_freq == int_freq) && | |
871 | (priv->firm[pos].type & HAS_IF)) | |
872 | break; | |
873 | } | |
874 | if (pos == priv->firm_size) | |
875 | return -ENOENT; | |
876 | } | |
877 | ||
878 | p = priv->firm[pos].ptr; | |
879 | ||
ffce6266 IV |
880 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
881 | return -EINVAL; | |
882 | p += 12 * scode; | |
d0962382 | 883 | |
941830c9 MCC |
884 | if (debug) { |
885 | tuner_info("Loading SCODE for type="); | |
886 | dump_firm_type_and_int_freq(priv->firm[pos].type, | |
887 | priv->firm[pos].int_freq); | |
888 | printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type, | |
889 | (unsigned long long)*id); | |
890 | } | |
d0962382 | 891 | |
ee4c3cd6 DH |
892 | scode_buf[0] = 0x00; |
893 | memcpy(&scode_buf[1], p, 12); | |
d0962382 DH |
894 | |
895 | /* Enter direct-mode */ | |
ee4c3cd6 DH |
896 | rc = xc_write_reg(priv, XREG_DIRECTSITTING_MODE, 0); |
897 | if (rc < 0) { | |
941830c9 | 898 | printk(KERN_ERR "failed to put device into direct mode!\n"); |
d0962382 | 899 | return -EIO; |
ee4c3cd6 | 900 | } |
d0962382 | 901 | |
ee4c3cd6 | 902 | rc = xc_send_i2c_data(priv, scode_buf, 13); |
341747be | 903 | if (rc != 0) { |
ee4c3cd6 DH |
904 | /* Even if the send failed, make sure we set back to indirect |
905 | mode */ | |
941830c9 | 906 | printk(KERN_ERR "Failed to set scode %d\n", rc); |
ee4c3cd6 | 907 | } |
d0962382 DH |
908 | |
909 | /* Switch back to indirect-mode */ | |
910 | memset(indirect_mode, 0, sizeof(indirect_mode)); | |
911 | indirect_mode[4] = 0x88; | |
ee4c3cd6 DH |
912 | xc_send_i2c_data(priv, indirect_mode, sizeof(indirect_mode)); |
913 | msleep(10); | |
d0962382 DH |
914 | |
915 | return 0; | |
916 | } | |
917 | ||
918 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, | |
919 | v4l2_std_id std, __u16 int_freq) | |
920 | { | |
921 | struct xc4000_priv *priv = fe->tuner_priv; | |
922 | struct firmware_properties new_fw; | |
923 | int rc = 0, is_retry = 0; | |
09f46342 | 924 | u16 hwmodel; |
d0962382 | 925 | v4l2_std_id std0; |
e3bb7c60 | 926 | u8 hw_major, hw_minor, fw_major, fw_minor; |
d0962382 DH |
927 | |
928 | dprintk(1, "%s called\n", __func__); | |
929 | ||
930 | if (!priv->firm) { | |
931 | rc = xc4000_fwupload(fe); | |
932 | if (rc < 0) | |
933 | return rc; | |
934 | } | |
935 | ||
d0962382 DH |
936 | retry: |
937 | new_fw.type = type; | |
938 | new_fw.id = std; | |
939 | new_fw.std_req = std; | |
341747be | 940 | new_fw.scode_table = SCODE; |
d0962382 DH |
941 | new_fw.scode_nr = 0; |
942 | new_fw.int_freq = int_freq; | |
943 | ||
944 | dprintk(1, "checking firmware, user requested type="); | |
945 | if (debug) { | |
946 | dump_firm_type(new_fw.type); | |
941830c9 | 947 | printk(KERN_CONT "(%x), id %016llx, ", new_fw.type, |
d0962382 | 948 | (unsigned long long)new_fw.std_req); |
341747be | 949 | if (!int_freq) |
950 | printk(KERN_CONT "scode_tbl "); | |
951 | else | |
952 | printk(KERN_CONT "int_freq %d, ", new_fw.int_freq); | |
953 | printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr); | |
d0962382 DH |
954 | } |
955 | ||
956 | /* No need to reload base firmware if it matches */ | |
595a83f4 | 957 | if (priv->cur_fw.type & BASE) { |
d0962382 DH |
958 | dprintk(1, "BASE firmware not changed.\n"); |
959 | goto skip_base; | |
960 | } | |
961 | ||
962 | /* Updating BASE - forget about all currently loaded firmware */ | |
963 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
964 | ||
965 | /* Reset is needed before loading firmware */ | |
341747be | 966 | rc = xc4000_tuner_reset(fe); |
d0962382 DH |
967 | if (rc < 0) |
968 | goto fail; | |
969 | ||
970 | /* BASE firmwares are all std0 */ | |
971 | std0 = 0; | |
595a83f4 | 972 | rc = load_firmware(fe, BASE, &std0); |
d0962382 | 973 | if (rc < 0) { |
941830c9 | 974 | printk(KERN_ERR "Error %d while loading base firmware\n", rc); |
d0962382 DH |
975 | goto fail; |
976 | } | |
977 | ||
978 | /* Load INIT1, if needed */ | |
979 | dprintk(1, "Load init1 firmware, if exists\n"); | |
980 | ||
595a83f4 | 981 | rc = load_firmware(fe, BASE | INIT1, &std0); |
d0962382 | 982 | if (rc == -ENOENT) |
595a83f4 | 983 | rc = load_firmware(fe, BASE | INIT1, &std0); |
d0962382 DH |
984 | if (rc < 0 && rc != -ENOENT) { |
985 | tuner_err("Error %d while loading init1 firmware\n", | |
986 | rc); | |
987 | goto fail; | |
988 | } | |
989 | ||
990 | skip_base: | |
991 | /* | |
992 | * No need to reload standard specific firmware if base firmware | |
993 | * was not reloaded and requested video standards have not changed. | |
994 | */ | |
995 | if (priv->cur_fw.type == (BASE | new_fw.type) && | |
996 | priv->cur_fw.std_req == std) { | |
997 | dprintk(1, "Std-specific firmware already loaded.\n"); | |
998 | goto skip_std_specific; | |
999 | } | |
1000 | ||
1001 | /* Reloading std-specific firmware forces a SCODE update */ | |
1002 | priv->cur_fw.scode_table = 0; | |
1003 | ||
ee4c3cd6 | 1004 | /* Load the standard firmware */ |
d0962382 | 1005 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
d0962382 DH |
1006 | |
1007 | if (rc < 0) | |
1008 | goto fail; | |
1009 | ||
1010 | skip_std_specific: | |
1011 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
1012 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
1013 | dprintk(1, "SCODE firmware already loaded.\n"); | |
1014 | goto check_device; | |
1015 | } | |
1016 | ||
d0962382 | 1017 | /* Load SCODE firmware, if exists */ |
d0962382 DH |
1018 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
1019 | new_fw.int_freq, new_fw.scode_nr); | |
341747be | 1020 | if (rc != 0) |
ee4c3cd6 | 1021 | dprintk(1, "load scode failed %d\n", rc); |
d0962382 DH |
1022 | |
1023 | check_device: | |
1024 | rc = xc4000_readreg(priv, XREG_PRODUCT_ID, &hwmodel); | |
1025 | ||
799ed11a | 1026 | if (xc_get_version(priv, &hw_major, &hw_minor, &fw_major, |
341747be | 1027 | &fw_minor) != 0) { |
941830c9 | 1028 | printk(KERN_ERR "Unable to read tuner registers.\n"); |
d0962382 DH |
1029 | goto fail; |
1030 | } | |
1031 | ||
1032 | dprintk(1, "Device is Xceive %d version %d.%d, " | |
1033 | "firmware version %d.%d\n", | |
1034 | hwmodel, hw_major, hw_minor, fw_major, fw_minor); | |
1035 | ||
1036 | /* Check firmware version against what we downloaded. */ | |
09f46342 | 1037 | if (priv->firm_version != ((fw_major << 8) | fw_minor)) { |
1038 | printk(KERN_WARNING | |
1039 | "Incorrect readback of firmware version %d.%d.\n", | |
1040 | fw_major, fw_minor); | |
d0962382 DH |
1041 | goto fail; |
1042 | } | |
d0962382 DH |
1043 | |
1044 | /* Check that the tuner hardware model remains consistent over time. */ | |
7db98fe6 IV |
1045 | if (priv->hwmodel == 0 && |
1046 | (hwmodel == XC_PRODUCT_ID_XC4000 || | |
1047 | hwmodel == XC_PRODUCT_ID_XC4100)) { | |
d0962382 | 1048 | priv->hwmodel = hwmodel; |
09f46342 | 1049 | priv->hwvers = (hw_major << 8) | hw_minor; |
d0962382 | 1050 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || |
09f46342 | 1051 | priv->hwvers != ((hw_major << 8) | hw_minor)) { |
1052 | printk(KERN_WARNING | |
1053 | "Read invalid device hardware information - tuner " | |
fbe4a29f | 1054 | "hung?\n"); |
d0962382 DH |
1055 | goto fail; |
1056 | } | |
1057 | ||
1058 | memcpy(&priv->cur_fw, &new_fw, sizeof(priv->cur_fw)); | |
1059 | ||
1060 | /* | |
1061 | * By setting BASE in cur_fw.type only after successfully loading all | |
1062 | * firmwares, we can: | |
1063 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
1064 | * 2. Tell whether BASE firmware was just changed the next time through. | |
1065 | */ | |
1066 | priv->cur_fw.type |= BASE; | |
1067 | ||
1068 | return 0; | |
1069 | ||
1070 | fail: | |
1071 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
1072 | if (!is_retry) { | |
1073 | msleep(50); | |
1074 | is_retry = 1; | |
1075 | dprintk(1, "Retrying firmware load\n"); | |
1076 | goto retry; | |
1077 | } | |
1078 | ||
1079 | if (rc == -ENOENT) | |
1080 | rc = -EINVAL; | |
1081 | return rc; | |
1082 | } | |
11091a31 | 1083 | |
8d009a0c DF |
1084 | static void xc_debug_dump(struct xc4000_priv *priv) |
1085 | { | |
fbe4a29f IV |
1086 | u16 adc_envelope; |
1087 | u32 freq_error_hz = 0; | |
1088 | u16 lock_status; | |
1089 | u32 hsync_freq_hz = 0; | |
1090 | u16 frame_lines; | |
1091 | u16 quality; | |
1092 | u8 hw_majorversion = 0, hw_minorversion = 0; | |
1093 | u8 fw_majorversion = 0, fw_minorversion = 0; | |
8d009a0c | 1094 | |
341747be | 1095 | xc_get_adc_envelope(priv, &adc_envelope); |
8d009a0c DF |
1096 | dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope); |
1097 | ||
1098 | xc_get_frequency_error(priv, &freq_error_hz); | |
1099 | dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz); | |
1100 | ||
fbe4a29f | 1101 | xc_get_lock_status(priv, &lock_status); |
8d009a0c DF |
1102 | dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n", |
1103 | lock_status); | |
1104 | ||
fbe4a29f IV |
1105 | xc_get_version(priv, &hw_majorversion, &hw_minorversion, |
1106 | &fw_majorversion, &fw_minorversion); | |
8d009a0c DF |
1107 | dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n", |
1108 | hw_majorversion, hw_minorversion, | |
1109 | fw_majorversion, fw_minorversion); | |
1110 | ||
f4312e2f IV |
1111 | if (priv->video_standard < XC4000_DTV6) { |
1112 | xc_get_hsync_freq(priv, &hsync_freq_hz); | |
1113 | dprintk(1, "*** Horizontal sync frequency = %d Hz\n", | |
1114 | hsync_freq_hz); | |
8d009a0c | 1115 | |
f4312e2f IV |
1116 | xc_get_frame_lines(priv, &frame_lines); |
1117 | dprintk(1, "*** Frame lines = %d\n", frame_lines); | |
1118 | } | |
8d009a0c | 1119 | |
fbe4a29f | 1120 | xc_get_quality(priv, &quality); |
8d009a0c DF |
1121 | dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality); |
1122 | } | |
1123 | ||
14d24d14 | 1124 | static int xc4000_set_params(struct dvb_frontend *fe) |
8d009a0c | 1125 | { |
40d6f2b8 MCC |
1126 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
1127 | u32 delsys = c->delivery_system; | |
1128 | u32 bw = c->bandwidth_hz; | |
8d009a0c | 1129 | struct xc4000_priv *priv = fe->tuner_priv; |
ed23db32 | 1130 | unsigned int type; |
5614942b | 1131 | int ret = -EREMOTEIO; |
8d009a0c | 1132 | |
40d6f2b8 | 1133 | dprintk(1, "%s() frequency=%d (Hz)\n", __func__, c->frequency); |
8d009a0c | 1134 | |
5614942b IV |
1135 | mutex_lock(&priv->lock); |
1136 | ||
40d6f2b8 MCC |
1137 | switch (delsys) { |
1138 | case SYS_ATSC: | |
1139 | dprintk(1, "%s() VSB modulation\n", __func__); | |
1140 | priv->rf_mode = XC_RF_MODE_AIR; | |
1141 | priv->freq_hz = c->frequency - 1750000; | |
40d6f2b8 MCC |
1142 | priv->video_standard = XC4000_DTV6; |
1143 | type = DTV6; | |
1144 | break; | |
1145 | case SYS_DVBC_ANNEX_B: | |
1146 | dprintk(1, "%s() QAM modulation\n", __func__); | |
1147 | priv->rf_mode = XC_RF_MODE_CABLE; | |
1148 | priv->freq_hz = c->frequency - 1750000; | |
40d6f2b8 MCC |
1149 | priv->video_standard = XC4000_DTV6; |
1150 | type = DTV6; | |
1151 | break; | |
1152 | case SYS_DVBT: | |
1153 | case SYS_DVBT2: | |
8d009a0c | 1154 | dprintk(1, "%s() OFDM\n", __func__); |
40d6f2b8 MCC |
1155 | if (bw == 0) { |
1156 | if (c->frequency < 400000000) { | |
40d6f2b8 MCC |
1157 | priv->freq_hz = c->frequency - 2250000; |
1158 | } else { | |
40d6f2b8 MCC |
1159 | priv->freq_hz = c->frequency - 2750000; |
1160 | } | |
1161 | priv->video_standard = XC4000_DTV7_8; | |
1162 | type = DTV78; | |
1163 | } else if (bw <= 6000000) { | |
ed23db32 | 1164 | priv->video_standard = XC4000_DTV6; |
40d6f2b8 | 1165 | priv->freq_hz = c->frequency - 1750000; |
ed23db32 | 1166 | type = DTV6; |
40d6f2b8 | 1167 | } else if (bw <= 7000000) { |
f0ef7c88 | 1168 | priv->video_standard = XC4000_DTV7; |
40d6f2b8 | 1169 | priv->freq_hz = c->frequency - 2250000; |
ed23db32 | 1170 | type = DTV7; |
40d6f2b8 | 1171 | } else { |
ed23db32 | 1172 | priv->video_standard = XC4000_DTV8; |
40d6f2b8 | 1173 | priv->freq_hz = c->frequency - 2750000; |
ed23db32 | 1174 | type = DTV8; |
8d009a0c DF |
1175 | } |
1176 | priv->rf_mode = XC_RF_MODE_AIR; | |
40d6f2b8 MCC |
1177 | break; |
1178 | default: | |
1179 | printk(KERN_ERR "xc4000 delivery system not supported!\n"); | |
5614942b IV |
1180 | ret = -EINVAL; |
1181 | goto fail; | |
8d009a0c DF |
1182 | } |
1183 | ||
1184 | dprintk(1, "%s() frequency=%d (compensated)\n", | |
1185 | __func__, priv->freq_hz); | |
1186 | ||
ed23db32 | 1187 | /* Make sure the correct firmware type is loaded */ |
341747be | 1188 | if (check_firmware(fe, type, 0, priv->if_khz) != 0) |
5614942b | 1189 | goto fail; |
ed23db32 | 1190 | |
c6f56e7d MCC |
1191 | priv->bandwidth = c->bandwidth_hz; |
1192 | ||
341747be | 1193 | ret = xc_set_signal_source(priv, priv->rf_mode); |
1194 | if (ret != 0) { | |
1195 | printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n", | |
5614942b IV |
1196 | priv->rf_mode); |
1197 | goto fail; | |
30f544ec IV |
1198 | } else { |
1199 | u16 video_mode, audio_mode; | |
341747be | 1200 | video_mode = xc4000_standard[priv->video_standard].video_mode; |
1201 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | |
30f544ec IV |
1202 | if (type == DTV6 && priv->firm_version != 0x0102) |
1203 | video_mode |= 0x0001; | |
341747be | 1204 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); |
1205 | if (ret != 0) { | |
1206 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | |
30f544ec IV |
1207 | /* DJH - do not return when it fails... */ |
1208 | /* goto fail; */ | |
1209 | } | |
8d009a0c DF |
1210 | } |
1211 | ||
8edeb6eb | 1212 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) |
1213 | ret = 0; | |
1214 | if (priv->dvb_amplitude != 0) { | |
30f544ec | 1215 | if (xc_write_reg(priv, XREG_AMPLITUDE, |
8edeb6eb | 1216 | (priv->firm_version != 0x0102 || |
1217 | priv->dvb_amplitude != 134 ? | |
1218 | priv->dvb_amplitude : 132)) != 0) | |
30f544ec | 1219 | ret = -EREMOTEIO; |
8edeb6eb | 1220 | } |
1221 | if (priv->set_smoothedcvbs != 0) { | |
30f544ec IV |
1222 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) |
1223 | ret = -EREMOTEIO; | |
8edeb6eb | 1224 | } |
1225 | if (ret != 0) { | |
1226 | printk(KERN_ERR "xc4000: setting registers failed\n"); | |
1227 | /* goto fail; */ | |
8d009a0c | 1228 | } |
30f544ec | 1229 | |
e75873c1 | 1230 | xc_tune_channel(priv, priv->freq_hz); |
8d009a0c | 1231 | |
5614942b IV |
1232 | ret = 0; |
1233 | ||
1234 | fail: | |
1235 | mutex_unlock(&priv->lock); | |
1236 | ||
1237 | return ret; | |
8d009a0c DF |
1238 | } |
1239 | ||
8d009a0c DF |
1240 | static int xc4000_set_analog_params(struct dvb_frontend *fe, |
1241 | struct analog_parameters *params) | |
1242 | { | |
1243 | struct xc4000_priv *priv = fe->tuner_priv; | |
818a1776 | 1244 | unsigned int type = 0; |
5614942b | 1245 | int ret = -EREMOTEIO; |
8d009a0c | 1246 | |
818a1776 IV |
1247 | if (params->mode == V4L2_TUNER_RADIO) { |
1248 | dprintk(1, "%s() frequency=%d (in units of 62.5Hz)\n", | |
1249 | __func__, params->frequency); | |
1250 | ||
1251 | mutex_lock(&priv->lock); | |
1252 | ||
1253 | params->std = 0; | |
1254 | priv->freq_hz = params->frequency * 125L / 2; | |
1255 | ||
1256 | if (audio_std & XC4000_AUDIO_STD_INPUT1) { | |
1257 | priv->video_standard = XC4000_FM_Radio_INPUT1; | |
1258 | type = FM | INPUT1; | |
1259 | } else { | |
1260 | priv->video_standard = XC4000_FM_Radio_INPUT2; | |
1261 | type = FM | INPUT2; | |
1262 | } | |
1263 | ||
1264 | goto tune_channel; | |
1265 | } | |
1266 | ||
8d009a0c DF |
1267 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", |
1268 | __func__, params->frequency); | |
1269 | ||
5614942b IV |
1270 | mutex_lock(&priv->lock); |
1271 | ||
8d009a0c DF |
1272 | /* params->frequency is in units of 62.5khz */ |
1273 | priv->freq_hz = params->frequency * 62500; | |
1274 | ||
818a1776 IV |
1275 | params->std &= V4L2_STD_ALL; |
1276 | /* if std is not defined, choose one */ | |
1277 | if (!params->std) | |
1278 | params->std = V4L2_STD_PAL_BG; | |
1279 | ||
1280 | if (audio_std & XC4000_AUDIO_STD_MONO) | |
1281 | type = MONO; | |
1282 | ||
8d009a0c | 1283 | if (params->std & V4L2_STD_MN) { |
818a1776 IV |
1284 | params->std = V4L2_STD_MN; |
1285 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1286 | priv->video_standard = XC4000_MN_NTSC_PAL_Mono; | |
1287 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | |
1288 | params->std |= V4L2_STD_A2; | |
1289 | priv->video_standard = XC4000_MN_NTSC_PAL_A2; | |
1290 | } else { | |
1291 | params->std |= V4L2_STD_BTSC; | |
1292 | priv->video_standard = XC4000_MN_NTSC_PAL_BTSC; | |
1293 | } | |
8d009a0c DF |
1294 | goto tune_channel; |
1295 | } | |
1296 | ||
1297 | if (params->std & V4L2_STD_PAL_BG) { | |
818a1776 IV |
1298 | params->std = V4L2_STD_PAL_BG; |
1299 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1300 | priv->video_standard = XC4000_BG_PAL_MONO; | |
1301 | } else if (!(audio_std & XC4000_AUDIO_STD_A2)) { | |
1302 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | |
1303 | params->std |= V4L2_STD_NICAM_A; | |
1304 | priv->video_standard = XC4000_BG_PAL_NICAM; | |
1305 | } else { | |
1306 | params->std |= V4L2_STD_NICAM_B; | |
1307 | priv->video_standard = XC4000_BG_PAL_NICAM; | |
1308 | } | |
1309 | } else { | |
1310 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | |
1311 | params->std |= V4L2_STD_A2_A; | |
1312 | priv->video_standard = XC4000_BG_PAL_A2; | |
1313 | } else { | |
1314 | params->std |= V4L2_STD_A2_B; | |
1315 | priv->video_standard = XC4000_BG_PAL_A2; | |
1316 | } | |
1317 | } | |
8d009a0c DF |
1318 | goto tune_channel; |
1319 | } | |
1320 | ||
1321 | if (params->std & V4L2_STD_PAL_I) { | |
1322 | /* default to NICAM audio standard */ | |
818a1776 | 1323 | params->std = V4L2_STD_PAL_I | V4L2_STD_NICAM; |
941830c9 | 1324 | if (audio_std & XC4000_AUDIO_STD_MONO) |
818a1776 | 1325 | priv->video_standard = XC4000_I_PAL_NICAM_MONO; |
941830c9 | 1326 | else |
818a1776 | 1327 | priv->video_standard = XC4000_I_PAL_NICAM; |
8d009a0c DF |
1328 | goto tune_channel; |
1329 | } | |
1330 | ||
1331 | if (params->std & V4L2_STD_PAL_DK) { | |
818a1776 IV |
1332 | params->std = V4L2_STD_PAL_DK; |
1333 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1334 | priv->video_standard = XC4000_DK_PAL_MONO; | |
1335 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | |
1336 | params->std |= V4L2_STD_A2; | |
1337 | priv->video_standard = XC4000_DK_PAL_A2; | |
1338 | } else { | |
1339 | params->std |= V4L2_STD_NICAM; | |
1340 | priv->video_standard = XC4000_DK_PAL_NICAM; | |
1341 | } | |
8d009a0c DF |
1342 | goto tune_channel; |
1343 | } | |
1344 | ||
1345 | if (params->std & V4L2_STD_SECAM_DK) { | |
818a1776 IV |
1346 | /* default to A2 audio standard */ |
1347 | params->std = V4L2_STD_SECAM_DK | V4L2_STD_A2; | |
1348 | if (audio_std & XC4000_AUDIO_STD_L) { | |
1349 | type = 0; | |
1350 | priv->video_standard = XC4000_DK_SECAM_NICAM; | |
1351 | } else if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1352 | priv->video_standard = XC4000_DK_SECAM_A2MONO; | |
1353 | } else if (audio_std & XC4000_AUDIO_STD_K3) { | |
1354 | params->std |= V4L2_STD_SECAM_K3; | |
1355 | priv->video_standard = XC4000_DK_SECAM_A2LDK3; | |
1356 | } else { | |
1357 | priv->video_standard = XC4000_DK_SECAM_A2DK1; | |
1358 | } | |
8d009a0c DF |
1359 | goto tune_channel; |
1360 | } | |
1361 | ||
1362 | if (params->std & V4L2_STD_SECAM_L) { | |
818a1776 IV |
1363 | /* default to NICAM audio standard */ |
1364 | type = 0; | |
1365 | params->std = V4L2_STD_SECAM_L | V4L2_STD_NICAM; | |
ed23db32 | 1366 | priv->video_standard = XC4000_L_SECAM_NICAM; |
8d009a0c DF |
1367 | goto tune_channel; |
1368 | } | |
1369 | ||
1370 | if (params->std & V4L2_STD_SECAM_LC) { | |
818a1776 IV |
1371 | /* default to NICAM audio standard */ |
1372 | type = 0; | |
1373 | params->std = V4L2_STD_SECAM_LC | V4L2_STD_NICAM; | |
ed23db32 | 1374 | priv->video_standard = XC4000_LC_SECAM_NICAM; |
8d009a0c DF |
1375 | goto tune_channel; |
1376 | } | |
1377 | ||
1378 | tune_channel: | |
341747be | 1379 | /* FIXME: it could be air. */ |
818a1776 | 1380 | priv->rf_mode = XC_RF_MODE_CABLE; |
ed23db32 | 1381 | |
818a1776 | 1382 | if (check_firmware(fe, type, params->std, |
341747be | 1383 | xc4000_standard[priv->video_standard].int_freq) != 0) |
5614942b | 1384 | goto fail; |
ed23db32 | 1385 | |
341747be | 1386 | ret = xc_set_signal_source(priv, priv->rf_mode); |
1387 | if (ret != 0) { | |
8d009a0c | 1388 | printk(KERN_ERR |
341747be | 1389 | "xc4000: xc_set_signal_source(%d) failed\n", |
5614942b IV |
1390 | priv->rf_mode); |
1391 | goto fail; | |
30f544ec IV |
1392 | } else { |
1393 | u16 video_mode, audio_mode; | |
341747be | 1394 | video_mode = xc4000_standard[priv->video_standard].video_mode; |
1395 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | |
30f544ec | 1396 | if (priv->video_standard < XC4000_BG_PAL_A2) { |
341747be | 1397 | if (type & NOGD) |
30f544ec IV |
1398 | video_mode &= 0xFF7F; |
1399 | } else if (priv->video_standard < XC4000_I_PAL_NICAM) { | |
8edeb6eb | 1400 | if (priv->firm_version == 0x0102) |
30f544ec | 1401 | video_mode &= 0xFEFF; |
923137a4 IV |
1402 | if (audio_std & XC4000_AUDIO_STD_B) |
1403 | video_mode |= 0x0080; | |
30f544ec | 1404 | } |
341747be | 1405 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); |
1406 | if (ret != 0) { | |
1407 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | |
30f544ec IV |
1408 | goto fail; |
1409 | } | |
8d009a0c DF |
1410 | } |
1411 | ||
8edeb6eb | 1412 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) |
1413 | ret = 0; | |
1414 | if (xc_write_reg(priv, XREG_AMPLITUDE, 1) != 0) | |
1415 | ret = -EREMOTEIO; | |
1416 | if (priv->set_smoothedcvbs != 0) { | |
30f544ec IV |
1417 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) |
1418 | ret = -EREMOTEIO; | |
8edeb6eb | 1419 | } |
1420 | if (ret != 0) { | |
1421 | printk(KERN_ERR "xc4000: setting registers failed\n"); | |
1422 | goto fail; | |
8d009a0c DF |
1423 | } |
1424 | ||
e75873c1 | 1425 | xc_tune_channel(priv, priv->freq_hz); |
8d009a0c | 1426 | |
5614942b IV |
1427 | ret = 0; |
1428 | ||
1429 | fail: | |
1430 | mutex_unlock(&priv->lock); | |
1431 | ||
1432 | return ret; | |
8d009a0c DF |
1433 | } |
1434 | ||
1435 | static int xc4000_get_frequency(struct dvb_frontend *fe, u32 *freq) | |
1436 | { | |
1437 | struct xc4000_priv *priv = fe->tuner_priv; | |
f4312e2f | 1438 | |
8d009a0c | 1439 | *freq = priv->freq_hz; |
f4312e2f IV |
1440 | |
1441 | if (debug) { | |
1442 | mutex_lock(&priv->lock); | |
1443 | if ((priv->cur_fw.type | |
1444 | & (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) { | |
1445 | u16 snr = 0; | |
1446 | if (xc4000_readreg(priv, XREG_SNR, &snr) == 0) { | |
1447 | mutex_unlock(&priv->lock); | |
1448 | dprintk(1, "%s() freq = %u, SNR = %d\n", | |
1449 | __func__, *freq, snr); | |
1450 | return 0; | |
1451 | } | |
1452 | } | |
1453 | mutex_unlock(&priv->lock); | |
1454 | } | |
1455 | ||
1456 | dprintk(1, "%s()\n", __func__); | |
1457 | ||
8d009a0c DF |
1458 | return 0; |
1459 | } | |
1460 | ||
1461 | static int xc4000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) | |
1462 | { | |
1463 | struct xc4000_priv *priv = fe->tuner_priv; | |
1464 | dprintk(1, "%s()\n", __func__); | |
1465 | ||
1466 | *bw = priv->bandwidth; | |
1467 | return 0; | |
1468 | } | |
1469 | ||
1470 | static int xc4000_get_status(struct dvb_frontend *fe, u32 *status) | |
1471 | { | |
1472 | struct xc4000_priv *priv = fe->tuner_priv; | |
fbe4a29f | 1473 | u16 lock_status = 0; |
8d009a0c | 1474 | |
5614942b IV |
1475 | mutex_lock(&priv->lock); |
1476 | ||
f4312e2f IV |
1477 | if (priv->cur_fw.type & BASE) |
1478 | xc_get_lock_status(priv, &lock_status); | |
8d009a0c | 1479 | |
f4312e2f IV |
1480 | *status = (lock_status == 1 ? |
1481 | TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO : 0); | |
1482 | if (priv->cur_fw.type & (DTV6 | DTV7 | DTV78 | DTV8)) | |
1483 | *status &= (~TUNER_STATUS_STEREO); | |
5614942b | 1484 | |
f4312e2f | 1485 | mutex_unlock(&priv->lock); |
8d009a0c | 1486 | |
f4312e2f | 1487 | dprintk(2, "%s() lock_status = %d\n", __func__, lock_status); |
8d009a0c DF |
1488 | |
1489 | return 0; | |
1490 | } | |
1491 | ||
8d009a0c DF |
1492 | static int xc4000_sleep(struct dvb_frontend *fe) |
1493 | { | |
5272f6b1 | 1494 | struct xc4000_priv *priv = fe->tuner_priv; |
341747be | 1495 | int ret = 0; |
5272f6b1 IV |
1496 | |
1497 | dprintk(1, "%s()\n", __func__); | |
1498 | ||
1499 | mutex_lock(&priv->lock); | |
1500 | ||
1501 | /* Avoid firmware reload on slow devices */ | |
1502 | if ((no_poweroff == 2 || | |
8edeb6eb | 1503 | (no_poweroff == 0 && priv->default_pm != 0)) && |
5272f6b1 IV |
1504 | (priv->cur_fw.type & BASE) != 0) { |
1505 | /* force reset and firmware reload */ | |
1506 | priv->cur_fw.type = XC_POWERED_DOWN; | |
1507 | ||
341747be | 1508 | if (xc_write_reg(priv, XREG_POWER_DOWN, 0) != 0) { |
5272f6b1 IV |
1509 | printk(KERN_ERR |
1510 | "xc4000: %s() unable to shutdown tuner\n", | |
1511 | __func__); | |
1512 | ret = -EREMOTEIO; | |
1513 | } | |
341747be | 1514 | msleep(20); |
5272f6b1 IV |
1515 | } |
1516 | ||
1517 | mutex_unlock(&priv->lock); | |
1518 | ||
1519 | return ret; | |
8d009a0c DF |
1520 | } |
1521 | ||
1522 | static int xc4000_init(struct dvb_frontend *fe) | |
1523 | { | |
8d009a0c DF |
1524 | dprintk(1, "%s()\n", __func__); |
1525 | ||
8d009a0c DF |
1526 | return 0; |
1527 | } | |
1528 | ||
1529 | static int xc4000_release(struct dvb_frontend *fe) | |
1530 | { | |
1531 | struct xc4000_priv *priv = fe->tuner_priv; | |
1532 | ||
1533 | dprintk(1, "%s()\n", __func__); | |
1534 | ||
1535 | mutex_lock(&xc4000_list_mutex); | |
1536 | ||
1537 | if (priv) | |
1538 | hybrid_tuner_release_state(priv); | |
1539 | ||
1540 | mutex_unlock(&xc4000_list_mutex); | |
1541 | ||
1542 | fe->tuner_priv = NULL; | |
1543 | ||
1544 | return 0; | |
1545 | } | |
1546 | ||
1547 | static const struct dvb_tuner_ops xc4000_tuner_ops = { | |
1548 | .info = { | |
1549 | .name = "Xceive XC4000", | |
1550 | .frequency_min = 1000000, | |
1551 | .frequency_max = 1023000000, | |
1552 | .frequency_step = 50000, | |
1553 | }, | |
1554 | ||
1555 | .release = xc4000_release, | |
1556 | .init = xc4000_init, | |
1557 | .sleep = xc4000_sleep, | |
1558 | ||
1559 | .set_params = xc4000_set_params, | |
1560 | .set_analog_params = xc4000_set_analog_params, | |
1561 | .get_frequency = xc4000_get_frequency, | |
1562 | .get_bandwidth = xc4000_get_bandwidth, | |
1563 | .get_status = xc4000_get_status | |
1564 | }; | |
1565 | ||
1566 | struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe, | |
1567 | struct i2c_adapter *i2c, | |
1568 | struct xc4000_config *cfg) | |
1569 | { | |
1570 | struct xc4000_priv *priv = NULL; | |
fbe4a29f IV |
1571 | int instance; |
1572 | u16 id = 0; | |
8d009a0c DF |
1573 | |
1574 | dprintk(1, "%s(%d-%04x)\n", __func__, | |
1575 | i2c ? i2c_adapter_id(i2c) : -1, | |
1576 | cfg ? cfg->i2c_address : -1); | |
1577 | ||
1578 | mutex_lock(&xc4000_list_mutex); | |
1579 | ||
1580 | instance = hybrid_tuner_request_state(struct xc4000_priv, priv, | |
1581 | hybrid_tuner_instance_list, | |
1582 | i2c, cfg->i2c_address, "xc4000"); | |
1583 | switch (instance) { | |
1584 | case 0: | |
1585 | goto fail; | |
1586 | break; | |
1587 | case 1: | |
1588 | /* new tuner instance */ | |
c6f56e7d | 1589 | priv->bandwidth = 6000000; |
8edeb6eb | 1590 | /* set default configuration */ |
1591 | priv->if_khz = 4560; | |
1592 | priv->default_pm = 0; | |
1593 | priv->dvb_amplitude = 134; | |
1594 | priv->set_smoothedcvbs = 1; | |
5614942b | 1595 | mutex_init(&priv->lock); |
8d009a0c DF |
1596 | fe->tuner_priv = priv; |
1597 | break; | |
1598 | default: | |
1599 | /* existing tuner instance */ | |
1600 | fe->tuner_priv = priv; | |
1601 | break; | |
1602 | } | |
1603 | ||
0b402132 | 1604 | if (cfg->if_khz != 0) { |
8edeb6eb | 1605 | /* copy configuration if provided by the caller */ |
8d009a0c | 1606 | priv->if_khz = cfg->if_khz; |
8edeb6eb | 1607 | priv->default_pm = cfg->default_pm; |
1608 | priv->dvb_amplitude = cfg->dvb_amplitude; | |
1609 | priv->set_smoothedcvbs = cfg->set_smoothedcvbs; | |
8d009a0c DF |
1610 | } |
1611 | ||
1612 | /* Check if firmware has been loaded. It is possible that another | |
1613 | instance of the driver has loaded the firmware. | |
1614 | */ | |
1615 | ||
027fd361 | 1616 | if (instance == 1) { |
341747be | 1617 | if (xc4000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) |
8d009a0c | 1618 | goto fail; |
027fd361 IV |
1619 | } else { |
1620 | id = ((priv->cur_fw.type & BASE) != 0 ? | |
1621 | priv->hwmodel : XC_PRODUCT_ID_FW_NOT_LOADED); | |
1622 | } | |
8d009a0c DF |
1623 | |
1624 | switch (id) { | |
7db98fe6 IV |
1625 | case XC_PRODUCT_ID_XC4000: |
1626 | case XC_PRODUCT_ID_XC4100: | |
8d009a0c DF |
1627 | printk(KERN_INFO |
1628 | "xc4000: Successfully identified at address 0x%02x\n", | |
1629 | cfg->i2c_address); | |
1630 | printk(KERN_INFO | |
1631 | "xc4000: Firmware has been loaded previously\n"); | |
1632 | break; | |
1633 | case XC_PRODUCT_ID_FW_NOT_LOADED: | |
1634 | printk(KERN_INFO | |
1635 | "xc4000: Successfully identified at address 0x%02x\n", | |
1636 | cfg->i2c_address); | |
1637 | printk(KERN_INFO | |
1638 | "xc4000: Firmware has not been loaded previously\n"); | |
1639 | break; | |
1640 | default: | |
1641 | printk(KERN_ERR | |
1642 | "xc4000: Device not found at addr 0x%02x (0x%x)\n", | |
1643 | cfg->i2c_address, id); | |
1644 | goto fail; | |
1645 | } | |
1646 | ||
1647 | mutex_unlock(&xc4000_list_mutex); | |
1648 | ||
1649 | memcpy(&fe->ops.tuner_ops, &xc4000_tuner_ops, | |
1650 | sizeof(struct dvb_tuner_ops)); | |
1651 | ||
027fd361 IV |
1652 | if (instance == 1) { |
1653 | int ret; | |
1654 | mutex_lock(&priv->lock); | |
1655 | ret = xc4000_fwupload(fe); | |
1656 | mutex_unlock(&priv->lock); | |
341747be | 1657 | if (ret != 0) |
027fd361 IV |
1658 | goto fail2; |
1659 | } | |
11091a31 | 1660 | |
8d009a0c DF |
1661 | return fe; |
1662 | fail: | |
1663 | mutex_unlock(&xc4000_list_mutex); | |
027fd361 | 1664 | fail2: |
8d009a0c DF |
1665 | xc4000_release(fe); |
1666 | return NULL; | |
1667 | } | |
1668 | EXPORT_SYMBOL(xc4000_attach); | |
1669 | ||
1670 | MODULE_AUTHOR("Steven Toth, Davide Ferri"); | |
1671 | MODULE_DESCRIPTION("Xceive xc4000 silicon tuner driver"); | |
1672 | MODULE_LICENSE("GPL"); |