Commit | Line | Data |
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8d009a0c DF |
1 | /* |
2 | * Driver for Xceive XC4000 "QAM/8VSB single chip tuner" | |
3 | * | |
4 | * Copyright (c) 2007 Xceive Corporation | |
5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> | |
6 | * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com> | |
7 | * Copyright (c) 2009 Davide Ferri <d.ferri@zero11.it> | |
341747be | 8 | * Copyright (c) 2010 Istvan Varga <istvan_v@mailbox.hu> |
8d009a0c DF |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
8d009a0c DF |
18 | * GNU General Public License for more details. |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #include <linux/module.h> | |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/videodev2.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/dvb/frontend.h> | |
30 | #include <linux/i2c.h> | |
5614942b | 31 | #include <linux/mutex.h> |
11091a31 | 32 | #include <asm/unaligned.h> |
8d009a0c DF |
33 | |
34 | #include "dvb_frontend.h" | |
35 | ||
36 | #include "xc4000.h" | |
37 | #include "tuner-i2c.h" | |
11091a31 | 38 | #include "tuner-xc2028-types.h" |
8d009a0c | 39 | |
4922cec5 | 40 | static int debug; |
8d009a0c | 41 | module_param(debug, int, 0644); |
341747be | 42 | MODULE_PARM_DESC(debug, "Debugging level (0 to 2, default: 0 (off))."); |
8d009a0c DF |
43 | |
44 | static int no_poweroff; | |
45 | module_param(no_poweroff, int, 0644); | |
341747be | 46 | MODULE_PARM_DESC(no_poweroff, "Power management (1: disabled, 2: enabled, " |
47 | "0 (default): use device-specific default mode)."); | |
923137a4 IV |
48 | |
49 | static int audio_std; | |
50 | module_param(audio_std, int, 0644); | |
341747be | 51 | MODULE_PARM_DESC(audio_std, "Audio standard. XC4000 audio decoder explicitly " |
52 | "needs to know what audio standard is needed for some video standards " | |
53 | "with audio A2 or NICAM. The valid settings are a sum of:\n" | |
54 | " 1: use NICAM/B or A2/B instead of NICAM/A or A2/A\n" | |
55 | " 2: use A2 instead of NICAM or BTSC\n" | |
56 | " 4: use SECAM/K3 instead of K1\n" | |
57 | " 8: use PAL-D/K audio for SECAM-D/K\n" | |
58 | "16: use FM radio input 1 instead of input 2\n" | |
59 | "32: use mono audio (the lower three bits are ignored)"); | |
fa285bc1 IV |
60 | |
61 | static char firmware_name[30]; | |
62 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); | |
341747be | 63 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " |
64 | "default firmware name."); | |
fa285bc1 | 65 | |
8d009a0c DF |
66 | static DEFINE_MUTEX(xc4000_list_mutex); |
67 | static LIST_HEAD(hybrid_tuner_instance_list); | |
68 | ||
69 | #define dprintk(level, fmt, arg...) if (debug >= level) \ | |
70 | printk(KERN_INFO "%s: " fmt, "xc4000", ## arg) | |
71 | ||
11091a31 DH |
72 | /* struct for storing firmware table */ |
73 | struct firmware_description { | |
74 | unsigned int type; | |
75 | v4l2_std_id id; | |
76 | __u16 int_freq; | |
77 | unsigned char *ptr; | |
78 | unsigned int size; | |
79 | }; | |
80 | ||
81 | struct firmware_properties { | |
82 | unsigned int type; | |
83 | v4l2_std_id id; | |
84 | v4l2_std_id std_req; | |
85 | __u16 int_freq; | |
86 | unsigned int scode_table; | |
e3bb7c60 | 87 | int scode_nr; |
11091a31 | 88 | }; |
8d009a0c DF |
89 | |
90 | struct xc4000_priv { | |
91 | struct tuner_i2c_props i2c_props; | |
92 | struct list_head hybrid_tuner_instance_list; | |
11091a31 | 93 | struct firmware_description *firm; |
fbe4a29f | 94 | int firm_size; |
fbe4a29f IV |
95 | u32 if_khz; |
96 | u32 freq_hz; | |
97 | u32 bandwidth; | |
98 | u8 video_standard; | |
99 | u8 rf_mode; | |
8edeb6eb | 100 | u8 default_pm; |
101 | u8 dvb_amplitude; | |
102 | u8 set_smoothedcvbs; | |
fbe4a29f | 103 | u8 ignore_i2c_write_errors; |
8edeb6eb | 104 | __u16 firm_version; |
d0962382 | 105 | struct firmware_properties cur_fw; |
fbe4a29f IV |
106 | __u16 hwmodel; |
107 | __u16 hwvers; | |
5614942b | 108 | struct mutex lock; |
8d009a0c DF |
109 | }; |
110 | ||
341747be | 111 | #define XC4000_AUDIO_STD_B 1 |
112 | #define XC4000_AUDIO_STD_A2 2 | |
113 | #define XC4000_AUDIO_STD_K3 4 | |
114 | #define XC4000_AUDIO_STD_L 8 | |
115 | #define XC4000_AUDIO_STD_INPUT1 16 | |
116 | #define XC4000_AUDIO_STD_MONO 32 | |
117 | ||
118 | #define XC4000_DEFAULT_FIRMWARE "dvb-fe-xc4000-1.4.fw" | |
119 | ||
8d009a0c | 120 | /* Misc Defines */ |
4911085f | 121 | #define MAX_TV_STANDARD 24 |
8d009a0c | 122 | #define XC_MAX_I2C_WRITE_LENGTH 64 |
5272f6b1 | 123 | #define XC_POWERED_DOWN 0x80000000U |
8d009a0c DF |
124 | |
125 | /* Signal Types */ | |
126 | #define XC_RF_MODE_AIR 0 | |
127 | #define XC_RF_MODE_CABLE 1 | |
128 | ||
8d009a0c DF |
129 | /* Product id */ |
130 | #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000 | |
7db98fe6 IV |
131 | #define XC_PRODUCT_ID_XC4000 0x0FA0 |
132 | #define XC_PRODUCT_ID_XC4100 0x1004 | |
8d009a0c | 133 | |
ee4c3cd6 | 134 | /* Registers (Write-only) */ |
8d009a0c DF |
135 | #define XREG_INIT 0x00 |
136 | #define XREG_VIDEO_MODE 0x01 | |
137 | #define XREG_AUDIO_MODE 0x02 | |
138 | #define XREG_RF_FREQ 0x03 | |
139 | #define XREG_D_CODE 0x04 | |
ee4c3cd6 DH |
140 | #define XREG_DIRECTSITTING_MODE 0x05 |
141 | #define XREG_SEEK_MODE 0x06 | |
142 | #define XREG_POWER_DOWN 0x08 | |
143 | #define XREG_SIGNALSOURCE 0x0A | |
30f544ec | 144 | #define XREG_SMOOTHEDCVBS 0x0E |
ee4c3cd6 | 145 | #define XREG_AMPLITUDE 0x10 |
8d009a0c | 146 | |
ee4c3cd6 | 147 | /* Registers (Read-only) */ |
8d009a0c DF |
148 | #define XREG_ADC_ENV 0x00 |
149 | #define XREG_QUALITY 0x01 | |
150 | #define XREG_FRAME_LINES 0x02 | |
151 | #define XREG_HSYNC_FREQ 0x03 | |
152 | #define XREG_LOCK 0x04 | |
153 | #define XREG_FREQ_ERROR 0x05 | |
154 | #define XREG_SNR 0x06 | |
155 | #define XREG_VERSION 0x07 | |
156 | #define XREG_PRODUCT_ID 0x08 | |
8a538a88 MS |
157 | #define XREG_SIGNAL_LEVEL 0x0A |
158 | #define XREG_NOISE_LEVEL 0x0B | |
8d009a0c DF |
159 | |
160 | /* | |
161 | Basic firmware description. This will remain with | |
162 | the driver for documentation purposes. | |
163 | ||
164 | This represents an I2C firmware file encoded as a | |
165 | string of unsigned char. Format is as follows: | |
166 | ||
167 | char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB | |
168 | char[1 ]=len0_LSB -> length of first write transaction | |
169 | char[2 ]=data0 -> first byte to be sent | |
170 | char[3 ]=data1 | |
171 | char[4 ]=data2 | |
172 | char[ ]=... | |
173 | char[M ]=dataN -> last byte to be sent | |
174 | char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB | |
175 | char[M+2]=len1_LSB -> length of second write transaction | |
176 | char[M+3]=data0 | |
177 | char[M+4]=data1 | |
178 | ... | |
179 | etc. | |
180 | ||
181 | The [len] value should be interpreted as follows: | |
182 | ||
183 | len= len_MSB _ len_LSB | |
184 | len=1111_1111_1111_1111 : End of I2C_SEQUENCE | |
185 | len=0000_0000_0000_0000 : Reset command: Do hardware reset | |
186 | len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) | |
187 | len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms | |
188 | ||
189 | For the RESET and WAIT commands, the two following bytes will contain | |
190 | immediately the length of the following transaction. | |
8d009a0c | 191 | */ |
fbe4a29f | 192 | |
8d009a0c | 193 | struct XC_TV_STANDARD { |
fbe4a29f | 194 | const char *Name; |
341747be | 195 | u16 audio_mode; |
196 | u16 video_mode; | |
4911085f | 197 | u16 int_freq; |
8d009a0c DF |
198 | }; |
199 | ||
200 | /* Tuner standards */ | |
ed23db32 DH |
201 | #define XC4000_MN_NTSC_PAL_BTSC 0 |
202 | #define XC4000_MN_NTSC_PAL_A2 1 | |
203 | #define XC4000_MN_NTSC_PAL_EIAJ 2 | |
204 | #define XC4000_MN_NTSC_PAL_Mono 3 | |
205 | #define XC4000_BG_PAL_A2 4 | |
206 | #define XC4000_BG_PAL_NICAM 5 | |
207 | #define XC4000_BG_PAL_MONO 6 | |
208 | #define XC4000_I_PAL_NICAM 7 | |
209 | #define XC4000_I_PAL_NICAM_MONO 8 | |
210 | #define XC4000_DK_PAL_A2 9 | |
211 | #define XC4000_DK_PAL_NICAM 10 | |
212 | #define XC4000_DK_PAL_MONO 11 | |
213 | #define XC4000_DK_SECAM_A2DK1 12 | |
e3bb7c60 MCC |
214 | #define XC4000_DK_SECAM_A2LDK3 13 |
215 | #define XC4000_DK_SECAM_A2MONO 14 | |
4911085f IV |
216 | #define XC4000_DK_SECAM_NICAM 15 |
217 | #define XC4000_L_SECAM_NICAM 16 | |
218 | #define XC4000_LC_SECAM_NICAM 17 | |
219 | #define XC4000_DTV6 18 | |
220 | #define XC4000_DTV8 19 | |
221 | #define XC4000_DTV7_8 20 | |
222 | #define XC4000_DTV7 21 | |
223 | #define XC4000_FM_Radio_INPUT2 22 | |
224 | #define XC4000_FM_Radio_INPUT1 23 | |
8d009a0c | 225 | |
341747be | 226 | static struct XC_TV_STANDARD xc4000_standard[MAX_TV_STANDARD] = { |
4911085f IV |
227 | {"M/N-NTSC/PAL-BTSC", 0x0000, 0x80A0, 4500}, |
228 | {"M/N-NTSC/PAL-A2", 0x0000, 0x80A0, 4600}, | |
229 | {"M/N-NTSC/PAL-EIAJ", 0x0040, 0x80A0, 4500}, | |
230 | {"M/N-NTSC/PAL-Mono", 0x0078, 0x80A0, 4500}, | |
231 | {"B/G-PAL-A2", 0x0000, 0x8159, 5640}, | |
232 | {"B/G-PAL-NICAM", 0x0004, 0x8159, 5740}, | |
233 | {"B/G-PAL-MONO", 0x0078, 0x8159, 5500}, | |
234 | {"I-PAL-NICAM", 0x0080, 0x8049, 6240}, | |
235 | {"I-PAL-NICAM-MONO", 0x0078, 0x8049, 6000}, | |
236 | {"D/K-PAL-A2", 0x0000, 0x8049, 6380}, | |
237 | {"D/K-PAL-NICAM", 0x0080, 0x8049, 6200}, | |
238 | {"D/K-PAL-MONO", 0x0078, 0x8049, 6500}, | |
239 | {"D/K-SECAM-A2 DK1", 0x0000, 0x8049, 6340}, | |
240 | {"D/K-SECAM-A2 L/DK3", 0x0000, 0x8049, 6000}, | |
241 | {"D/K-SECAM-A2 MONO", 0x0078, 0x8049, 6500}, | |
242 | {"D/K-SECAM-NICAM", 0x0080, 0x8049, 6200}, | |
243 | {"L-SECAM-NICAM", 0x8080, 0x0009, 6200}, | |
244 | {"L'-SECAM-NICAM", 0x8080, 0x4009, 6200}, | |
245 | {"DTV6", 0x00C0, 0x8002, 0}, | |
246 | {"DTV8", 0x00C0, 0x800B, 0}, | |
247 | {"DTV7/8", 0x00C0, 0x801B, 0}, | |
248 | {"DTV7", 0x00C0, 0x8007, 0}, | |
941830c9 MCC |
249 | {"FM Radio-INPUT2", 0x0008, 0x9800, 10700}, |
250 | {"FM Radio-INPUT1", 0x0008, 0x9000, 10700} | |
8d009a0c DF |
251 | }; |
252 | ||
8d009a0c | 253 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val); |
341747be | 254 | static int xc4000_tuner_reset(struct dvb_frontend *fe); |
f4312e2f | 255 | static void xc_debug_dump(struct xc4000_priv *priv); |
8d009a0c DF |
256 | |
257 | static int xc_send_i2c_data(struct xc4000_priv *priv, u8 *buf, int len) | |
258 | { | |
259 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, | |
260 | .flags = 0, .buf = buf, .len = len }; | |
8d009a0c | 261 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { |
799ed11a DH |
262 | if (priv->ignore_i2c_write_errors == 0) { |
263 | printk(KERN_ERR "xc4000: I2C write failed (len=%i)\n", | |
264 | len); | |
265 | if (len == 4) { | |
c6480ccc | 266 | printk(KERN_ERR "bytes %*ph\n", 4, buf); |
799ed11a | 267 | } |
341747be | 268 | return -EREMOTEIO; |
799ed11a | 269 | } |
8d009a0c | 270 | } |
341747be | 271 | return 0; |
8d009a0c DF |
272 | } |
273 | ||
341747be | 274 | static int xc4000_tuner_reset(struct dvb_frontend *fe) |
8d009a0c DF |
275 | { |
276 | struct xc4000_priv *priv = fe->tuner_priv; | |
277 | int ret; | |
278 | ||
279 | dprintk(1, "%s()\n", __func__); | |
280 | ||
281 | if (fe->callback) { | |
282 | ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
283 | fe->dvb->priv : | |
284 | priv->i2c_props.adap->algo_data, | |
285 | DVB_FRONTEND_COMPONENT_TUNER, | |
286 | XC4000_TUNER_RESET, 0); | |
287 | if (ret) { | |
288 | printk(KERN_ERR "xc4000: reset failed\n"); | |
341747be | 289 | return -EREMOTEIO; |
8d009a0c DF |
290 | } |
291 | } else { | |
341747be | 292 | printk(KERN_ERR "xc4000: no tuner reset callback function, " |
293 | "fatal\n"); | |
294 | return -EINVAL; | |
8d009a0c | 295 | } |
341747be | 296 | return 0; |
8d009a0c DF |
297 | } |
298 | ||
299 | static int xc_write_reg(struct xc4000_priv *priv, u16 regAddr, u16 i2cData) | |
300 | { | |
301 | u8 buf[4]; | |
8d009a0c DF |
302 | int result; |
303 | ||
304 | buf[0] = (regAddr >> 8) & 0xFF; | |
305 | buf[1] = regAddr & 0xFF; | |
306 | buf[2] = (i2cData >> 8) & 0xFF; | |
307 | buf[3] = i2cData & 0xFF; | |
308 | result = xc_send_i2c_data(priv, buf, 4); | |
8d009a0c DF |
309 | |
310 | return result; | |
311 | } | |
312 | ||
313 | static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence) | |
314 | { | |
315 | struct xc4000_priv *priv = fe->tuner_priv; | |
316 | ||
317 | int i, nbytes_to_send, result; | |
318 | unsigned int len, pos, index; | |
319 | u8 buf[XC_MAX_I2C_WRITE_LENGTH]; | |
320 | ||
321 | index = 0; | |
322 | while ((i2c_sequence[index] != 0xFF) || | |
323 | (i2c_sequence[index + 1] != 0xFF)) { | |
324 | len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; | |
325 | if (len == 0x0000) { | |
326 | /* RESET command */ | |
341747be | 327 | /* NOTE: this is ignored, as the reset callback was */ |
328 | /* already called by check_firmware() */ | |
8d009a0c | 329 | index += 2; |
8d009a0c DF |
330 | } else if (len & 0x8000) { |
331 | /* WAIT command */ | |
341747be | 332 | msleep(len & 0x7FFF); |
8d009a0c DF |
333 | index += 2; |
334 | } else { | |
335 | /* Send i2c data whilst ensuring individual transactions | |
336 | * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. | |
337 | */ | |
338 | index += 2; | |
339 | buf[0] = i2c_sequence[index]; | |
340 | buf[1] = i2c_sequence[index + 1]; | |
341 | pos = 2; | |
342 | while (pos < len) { | |
343 | if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) | |
344 | nbytes_to_send = | |
345 | XC_MAX_I2C_WRITE_LENGTH; | |
346 | else | |
347 | nbytes_to_send = (len - pos + 2); | |
348 | for (i = 2; i < nbytes_to_send; i++) { | |
349 | buf[i] = i2c_sequence[index + pos + | |
350 | i - 2]; | |
351 | } | |
352 | result = xc_send_i2c_data(priv, buf, | |
353 | nbytes_to_send); | |
354 | ||
341747be | 355 | if (result != 0) |
8d009a0c DF |
356 | return result; |
357 | ||
358 | pos += nbytes_to_send - 2; | |
359 | } | |
360 | index += len; | |
361 | } | |
362 | } | |
341747be | 363 | return 0; |
8d009a0c DF |
364 | } |
365 | ||
341747be | 366 | static int xc_set_tv_standard(struct xc4000_priv *priv, |
367 | u16 video_mode, u16 audio_mode) | |
8d009a0c DF |
368 | { |
369 | int ret; | |
341747be | 370 | dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode); |
8d009a0c DF |
371 | dprintk(1, "%s() Standard = %s\n", |
372 | __func__, | |
341747be | 373 | xc4000_standard[priv->video_standard].Name); |
8d009a0c | 374 | |
799ed11a DH |
375 | /* Don't complain when the request fails because of i2c stretching */ |
376 | priv->ignore_i2c_write_errors = 1; | |
377 | ||
341747be | 378 | ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode); |
379 | if (ret == 0) | |
380 | ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode); | |
8d009a0c | 381 | |
799ed11a DH |
382 | priv->ignore_i2c_write_errors = 0; |
383 | ||
8d009a0c DF |
384 | return ret; |
385 | } | |
386 | ||
341747be | 387 | static int xc_set_signal_source(struct xc4000_priv *priv, u16 rf_mode) |
8d009a0c DF |
388 | { |
389 | dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, | |
390 | rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); | |
391 | ||
392 | if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { | |
393 | rf_mode = XC_RF_MODE_CABLE; | |
394 | printk(KERN_ERR | |
395 | "%s(), Invalid mode, defaulting to CABLE", | |
396 | __func__); | |
397 | } | |
398 | return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode); | |
399 | } | |
400 | ||
401 | static const struct dvb_tuner_ops xc4000_tuner_ops; | |
402 | ||
341747be | 403 | static int xc_set_rf_frequency(struct xc4000_priv *priv, u32 freq_hz) |
8d009a0c DF |
404 | { |
405 | u16 freq_code; | |
406 | ||
407 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | |
408 | ||
409 | if ((freq_hz > xc4000_tuner_ops.info.frequency_max) || | |
341747be | 410 | (freq_hz < xc4000_tuner_ops.info.frequency_min)) |
411 | return -EINVAL; | |
8d009a0c DF |
412 | |
413 | freq_code = (u16)(freq_hz / 15625); | |
414 | ||
415 | /* WAS: Starting in firmware version 1.1.44, Xceive recommends using the | |
416 | FINERFREQ for all normal tuning (the doc indicates reg 0x03 should | |
417 | only be used for fast scanning for channel lock) */ | |
341747be | 418 | /* WAS: XREG_FINERFREQ */ |
419 | return xc_write_reg(priv, XREG_RF_FREQ, freq_code); | |
8d009a0c DF |
420 | } |
421 | ||
341747be | 422 | static int xc_get_adc_envelope(struct xc4000_priv *priv, u16 *adc_envelope) |
8d009a0c DF |
423 | { |
424 | return xc4000_readreg(priv, XREG_ADC_ENV, adc_envelope); | |
425 | } | |
426 | ||
427 | static int xc_get_frequency_error(struct xc4000_priv *priv, u32 *freq_error_hz) | |
428 | { | |
429 | int result; | |
430 | u16 regData; | |
431 | u32 tmp; | |
432 | ||
433 | result = xc4000_readreg(priv, XREG_FREQ_ERROR, ®Data); | |
341747be | 434 | if (result != 0) |
8d009a0c DF |
435 | return result; |
436 | ||
1368ceb2 IV |
437 | tmp = (u32)regData & 0xFFFFU; |
438 | tmp = (tmp < 0x8000U ? tmp : 0x10000U - tmp); | |
439 | (*freq_error_hz) = tmp * 15625; | |
8d009a0c DF |
440 | return result; |
441 | } | |
442 | ||
443 | static int xc_get_lock_status(struct xc4000_priv *priv, u16 *lock_status) | |
444 | { | |
445 | return xc4000_readreg(priv, XREG_LOCK, lock_status); | |
446 | } | |
447 | ||
448 | static int xc_get_version(struct xc4000_priv *priv, | |
449 | u8 *hw_majorversion, u8 *hw_minorversion, | |
450 | u8 *fw_majorversion, u8 *fw_minorversion) | |
451 | { | |
452 | u16 data; | |
453 | int result; | |
454 | ||
455 | result = xc4000_readreg(priv, XREG_VERSION, &data); | |
341747be | 456 | if (result != 0) |
8d009a0c DF |
457 | return result; |
458 | ||
459 | (*hw_majorversion) = (data >> 12) & 0x0F; | |
460 | (*hw_minorversion) = (data >> 8) & 0x0F; | |
461 | (*fw_majorversion) = (data >> 4) & 0x0F; | |
462 | (*fw_minorversion) = data & 0x0F; | |
463 | ||
464 | return 0; | |
465 | } | |
466 | ||
8d009a0c DF |
467 | static int xc_get_hsync_freq(struct xc4000_priv *priv, u32 *hsync_freq_hz) |
468 | { | |
469 | u16 regData; | |
470 | int result; | |
471 | ||
472 | result = xc4000_readreg(priv, XREG_HSYNC_FREQ, ®Data); | |
341747be | 473 | if (result != 0) |
8d009a0c DF |
474 | return result; |
475 | ||
476 | (*hsync_freq_hz) = ((regData & 0x0fff) * 763)/100; | |
477 | return result; | |
478 | } | |
479 | ||
480 | static int xc_get_frame_lines(struct xc4000_priv *priv, u16 *frame_lines) | |
481 | { | |
482 | return xc4000_readreg(priv, XREG_FRAME_LINES, frame_lines); | |
483 | } | |
484 | ||
485 | static int xc_get_quality(struct xc4000_priv *priv, u16 *quality) | |
486 | { | |
487 | return xc4000_readreg(priv, XREG_QUALITY, quality); | |
488 | } | |
489 | ||
8a538a88 MS |
490 | static int xc_get_signal_level(struct xc4000_priv *priv, u16 *signal) |
491 | { | |
492 | return xc4000_readreg(priv, XREG_SIGNAL_LEVEL, signal); | |
493 | } | |
494 | ||
495 | static int xc_get_noise_level(struct xc4000_priv *priv, u16 *noise) | |
496 | { | |
497 | return xc4000_readreg(priv, XREG_NOISE_LEVEL, noise); | |
498 | } | |
499 | ||
341747be | 500 | static u16 xc_wait_for_lock(struct xc4000_priv *priv) |
8d009a0c | 501 | { |
341747be | 502 | u16 lock_state = 0; |
503 | int watchdog_count = 40; | |
504 | ||
505 | while ((lock_state == 0) && (watchdog_count > 0)) { | |
506 | xc_get_lock_status(priv, &lock_state); | |
507 | if (lock_state != 1) { | |
508 | msleep(5); | |
509 | watchdog_count--; | |
8d009a0c DF |
510 | } |
511 | } | |
341747be | 512 | return lock_state; |
8d009a0c DF |
513 | } |
514 | ||
e75873c1 | 515 | static int xc_tune_channel(struct xc4000_priv *priv, u32 freq_hz) |
8d009a0c | 516 | { |
e75873c1 IV |
517 | int found = 1; |
518 | int result; | |
8d009a0c DF |
519 | |
520 | dprintk(1, "%s(%u)\n", __func__, freq_hz); | |
521 | ||
799ed11a DH |
522 | /* Don't complain when the request fails because of i2c stretching */ |
523 | priv->ignore_i2c_write_errors = 1; | |
341747be | 524 | result = xc_set_rf_frequency(priv, freq_hz); |
799ed11a DH |
525 | priv->ignore_i2c_write_errors = 0; |
526 | ||
341747be | 527 | if (result != 0) |
8d009a0c DF |
528 | return 0; |
529 | ||
e75873c1 IV |
530 | /* wait for lock only in analog TV mode */ |
531 | if ((priv->cur_fw.type & (FM | DTV6 | DTV7 | DTV78 | DTV8)) == 0) { | |
341747be | 532 | if (xc_wait_for_lock(priv) != 1) |
e75873c1 | 533 | found = 0; |
8d009a0c DF |
534 | } |
535 | ||
f4312e2f IV |
536 | /* Wait for stats to stabilize. |
537 | * Frame Lines needs two frame times after initial lock | |
538 | * before it is valid. | |
539 | */ | |
341747be | 540 | msleep(debug ? 100 : 10); |
f4312e2f IV |
541 | |
542 | if (debug) | |
543 | xc_debug_dump(priv); | |
544 | ||
8d009a0c DF |
545 | return found; |
546 | } | |
547 | ||
548 | static int xc4000_readreg(struct xc4000_priv *priv, u16 reg, u16 *val) | |
549 | { | |
550 | u8 buf[2] = { reg >> 8, reg & 0xff }; | |
551 | u8 bval[2] = { 0, 0 }; | |
552 | struct i2c_msg msg[2] = { | |
553 | { .addr = priv->i2c_props.addr, | |
554 | .flags = 0, .buf = &buf[0], .len = 2 }, | |
555 | { .addr = priv->i2c_props.addr, | |
556 | .flags = I2C_M_RD, .buf = &bval[0], .len = 2 }, | |
557 | }; | |
558 | ||
559 | if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) { | |
941830c9 | 560 | printk(KERN_ERR "xc4000: I2C read failed\n"); |
8d009a0c DF |
561 | return -EREMOTEIO; |
562 | } | |
563 | ||
564 | *val = (bval[0] << 8) | bval[1]; | |
341747be | 565 | return 0; |
8d009a0c DF |
566 | } |
567 | ||
e3bb7c60 | 568 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
d0962382 DH |
569 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
570 | { | |
571 | if (type & BASE) | |
941830c9 | 572 | printk(KERN_CONT "BASE "); |
d0962382 | 573 | if (type & INIT1) |
941830c9 | 574 | printk(KERN_CONT "INIT1 "); |
d0962382 | 575 | if (type & F8MHZ) |
941830c9 | 576 | printk(KERN_CONT "F8MHZ "); |
d0962382 | 577 | if (type & MTS) |
941830c9 | 578 | printk(KERN_CONT "MTS "); |
d0962382 | 579 | if (type & D2620) |
941830c9 | 580 | printk(KERN_CONT "D2620 "); |
d0962382 | 581 | if (type & D2633) |
941830c9 | 582 | printk(KERN_CONT "D2633 "); |
d0962382 | 583 | if (type & DTV6) |
941830c9 | 584 | printk(KERN_CONT "DTV6 "); |
d0962382 | 585 | if (type & QAM) |
941830c9 | 586 | printk(KERN_CONT "QAM "); |
d0962382 | 587 | if (type & DTV7) |
941830c9 | 588 | printk(KERN_CONT "DTV7 "); |
d0962382 | 589 | if (type & DTV78) |
941830c9 | 590 | printk(KERN_CONT "DTV78 "); |
d0962382 | 591 | if (type & DTV8) |
941830c9 | 592 | printk(KERN_CONT "DTV8 "); |
d0962382 | 593 | if (type & FM) |
941830c9 | 594 | printk(KERN_CONT "FM "); |
d0962382 | 595 | if (type & INPUT1) |
941830c9 | 596 | printk(KERN_CONT "INPUT1 "); |
d0962382 | 597 | if (type & LCD) |
941830c9 | 598 | printk(KERN_CONT "LCD "); |
d0962382 | 599 | if (type & NOGD) |
941830c9 | 600 | printk(KERN_CONT "NOGD "); |
d0962382 | 601 | if (type & MONO) |
941830c9 | 602 | printk(KERN_CONT "MONO "); |
d0962382 | 603 | if (type & ATSC) |
941830c9 | 604 | printk(KERN_CONT "ATSC "); |
d0962382 | 605 | if (type & IF) |
941830c9 | 606 | printk(KERN_CONT "IF "); |
d0962382 | 607 | if (type & LG60) |
941830c9 | 608 | printk(KERN_CONT "LG60 "); |
d0962382 | 609 | if (type & ATI638) |
941830c9 | 610 | printk(KERN_CONT "ATI638 "); |
d0962382 | 611 | if (type & OREN538) |
941830c9 | 612 | printk(KERN_CONT "OREN538 "); |
d0962382 | 613 | if (type & OREN36) |
941830c9 | 614 | printk(KERN_CONT "OREN36 "); |
d0962382 | 615 | if (type & TOYOTA388) |
941830c9 | 616 | printk(KERN_CONT "TOYOTA388 "); |
d0962382 | 617 | if (type & TOYOTA794) |
941830c9 | 618 | printk(KERN_CONT "TOYOTA794 "); |
d0962382 | 619 | if (type & DIBCOM52) |
941830c9 | 620 | printk(KERN_CONT "DIBCOM52 "); |
d0962382 | 621 | if (type & ZARLINK456) |
941830c9 | 622 | printk(KERN_CONT "ZARLINK456 "); |
d0962382 | 623 | if (type & CHINA) |
941830c9 | 624 | printk(KERN_CONT "CHINA "); |
d0962382 | 625 | if (type & F6MHZ) |
941830c9 | 626 | printk(KERN_CONT "F6MHZ "); |
d0962382 | 627 | if (type & INPUT2) |
941830c9 | 628 | printk(KERN_CONT "INPUT2 "); |
d0962382 | 629 | if (type & SCODE) |
941830c9 | 630 | printk(KERN_CONT "SCODE "); |
d0962382 | 631 | if (type & HAS_IF) |
941830c9 | 632 | printk(KERN_CONT "HAS_IF_%d ", int_freq); |
d0962382 DH |
633 | } |
634 | ||
11091a31 DH |
635 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
636 | v4l2_std_id *id) | |
637 | { | |
638 | struct xc4000_priv *priv = fe->tuner_priv; | |
3db95704 IV |
639 | int i, best_i = -1; |
640 | unsigned int best_nr_diffs = 255U; | |
11091a31 | 641 | |
11091a31 | 642 | if (!priv->firm) { |
341747be | 643 | printk(KERN_ERR "Error! firmware not loaded\n"); |
11091a31 DH |
644 | return -EINVAL; |
645 | } | |
646 | ||
647 | if (((type & ~SCODE) == 0) && (*id == 0)) | |
648 | *id = V4L2_STD_PAL; | |
649 | ||
11091a31 DH |
650 | /* Seek for generic video standard match */ |
651 | for (i = 0; i < priv->firm_size; i++) { | |
3db95704 IV |
652 | v4l2_std_id id_diff_mask = |
653 | (priv->firm[i].id ^ (*id)) & (*id); | |
654 | unsigned int type_diff_mask = | |
655 | (priv->firm[i].type ^ type) | |
656 | & (BASE_TYPES | DTV_TYPES | LCD | NOGD | MONO | SCODE); | |
657 | unsigned int nr_diffs; | |
658 | ||
659 | if (type_diff_mask | |
660 | & (BASE | INIT1 | FM | DTV6 | DTV7 | DTV78 | DTV8 | SCODE)) | |
11091a31 DH |
661 | continue; |
662 | ||
3db95704 IV |
663 | nr_diffs = hweight64(id_diff_mask) + hweight32(type_diff_mask); |
664 | if (!nr_diffs) /* Supports all the requested standards */ | |
665 | goto found; | |
11091a31 | 666 | |
3db95704 IV |
667 | if (nr_diffs < best_nr_diffs) { |
668 | best_nr_diffs = nr_diffs; | |
11091a31 DH |
669 | best_i = i; |
670 | } | |
671 | } | |
672 | ||
3db95704 IV |
673 | /* FIXME: Would make sense to seek for type "hint" match ? */ |
674 | if (best_i < 0) { | |
675 | i = -ENOENT; | |
676 | goto ret; | |
677 | } | |
678 | ||
679 | if (best_nr_diffs > 0U) { | |
941830c9 MCC |
680 | printk(KERN_WARNING |
681 | "Selecting best matching firmware (%u bits differ) for " | |
341747be | 682 | "type=(%x), id %016llx:\n", |
683 | best_nr_diffs, type, (unsigned long long)*id); | |
11091a31 | 684 | i = best_i; |
11091a31 DH |
685 | } |
686 | ||
11091a31 DH |
687 | found: |
688 | *id = priv->firm[i].id; | |
689 | ||
690 | ret: | |
11091a31 | 691 | if (debug) { |
941830c9 | 692 | printk(KERN_DEBUG "%s firmware for type=", |
341747be | 693 | (i < 0) ? "Can't find" : "Found"); |
d0962382 | 694 | dump_firm_type(type); |
941830c9 | 695 | printk(KERN_DEBUG "(%x), id %016llx.\n", type, (unsigned long long)*id); |
11091a31 DH |
696 | } |
697 | return i; | |
698 | } | |
699 | ||
700 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, | |
701 | v4l2_std_id *id) | |
702 | { | |
703 | struct xc4000_priv *priv = fe->tuner_priv; | |
704 | int pos, rc; | |
31f880e2 | 705 | unsigned char *p; |
11091a31 | 706 | |
11091a31 DH |
707 | pos = seek_firmware(fe, type, id); |
708 | if (pos < 0) | |
709 | return pos; | |
710 | ||
11091a31 | 711 | p = priv->firm[pos].ptr; |
11091a31 | 712 | |
799ed11a DH |
713 | /* Don't complain when the request fails because of i2c stretching */ |
714 | priv->ignore_i2c_write_errors = 1; | |
715 | ||
31f880e2 | 716 | rc = xc_load_i2c_sequence(fe, p); |
11091a31 | 717 | |
799ed11a DH |
718 | priv->ignore_i2c_write_errors = 0; |
719 | ||
31f880e2 | 720 | return rc; |
11091a31 DH |
721 | } |
722 | ||
8d009a0c DF |
723 | static int xc4000_fwupload(struct dvb_frontend *fe) |
724 | { | |
725 | struct xc4000_priv *priv = fe->tuner_priv; | |
11091a31 DH |
726 | const struct firmware *fw = NULL; |
727 | const unsigned char *p, *endp; | |
728 | int rc = 0; | |
729 | int n, n_array; | |
730 | char name[33]; | |
fbe4a29f | 731 | const char *fname; |
11091a31 | 732 | |
fa285bc1 IV |
733 | if (firmware_name[0] != '\0') |
734 | fname = firmware_name; | |
735 | else | |
736 | fname = XC4000_DEFAULT_FIRMWARE; | |
11091a31 | 737 | |
941830c9 | 738 | dprintk(1, "Reading firmware %s\n", fname); |
11091a31 DH |
739 | rc = request_firmware(&fw, fname, priv->i2c_props.adap->dev.parent); |
740 | if (rc < 0) { | |
741 | if (rc == -ENOENT) | |
941830c9 | 742 | printk(KERN_ERR "Error: firmware %s not found.\n", fname); |
11091a31 | 743 | else |
941830c9 | 744 | printk(KERN_ERR "Error %d while requesting firmware %s\n", |
341747be | 745 | rc, fname); |
8d009a0c | 746 | |
11091a31 DH |
747 | return rc; |
748 | } | |
749 | p = fw->data; | |
750 | endp = p + fw->size; | |
8d009a0c | 751 | |
11091a31 | 752 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
941830c9 MCC |
753 | printk(KERN_ERR "Error: firmware file %s has invalid size!\n", |
754 | fname); | |
11091a31 | 755 | goto corrupt; |
8d009a0c DF |
756 | } |
757 | ||
11091a31 | 758 | memcpy(name, p, sizeof(name) - 1); |
341747be | 759 | name[sizeof(name) - 1] = '\0'; |
11091a31 DH |
760 | p += sizeof(name) - 1; |
761 | ||
762 | priv->firm_version = get_unaligned_le16(p); | |
763 | p += 2; | |
764 | ||
765 | n_array = get_unaligned_le16(p); | |
766 | p += 2; | |
767 | ||
b6cdb5be DH |
768 | dprintk(1, "Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
769 | n_array, fname, name, | |
770 | priv->firm_version >> 8, priv->firm_version & 0xff); | |
11091a31 | 771 | |
1b7acf0c | 772 | priv->firm = kcalloc(n_array, sizeof(*priv->firm), GFP_KERNEL); |
11091a31 | 773 | if (priv->firm == NULL) { |
941830c9 | 774 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); |
11091a31 | 775 | rc = -ENOMEM; |
941830c9 | 776 | goto done; |
11091a31 DH |
777 | } |
778 | priv->firm_size = n_array; | |
779 | ||
780 | n = -1; | |
781 | while (p < endp) { | |
782 | __u32 type, size; | |
783 | v4l2_std_id id; | |
784 | __u16 int_freq = 0; | |
785 | ||
786 | n++; | |
787 | if (n >= n_array) { | |
941830c9 | 788 | printk(KERN_ERR "More firmware images in file than " |
fbe4a29f | 789 | "were expected!\n"); |
11091a31 DH |
790 | goto corrupt; |
791 | } | |
792 | ||
793 | /* Checks if there's enough bytes to read */ | |
794 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) | |
795 | goto header; | |
796 | ||
797 | type = get_unaligned_le32(p); | |
798 | p += sizeof(type); | |
799 | ||
800 | id = get_unaligned_le64(p); | |
801 | p += sizeof(id); | |
802 | ||
803 | if (type & HAS_IF) { | |
804 | int_freq = get_unaligned_le16(p); | |
805 | p += sizeof(int_freq); | |
806 | if (endp - p < sizeof(size)) | |
807 | goto header; | |
808 | } | |
809 | ||
810 | size = get_unaligned_le32(p); | |
811 | p += sizeof(size); | |
812 | ||
813 | if (!size || size > endp - p) { | |
941830c9 | 814 | printk(KERN_ERR "Firmware type (%x), id %llx is corrupted (size=%d, expected %d)\n", |
11091a31 DH |
815 | type, (unsigned long long)id, |
816 | (unsigned)(endp - p), size); | |
817 | goto corrupt; | |
818 | } | |
819 | ||
820 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); | |
821 | if (priv->firm[n].ptr == NULL) { | |
941830c9 | 822 | printk(KERN_ERR "Not enough memory to load firmware file.\n"); |
11091a31 | 823 | rc = -ENOMEM; |
941830c9 | 824 | goto done; |
11091a31 | 825 | } |
d0962382 | 826 | |
11091a31 | 827 | if (debug) { |
941830c9 | 828 | printk(KERN_DEBUG "Reading firmware type "); |
d0962382 | 829 | dump_firm_type_and_int_freq(type, int_freq); |
941830c9 | 830 | printk(KERN_DEBUG "(%x), id %llx, size=%d.\n", |
11091a31 DH |
831 | type, (unsigned long long)id, size); |
832 | } | |
833 | ||
834 | memcpy(priv->firm[n].ptr, p, size); | |
835 | priv->firm[n].type = type; | |
836 | priv->firm[n].id = id; | |
837 | priv->firm[n].size = size; | |
838 | priv->firm[n].int_freq = int_freq; | |
839 | ||
840 | p += size; | |
8d009a0c DF |
841 | } |
842 | ||
11091a31 | 843 | if (n + 1 != priv->firm_size) { |
941830c9 | 844 | printk(KERN_ERR "Firmware file is incomplete!\n"); |
11091a31 DH |
845 | goto corrupt; |
846 | } | |
847 | ||
848 | goto done; | |
849 | ||
850 | header: | |
941830c9 | 851 | printk(KERN_ERR "Firmware header is incomplete!\n"); |
11091a31 DH |
852 | corrupt: |
853 | rc = -EINVAL; | |
941830c9 | 854 | printk(KERN_ERR "Error: firmware file is corrupted!\n"); |
11091a31 DH |
855 | |
856 | done: | |
8d009a0c | 857 | release_firmware(fw); |
11091a31 | 858 | if (rc == 0) |
b6cdb5be | 859 | dprintk(1, "Firmware files loaded.\n"); |
11091a31 DH |
860 | |
861 | return rc; | |
8d009a0c DF |
862 | } |
863 | ||
d0962382 DH |
864 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
865 | v4l2_std_id *id, __u16 int_freq, int scode) | |
866 | { | |
867 | struct xc4000_priv *priv = fe->tuner_priv; | |
ffce6266 IV |
868 | int pos, rc; |
869 | unsigned char *p; | |
870 | u8 scode_buf[13]; | |
871 | u8 indirect_mode[5]; | |
d0962382 | 872 | |
fe830364 | 873 | dprintk(1, "%s called int_freq=%d\n", __func__, int_freq); |
d0962382 DH |
874 | |
875 | if (!int_freq) { | |
876 | pos = seek_firmware(fe, type, id); | |
877 | if (pos < 0) | |
878 | return pos; | |
879 | } else { | |
880 | for (pos = 0; pos < priv->firm_size; pos++) { | |
881 | if ((priv->firm[pos].int_freq == int_freq) && | |
882 | (priv->firm[pos].type & HAS_IF)) | |
883 | break; | |
884 | } | |
885 | if (pos == priv->firm_size) | |
886 | return -ENOENT; | |
887 | } | |
888 | ||
889 | p = priv->firm[pos].ptr; | |
890 | ||
ffce6266 IV |
891 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
892 | return -EINVAL; | |
893 | p += 12 * scode; | |
d0962382 | 894 | |
941830c9 MCC |
895 | if (debug) { |
896 | tuner_info("Loading SCODE for type="); | |
897 | dump_firm_type_and_int_freq(priv->firm[pos].type, | |
898 | priv->firm[pos].int_freq); | |
899 | printk(KERN_CONT "(%x), id %016llx.\n", priv->firm[pos].type, | |
900 | (unsigned long long)*id); | |
901 | } | |
d0962382 | 902 | |
ee4c3cd6 DH |
903 | scode_buf[0] = 0x00; |
904 | memcpy(&scode_buf[1], p, 12); | |
d0962382 DH |
905 | |
906 | /* Enter direct-mode */ | |
ee4c3cd6 DH |
907 | rc = xc_write_reg(priv, XREG_DIRECTSITTING_MODE, 0); |
908 | if (rc < 0) { | |
941830c9 | 909 | printk(KERN_ERR "failed to put device into direct mode!\n"); |
d0962382 | 910 | return -EIO; |
ee4c3cd6 | 911 | } |
d0962382 | 912 | |
ee4c3cd6 | 913 | rc = xc_send_i2c_data(priv, scode_buf, 13); |
341747be | 914 | if (rc != 0) { |
ee4c3cd6 DH |
915 | /* Even if the send failed, make sure we set back to indirect |
916 | mode */ | |
941830c9 | 917 | printk(KERN_ERR "Failed to set scode %d\n", rc); |
ee4c3cd6 | 918 | } |
d0962382 DH |
919 | |
920 | /* Switch back to indirect-mode */ | |
921 | memset(indirect_mode, 0, sizeof(indirect_mode)); | |
922 | indirect_mode[4] = 0x88; | |
ee4c3cd6 DH |
923 | xc_send_i2c_data(priv, indirect_mode, sizeof(indirect_mode)); |
924 | msleep(10); | |
d0962382 DH |
925 | |
926 | return 0; | |
927 | } | |
928 | ||
929 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, | |
930 | v4l2_std_id std, __u16 int_freq) | |
931 | { | |
932 | struct xc4000_priv *priv = fe->tuner_priv; | |
933 | struct firmware_properties new_fw; | |
934 | int rc = 0, is_retry = 0; | |
09f46342 | 935 | u16 hwmodel; |
d0962382 | 936 | v4l2_std_id std0; |
e3bb7c60 | 937 | u8 hw_major, hw_minor, fw_major, fw_minor; |
d0962382 DH |
938 | |
939 | dprintk(1, "%s called\n", __func__); | |
940 | ||
941 | if (!priv->firm) { | |
942 | rc = xc4000_fwupload(fe); | |
943 | if (rc < 0) | |
944 | return rc; | |
945 | } | |
946 | ||
d0962382 DH |
947 | retry: |
948 | new_fw.type = type; | |
949 | new_fw.id = std; | |
950 | new_fw.std_req = std; | |
341747be | 951 | new_fw.scode_table = SCODE; |
d0962382 DH |
952 | new_fw.scode_nr = 0; |
953 | new_fw.int_freq = int_freq; | |
954 | ||
955 | dprintk(1, "checking firmware, user requested type="); | |
956 | if (debug) { | |
957 | dump_firm_type(new_fw.type); | |
941830c9 | 958 | printk(KERN_CONT "(%x), id %016llx, ", new_fw.type, |
d0962382 | 959 | (unsigned long long)new_fw.std_req); |
341747be | 960 | if (!int_freq) |
961 | printk(KERN_CONT "scode_tbl "); | |
962 | else | |
963 | printk(KERN_CONT "int_freq %d, ", new_fw.int_freq); | |
964 | printk(KERN_CONT "scode_nr %d\n", new_fw.scode_nr); | |
d0962382 DH |
965 | } |
966 | ||
967 | /* No need to reload base firmware if it matches */ | |
595a83f4 | 968 | if (priv->cur_fw.type & BASE) { |
d0962382 DH |
969 | dprintk(1, "BASE firmware not changed.\n"); |
970 | goto skip_base; | |
971 | } | |
972 | ||
973 | /* Updating BASE - forget about all currently loaded firmware */ | |
974 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
975 | ||
976 | /* Reset is needed before loading firmware */ | |
341747be | 977 | rc = xc4000_tuner_reset(fe); |
d0962382 DH |
978 | if (rc < 0) |
979 | goto fail; | |
980 | ||
981 | /* BASE firmwares are all std0 */ | |
982 | std0 = 0; | |
595a83f4 | 983 | rc = load_firmware(fe, BASE, &std0); |
d0962382 | 984 | if (rc < 0) { |
941830c9 | 985 | printk(KERN_ERR "Error %d while loading base firmware\n", rc); |
d0962382 DH |
986 | goto fail; |
987 | } | |
988 | ||
989 | /* Load INIT1, if needed */ | |
990 | dprintk(1, "Load init1 firmware, if exists\n"); | |
991 | ||
595a83f4 | 992 | rc = load_firmware(fe, BASE | INIT1, &std0); |
d0962382 | 993 | if (rc == -ENOENT) |
595a83f4 | 994 | rc = load_firmware(fe, BASE | INIT1, &std0); |
d0962382 DH |
995 | if (rc < 0 && rc != -ENOENT) { |
996 | tuner_err("Error %d while loading init1 firmware\n", | |
997 | rc); | |
998 | goto fail; | |
999 | } | |
1000 | ||
1001 | skip_base: | |
1002 | /* | |
1003 | * No need to reload standard specific firmware if base firmware | |
1004 | * was not reloaded and requested video standards have not changed. | |
1005 | */ | |
1006 | if (priv->cur_fw.type == (BASE | new_fw.type) && | |
1007 | priv->cur_fw.std_req == std) { | |
1008 | dprintk(1, "Std-specific firmware already loaded.\n"); | |
1009 | goto skip_std_specific; | |
1010 | } | |
1011 | ||
1012 | /* Reloading std-specific firmware forces a SCODE update */ | |
1013 | priv->cur_fw.scode_table = 0; | |
1014 | ||
ee4c3cd6 | 1015 | /* Load the standard firmware */ |
d0962382 | 1016 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
d0962382 DH |
1017 | |
1018 | if (rc < 0) | |
1019 | goto fail; | |
1020 | ||
1021 | skip_std_specific: | |
1022 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
1023 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
1024 | dprintk(1, "SCODE firmware already loaded.\n"); | |
1025 | goto check_device; | |
1026 | } | |
1027 | ||
d0962382 | 1028 | /* Load SCODE firmware, if exists */ |
d0962382 DH |
1029 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
1030 | new_fw.int_freq, new_fw.scode_nr); | |
341747be | 1031 | if (rc != 0) |
ee4c3cd6 | 1032 | dprintk(1, "load scode failed %d\n", rc); |
d0962382 DH |
1033 | |
1034 | check_device: | |
1035 | rc = xc4000_readreg(priv, XREG_PRODUCT_ID, &hwmodel); | |
1036 | ||
799ed11a | 1037 | if (xc_get_version(priv, &hw_major, &hw_minor, &fw_major, |
341747be | 1038 | &fw_minor) != 0) { |
941830c9 | 1039 | printk(KERN_ERR "Unable to read tuner registers.\n"); |
d0962382 DH |
1040 | goto fail; |
1041 | } | |
1042 | ||
1043 | dprintk(1, "Device is Xceive %d version %d.%d, " | |
1044 | "firmware version %d.%d\n", | |
1045 | hwmodel, hw_major, hw_minor, fw_major, fw_minor); | |
1046 | ||
1047 | /* Check firmware version against what we downloaded. */ | |
09f46342 | 1048 | if (priv->firm_version != ((fw_major << 8) | fw_minor)) { |
1049 | printk(KERN_WARNING | |
1050 | "Incorrect readback of firmware version %d.%d.\n", | |
1051 | fw_major, fw_minor); | |
d0962382 DH |
1052 | goto fail; |
1053 | } | |
d0962382 DH |
1054 | |
1055 | /* Check that the tuner hardware model remains consistent over time. */ | |
7db98fe6 IV |
1056 | if (priv->hwmodel == 0 && |
1057 | (hwmodel == XC_PRODUCT_ID_XC4000 || | |
1058 | hwmodel == XC_PRODUCT_ID_XC4100)) { | |
d0962382 | 1059 | priv->hwmodel = hwmodel; |
09f46342 | 1060 | priv->hwvers = (hw_major << 8) | hw_minor; |
d0962382 | 1061 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || |
09f46342 | 1062 | priv->hwvers != ((hw_major << 8) | hw_minor)) { |
1063 | printk(KERN_WARNING | |
1064 | "Read invalid device hardware information - tuner " | |
fbe4a29f | 1065 | "hung?\n"); |
d0962382 DH |
1066 | goto fail; |
1067 | } | |
1068 | ||
1069 | memcpy(&priv->cur_fw, &new_fw, sizeof(priv->cur_fw)); | |
1070 | ||
1071 | /* | |
1072 | * By setting BASE in cur_fw.type only after successfully loading all | |
1073 | * firmwares, we can: | |
1074 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
1075 | * 2. Tell whether BASE firmware was just changed the next time through. | |
1076 | */ | |
1077 | priv->cur_fw.type |= BASE; | |
1078 | ||
1079 | return 0; | |
1080 | ||
1081 | fail: | |
1082 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
1083 | if (!is_retry) { | |
1084 | msleep(50); | |
1085 | is_retry = 1; | |
1086 | dprintk(1, "Retrying firmware load\n"); | |
1087 | goto retry; | |
1088 | } | |
1089 | ||
1090 | if (rc == -ENOENT) | |
1091 | rc = -EINVAL; | |
1092 | return rc; | |
1093 | } | |
11091a31 | 1094 | |
8d009a0c DF |
1095 | static void xc_debug_dump(struct xc4000_priv *priv) |
1096 | { | |
fbe4a29f IV |
1097 | u16 adc_envelope; |
1098 | u32 freq_error_hz = 0; | |
1099 | u16 lock_status; | |
1100 | u32 hsync_freq_hz = 0; | |
1101 | u16 frame_lines; | |
1102 | u16 quality; | |
8a538a88 MS |
1103 | u16 signal = 0; |
1104 | u16 noise = 0; | |
fbe4a29f IV |
1105 | u8 hw_majorversion = 0, hw_minorversion = 0; |
1106 | u8 fw_majorversion = 0, fw_minorversion = 0; | |
8d009a0c | 1107 | |
341747be | 1108 | xc_get_adc_envelope(priv, &adc_envelope); |
8d009a0c DF |
1109 | dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope); |
1110 | ||
1111 | xc_get_frequency_error(priv, &freq_error_hz); | |
1112 | dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz); | |
1113 | ||
fbe4a29f | 1114 | xc_get_lock_status(priv, &lock_status); |
8d009a0c DF |
1115 | dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n", |
1116 | lock_status); | |
1117 | ||
fbe4a29f IV |
1118 | xc_get_version(priv, &hw_majorversion, &hw_minorversion, |
1119 | &fw_majorversion, &fw_minorversion); | |
8d009a0c DF |
1120 | dprintk(1, "*** HW: V%02x.%02x, FW: V%02x.%02x\n", |
1121 | hw_majorversion, hw_minorversion, | |
1122 | fw_majorversion, fw_minorversion); | |
1123 | ||
f4312e2f IV |
1124 | if (priv->video_standard < XC4000_DTV6) { |
1125 | xc_get_hsync_freq(priv, &hsync_freq_hz); | |
1126 | dprintk(1, "*** Horizontal sync frequency = %d Hz\n", | |
1127 | hsync_freq_hz); | |
8d009a0c | 1128 | |
f4312e2f IV |
1129 | xc_get_frame_lines(priv, &frame_lines); |
1130 | dprintk(1, "*** Frame lines = %d\n", frame_lines); | |
1131 | } | |
8d009a0c | 1132 | |
fbe4a29f | 1133 | xc_get_quality(priv, &quality); |
8d009a0c | 1134 | dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality); |
8a538a88 MS |
1135 | |
1136 | xc_get_signal_level(priv, &signal); | |
1137 | dprintk(1, "*** Signal level = -%ddB (%d)\n", signal >> 8, signal); | |
1138 | ||
1139 | xc_get_noise_level(priv, &noise); | |
1140 | dprintk(1, "*** Noise level = %ddB (%d)\n", noise >> 8, noise); | |
8d009a0c DF |
1141 | } |
1142 | ||
14d24d14 | 1143 | static int xc4000_set_params(struct dvb_frontend *fe) |
8d009a0c | 1144 | { |
40d6f2b8 MCC |
1145 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
1146 | u32 delsys = c->delivery_system; | |
1147 | u32 bw = c->bandwidth_hz; | |
8d009a0c | 1148 | struct xc4000_priv *priv = fe->tuner_priv; |
ed23db32 | 1149 | unsigned int type; |
5614942b | 1150 | int ret = -EREMOTEIO; |
8d009a0c | 1151 | |
40d6f2b8 | 1152 | dprintk(1, "%s() frequency=%d (Hz)\n", __func__, c->frequency); |
8d009a0c | 1153 | |
5614942b IV |
1154 | mutex_lock(&priv->lock); |
1155 | ||
40d6f2b8 MCC |
1156 | switch (delsys) { |
1157 | case SYS_ATSC: | |
1158 | dprintk(1, "%s() VSB modulation\n", __func__); | |
1159 | priv->rf_mode = XC_RF_MODE_AIR; | |
1160 | priv->freq_hz = c->frequency - 1750000; | |
40d6f2b8 MCC |
1161 | priv->video_standard = XC4000_DTV6; |
1162 | type = DTV6; | |
1163 | break; | |
1164 | case SYS_DVBC_ANNEX_B: | |
1165 | dprintk(1, "%s() QAM modulation\n", __func__); | |
1166 | priv->rf_mode = XC_RF_MODE_CABLE; | |
1167 | priv->freq_hz = c->frequency - 1750000; | |
40d6f2b8 MCC |
1168 | priv->video_standard = XC4000_DTV6; |
1169 | type = DTV6; | |
1170 | break; | |
1171 | case SYS_DVBT: | |
1172 | case SYS_DVBT2: | |
8d009a0c | 1173 | dprintk(1, "%s() OFDM\n", __func__); |
40d6f2b8 MCC |
1174 | if (bw == 0) { |
1175 | if (c->frequency < 400000000) { | |
40d6f2b8 MCC |
1176 | priv->freq_hz = c->frequency - 2250000; |
1177 | } else { | |
40d6f2b8 MCC |
1178 | priv->freq_hz = c->frequency - 2750000; |
1179 | } | |
1180 | priv->video_standard = XC4000_DTV7_8; | |
1181 | type = DTV78; | |
1182 | } else if (bw <= 6000000) { | |
ed23db32 | 1183 | priv->video_standard = XC4000_DTV6; |
40d6f2b8 | 1184 | priv->freq_hz = c->frequency - 1750000; |
ed23db32 | 1185 | type = DTV6; |
40d6f2b8 | 1186 | } else if (bw <= 7000000) { |
f0ef7c88 | 1187 | priv->video_standard = XC4000_DTV7; |
40d6f2b8 | 1188 | priv->freq_hz = c->frequency - 2250000; |
ed23db32 | 1189 | type = DTV7; |
40d6f2b8 | 1190 | } else { |
ed23db32 | 1191 | priv->video_standard = XC4000_DTV8; |
40d6f2b8 | 1192 | priv->freq_hz = c->frequency - 2750000; |
ed23db32 | 1193 | type = DTV8; |
8d009a0c DF |
1194 | } |
1195 | priv->rf_mode = XC_RF_MODE_AIR; | |
40d6f2b8 MCC |
1196 | break; |
1197 | default: | |
1198 | printk(KERN_ERR "xc4000 delivery system not supported!\n"); | |
5614942b IV |
1199 | ret = -EINVAL; |
1200 | goto fail; | |
8d009a0c DF |
1201 | } |
1202 | ||
1203 | dprintk(1, "%s() frequency=%d (compensated)\n", | |
1204 | __func__, priv->freq_hz); | |
1205 | ||
ed23db32 | 1206 | /* Make sure the correct firmware type is loaded */ |
341747be | 1207 | if (check_firmware(fe, type, 0, priv->if_khz) != 0) |
5614942b | 1208 | goto fail; |
ed23db32 | 1209 | |
c6f56e7d MCC |
1210 | priv->bandwidth = c->bandwidth_hz; |
1211 | ||
341747be | 1212 | ret = xc_set_signal_source(priv, priv->rf_mode); |
1213 | if (ret != 0) { | |
1214 | printk(KERN_ERR "xc4000: xc_set_signal_source(%d) failed\n", | |
5614942b IV |
1215 | priv->rf_mode); |
1216 | goto fail; | |
30f544ec IV |
1217 | } else { |
1218 | u16 video_mode, audio_mode; | |
341747be | 1219 | video_mode = xc4000_standard[priv->video_standard].video_mode; |
1220 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | |
30f544ec IV |
1221 | if (type == DTV6 && priv->firm_version != 0x0102) |
1222 | video_mode |= 0x0001; | |
341747be | 1223 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); |
1224 | if (ret != 0) { | |
1225 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | |
30f544ec IV |
1226 | /* DJH - do not return when it fails... */ |
1227 | /* goto fail; */ | |
1228 | } | |
8d009a0c DF |
1229 | } |
1230 | ||
8edeb6eb | 1231 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) |
1232 | ret = 0; | |
1233 | if (priv->dvb_amplitude != 0) { | |
30f544ec | 1234 | if (xc_write_reg(priv, XREG_AMPLITUDE, |
8edeb6eb | 1235 | (priv->firm_version != 0x0102 || |
1236 | priv->dvb_amplitude != 134 ? | |
1237 | priv->dvb_amplitude : 132)) != 0) | |
30f544ec | 1238 | ret = -EREMOTEIO; |
8edeb6eb | 1239 | } |
1240 | if (priv->set_smoothedcvbs != 0) { | |
30f544ec IV |
1241 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) |
1242 | ret = -EREMOTEIO; | |
8edeb6eb | 1243 | } |
1244 | if (ret != 0) { | |
1245 | printk(KERN_ERR "xc4000: setting registers failed\n"); | |
1246 | /* goto fail; */ | |
8d009a0c | 1247 | } |
30f544ec | 1248 | |
e75873c1 | 1249 | xc_tune_channel(priv, priv->freq_hz); |
8d009a0c | 1250 | |
5614942b IV |
1251 | ret = 0; |
1252 | ||
1253 | fail: | |
1254 | mutex_unlock(&priv->lock); | |
1255 | ||
1256 | return ret; | |
8d009a0c DF |
1257 | } |
1258 | ||
8d009a0c DF |
1259 | static int xc4000_set_analog_params(struct dvb_frontend *fe, |
1260 | struct analog_parameters *params) | |
1261 | { | |
1262 | struct xc4000_priv *priv = fe->tuner_priv; | |
818a1776 | 1263 | unsigned int type = 0; |
5614942b | 1264 | int ret = -EREMOTEIO; |
8d009a0c | 1265 | |
818a1776 IV |
1266 | if (params->mode == V4L2_TUNER_RADIO) { |
1267 | dprintk(1, "%s() frequency=%d (in units of 62.5Hz)\n", | |
1268 | __func__, params->frequency); | |
1269 | ||
1270 | mutex_lock(&priv->lock); | |
1271 | ||
1272 | params->std = 0; | |
1273 | priv->freq_hz = params->frequency * 125L / 2; | |
1274 | ||
1275 | if (audio_std & XC4000_AUDIO_STD_INPUT1) { | |
1276 | priv->video_standard = XC4000_FM_Radio_INPUT1; | |
1277 | type = FM | INPUT1; | |
1278 | } else { | |
1279 | priv->video_standard = XC4000_FM_Radio_INPUT2; | |
1280 | type = FM | INPUT2; | |
1281 | } | |
1282 | ||
1283 | goto tune_channel; | |
1284 | } | |
1285 | ||
8d009a0c DF |
1286 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", |
1287 | __func__, params->frequency); | |
1288 | ||
5614942b IV |
1289 | mutex_lock(&priv->lock); |
1290 | ||
8d009a0c DF |
1291 | /* params->frequency is in units of 62.5khz */ |
1292 | priv->freq_hz = params->frequency * 62500; | |
1293 | ||
818a1776 IV |
1294 | params->std &= V4L2_STD_ALL; |
1295 | /* if std is not defined, choose one */ | |
1296 | if (!params->std) | |
1297 | params->std = V4L2_STD_PAL_BG; | |
1298 | ||
1299 | if (audio_std & XC4000_AUDIO_STD_MONO) | |
1300 | type = MONO; | |
1301 | ||
8d009a0c | 1302 | if (params->std & V4L2_STD_MN) { |
818a1776 IV |
1303 | params->std = V4L2_STD_MN; |
1304 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1305 | priv->video_standard = XC4000_MN_NTSC_PAL_Mono; | |
1306 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | |
1307 | params->std |= V4L2_STD_A2; | |
1308 | priv->video_standard = XC4000_MN_NTSC_PAL_A2; | |
1309 | } else { | |
1310 | params->std |= V4L2_STD_BTSC; | |
1311 | priv->video_standard = XC4000_MN_NTSC_PAL_BTSC; | |
1312 | } | |
8d009a0c DF |
1313 | goto tune_channel; |
1314 | } | |
1315 | ||
1316 | if (params->std & V4L2_STD_PAL_BG) { | |
818a1776 IV |
1317 | params->std = V4L2_STD_PAL_BG; |
1318 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1319 | priv->video_standard = XC4000_BG_PAL_MONO; | |
1320 | } else if (!(audio_std & XC4000_AUDIO_STD_A2)) { | |
1321 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | |
1322 | params->std |= V4L2_STD_NICAM_A; | |
1323 | priv->video_standard = XC4000_BG_PAL_NICAM; | |
1324 | } else { | |
1325 | params->std |= V4L2_STD_NICAM_B; | |
1326 | priv->video_standard = XC4000_BG_PAL_NICAM; | |
1327 | } | |
1328 | } else { | |
1329 | if (!(audio_std & XC4000_AUDIO_STD_B)) { | |
1330 | params->std |= V4L2_STD_A2_A; | |
1331 | priv->video_standard = XC4000_BG_PAL_A2; | |
1332 | } else { | |
1333 | params->std |= V4L2_STD_A2_B; | |
1334 | priv->video_standard = XC4000_BG_PAL_A2; | |
1335 | } | |
1336 | } | |
8d009a0c DF |
1337 | goto tune_channel; |
1338 | } | |
1339 | ||
1340 | if (params->std & V4L2_STD_PAL_I) { | |
1341 | /* default to NICAM audio standard */ | |
818a1776 | 1342 | params->std = V4L2_STD_PAL_I | V4L2_STD_NICAM; |
941830c9 | 1343 | if (audio_std & XC4000_AUDIO_STD_MONO) |
818a1776 | 1344 | priv->video_standard = XC4000_I_PAL_NICAM_MONO; |
941830c9 | 1345 | else |
818a1776 | 1346 | priv->video_standard = XC4000_I_PAL_NICAM; |
8d009a0c DF |
1347 | goto tune_channel; |
1348 | } | |
1349 | ||
1350 | if (params->std & V4L2_STD_PAL_DK) { | |
818a1776 IV |
1351 | params->std = V4L2_STD_PAL_DK; |
1352 | if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1353 | priv->video_standard = XC4000_DK_PAL_MONO; | |
1354 | } else if (audio_std & XC4000_AUDIO_STD_A2) { | |
1355 | params->std |= V4L2_STD_A2; | |
1356 | priv->video_standard = XC4000_DK_PAL_A2; | |
1357 | } else { | |
1358 | params->std |= V4L2_STD_NICAM; | |
1359 | priv->video_standard = XC4000_DK_PAL_NICAM; | |
1360 | } | |
8d009a0c DF |
1361 | goto tune_channel; |
1362 | } | |
1363 | ||
1364 | if (params->std & V4L2_STD_SECAM_DK) { | |
818a1776 IV |
1365 | /* default to A2 audio standard */ |
1366 | params->std = V4L2_STD_SECAM_DK | V4L2_STD_A2; | |
1367 | if (audio_std & XC4000_AUDIO_STD_L) { | |
1368 | type = 0; | |
1369 | priv->video_standard = XC4000_DK_SECAM_NICAM; | |
1370 | } else if (audio_std & XC4000_AUDIO_STD_MONO) { | |
1371 | priv->video_standard = XC4000_DK_SECAM_A2MONO; | |
1372 | } else if (audio_std & XC4000_AUDIO_STD_K3) { | |
1373 | params->std |= V4L2_STD_SECAM_K3; | |
1374 | priv->video_standard = XC4000_DK_SECAM_A2LDK3; | |
1375 | } else { | |
1376 | priv->video_standard = XC4000_DK_SECAM_A2DK1; | |
1377 | } | |
8d009a0c DF |
1378 | goto tune_channel; |
1379 | } | |
1380 | ||
1381 | if (params->std & V4L2_STD_SECAM_L) { | |
818a1776 IV |
1382 | /* default to NICAM audio standard */ |
1383 | type = 0; | |
1384 | params->std = V4L2_STD_SECAM_L | V4L2_STD_NICAM; | |
ed23db32 | 1385 | priv->video_standard = XC4000_L_SECAM_NICAM; |
8d009a0c DF |
1386 | goto tune_channel; |
1387 | } | |
1388 | ||
1389 | if (params->std & V4L2_STD_SECAM_LC) { | |
818a1776 IV |
1390 | /* default to NICAM audio standard */ |
1391 | type = 0; | |
1392 | params->std = V4L2_STD_SECAM_LC | V4L2_STD_NICAM; | |
ed23db32 | 1393 | priv->video_standard = XC4000_LC_SECAM_NICAM; |
8d009a0c DF |
1394 | goto tune_channel; |
1395 | } | |
1396 | ||
1397 | tune_channel: | |
341747be | 1398 | /* FIXME: it could be air. */ |
818a1776 | 1399 | priv->rf_mode = XC_RF_MODE_CABLE; |
ed23db32 | 1400 | |
818a1776 | 1401 | if (check_firmware(fe, type, params->std, |
341747be | 1402 | xc4000_standard[priv->video_standard].int_freq) != 0) |
5614942b | 1403 | goto fail; |
ed23db32 | 1404 | |
341747be | 1405 | ret = xc_set_signal_source(priv, priv->rf_mode); |
1406 | if (ret != 0) { | |
8d009a0c | 1407 | printk(KERN_ERR |
341747be | 1408 | "xc4000: xc_set_signal_source(%d) failed\n", |
5614942b IV |
1409 | priv->rf_mode); |
1410 | goto fail; | |
30f544ec IV |
1411 | } else { |
1412 | u16 video_mode, audio_mode; | |
341747be | 1413 | video_mode = xc4000_standard[priv->video_standard].video_mode; |
1414 | audio_mode = xc4000_standard[priv->video_standard].audio_mode; | |
30f544ec | 1415 | if (priv->video_standard < XC4000_BG_PAL_A2) { |
341747be | 1416 | if (type & NOGD) |
30f544ec IV |
1417 | video_mode &= 0xFF7F; |
1418 | } else if (priv->video_standard < XC4000_I_PAL_NICAM) { | |
8edeb6eb | 1419 | if (priv->firm_version == 0x0102) |
30f544ec | 1420 | video_mode &= 0xFEFF; |
923137a4 IV |
1421 | if (audio_std & XC4000_AUDIO_STD_B) |
1422 | video_mode |= 0x0080; | |
30f544ec | 1423 | } |
341747be | 1424 | ret = xc_set_tv_standard(priv, video_mode, audio_mode); |
1425 | if (ret != 0) { | |
1426 | printk(KERN_ERR "xc4000: xc_set_tv_standard failed\n"); | |
30f544ec IV |
1427 | goto fail; |
1428 | } | |
8d009a0c DF |
1429 | } |
1430 | ||
8edeb6eb | 1431 | if (xc_write_reg(priv, XREG_D_CODE, 0) == 0) |
1432 | ret = 0; | |
1433 | if (xc_write_reg(priv, XREG_AMPLITUDE, 1) != 0) | |
1434 | ret = -EREMOTEIO; | |
1435 | if (priv->set_smoothedcvbs != 0) { | |
30f544ec IV |
1436 | if (xc_write_reg(priv, XREG_SMOOTHEDCVBS, 1) != 0) |
1437 | ret = -EREMOTEIO; | |
8edeb6eb | 1438 | } |
1439 | if (ret != 0) { | |
1440 | printk(KERN_ERR "xc4000: setting registers failed\n"); | |
1441 | goto fail; | |
8d009a0c DF |
1442 | } |
1443 | ||
e75873c1 | 1444 | xc_tune_channel(priv, priv->freq_hz); |
8d009a0c | 1445 | |
5614942b IV |
1446 | ret = 0; |
1447 | ||
1448 | fail: | |
1449 | mutex_unlock(&priv->lock); | |
1450 | ||
1451 | return ret; | |
8d009a0c DF |
1452 | } |
1453 | ||
8a538a88 MS |
1454 | static int xc4000_get_signal(struct dvb_frontend *fe, u16 *strength) |
1455 | { | |
1456 | struct xc4000_priv *priv = fe->tuner_priv; | |
1457 | u16 value = 0; | |
1458 | int rc; | |
1459 | ||
1460 | mutex_lock(&priv->lock); | |
1461 | rc = xc4000_readreg(priv, XREG_SIGNAL_LEVEL, &value); | |
1462 | mutex_unlock(&priv->lock); | |
1463 | ||
1464 | if (rc < 0) | |
1465 | goto ret; | |
1466 | ||
1467 | /* Informations from real testing of DVB-T and radio part, | |
1468 | coeficient for one dB is 0xff. | |
1469 | */ | |
1470 | tuner_dbg("Signal strength: -%ddB (%05d)\n", value >> 8, value); | |
1471 | ||
1472 | /* all known digital modes */ | |
1473 | if ((priv->video_standard == XC4000_DTV6) || | |
1474 | (priv->video_standard == XC4000_DTV7) || | |
1475 | (priv->video_standard == XC4000_DTV7_8) || | |
1476 | (priv->video_standard == XC4000_DTV8)) | |
1477 | goto digital; | |
1478 | ||
1479 | /* Analog mode has NOISE LEVEL important, signal | |
1480 | depends only on gain of antenna and amplifiers, | |
1481 | but it doesn't tell anything about real quality | |
1482 | of reception. | |
1483 | */ | |
1484 | mutex_lock(&priv->lock); | |
1485 | rc = xc4000_readreg(priv, XREG_NOISE_LEVEL, &value); | |
1486 | mutex_unlock(&priv->lock); | |
1487 | ||
1488 | tuner_dbg("Noise level: %ddB (%05d)\n", value >> 8, value); | |
1489 | ||
1490 | /* highest noise level: 32dB */ | |
1491 | if (value >= 0x2000) { | |
1492 | value = 0; | |
1493 | } else { | |
1494 | value = ~value << 3; | |
1495 | } | |
1496 | ||
1497 | goto ret; | |
1498 | ||
1499 | /* Digital mode has SIGNAL LEVEL important and real | |
1500 | noise level is stored in demodulator registers. | |
1501 | */ | |
1502 | digital: | |
1503 | /* best signal: -50dB */ | |
1504 | if (value <= 0x3200) { | |
1505 | value = 0xffff; | |
1506 | /* minimum: -114dB - should be 0x7200 but real zero is 0x713A */ | |
1507 | } else if (value >= 0x713A) { | |
1508 | value = 0; | |
1509 | } else { | |
1510 | value = ~(value - 0x3200) << 2; | |
1511 | } | |
1512 | ||
1513 | ret: | |
1514 | *strength = value; | |
1515 | ||
1516 | return rc; | |
1517 | } | |
1518 | ||
8d009a0c DF |
1519 | static int xc4000_get_frequency(struct dvb_frontend *fe, u32 *freq) |
1520 | { | |
1521 | struct xc4000_priv *priv = fe->tuner_priv; | |
f4312e2f | 1522 | |
8d009a0c | 1523 | *freq = priv->freq_hz; |
f4312e2f IV |
1524 | |
1525 | if (debug) { | |
1526 | mutex_lock(&priv->lock); | |
1527 | if ((priv->cur_fw.type | |
1528 | & (BASE | FM | DTV6 | DTV7 | DTV78 | DTV8)) == BASE) { | |
1529 | u16 snr = 0; | |
1530 | if (xc4000_readreg(priv, XREG_SNR, &snr) == 0) { | |
1531 | mutex_unlock(&priv->lock); | |
1532 | dprintk(1, "%s() freq = %u, SNR = %d\n", | |
1533 | __func__, *freq, snr); | |
1534 | return 0; | |
1535 | } | |
1536 | } | |
1537 | mutex_unlock(&priv->lock); | |
1538 | } | |
1539 | ||
1540 | dprintk(1, "%s()\n", __func__); | |
1541 | ||
8d009a0c DF |
1542 | return 0; |
1543 | } | |
1544 | ||
1545 | static int xc4000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) | |
1546 | { | |
1547 | struct xc4000_priv *priv = fe->tuner_priv; | |
1548 | dprintk(1, "%s()\n", __func__); | |
1549 | ||
1550 | *bw = priv->bandwidth; | |
1551 | return 0; | |
1552 | } | |
1553 | ||
1554 | static int xc4000_get_status(struct dvb_frontend *fe, u32 *status) | |
1555 | { | |
1556 | struct xc4000_priv *priv = fe->tuner_priv; | |
fbe4a29f | 1557 | u16 lock_status = 0; |
8d009a0c | 1558 | |
5614942b IV |
1559 | mutex_lock(&priv->lock); |
1560 | ||
f4312e2f IV |
1561 | if (priv->cur_fw.type & BASE) |
1562 | xc_get_lock_status(priv, &lock_status); | |
8d009a0c | 1563 | |
f4312e2f IV |
1564 | *status = (lock_status == 1 ? |
1565 | TUNER_STATUS_LOCKED | TUNER_STATUS_STEREO : 0); | |
1566 | if (priv->cur_fw.type & (DTV6 | DTV7 | DTV78 | DTV8)) | |
1567 | *status &= (~TUNER_STATUS_STEREO); | |
5614942b | 1568 | |
f4312e2f | 1569 | mutex_unlock(&priv->lock); |
8d009a0c | 1570 | |
f4312e2f | 1571 | dprintk(2, "%s() lock_status = %d\n", __func__, lock_status); |
8d009a0c DF |
1572 | |
1573 | return 0; | |
1574 | } | |
1575 | ||
8d009a0c DF |
1576 | static int xc4000_sleep(struct dvb_frontend *fe) |
1577 | { | |
5272f6b1 | 1578 | struct xc4000_priv *priv = fe->tuner_priv; |
341747be | 1579 | int ret = 0; |
5272f6b1 IV |
1580 | |
1581 | dprintk(1, "%s()\n", __func__); | |
1582 | ||
1583 | mutex_lock(&priv->lock); | |
1584 | ||
1585 | /* Avoid firmware reload on slow devices */ | |
1586 | if ((no_poweroff == 2 || | |
8edeb6eb | 1587 | (no_poweroff == 0 && priv->default_pm != 0)) && |
5272f6b1 IV |
1588 | (priv->cur_fw.type & BASE) != 0) { |
1589 | /* force reset and firmware reload */ | |
1590 | priv->cur_fw.type = XC_POWERED_DOWN; | |
1591 | ||
341747be | 1592 | if (xc_write_reg(priv, XREG_POWER_DOWN, 0) != 0) { |
5272f6b1 IV |
1593 | printk(KERN_ERR |
1594 | "xc4000: %s() unable to shutdown tuner\n", | |
1595 | __func__); | |
1596 | ret = -EREMOTEIO; | |
1597 | } | |
341747be | 1598 | msleep(20); |
5272f6b1 IV |
1599 | } |
1600 | ||
1601 | mutex_unlock(&priv->lock); | |
1602 | ||
1603 | return ret; | |
8d009a0c DF |
1604 | } |
1605 | ||
1606 | static int xc4000_init(struct dvb_frontend *fe) | |
1607 | { | |
8d009a0c DF |
1608 | dprintk(1, "%s()\n", __func__); |
1609 | ||
8d009a0c DF |
1610 | return 0; |
1611 | } | |
1612 | ||
1613 | static int xc4000_release(struct dvb_frontend *fe) | |
1614 | { | |
1615 | struct xc4000_priv *priv = fe->tuner_priv; | |
1616 | ||
1617 | dprintk(1, "%s()\n", __func__); | |
1618 | ||
1619 | mutex_lock(&xc4000_list_mutex); | |
1620 | ||
1621 | if (priv) | |
1622 | hybrid_tuner_release_state(priv); | |
1623 | ||
1624 | mutex_unlock(&xc4000_list_mutex); | |
1625 | ||
1626 | fe->tuner_priv = NULL; | |
1627 | ||
1628 | return 0; | |
1629 | } | |
1630 | ||
1631 | static const struct dvb_tuner_ops xc4000_tuner_ops = { | |
1632 | .info = { | |
1633 | .name = "Xceive XC4000", | |
1634 | .frequency_min = 1000000, | |
1635 | .frequency_max = 1023000000, | |
1636 | .frequency_step = 50000, | |
1637 | }, | |
1638 | ||
1639 | .release = xc4000_release, | |
1640 | .init = xc4000_init, | |
1641 | .sleep = xc4000_sleep, | |
1642 | ||
1643 | .set_params = xc4000_set_params, | |
1644 | .set_analog_params = xc4000_set_analog_params, | |
1645 | .get_frequency = xc4000_get_frequency, | |
8a538a88 | 1646 | .get_rf_strength = xc4000_get_signal, |
8d009a0c DF |
1647 | .get_bandwidth = xc4000_get_bandwidth, |
1648 | .get_status = xc4000_get_status | |
1649 | }; | |
1650 | ||
1651 | struct dvb_frontend *xc4000_attach(struct dvb_frontend *fe, | |
1652 | struct i2c_adapter *i2c, | |
1653 | struct xc4000_config *cfg) | |
1654 | { | |
1655 | struct xc4000_priv *priv = NULL; | |
fbe4a29f IV |
1656 | int instance; |
1657 | u16 id = 0; | |
8d009a0c DF |
1658 | |
1659 | dprintk(1, "%s(%d-%04x)\n", __func__, | |
1660 | i2c ? i2c_adapter_id(i2c) : -1, | |
1661 | cfg ? cfg->i2c_address : -1); | |
1662 | ||
1663 | mutex_lock(&xc4000_list_mutex); | |
1664 | ||
1665 | instance = hybrid_tuner_request_state(struct xc4000_priv, priv, | |
1666 | hybrid_tuner_instance_list, | |
1667 | i2c, cfg->i2c_address, "xc4000"); | |
1668 | switch (instance) { | |
1669 | case 0: | |
1670 | goto fail; | |
1671 | break; | |
1672 | case 1: | |
1673 | /* new tuner instance */ | |
c6f56e7d | 1674 | priv->bandwidth = 6000000; |
8edeb6eb | 1675 | /* set default configuration */ |
1676 | priv->if_khz = 4560; | |
1677 | priv->default_pm = 0; | |
1678 | priv->dvb_amplitude = 134; | |
1679 | priv->set_smoothedcvbs = 1; | |
5614942b | 1680 | mutex_init(&priv->lock); |
8d009a0c DF |
1681 | fe->tuner_priv = priv; |
1682 | break; | |
1683 | default: | |
1684 | /* existing tuner instance */ | |
1685 | fe->tuner_priv = priv; | |
1686 | break; | |
1687 | } | |
1688 | ||
0b402132 | 1689 | if (cfg->if_khz != 0) { |
8edeb6eb | 1690 | /* copy configuration if provided by the caller */ |
8d009a0c | 1691 | priv->if_khz = cfg->if_khz; |
8edeb6eb | 1692 | priv->default_pm = cfg->default_pm; |
1693 | priv->dvb_amplitude = cfg->dvb_amplitude; | |
1694 | priv->set_smoothedcvbs = cfg->set_smoothedcvbs; | |
8d009a0c DF |
1695 | } |
1696 | ||
1697 | /* Check if firmware has been loaded. It is possible that another | |
1698 | instance of the driver has loaded the firmware. | |
1699 | */ | |
1700 | ||
027fd361 | 1701 | if (instance == 1) { |
341747be | 1702 | if (xc4000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) |
8d009a0c | 1703 | goto fail; |
027fd361 IV |
1704 | } else { |
1705 | id = ((priv->cur_fw.type & BASE) != 0 ? | |
1706 | priv->hwmodel : XC_PRODUCT_ID_FW_NOT_LOADED); | |
1707 | } | |
8d009a0c DF |
1708 | |
1709 | switch (id) { | |
7db98fe6 IV |
1710 | case XC_PRODUCT_ID_XC4000: |
1711 | case XC_PRODUCT_ID_XC4100: | |
8d009a0c DF |
1712 | printk(KERN_INFO |
1713 | "xc4000: Successfully identified at address 0x%02x\n", | |
1714 | cfg->i2c_address); | |
1715 | printk(KERN_INFO | |
1716 | "xc4000: Firmware has been loaded previously\n"); | |
1717 | break; | |
1718 | case XC_PRODUCT_ID_FW_NOT_LOADED: | |
1719 | printk(KERN_INFO | |
1720 | "xc4000: Successfully identified at address 0x%02x\n", | |
1721 | cfg->i2c_address); | |
1722 | printk(KERN_INFO | |
1723 | "xc4000: Firmware has not been loaded previously\n"); | |
1724 | break; | |
1725 | default: | |
1726 | printk(KERN_ERR | |
1727 | "xc4000: Device not found at addr 0x%02x (0x%x)\n", | |
1728 | cfg->i2c_address, id); | |
1729 | goto fail; | |
1730 | } | |
1731 | ||
1732 | mutex_unlock(&xc4000_list_mutex); | |
1733 | ||
1734 | memcpy(&fe->ops.tuner_ops, &xc4000_tuner_ops, | |
1735 | sizeof(struct dvb_tuner_ops)); | |
1736 | ||
027fd361 IV |
1737 | if (instance == 1) { |
1738 | int ret; | |
1739 | mutex_lock(&priv->lock); | |
1740 | ret = xc4000_fwupload(fe); | |
1741 | mutex_unlock(&priv->lock); | |
341747be | 1742 | if (ret != 0) |
027fd361 IV |
1743 | goto fail2; |
1744 | } | |
11091a31 | 1745 | |
8d009a0c DF |
1746 | return fe; |
1747 | fail: | |
1748 | mutex_unlock(&xc4000_list_mutex); | |
027fd361 | 1749 | fail2: |
8d009a0c DF |
1750 | xc4000_release(fe); |
1751 | return NULL; | |
1752 | } | |
1753 | EXPORT_SYMBOL(xc4000_attach); | |
1754 | ||
1755 | MODULE_AUTHOR("Steven Toth, Davide Ferri"); | |
1756 | MODULE_DESCRIPTION("Xceive xc4000 silicon tuner driver"); | |
1757 | MODULE_LICENSE("GPL"); |