Commit | Line | Data |
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6cb45879 MCC |
1 | /* tuner-xc2028 |
2 | * | |
33e53161 | 3 | * Copyright (c) 2007-2008 Mauro Carvalho Chehab (mchehab@infradead.org) |
983d214e | 4 | * |
701672eb ML |
5 | * Copyright (c) 2007 Michel Ludwig (michel.ludwig@gmail.com) |
6 | * - frontend interface | |
983d214e | 7 | * |
6cb45879 MCC |
8 | * This code is placed under the terms of the GNU General Public License v2 |
9 | */ | |
10 | ||
11 | #include <linux/i2c.h> | |
12 | #include <asm/div64.h> | |
13 | #include <linux/firmware.h> | |
ab0b9fc6 | 14 | #include <linux/videodev2.h> |
6cb45879 | 15 | #include <linux/delay.h> |
701672eb | 16 | #include <media/tuner.h> |
3b20532c | 17 | #include <linux/mutex.h> |
5a0e3ad6 | 18 | #include <linux/slab.h> |
84a9f336 | 19 | #include <asm/unaligned.h> |
215b95ba | 20 | #include "tuner-i2c.h" |
6cb45879 | 21 | #include "tuner-xc2028.h" |
de3fe21b | 22 | #include "tuner-xc2028-types.h" |
6cb45879 | 23 | |
701672eb ML |
24 | #include <linux/dvb/frontend.h> |
25 | #include "dvb_frontend.h" | |
26 | ||
ef8c1888 | 27 | |
83fb340b MCC |
28 | static int debug; |
29 | module_param(debug, int, 0644); | |
30 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); | |
31 | ||
74a89b2a MCC |
32 | static int no_poweroff; |
33 | module_param(no_poweroff, int, 0644); | |
4900877b | 34 | MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n" |
74a89b2a MCC |
35 | "1 keep device energized and with tuner ready all the times.\n" |
36 | " Faster, but consumes more power and keeps the device hotter\n"); | |
37 | ||
a82200fb MCC |
38 | static char audio_std[8]; |
39 | module_param_string(audio_std, audio_std, sizeof(audio_std), 0); | |
40 | MODULE_PARM_DESC(audio_std, | |
41 | "Audio standard. XC3028 audio decoder explicitly " | |
42 | "needs to know what audio\n" | |
43 | "standard is needed for some video standards with audio A2 or NICAM.\n" | |
44 | "The valid values are:\n" | |
45 | "A2\n" | |
46 | "A2/A\n" | |
47 | "A2/B\n" | |
48 | "NICAM\n" | |
49 | "NICAM/A\n" | |
50 | "NICAM/B\n"); | |
51 | ||
4327b77e | 52 | static char firmware_name[30]; |
5c913c05 MCC |
53 | module_param_string(firmware_name, firmware_name, sizeof(firmware_name), 0); |
54 | MODULE_PARM_DESC(firmware_name, "Firmware file name. Allows overriding the " | |
55 | "default firmware name\n"); | |
56 | ||
c663d035 | 57 | static LIST_HEAD(hybrid_tuner_instance_list); |
aa501be9 CP |
58 | static DEFINE_MUTEX(xc2028_list_mutex); |
59 | ||
de3fe21b MCC |
60 | /* struct for storing firmware table */ |
61 | struct firmware_description { | |
62 | unsigned int type; | |
63 | v4l2_std_id id; | |
66c2d53d | 64 | __u16 int_freq; |
de3fe21b MCC |
65 | unsigned char *ptr; |
66 | unsigned int size; | |
67 | }; | |
6cb45879 | 68 | |
e0f0b37a CP |
69 | struct firmware_properties { |
70 | unsigned int type; | |
71 | v4l2_std_id id; | |
72 | v4l2_std_id std_req; | |
66c2d53d | 73 | __u16 int_freq; |
e0f0b37a CP |
74 | unsigned int scode_table; |
75 | int scode_nr; | |
76 | }; | |
77 | ||
6cb45879 | 78 | struct xc2028_data { |
c663d035 | 79 | struct list_head hybrid_tuner_instance_list; |
215b95ba | 80 | struct tuner_i2c_props i2c_props; |
de3fe21b MCC |
81 | __u32 frequency; |
82 | ||
83 | struct firmware_description *firm; | |
84 | int firm_size; | |
06fd82dc | 85 | __u16 firm_version; |
de3fe21b | 86 | |
8bf799a6 CP |
87 | __u16 hwmodel; |
88 | __u16 hwvers; | |
89 | ||
de3fe21b | 90 | struct xc2028_ctrl ctrl; |
215b95ba | 91 | |
e0f0b37a | 92 | struct firmware_properties cur_fw; |
215b95ba MCC |
93 | |
94 | struct mutex lock; | |
6cb45879 MCC |
95 | }; |
96 | ||
47cc5b78 CP |
97 | #define i2c_send(priv, buf, size) ({ \ |
98 | int _rc; \ | |
99 | _rc = tuner_i2c_xfer_send(&priv->i2c_props, buf, size); \ | |
100 | if (size != _rc) \ | |
101 | tuner_info("i2c output error: rc = %d (should be %d)\n",\ | |
102 | _rc, (int)size); \ | |
e5cc2bf4 | 103 | msleep(priv->ctrl.msleep); \ |
47cc5b78 CP |
104 | _rc; \ |
105 | }) | |
106 | ||
107 | #define i2c_rcv(priv, buf, size) ({ \ | |
108 | int _rc; \ | |
109 | _rc = tuner_i2c_xfer_recv(&priv->i2c_props, buf, size); \ | |
110 | if (size != _rc) \ | |
83fb340b | 111 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ |
47cc5b78 CP |
112 | _rc, (int)size); \ |
113 | _rc; \ | |
114 | }) | |
ab0b9fc6 | 115 | |
7d58d111 CP |
116 | #define i2c_send_recv(priv, obuf, osize, ibuf, isize) ({ \ |
117 | int _rc; \ | |
118 | _rc = tuner_i2c_xfer_send_recv(&priv->i2c_props, obuf, osize, \ | |
119 | ibuf, isize); \ | |
120 | if (isize != _rc) \ | |
121 | tuner_err("i2c input error: rc = %d (should be %d)\n", \ | |
122 | _rc, (int)isize); \ | |
e5cc2bf4 | 123 | msleep(priv->ctrl.msleep); \ |
7d58d111 CP |
124 | _rc; \ |
125 | }) | |
126 | ||
47cc5b78 | 127 | #define send_seq(priv, data...) ({ \ |
215b95ba | 128 | static u8 _val[] = data; \ |
47cc5b78 | 129 | int _rc; \ |
6cb45879 | 130 | if (sizeof(_val) != \ |
47cc5b78 | 131 | (_rc = tuner_i2c_xfer_send(&priv->i2c_props, \ |
215b95ba | 132 | _val, sizeof(_val)))) { \ |
47cc5b78 CP |
133 | tuner_err("Error on line %d: %d\n", __LINE__, _rc); \ |
134 | } else \ | |
e5cc2bf4 | 135 | msleep(priv->ctrl.msleep); \ |
47cc5b78 CP |
136 | _rc; \ |
137 | }) | |
6cb45879 | 138 | |
83244025 | 139 | static int xc2028_get_reg(struct xc2028_data *priv, u16 reg, u16 *val) |
6cb45879 | 140 | { |
b873e1a3 | 141 | unsigned char buf[2]; |
7d58d111 | 142 | unsigned char ibuf[2]; |
215b95ba | 143 | |
7e28adb2 | 144 | tuner_dbg("%s %04x called\n", __func__, reg); |
6cb45879 | 145 | |
7d58d111 | 146 | buf[0] = reg >> 8; |
80b52208 | 147 | buf[1] = (unsigned char) reg; |
6cb45879 | 148 | |
7d58d111 CP |
149 | if (i2c_send_recv(priv, buf, 2, ibuf, 2) != 2) |
150 | return -EIO; | |
6cb45879 | 151 | |
7d58d111 CP |
152 | *val = (ibuf[1]) | (ibuf[0] << 8); |
153 | return 0; | |
6cb45879 MCC |
154 | } |
155 | ||
e0262688 | 156 | #define dump_firm_type(t) dump_firm_type_and_int_freq(t, 0) |
29bec0bf | 157 | static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) |
43efe702 MCC |
158 | { |
159 | if (type & BASE) | |
160 | printk("BASE "); | |
f380e1d2 MCC |
161 | if (type & INIT1) |
162 | printk("INIT1 "); | |
43efe702 MCC |
163 | if (type & F8MHZ) |
164 | printk("F8MHZ "); | |
165 | if (type & MTS) | |
166 | printk("MTS "); | |
167 | if (type & D2620) | |
168 | printk("D2620 "); | |
169 | if (type & D2633) | |
170 | printk("D2633 "); | |
171 | if (type & DTV6) | |
172 | printk("DTV6 "); | |
173 | if (type & QAM) | |
174 | printk("QAM "); | |
175 | if (type & DTV7) | |
176 | printk("DTV7 "); | |
177 | if (type & DTV78) | |
178 | printk("DTV78 "); | |
179 | if (type & DTV8) | |
180 | printk("DTV8 "); | |
181 | if (type & FM) | |
182 | printk("FM "); | |
183 | if (type & INPUT1) | |
184 | printk("INPUT1 "); | |
185 | if (type & LCD) | |
186 | printk("LCD "); | |
187 | if (type & NOGD) | |
188 | printk("NOGD "); | |
189 | if (type & MONO) | |
190 | printk("MONO "); | |
191 | if (type & ATSC) | |
192 | printk("ATSC "); | |
193 | if (type & IF) | |
194 | printk("IF "); | |
195 | if (type & LG60) | |
196 | printk("LG60 "); | |
197 | if (type & ATI638) | |
198 | printk("ATI638 "); | |
199 | if (type & OREN538) | |
200 | printk("OREN538 "); | |
201 | if (type & OREN36) | |
202 | printk("OREN36 "); | |
203 | if (type & TOYOTA388) | |
204 | printk("TOYOTA388 "); | |
205 | if (type & TOYOTA794) | |
206 | printk("TOYOTA794 "); | |
207 | if (type & DIBCOM52) | |
208 | printk("DIBCOM52 "); | |
209 | if (type & ZARLINK456) | |
210 | printk("ZARLINK456 "); | |
211 | if (type & CHINA) | |
212 | printk("CHINA "); | |
213 | if (type & F6MHZ) | |
214 | printk("F6MHZ "); | |
215 | if (type & INPUT2) | |
216 | printk("INPUT2 "); | |
217 | if (type & SCODE) | |
218 | printk("SCODE "); | |
e0262688 CP |
219 | if (type & HAS_IF) |
220 | printk("HAS_IF_%d ", int_freq); | |
43efe702 MCC |
221 | } |
222 | ||
ef8c1888 | 223 | static v4l2_std_id parse_audio_std_option(void) |
a82200fb | 224 | { |
e155d908 | 225 | if (strcasecmp(audio_std, "A2") == 0) |
a82200fb | 226 | return V4L2_STD_A2; |
e155d908 | 227 | if (strcasecmp(audio_std, "A2/A") == 0) |
a82200fb | 228 | return V4L2_STD_A2_A; |
e155d908 | 229 | if (strcasecmp(audio_std, "A2/B") == 0) |
a82200fb | 230 | return V4L2_STD_A2_B; |
e155d908 | 231 | if (strcasecmp(audio_std, "NICAM") == 0) |
a82200fb | 232 | return V4L2_STD_NICAM; |
e155d908 | 233 | if (strcasecmp(audio_std, "NICAM/A") == 0) |
a82200fb | 234 | return V4L2_STD_NICAM_A; |
e155d908 | 235 | if (strcasecmp(audio_std, "NICAM/B") == 0) |
a82200fb MCC |
236 | return V4L2_STD_NICAM_B; |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
ab0b9fc6 | 241 | static void free_firmware(struct xc2028_data *priv) |
6cb45879 | 242 | { |
de3fe21b | 243 | int i; |
92b75ab0 | 244 | tuner_dbg("%s called\n", __func__); |
de3fe21b MCC |
245 | |
246 | if (!priv->firm) | |
247 | return; | |
248 | ||
ab0b9fc6 MCC |
249 | for (i = 0; i < priv->firm_size; i++) |
250 | kfree(priv->firm[i].ptr); | |
251 | ||
de3fe21b MCC |
252 | kfree(priv->firm); |
253 | ||
ab0b9fc6 | 254 | priv->firm = NULL; |
06fd82dc | 255 | priv->firm_size = 0; |
e0f0b37a CP |
256 | |
257 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
de3fe21b MCC |
258 | } |
259 | ||
ab0b9fc6 | 260 | static int load_all_firmwares(struct dvb_frontend *fe) |
de3fe21b MCC |
261 | { |
262 | struct xc2028_data *priv = fe->tuner_priv; | |
ab0b9fc6 | 263 | const struct firmware *fw = NULL; |
c63e87e9 | 264 | const unsigned char *p, *endp; |
ab0b9fc6 MCC |
265 | int rc = 0; |
266 | int n, n_array; | |
de3fe21b | 267 | char name[33]; |
5c913c05 | 268 | char *fname; |
6cb45879 | 269 | |
7e28adb2 | 270 | tuner_dbg("%s called\n", __func__); |
215b95ba | 271 | |
5c913c05 MCC |
272 | if (!firmware_name[0]) |
273 | fname = priv->ctrl.fname; | |
274 | else | |
275 | fname = firmware_name; | |
276 | ||
277 | tuner_dbg("Reading firmware %s\n", fname); | |
e9785250 | 278 | rc = request_firmware(&fw, fname, priv->i2c_props.adap->dev.parent); |
6cb45879 | 279 | if (rc < 0) { |
ab0b9fc6 | 280 | if (rc == -ENOENT) |
83fb340b | 281 | tuner_err("Error: firmware %s not found.\n", |
5c913c05 | 282 | fname); |
2e4160ca | 283 | else |
83fb340b | 284 | tuner_err("Error %d while requesting firmware %s \n", |
5c913c05 | 285 | rc, fname); |
2e4160ca | 286 | |
6cb45879 MCC |
287 | return rc; |
288 | } | |
ab0b9fc6 MCC |
289 | p = fw->data; |
290 | endp = p + fw->size; | |
6cb45879 | 291 | |
06fd82dc CP |
292 | if (fw->size < sizeof(name) - 1 + 2 + 2) { |
293 | tuner_err("Error: firmware file %s has invalid size!\n", | |
5c913c05 | 294 | fname); |
06fd82dc | 295 | goto corrupt; |
6cb45879 | 296 | } |
de3fe21b | 297 | |
ab0b9fc6 MCC |
298 | memcpy(name, p, sizeof(name) - 1); |
299 | name[sizeof(name) - 1] = 0; | |
300 | p += sizeof(name) - 1; | |
de3fe21b | 301 | |
84a9f336 | 302 | priv->firm_version = get_unaligned_le16(p); |
de3fe21b MCC |
303 | p += 2; |
304 | ||
84a9f336 | 305 | n_array = get_unaligned_le16(p); |
de3fe21b MCC |
306 | p += 2; |
307 | ||
06fd82dc | 308 | tuner_info("Loading %d firmware images from %s, type: %s, ver %d.%d\n", |
5c913c05 | 309 | n_array, fname, name, |
06fd82dc | 310 | priv->firm_version >> 8, priv->firm_version & 0xff); |
de3fe21b | 311 | |
ab0b9fc6 | 312 | priv->firm = kzalloc(sizeof(*priv->firm) * n_array, GFP_KERNEL); |
06fd82dc CP |
313 | if (priv->firm == NULL) { |
314 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 315 | rc = -ENOMEM; |
06fd82dc | 316 | goto err; |
6cb45879 | 317 | } |
de3fe21b | 318 | priv->firm_size = n_array; |
06fd82dc | 319 | |
ab0b9fc6 MCC |
320 | n = -1; |
321 | while (p < endp) { | |
de3fe21b MCC |
322 | __u32 type, size; |
323 | v4l2_std_id id; | |
66c2d53d | 324 | __u16 int_freq = 0; |
de3fe21b MCC |
325 | |
326 | n++; | |
327 | if (n >= n_array) { | |
06fd82dc CP |
328 | tuner_err("More firmware images in file than " |
329 | "were expected!\n"); | |
de3fe21b MCC |
330 | goto corrupt; |
331 | } | |
332 | ||
333 | /* Checks if there's enough bytes to read */ | |
84a9f336 AV |
334 | if (endp - p < sizeof(type) + sizeof(id) + sizeof(size)) |
335 | goto header; | |
de3fe21b | 336 | |
84a9f336 | 337 | type = get_unaligned_le32(p); |
de3fe21b MCC |
338 | p += sizeof(type); |
339 | ||
84a9f336 | 340 | id = get_unaligned_le64(p); |
de3fe21b MCC |
341 | p += sizeof(id); |
342 | ||
66c2d53d | 343 | if (type & HAS_IF) { |
84a9f336 | 344 | int_freq = get_unaligned_le16(p); |
66c2d53d | 345 | p += sizeof(int_freq); |
84a9f336 AV |
346 | if (endp - p < sizeof(size)) |
347 | goto header; | |
66c2d53d MCC |
348 | } |
349 | ||
84a9f336 | 350 | size = get_unaligned_le32(p); |
de3fe21b MCC |
351 | p += sizeof(size); |
352 | ||
84a9f336 | 353 | if (!size || size > endp - p) { |
83fb340b | 354 | tuner_err("Firmware type "); |
43efe702 | 355 | dump_firm_type(type); |
ef8c1888 MCC |
356 | printk("(%x), id %llx is corrupted " |
357 | "(size=%d, expected %d)\n", | |
91240dd9 | 358 | type, (unsigned long long)id, |
ef8c1888 | 359 | (unsigned)(endp - p), size); |
de3fe21b MCC |
360 | goto corrupt; |
361 | } | |
362 | ||
ab0b9fc6 | 363 | priv->firm[n].ptr = kzalloc(size, GFP_KERNEL); |
06fd82dc CP |
364 | if (priv->firm[n].ptr == NULL) { |
365 | tuner_err("Not enough memory to load firmware file.\n"); | |
ab0b9fc6 | 366 | rc = -ENOMEM; |
de3fe21b MCC |
367 | goto err; |
368 | } | |
06fd82dc CP |
369 | tuner_dbg("Reading firmware type "); |
370 | if (debug) { | |
e0262688 | 371 | dump_firm_type_and_int_freq(type, int_freq); |
06fd82dc | 372 | printk("(%x), id %llx, size=%d.\n", |
e0262688 | 373 | type, (unsigned long long)id, size); |
06fd82dc | 374 | } |
de3fe21b MCC |
375 | |
376 | memcpy(priv->firm[n].ptr, p, size); | |
377 | priv->firm[n].type = type; | |
378 | priv->firm[n].id = id; | |
379 | priv->firm[n].size = size; | |
66c2d53d | 380 | priv->firm[n].int_freq = int_freq; |
de3fe21b MCC |
381 | |
382 | p += size; | |
383 | } | |
384 | ||
ab0b9fc6 | 385 | if (n + 1 != priv->firm_size) { |
83fb340b | 386 | tuner_err("Firmware file is incomplete!\n"); |
de3fe21b MCC |
387 | goto corrupt; |
388 | } | |
389 | ||
390 | goto done; | |
391 | ||
84a9f336 AV |
392 | header: |
393 | tuner_err("Firmware header is incomplete!\n"); | |
de3fe21b | 394 | corrupt: |
ab0b9fc6 | 395 | rc = -EINVAL; |
83fb340b | 396 | tuner_err("Error: firmware file is corrupted!\n"); |
de3fe21b MCC |
397 | |
398 | err: | |
06fd82dc | 399 | tuner_info("Releasing partially loaded firmware file.\n"); |
de3fe21b MCC |
400 | free_firmware(priv); |
401 | ||
402 | done: | |
403 | release_firmware(fw); | |
06fd82dc CP |
404 | if (rc == 0) |
405 | tuner_dbg("Firmware files loaded.\n"); | |
de3fe21b MCC |
406 | |
407 | return rc; | |
408 | } | |
409 | ||
f380e1d2 MCC |
410 | static int seek_firmware(struct dvb_frontend *fe, unsigned int type, |
411 | v4l2_std_id *id) | |
de3fe21b MCC |
412 | { |
413 | struct xc2028_data *priv = fe->tuner_priv; | |
b1535293 | 414 | int i, best_i = -1, best_nr_matches = 0; |
33e53161 | 415 | unsigned int type_mask = 0; |
de3fe21b | 416 | |
7e28adb2 | 417 | tuner_dbg("%s called, want type=", __func__); |
b1535293 CP |
418 | if (debug) { |
419 | dump_firm_type(type); | |
420 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); | |
421 | } | |
de3fe21b MCC |
422 | |
423 | if (!priv->firm) { | |
83fb340b | 424 | tuner_err("Error! firmware not loaded\n"); |
de3fe21b MCC |
425 | return -EINVAL; |
426 | } | |
427 | ||
f380e1d2 | 428 | if (((type & ~SCODE) == 0) && (*id == 0)) |
ab0b9fc6 | 429 | *id = V4L2_STD_PAL; |
de3fe21b | 430 | |
e0f0b37a | 431 | if (type & BASE) |
33e53161 | 432 | type_mask = BASE_TYPES; |
ef207fed | 433 | else if (type & SCODE) { |
e0f0b37a | 434 | type &= SCODE_TYPES; |
33e53161 | 435 | type_mask = SCODE_TYPES & ~HAS_IF; |
ef207fed | 436 | } else if (type & DTV_TYPES) |
33e53161 | 437 | type_mask = DTV_TYPES; |
11a9eff9 | 438 | else if (type & STD_SPECIFIC_TYPES) |
33e53161 MCC |
439 | type_mask = STD_SPECIFIC_TYPES; |
440 | ||
441 | type &= type_mask; | |
442 | ||
8367fe24 | 443 | if (!(type & SCODE)) |
33e53161 | 444 | type_mask = ~0; |
e0f0b37a | 445 | |
de3fe21b | 446 | /* Seek for exact match */ |
ab0b9fc6 | 447 | for (i = 0; i < priv->firm_size; i++) { |
33e53161 | 448 | if ((type == (priv->firm[i].type & type_mask)) && |
ef207fed | 449 | (*id == priv->firm[i].id)) |
de3fe21b MCC |
450 | goto found; |
451 | } | |
452 | ||
453 | /* Seek for generic video standard match */ | |
ab0b9fc6 | 454 | for (i = 0; i < priv->firm_size; i++) { |
b1535293 CP |
455 | v4l2_std_id match_mask; |
456 | int nr_matches; | |
457 | ||
33e53161 | 458 | if (type != (priv->firm[i].type & type_mask)) |
b1535293 CP |
459 | continue; |
460 | ||
461 | match_mask = *id & priv->firm[i].id; | |
462 | if (!match_mask) | |
463 | continue; | |
464 | ||
465 | if ((*id & match_mask) == *id) | |
466 | goto found; /* Supports all the requested standards */ | |
467 | ||
468 | nr_matches = hweight64(match_mask); | |
469 | if (nr_matches > best_nr_matches) { | |
470 | best_nr_matches = nr_matches; | |
471 | best_i = i; | |
472 | } | |
473 | } | |
474 | ||
475 | if (best_nr_matches > 0) { | |
476 | tuner_dbg("Selecting best matching firmware (%d bits) for " | |
477 | "type=", best_nr_matches); | |
478 | dump_firm_type(type); | |
479 | printk("(%x), id %016llx:\n", type, (unsigned long long)*id); | |
480 | i = best_i; | |
481 | goto found; | |
de3fe21b MCC |
482 | } |
483 | ||
484 | /*FIXME: Would make sense to seek for type "hint" match ? */ | |
485 | ||
b1535293 | 486 | i = -ENOENT; |
f380e1d2 | 487 | goto ret; |
de3fe21b MCC |
488 | |
489 | found: | |
490 | *id = priv->firm[i].id; | |
de3fe21b | 491 | |
f380e1d2 | 492 | ret: |
b1535293 | 493 | tuner_dbg("%s firmware for type=", (i < 0) ? "Can't find" : "Found"); |
83fb340b MCC |
494 | if (debug) { |
495 | dump_firm_type(type); | |
91240dd9 | 496 | printk("(%x), id %016llx.\n", type, (unsigned long long)*id); |
83fb340b | 497 | } |
f380e1d2 MCC |
498 | return i; |
499 | } | |
500 | ||
d7cba043 MK |
501 | static inline int do_tuner_callback(struct dvb_frontend *fe, int cmd, int arg) |
502 | { | |
503 | struct xc2028_data *priv = fe->tuner_priv; | |
504 | ||
505 | /* analog side (tuner-core) uses i2c_adap->algo_data. | |
506 | * digital side is not guaranteed to have algo_data defined. | |
507 | * | |
508 | * digital side will always have fe->dvb defined. | |
509 | * analog side (tuner-core) doesn't (yet) define fe->dvb. | |
510 | */ | |
511 | ||
512 | return (!fe->callback) ? -EINVAL : | |
513 | fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
514 | fe->dvb->priv : priv->i2c_props.adap->algo_data, | |
515 | DVB_FRONTEND_COMPONENT_TUNER, cmd, arg); | |
516 | } | |
517 | ||
f380e1d2 MCC |
518 | static int load_firmware(struct dvb_frontend *fe, unsigned int type, |
519 | v4l2_std_id *id) | |
520 | { | |
521 | struct xc2028_data *priv = fe->tuner_priv; | |
522 | int pos, rc; | |
0a196b6f | 523 | unsigned char *p, *endp, buf[priv->ctrl.max_len]; |
f380e1d2 | 524 | |
7e28adb2 | 525 | tuner_dbg("%s called\n", __func__); |
f380e1d2 MCC |
526 | |
527 | pos = seek_firmware(fe, type, id); | |
528 | if (pos < 0) | |
529 | return pos; | |
530 | ||
83fb340b | 531 | tuner_info("Loading firmware for type="); |
b1535293 CP |
532 | dump_firm_type(priv->firm[pos].type); |
533 | printk("(%x), id %016llx.\n", priv->firm[pos].type, | |
534 | (unsigned long long)*id); | |
83fb340b | 535 | |
f380e1d2 | 536 | p = priv->firm[pos].ptr; |
f380e1d2 | 537 | endp = p + priv->firm[pos].size; |
6cb45879 | 538 | |
ab0b9fc6 | 539 | while (p < endp) { |
de3fe21b MCC |
540 | __u16 size; |
541 | ||
542 | /* Checks if there's enough bytes to read */ | |
ab0b9fc6 | 543 | if (p + sizeof(size) > endp) { |
83fb340b | 544 | tuner_err("Firmware chunk size is wrong\n"); |
de3fe21b MCC |
545 | return -EINVAL; |
546 | } | |
547 | ||
ab0b9fc6 | 548 | size = le16_to_cpu(*(__u16 *) p); |
de3fe21b MCC |
549 | p += sizeof(size); |
550 | ||
551 | if (size == 0xffff) | |
552 | return 0; | |
553 | ||
554 | if (!size) { | |
6cb45879 | 555 | /* Special callback command received */ |
d7cba043 | 556 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
ab0b9fc6 | 557 | if (rc < 0) { |
83fb340b | 558 | tuner_err("Error at RESET code %d\n", |
ab0b9fc6 | 559 | (*p) & 0x7f); |
de3fe21b | 560 | return -EINVAL; |
6cb45879 | 561 | } |
6cb45879 MCC |
562 | continue; |
563 | } | |
5403bbae ML |
564 | if (size >= 0xff00) { |
565 | switch (size) { | |
566 | case 0xff00: | |
d7cba043 | 567 | rc = do_tuner_callback(fe, XC2028_RESET_CLK, 0); |
5403bbae ML |
568 | if (rc < 0) { |
569 | tuner_err("Error at RESET code %d\n", | |
570 | (*p) & 0x7f); | |
571 | return -EINVAL; | |
572 | } | |
b32f9fb9 | 573 | break; |
5403bbae ML |
574 | default: |
575 | tuner_info("Invalid RESET code %d\n", | |
576 | size & 0x7f); | |
577 | return -EINVAL; | |
578 | ||
579 | } | |
2d4c0ac6 | 580 | continue; |
5403bbae | 581 | } |
de3fe21b MCC |
582 | |
583 | /* Checks for a sleep command */ | |
584 | if (size & 0x8000) { | |
ab0b9fc6 | 585 | msleep(size & 0x7fff); |
de3fe21b | 586 | continue; |
6cb45879 MCC |
587 | } |
588 | ||
de3fe21b | 589 | if ((size + p > endp)) { |
83fb340b | 590 | tuner_err("missing bytes: need %d, have %d\n", |
ab0b9fc6 | 591 | size, (int)(endp - p)); |
de3fe21b MCC |
592 | return -EINVAL; |
593 | } | |
6cb45879 | 594 | |
de3fe21b | 595 | buf[0] = *p; |
6cb45879 | 596 | p++; |
de3fe21b | 597 | size--; |
6cb45879 | 598 | |
de3fe21b | 599 | /* Sends message chunks */ |
ab0b9fc6 | 600 | while (size > 0) { |
0a196b6f CP |
601 | int len = (size < priv->ctrl.max_len - 1) ? |
602 | size : priv->ctrl.max_len - 1; | |
6cb45879 | 603 | |
ab0b9fc6 | 604 | memcpy(buf + 1, p, len); |
6cb45879 | 605 | |
47cc5b78 | 606 | rc = i2c_send(priv, buf, len + 1); |
ab0b9fc6 | 607 | if (rc < 0) { |
83fb340b | 608 | tuner_err("%d returned from send\n", rc); |
de3fe21b MCC |
609 | return -EINVAL; |
610 | } | |
611 | ||
612 | p += len; | |
613 | size -= len; | |
614 | } | |
615 | } | |
43efe702 | 616 | return 0; |
6cb45879 MCC |
617 | } |
618 | ||
f380e1d2 | 619 | static int load_scode(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 620 | v4l2_std_id *id, __u16 int_freq, int scode) |
f380e1d2 MCC |
621 | { |
622 | struct xc2028_data *priv = fe->tuner_priv; | |
623 | int pos, rc; | |
624 | unsigned char *p; | |
625 | ||
7e28adb2 | 626 | tuner_dbg("%s called\n", __func__); |
f380e1d2 | 627 | |
66c2d53d MCC |
628 | if (!int_freq) { |
629 | pos = seek_firmware(fe, type, id); | |
630 | if (pos < 0) | |
631 | return pos; | |
632 | } else { | |
633 | for (pos = 0; pos < priv->firm_size; pos++) { | |
634 | if ((priv->firm[pos].int_freq == int_freq) && | |
9ca01e78 | 635 | (priv->firm[pos].type & HAS_IF)) |
66c2d53d MCC |
636 | break; |
637 | } | |
638 | if (pos == priv->firm_size) | |
639 | return -ENOENT; | |
640 | } | |
f380e1d2 MCC |
641 | |
642 | p = priv->firm[pos].ptr; | |
643 | ||
9ca01e78 | 644 | if (priv->firm[pos].type & HAS_IF) { |
66c2d53d MCC |
645 | if (priv->firm[pos].size != 12 * 16 || scode >= 16) |
646 | return -EINVAL; | |
647 | p += 12 * scode; | |
648 | } else { | |
649 | /* 16 SCODE entries per file; each SCODE entry is 12 bytes and | |
650 | * has a 2-byte size header in the firmware format. */ | |
651 | if (priv->firm[pos].size != 14 * 16 || scode >= 16 || | |
652 | le16_to_cpu(*(__u16 *)(p + 14 * scode)) != 12) | |
653 | return -EINVAL; | |
654 | p += 14 * scode + 2; | |
655 | } | |
f380e1d2 | 656 | |
d7b22c5c | 657 | tuner_info("Loading SCODE for type="); |
e0262688 CP |
658 | dump_firm_type_and_int_freq(priv->firm[pos].type, |
659 | priv->firm[pos].int_freq); | |
d7b22c5c CP |
660 | printk("(%x), id %016llx.\n", priv->firm[pos].type, |
661 | (unsigned long long)*id); | |
662 | ||
06fd82dc | 663 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
664 | rc = send_seq(priv, {0x20, 0x00, 0x00, 0x00}); |
665 | else | |
666 | rc = send_seq(priv, {0xa0, 0x00, 0x00, 0x00}); | |
667 | if (rc < 0) | |
668 | return -EIO; | |
f380e1d2 | 669 | |
66c2d53d | 670 | rc = i2c_send(priv, p, 12); |
47cc5b78 CP |
671 | if (rc < 0) |
672 | return -EIO; | |
f380e1d2 | 673 | |
47cc5b78 CP |
674 | rc = send_seq(priv, {0x00, 0x8c}); |
675 | if (rc < 0) | |
676 | return -EIO; | |
f380e1d2 MCC |
677 | |
678 | return 0; | |
679 | } | |
680 | ||
00deff1a | 681 | static int check_firmware(struct dvb_frontend *fe, unsigned int type, |
66c2d53d | 682 | v4l2_std_id std, __u16 int_freq) |
6cb45879 | 683 | { |
00deff1a | 684 | struct xc2028_data *priv = fe->tuner_priv; |
e0f0b37a | 685 | struct firmware_properties new_fw; |
00deff1a MCC |
686 | int rc = 0, is_retry = 0; |
687 | u16 version, hwmodel; | |
688 | v4l2_std_id std0; | |
6cb45879 | 689 | |
7e28adb2 | 690 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 691 | |
de3fe21b | 692 | if (!priv->firm) { |
a37b4c9b ML |
693 | if (!priv->ctrl.fname) { |
694 | tuner_info("xc2028/3028 firmware name not set!\n"); | |
de3fe21b | 695 | return -EINVAL; |
a37b4c9b | 696 | } |
de3fe21b | 697 | |
ab0b9fc6 MCC |
698 | rc = load_all_firmwares(fe); |
699 | if (rc < 0) | |
de3fe21b MCC |
700 | return rc; |
701 | } | |
702 | ||
0f6dac18 | 703 | if (priv->ctrl.mts && !(type & FM)) |
e0f0b37a | 704 | type |= MTS; |
6cb45879 | 705 | |
8bf799a6 | 706 | retry: |
e0f0b37a CP |
707 | new_fw.type = type; |
708 | new_fw.id = std; | |
709 | new_fw.std_req = std; | |
710 | new_fw.scode_table = SCODE | priv->ctrl.scode_table; | |
711 | new_fw.scode_nr = 0; | |
66c2d53d | 712 | new_fw.int_freq = int_freq; |
e0f0b37a CP |
713 | |
714 | tuner_dbg("checking firmware, user requested type="); | |
715 | if (debug) { | |
716 | dump_firm_type(new_fw.type); | |
e0262688 | 717 | printk("(%x), id %016llx, ", new_fw.type, |
e0f0b37a | 718 | (unsigned long long)new_fw.std_req); |
e0262688 CP |
719 | if (!int_freq) { |
720 | printk("scode_tbl "); | |
721 | dump_firm_type(priv->ctrl.scode_table); | |
722 | printk("(%x), ", priv->ctrl.scode_table); | |
723 | } else | |
724 | printk("int_freq %d, ", new_fw.int_freq); | |
725 | printk("scode_nr %d\n", new_fw.scode_nr); | |
e0f0b37a CP |
726 | } |
727 | ||
728 | /* No need to reload base firmware if it matches */ | |
729 | if (((BASE | new_fw.type) & BASE_TYPES) == | |
730 | (priv->cur_fw.type & BASE_TYPES)) { | |
731 | tuner_dbg("BASE firmware not changed.\n"); | |
732 | goto skip_base; | |
733 | } | |
734 | ||
735 | /* Updating BASE - forget about all currently loaded firmware */ | |
736 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
737 | ||
738 | /* Reset is needed before loading firmware */ | |
d7cba043 | 739 | rc = do_tuner_callback(fe, XC2028_TUNER_RESET, 0); |
e0f0b37a CP |
740 | if (rc < 0) |
741 | goto fail; | |
742 | ||
47bd5bc6 CP |
743 | /* BASE firmwares are all std0 */ |
744 | std0 = 0; | |
745 | rc = load_firmware(fe, BASE | new_fw.type, &std0); | |
e0f0b37a CP |
746 | if (rc < 0) { |
747 | tuner_err("Error %d while loading base firmware\n", | |
748 | rc); | |
749 | goto fail; | |
750 | } | |
5403bbae | 751 | |
de3fe21b | 752 | /* Load INIT1, if needed */ |
83fb340b | 753 | tuner_dbg("Load init1 firmware, if exists\n"); |
de3fe21b | 754 | |
47bd5bc6 | 755 | rc = load_firmware(fe, BASE | INIT1 | new_fw.type, &std0); |
1ad0b796 CP |
756 | if (rc == -ENOENT) |
757 | rc = load_firmware(fe, (BASE | INIT1 | new_fw.type) & ~F8MHZ, | |
758 | &std0); | |
e0f0b37a CP |
759 | if (rc < 0 && rc != -ENOENT) { |
760 | tuner_err("Error %d while loading init1 firmware\n", | |
761 | rc); | |
762 | goto fail; | |
763 | } | |
de3fe21b | 764 | |
e0f0b37a CP |
765 | skip_base: |
766 | /* | |
767 | * No need to reload standard specific firmware if base firmware | |
768 | * was not reloaded and requested video standards have not changed. | |
de3fe21b | 769 | */ |
e0f0b37a CP |
770 | if (priv->cur_fw.type == (BASE | new_fw.type) && |
771 | priv->cur_fw.std_req == std) { | |
83fb340b | 772 | tuner_dbg("Std-specific firmware already loaded.\n"); |
e0f0b37a | 773 | goto skip_std_specific; |
2e4160ca | 774 | } |
6cb45879 | 775 | |
e0f0b37a CP |
776 | /* Reloading std-specific firmware forces a SCODE update */ |
777 | priv->cur_fw.scode_table = 0; | |
778 | ||
e0f0b37a | 779 | rc = load_firmware(fe, new_fw.type, &new_fw.id); |
cca83798 MCC |
780 | if (rc == -ENOENT) |
781 | rc = load_firmware(fe, new_fw.type & ~F8MHZ, &new_fw.id); | |
782 | ||
ab0b9fc6 | 783 | if (rc < 0) |
e0f0b37a CP |
784 | goto fail; |
785 | ||
786 | skip_std_specific: | |
787 | if (priv->cur_fw.scode_table == new_fw.scode_table && | |
788 | priv->cur_fw.scode_nr == new_fw.scode_nr) { | |
789 | tuner_dbg("SCODE firmware already loaded.\n"); | |
790 | goto check_device; | |
791 | } | |
6cb45879 | 792 | |
40ae91a7 MCC |
793 | if (new_fw.type & FM) |
794 | goto check_device; | |
795 | ||
f380e1d2 | 796 | /* Load SCODE firmware, if exists */ |
e0f0b37a | 797 | tuner_dbg("Trying to load scode %d\n", new_fw.scode_nr); |
f380e1d2 | 798 | |
66c2d53d MCC |
799 | rc = load_scode(fe, new_fw.type | new_fw.scode_table, &new_fw.id, |
800 | new_fw.int_freq, new_fw.scode_nr); | |
43efe702 | 801 | |
e0f0b37a | 802 | check_device: |
8bf799a6 CP |
803 | if (xc2028_get_reg(priv, 0x0004, &version) < 0 || |
804 | xc2028_get_reg(priv, 0x0008, &hwmodel) < 0) { | |
805 | tuner_err("Unable to read tuner registers.\n"); | |
806 | goto fail; | |
807 | } | |
80b52208 | 808 | |
b37f2d6a DH |
809 | tuner_dbg("Device is Xceive %d version %d.%d, " |
810 | "firmware version %d.%d\n", | |
811 | hwmodel, (version & 0xf000) >> 12, (version & 0xf00) >> 8, | |
812 | (version & 0xf0) >> 4, version & 0xf); | |
6cb45879 | 813 | |
8bf799a6 CP |
814 | /* Check firmware version against what we downloaded. */ |
815 | if (priv->firm_version != ((version & 0xf0) << 4 | (version & 0x0f))) { | |
2d5024a9 MCC |
816 | if (!priv->ctrl.read_not_reliable) { |
817 | tuner_err("Incorrect readback of firmware version.\n"); | |
818 | goto fail; | |
819 | } else { | |
820 | tuner_err("Returned an incorrect version. However, " | |
821 | "read is not reliable enough. Ignoring it.\n"); | |
822 | hwmodel = 3028; | |
823 | } | |
8bf799a6 CP |
824 | } |
825 | ||
826 | /* Check that the tuner hardware model remains consistent over time. */ | |
827 | if (priv->hwmodel == 0 && (hwmodel == 2028 || hwmodel == 3028)) { | |
828 | priv->hwmodel = hwmodel; | |
829 | priv->hwvers = version & 0xff00; | |
830 | } else if (priv->hwmodel == 0 || priv->hwmodel != hwmodel || | |
831 | priv->hwvers != (version & 0xff00)) { | |
832 | tuner_err("Read invalid device hardware information - tuner " | |
833 | "hung?\n"); | |
834 | goto fail; | |
835 | } | |
836 | ||
e0f0b37a CP |
837 | memcpy(&priv->cur_fw, &new_fw, sizeof(priv->cur_fw)); |
838 | ||
839 | /* | |
840 | * By setting BASE in cur_fw.type only after successfully loading all | |
841 | * firmwares, we can: | |
842 | * 1. Identify that BASE firmware with type=0 has been loaded; | |
843 | * 2. Tell whether BASE firmware was just changed the next time through. | |
844 | */ | |
845 | priv->cur_fw.type |= BASE; | |
6cb45879 MCC |
846 | |
847 | return 0; | |
e0f0b37a CP |
848 | |
849 | fail: | |
850 | memset(&priv->cur_fw, 0, sizeof(priv->cur_fw)); | |
8bf799a6 CP |
851 | if (!is_retry) { |
852 | msleep(50); | |
853 | is_retry = 1; | |
854 | tuner_dbg("Retrying firmware load\n"); | |
855 | goto retry; | |
856 | } | |
857 | ||
e0f0b37a CP |
858 | if (rc == -ENOENT) |
859 | rc = -EINVAL; | |
860 | return rc; | |
6cb45879 MCC |
861 | } |
862 | ||
215b95ba | 863 | static int xc2028_signal(struct dvb_frontend *fe, u16 *strength) |
6cb45879 | 864 | { |
215b95ba | 865 | struct xc2028_data *priv = fe->tuner_priv; |
7d58d111 CP |
866 | u16 frq_lock, signal = 0; |
867 | int rc; | |
3b20532c | 868 | |
7e28adb2 | 869 | tuner_dbg("%s called\n", __func__); |
6cb45879 | 870 | |
215b95ba | 871 | mutex_lock(&priv->lock); |
6cb45879 | 872 | |
80b52208 | 873 | /* Sync Lock Indicator */ |
7d58d111 | 874 | rc = xc2028_get_reg(priv, 0x0002, &frq_lock); |
b0166ab3 | 875 | if (rc < 0) |
3b20532c | 876 | goto ret; |
6cb45879 | 877 | |
b0166ab3 MCC |
878 | /* Frequency is locked */ |
879 | if (frq_lock == 1) | |
880 | signal = 32768; | |
6cb45879 | 881 | |
80b52208 | 882 | /* Get SNR of the video signal */ |
7d58d111 CP |
883 | rc = xc2028_get_reg(priv, 0x0040, &signal); |
884 | if (rc < 0) | |
b0166ab3 MCC |
885 | goto ret; |
886 | ||
887 | /* Use both frq_lock and signal to generate the result */ | |
888 | signal = signal || ((signal & 0x07) << 12); | |
3b20532c MCC |
889 | |
890 | ret: | |
215b95ba MCC |
891 | mutex_unlock(&priv->lock); |
892 | ||
893 | *strength = signal; | |
6cb45879 | 894 | |
b0166ab3 MCC |
895 | tuner_dbg("signal strength is %d\n", signal); |
896 | ||
7d58d111 | 897 | return rc; |
6cb45879 MCC |
898 | } |
899 | ||
900 | #define DIV 15625 | |
901 | ||
00deff1a | 902 | static int generic_set_freq(struct dvb_frontend *fe, u32 freq /* in HZ */, |
66c2d53d MCC |
903 | enum tuner_mode new_mode, |
904 | unsigned int type, | |
905 | v4l2_std_id std, | |
906 | u16 int_freq) | |
6cb45879 | 907 | { |
215b95ba | 908 | struct xc2028_data *priv = fe->tuner_priv; |
ab0b9fc6 | 909 | int rc = -EINVAL; |
2ce4b3aa | 910 | unsigned char buf[4]; |
ab0b9fc6 | 911 | u32 div, offset = 0; |
6cb45879 | 912 | |
7e28adb2 | 913 | tuner_dbg("%s called\n", __func__); |
215b95ba | 914 | |
de3fe21b MCC |
915 | mutex_lock(&priv->lock); |
916 | ||
2ce4b3aa | 917 | tuner_dbg("should set frequency %d kHz\n", freq / 1000); |
6cb45879 | 918 | |
66c2d53d | 919 | if (check_firmware(fe, type, std, int_freq) < 0) |
3b20532c | 920 | goto ret; |
2e4160ca | 921 | |
2800ae9c MCC |
922 | /* On some cases xc2028 can disable video output, if |
923 | * very weak signals are received. By sending a soft | |
924 | * reset, this is re-enabled. So, it is better to always | |
925 | * send a soft reset before changing channels, to be sure | |
926 | * that xc2028 will be in a safe state. | |
927 | * Maybe this might also be needed for DTV. | |
928 | */ | |
7f2199c0 | 929 | if (new_mode == T_ANALOG_TV) { |
2800ae9c | 930 | rc = send_seq(priv, {0x00, 0x00}); |
0a863975 | 931 | |
7f2199c0 MCC |
932 | /* Analog modes require offset = 0 */ |
933 | } else { | |
934 | /* | |
935 | * Digital modes require an offset to adjust to the | |
936 | * proper frequency. The offset depends on what | |
937 | * firmware version is used. | |
938 | */ | |
939 | ||
940 | /* | |
941 | * Adjust to the center frequency. This is calculated by the | |
942 | * formula: offset = 1.25MHz - BW/2 | |
943 | * For DTV 7/8, the firmware uses BW = 8000, so it needs a | |
944 | * further adjustment to get the frequency center on VHF | |
945 | */ | |
0a863975 MCC |
946 | if (priv->cur_fw.type & DTV6) |
947 | offset = 1750000; | |
948 | else if (priv->cur_fw.type & DTV7) | |
949 | offset = 2250000; | |
950 | else /* DTV8 or DTV78 */ | |
951 | offset = 2750000; | |
7f2199c0 MCC |
952 | if ((priv->cur_fw.type & DTV78) && freq < 470000000) |
953 | offset -= 500000; | |
0a863975 | 954 | |
897b8422 | 955 | /* |
7f2199c0 MCC |
956 | * xc3028 additional "magic" |
957 | * Depending on the firmware version, it needs some adjustments | |
958 | * to properly centralize the frequency. This seems to be | |
959 | * needed to compensate the SCODE table adjustments made by | |
960 | * newer firmwares | |
897b8422 | 961 | */ |
7f2199c0 MCC |
962 | |
963 | #if 1 | |
964 | /* | |
965 | * The proper adjustment would be to do it at s-code table. | |
966 | * However, this didn't work, as reported by | |
967 | * Robert Lowery <rglowery@exemail.com.au> | |
968 | */ | |
969 | ||
970 | if (priv->cur_fw.type & DTV7) | |
971 | offset += 500000; | |
972 | ||
973 | #else | |
974 | /* | |
975 | * Still need tests for XC3028L (firmware 3.2 or upper) | |
976 | * So, for now, let's just comment the per-firmware | |
977 | * version of this change. Reports with xc3028l working | |
978 | * with and without the lines bellow are welcome | |
979 | */ | |
980 | ||
981 | if (priv->firm_version < 0x0302) { | |
982 | if (priv->cur_fw.type & DTV7) | |
983 | offset += 500000; | |
984 | } else { | |
985 | if (priv->cur_fw.type & DTV7) | |
986 | offset -= 300000; | |
987 | else if (type != ATSC) /* DVB @6MHz, DTV 8 and DTV 7/8 */ | |
988 | offset += 200000; | |
989 | } | |
990 | #endif | |
a44f1c43 | 991 | } |
2e4160ca | 992 | |
ab0b9fc6 | 993 | div = (freq - offset + DIV / 2) / DIV; |
2e4160ca | 994 | |
6cb45879 | 995 | /* CMD= Set frequency */ |
06fd82dc | 996 | if (priv->firm_version < 0x0202) |
47cc5b78 CP |
997 | rc = send_seq(priv, {0x00, 0x02, 0x00, 0x00}); |
998 | else | |
999 | rc = send_seq(priv, {0x80, 0x02, 0x00, 0x00}); | |
1000 | if (rc < 0) | |
1001 | goto ret; | |
de3fe21b | 1002 | |
1fe87369 MCC |
1003 | /* Return code shouldn't be checked. |
1004 | The reset CLK is needed only with tm6000. | |
1005 | Driver should work fine even if this fails. | |
1006 | */ | |
e5cc2bf4 | 1007 | msleep(priv->ctrl.msleep); |
d7cba043 | 1008 | do_tuner_callback(fe, XC2028_RESET_CLK, 1); |
6cb45879 MCC |
1009 | |
1010 | msleep(10); | |
701672eb | 1011 | |
ab0b9fc6 MCC |
1012 | buf[0] = 0xff & (div >> 24); |
1013 | buf[1] = 0xff & (div >> 16); | |
1014 | buf[2] = 0xff & (div >> 8); | |
1015 | buf[3] = 0xff & (div); | |
6cb45879 | 1016 | |
47cc5b78 | 1017 | rc = i2c_send(priv, buf, sizeof(buf)); |
ab0b9fc6 | 1018 | if (rc < 0) |
3b20532c | 1019 | goto ret; |
6cb45879 MCC |
1020 | msleep(100); |
1021 | ||
ab0b9fc6 | 1022 | priv->frequency = freq; |
215b95ba | 1023 | |
2ce4b3aa CP |
1024 | tuner_dbg("divisor= %02x %02x %02x %02x (freq=%d.%03d)\n", |
1025 | buf[0], buf[1], buf[2], buf[3], | |
1026 | freq / 1000000, (freq % 1000000) / 1000); | |
3b20532c | 1027 | |
ab0b9fc6 | 1028 | rc = 0; |
6cb45879 | 1029 | |
215b95ba MCC |
1030 | ret: |
1031 | mutex_unlock(&priv->lock); | |
6cb45879 | 1032 | |
215b95ba | 1033 | return rc; |
701672eb ML |
1034 | } |
1035 | ||
00deff1a | 1036 | static int xc2028_set_analog_freq(struct dvb_frontend *fe, |
ab0b9fc6 | 1037 | struct analog_parameters *p) |
6cb45879 | 1038 | { |
215b95ba | 1039 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a MCC |
1040 | unsigned int type=0; |
1041 | ||
7e28adb2 | 1042 | tuner_dbg("%s called\n", __func__); |
c71d4bc5 | 1043 | |
d74cb25e MCC |
1044 | if (p->mode == V4L2_TUNER_RADIO) { |
1045 | type |= FM; | |
1046 | if (priv->ctrl.input1) | |
1047 | type |= INPUT1; | |
1048 | return generic_set_freq(fe, (625l * p->frequency) / 10, | |
e2860d96 | 1049 | T_RADIO, type, 0, 0); |
d74cb25e MCC |
1050 | } |
1051 | ||
a5e9fe14 MCC |
1052 | /* if std is not defined, choose one */ |
1053 | if (!p->std) | |
1054 | p->std = V4L2_STD_MN; | |
1055 | ||
1056 | /* PAL/M, PAL/N, PAL/Nc and NTSC variants should use 6MHz firmware */ | |
00deff1a MCC |
1057 | if (!(p->std & V4L2_STD_MN)) |
1058 | type |= F8MHZ; | |
6cb45879 | 1059 | |
00deff1a MCC |
1060 | /* Add audio hack to std mask */ |
1061 | p->std |= parse_audio_std_option(); | |
6cb45879 | 1062 | |
00deff1a | 1063 | return generic_set_freq(fe, 62500l * p->frequency, |
66c2d53d | 1064 | T_ANALOG_TV, type, p->std, 0); |
215b95ba | 1065 | } |
6cb45879 | 1066 | |
215b95ba MCC |
1067 | static int xc2028_set_params(struct dvb_frontend *fe, |
1068 | struct dvb_frontend_parameters *p) | |
6cb45879 | 1069 | { |
215b95ba | 1070 | struct xc2028_data *priv = fe->tuner_priv; |
00deff1a | 1071 | unsigned int type=0; |
d04aa54a | 1072 | fe_bandwidth_t bw = BANDWIDTH_8_MHZ; |
ad35ce9e | 1073 | u16 demod = 0; |
6cb45879 | 1074 | |
7e28adb2 | 1075 | tuner_dbg("%s called\n", __func__); |
701672eb | 1076 | |
d04aa54a | 1077 | switch(fe->ops.info.type) { |
d04aa54a MCC |
1078 | case FE_OFDM: |
1079 | bw = p->u.ofdm.bandwidth; | |
a1014d70 MCC |
1080 | /* |
1081 | * The only countries with 6MHz seem to be Taiwan/Uruguay. | |
1082 | * Both seem to require QAM firmware for OFDM decoding | |
1083 | * Tested in Taiwan by Terry Wu <terrywu2009@gmail.com> | |
1084 | */ | |
1085 | if (bw == BANDWIDTH_6_MHZ) | |
1086 | type |= QAM; | |
d04aa54a MCC |
1087 | break; |
1088 | case FE_ATSC: | |
1089 | bw = BANDWIDTH_6_MHZ; | |
0975fc68 MCC |
1090 | /* The only ATSC firmware (at least on v2.7) is D2633 */ |
1091 | type |= ATSC | D2633; | |
d04aa54a | 1092 | break; |
a1014d70 | 1093 | /* DVB-S and pure QAM (FE_QAM) are not supported */ |
5c15648a MCC |
1094 | default: |
1095 | return -EINVAL; | |
d04aa54a MCC |
1096 | } |
1097 | ||
00deff1a MCC |
1098 | switch (bw) { |
1099 | case BANDWIDTH_8_MHZ: | |
3dfefc50 CP |
1100 | if (p->frequency < 470000000) |
1101 | priv->ctrl.vhfbw7 = 0; | |
1102 | else | |
1103 | priv->ctrl.uhfbw8 = 1; | |
1104 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV8; | |
1105 | type |= F8MHZ; | |
00deff1a MCC |
1106 | break; |
1107 | case BANDWIDTH_7_MHZ: | |
3dfefc50 CP |
1108 | if (p->frequency < 470000000) |
1109 | priv->ctrl.vhfbw7 = 1; | |
1110 | else | |
1111 | priv->ctrl.uhfbw8 = 0; | |
1112 | type |= (priv->ctrl.vhfbw7 && priv->ctrl.uhfbw8) ? DTV78 : DTV7; | |
1113 | type |= F8MHZ; | |
00deff1a MCC |
1114 | break; |
1115 | case BANDWIDTH_6_MHZ: | |
3dfefc50 CP |
1116 | type |= DTV6; |
1117 | priv->ctrl.vhfbw7 = 0; | |
1118 | priv->ctrl.uhfbw8 = 0; | |
00deff1a MCC |
1119 | break; |
1120 | default: | |
1121 | tuner_err("error: bandwidth not supported.\n"); | |
1122 | }; | |
1123 | ||
0975fc68 MCC |
1124 | /* |
1125 | Selects between D2633 or D2620 firmware. | |
1126 | It doesn't make sense for ATSC, since it should be D2633 on all cases | |
1127 | */ | |
1128 | if (fe->ops.info.type != FE_ATSC) { | |
1129 | switch (priv->ctrl.type) { | |
1130 | case XC2028_D2633: | |
1131 | type |= D2633; | |
1132 | break; | |
1133 | case XC2028_D2620: | |
1134 | type |= D2620; | |
1135 | break; | |
1136 | case XC2028_AUTO: | |
1137 | default: | |
1138 | /* Zarlink seems to need D2633 */ | |
1139 | if (priv->ctrl.demod == XC3028_FE_ZARLINK456) | |
1140 | type |= D2633; | |
1141 | else | |
1142 | type |= D2620; | |
1143 | } | |
1144 | } | |
1145 | ||
66c2d53d | 1146 | /* All S-code tables need a 200kHz shift */ |
6e707b4c | 1147 | if (priv->ctrl.demod) { |
7d350284 MCC |
1148 | demod = priv->ctrl.demod; |
1149 | ||
7f2199c0 MCC |
1150 | /* |
1151 | * Newer firmwares require a 200 kHz offset only for ATSC | |
1152 | */ | |
1153 | if (type == ATSC || priv->firm_version < 0x0302) | |
7d350284 | 1154 | demod += 200; |
6e707b4c AW |
1155 | /* |
1156 | * The DTV7 S-code table needs a 700 kHz shift. | |
6e707b4c AW |
1157 | * |
1158 | * DTV7 is only used in Australia. Germany or Italy may also | |
1159 | * use this firmware after initialization, but a tune to a UHF | |
1160 | * channel should then cause DTV78 to be used. | |
7f2199c0 MCC |
1161 | * |
1162 | * Unfortunately, on real-field tests, the s-code offset | |
1163 | * didn't work as expected, as reported by | |
1164 | * Robert Lowery <rglowery@exemail.com.au> | |
6e707b4c | 1165 | */ |
6e707b4c | 1166 | } |
b542dfdc | 1167 | |
00deff1a | 1168 | return generic_set_freq(fe, p->frequency, |
ad35ce9e | 1169 | T_DIGITAL_TV, type, 0, demod); |
6cb45879 | 1170 | } |
701672eb | 1171 | |
74a89b2a MCC |
1172 | static int xc2028_sleep(struct dvb_frontend *fe) |
1173 | { | |
1174 | struct xc2028_data *priv = fe->tuner_priv; | |
1175 | int rc = 0; | |
1176 | ||
93b99923 DH |
1177 | /* Avoid firmware reload on slow devices or if PM disabled */ |
1178 | if (no_poweroff || priv->ctrl.disable_power_mgmt) | |
10f201af | 1179 | return 0; |
74a89b2a MCC |
1180 | |
1181 | tuner_dbg("Putting xc2028/3028 into poweroff mode.\n"); | |
e278e746 MCC |
1182 | if (debug > 1) { |
1183 | tuner_dbg("Printing sleep stack trace:\n"); | |
1184 | dump_stack(); | |
1185 | } | |
74a89b2a MCC |
1186 | |
1187 | mutex_lock(&priv->lock); | |
1188 | ||
1189 | if (priv->firm_version < 0x0202) | |
1190 | rc = send_seq(priv, {0x00, 0x08, 0x00, 0x00}); | |
1191 | else | |
1192 | rc = send_seq(priv, {0x80, 0x08, 0x00, 0x00}); | |
1193 | ||
1194 | priv->cur_fw.type = 0; /* need firmware reload */ | |
1195 | ||
1196 | mutex_unlock(&priv->lock); | |
1197 | ||
1198 | return rc; | |
1199 | } | |
45819c38 | 1200 | |
215b95ba | 1201 | static int xc2028_dvb_release(struct dvb_frontend *fe) |
701672eb | 1202 | { |
215b95ba MCC |
1203 | struct xc2028_data *priv = fe->tuner_priv; |
1204 | ||
7e28adb2 | 1205 | tuner_dbg("%s called\n", __func__); |
701672eb | 1206 | |
aa501be9 CP |
1207 | mutex_lock(&xc2028_list_mutex); |
1208 | ||
c663d035 MK |
1209 | /* only perform final cleanup if this is the last instance */ |
1210 | if (hybrid_tuner_report_instance_count(priv) == 1) { | |
ab0b9fc6 | 1211 | kfree(priv->ctrl.fname); |
de3fe21b | 1212 | free_firmware(priv); |
de3fe21b | 1213 | } |
701672eb | 1214 | |
c663d035 MK |
1215 | if (priv) |
1216 | hybrid_tuner_release_state(priv); | |
1217 | ||
aa501be9 CP |
1218 | mutex_unlock(&xc2028_list_mutex); |
1219 | ||
c663d035 MK |
1220 | fe->tuner_priv = NULL; |
1221 | ||
701672eb ML |
1222 | return 0; |
1223 | } | |
1224 | ||
215b95ba | 1225 | static int xc2028_get_frequency(struct dvb_frontend *fe, u32 *frequency) |
701672eb | 1226 | { |
215b95ba | 1227 | struct xc2028_data *priv = fe->tuner_priv; |
701672eb | 1228 | |
7e28adb2 | 1229 | tuner_dbg("%s called\n", __func__); |
701672eb | 1230 | |
215b95ba | 1231 | *frequency = priv->frequency; |
701672eb ML |
1232 | |
1233 | return 0; | |
1234 | } | |
1235 | ||
ab0b9fc6 | 1236 | static int xc2028_set_config(struct dvb_frontend *fe, void *priv_cfg) |
de3fe21b MCC |
1237 | { |
1238 | struct xc2028_data *priv = fe->tuner_priv; | |
1239 | struct xc2028_ctrl *p = priv_cfg; | |
0a196b6f | 1240 | int rc = 0; |
de3fe21b | 1241 | |
7e28adb2 | 1242 | tuner_dbg("%s called\n", __func__); |
de3fe21b | 1243 | |
06fd82dc CP |
1244 | mutex_lock(&priv->lock); |
1245 | ||
0a196b6f | 1246 | memcpy(&priv->ctrl, p, sizeof(priv->ctrl)); |
92b75ab0 MCC |
1247 | if (priv->ctrl.max_len < 9) |
1248 | priv->ctrl.max_len = 13; | |
de3fe21b | 1249 | |
0a196b6f | 1250 | if (p->fname) { |
92b75ab0 MCC |
1251 | if (priv->ctrl.fname && strcmp(p->fname, priv->ctrl.fname)) { |
1252 | kfree(priv->ctrl.fname); | |
1253 | free_firmware(priv); | |
1254 | } | |
1255 | ||
0a196b6f CP |
1256 | priv->ctrl.fname = kstrdup(p->fname, GFP_KERNEL); |
1257 | if (priv->ctrl.fname == NULL) | |
1258 | rc = -ENOMEM; | |
de3fe21b MCC |
1259 | } |
1260 | ||
06fd82dc CP |
1261 | mutex_unlock(&priv->lock); |
1262 | ||
0a196b6f | 1263 | return rc; |
de3fe21b MCC |
1264 | } |
1265 | ||
215b95ba | 1266 | static const struct dvb_tuner_ops xc2028_dvb_tuner_ops = { |
701672eb | 1267 | .info = { |
ab0b9fc6 MCC |
1268 | .name = "Xceive XC3028", |
1269 | .frequency_min = 42000000, | |
1270 | .frequency_max = 864000000, | |
1271 | .frequency_step = 50000, | |
1272 | }, | |
701672eb | 1273 | |
de3fe21b | 1274 | .set_config = xc2028_set_config, |
00deff1a | 1275 | .set_analog_params = xc2028_set_analog_freq, |
215b95ba MCC |
1276 | .release = xc2028_dvb_release, |
1277 | .get_frequency = xc2028_get_frequency, | |
1278 | .get_rf_strength = xc2028_signal, | |
1279 | .set_params = xc2028_set_params, | |
74a89b2a | 1280 | .sleep = xc2028_sleep, |
701672eb ML |
1281 | }; |
1282 | ||
7972f988 MK |
1283 | struct dvb_frontend *xc2028_attach(struct dvb_frontend *fe, |
1284 | struct xc2028_config *cfg) | |
701672eb | 1285 | { |
215b95ba | 1286 | struct xc2028_data *priv; |
c663d035 | 1287 | int instance; |
701672eb | 1288 | |
83fb340b | 1289 | if (debug) |
2756665c | 1290 | printk(KERN_DEBUG "xc2028: Xcv2028/3028 init called!\n"); |
701672eb | 1291 | |
b412ba78 | 1292 | if (NULL == cfg) |
a37b4c9b | 1293 | return NULL; |
215b95ba | 1294 | |
a37b4c9b | 1295 | if (!fe) { |
2756665c | 1296 | printk(KERN_ERR "xc2028: No frontend!\n"); |
a37b4c9b | 1297 | return NULL; |
215b95ba MCC |
1298 | } |
1299 | ||
aa501be9 CP |
1300 | mutex_lock(&xc2028_list_mutex); |
1301 | ||
c663d035 MK |
1302 | instance = hybrid_tuner_request_state(struct xc2028_data, priv, |
1303 | hybrid_tuner_instance_list, | |
1304 | cfg->i2c_adap, cfg->i2c_addr, | |
1305 | "xc2028"); | |
1306 | switch (instance) { | |
1307 | case 0: | |
1308 | /* memory allocation failure */ | |
1309 | goto fail; | |
1310 | break; | |
1311 | case 1: | |
1312 | /* new tuner instance */ | |
0a196b6f | 1313 | priv->ctrl.max_len = 13; |
de3fe21b | 1314 | |
215b95ba MCC |
1315 | mutex_init(&priv->lock); |
1316 | ||
c663d035 MK |
1317 | fe->tuner_priv = priv; |
1318 | break; | |
1319 | case 2: | |
1320 | /* existing tuner instance */ | |
1321 | fe->tuner_priv = priv; | |
1322 | break; | |
1323 | } | |
b412ba78 | 1324 | |
215b95ba | 1325 | memcpy(&fe->ops.tuner_ops, &xc2028_dvb_tuner_ops, |
ab0b9fc6 | 1326 | sizeof(xc2028_dvb_tuner_ops)); |
215b95ba MCC |
1327 | |
1328 | tuner_info("type set to %s\n", "XCeive xc2028/xc3028 tuner"); | |
1329 | ||
71a2ee37 MCC |
1330 | if (cfg->ctrl) |
1331 | xc2028_set_config(fe, cfg->ctrl); | |
1332 | ||
aa501be9 CP |
1333 | mutex_unlock(&xc2028_list_mutex); |
1334 | ||
a37b4c9b | 1335 | return fe; |
c663d035 MK |
1336 | fail: |
1337 | mutex_unlock(&xc2028_list_mutex); | |
1338 | ||
1339 | xc2028_dvb_release(fe); | |
1340 | return NULL; | |
215b95ba | 1341 | } |
a37b4c9b | 1342 | |
701672eb ML |
1343 | EXPORT_SYMBOL(xc2028_attach); |
1344 | ||
215b95ba | 1345 | MODULE_DESCRIPTION("Xceive xc2028/xc3028 tuner driver"); |
983d214e | 1346 | MODULE_AUTHOR("Michel Ludwig <michel.ludwig@gmail.com>"); |
215b95ba MCC |
1347 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); |
1348 | MODULE_LICENSE("GPL"); |