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95963cbc DW |
1 | /* |
2 | * Driver for Maxim MAX2165 silicon tuner | |
3 | * | |
4 | * Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/module.h> | |
23 | #include <linux/moduleparam.h> | |
24 | #include <linux/videodev2.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/dvb/frontend.h> | |
27 | #include <linux/i2c.h> | |
5a0e3ad6 | 28 | #include <linux/slab.h> |
95963cbc DW |
29 | |
30 | #include "dvb_frontend.h" | |
31 | ||
32 | #include "max2165.h" | |
33 | #include "max2165_priv.h" | |
34 | #include "tuner-i2c.h" | |
35 | ||
36 | #define dprintk(args...) \ | |
37 | do { \ | |
38 | if (debug) \ | |
39 | printk(KERN_DEBUG "max2165: " args); \ | |
40 | } while (0) | |
41 | ||
42 | static int debug; | |
43 | module_param(debug, int, 0644); | |
44 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | |
45 | ||
46 | static int max2165_write_reg(struct max2165_priv *priv, u8 reg, u8 data) | |
47 | { | |
48 | int ret; | |
49 | u8 buf[] = { reg, data }; | |
50 | struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 }; | |
51 | ||
52 | msg.addr = priv->config->i2c_address; | |
53 | ||
54 | if (debug >= 2) | |
c429e7b6 | 55 | dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data); |
95963cbc DW |
56 | |
57 | ret = i2c_transfer(priv->i2c, &msg, 1); | |
58 | ||
59 | if (ret != 1) | |
c429e7b6 | 60 | dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n", |
95963cbc DW |
61 | __func__, reg, data, ret); |
62 | ||
63 | return (ret != 1) ? -EIO : 0; | |
64 | } | |
65 | ||
66 | static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data) | |
67 | { | |
68 | int ret; | |
69 | u8 dev_addr = priv->config->i2c_address; | |
70 | ||
71 | u8 b0[] = { reg }; | |
72 | u8 b1[] = { 0 }; | |
73 | struct i2c_msg msg[] = { | |
74 | { .addr = dev_addr, .flags = 0, .buf = b0, .len = 1 }, | |
75 | { .addr = dev_addr, .flags = I2C_M_RD, .buf = b1, .len = 1 }, | |
76 | }; | |
77 | ||
78 | ret = i2c_transfer(priv->i2c, msg, 2); | |
79 | if (ret != 2) { | |
c429e7b6 | 80 | dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret); |
95963cbc DW |
81 | return -EIO; |
82 | } | |
83 | ||
84 | *p_data = b1[0]; | |
85 | if (debug >= 2) | |
c429e7b6 | 86 | dprintk("%s: reg=0x%02X, data=0x%02X\n", |
95963cbc DW |
87 | __func__, reg, b1[0]); |
88 | return 0; | |
89 | } | |
90 | ||
91 | static int max2165_mask_write_reg(struct max2165_priv *priv, u8 reg, | |
92 | u8 mask, u8 data) | |
93 | { | |
94 | int ret; | |
95 | u8 v; | |
96 | ||
97 | data &= mask; | |
98 | ret = max2165_read_reg(priv, reg, &v); | |
99 | if (ret != 0) | |
100 | return ret; | |
101 | v &= ~mask; | |
102 | v |= data; | |
103 | ret = max2165_write_reg(priv, reg, v); | |
104 | ||
105 | return ret; | |
106 | } | |
107 | ||
108 | static int max2165_read_rom_table(struct max2165_priv *priv) | |
109 | { | |
110 | u8 dat[3]; | |
111 | int i; | |
112 | ||
113 | for (i = 0; i < 3; i++) { | |
114 | max2165_write_reg(priv, REG_ROM_TABLE_ADDR, i + 1); | |
115 | max2165_read_reg(priv, REG_ROM_TABLE_DATA, &dat[i]); | |
116 | } | |
117 | ||
118 | priv->tf_ntch_low_cfg = dat[0] >> 4; | |
119 | priv->tf_ntch_hi_cfg = dat[0] & 0x0F; | |
120 | priv->tf_balun_low_ref = dat[1] & 0x0F; | |
121 | priv->tf_balun_hi_ref = dat[1] >> 4; | |
122 | priv->bb_filter_7mhz_cfg = dat[2] & 0x0F; | |
123 | priv->bb_filter_8mhz_cfg = dat[2] >> 4; | |
124 | ||
125 | dprintk("tf_ntch_low_cfg = 0x%X\n", priv->tf_ntch_low_cfg); | |
126 | dprintk("tf_ntch_hi_cfg = 0x%X\n", priv->tf_ntch_hi_cfg); | |
127 | dprintk("tf_balun_low_ref = 0x%X\n", priv->tf_balun_low_ref); | |
128 | dprintk("tf_balun_hi_ref = 0x%X\n", priv->tf_balun_hi_ref); | |
129 | dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv->bb_filter_7mhz_cfg); | |
130 | dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv->bb_filter_8mhz_cfg); | |
131 | ||
132 | return 0; | |
133 | } | |
134 | ||
135 | static int max2165_set_osc(struct max2165_priv *priv, u8 osc /*MHz*/) | |
136 | { | |
137 | u8 v; | |
138 | ||
139 | v = (osc / 2); | |
140 | if (v == 2) | |
141 | v = 0x7; | |
142 | else | |
143 | v -= 8; | |
144 | ||
145 | max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v); | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw) | |
151 | { | |
152 | u8 val; | |
153 | ||
9f179161 | 154 | if (bw == 8000000) |
95963cbc DW |
155 | val = priv->bb_filter_8mhz_cfg; |
156 | else | |
157 | val = priv->bb_filter_7mhz_cfg; | |
158 | ||
159 | max2165_mask_write_reg(priv, REG_BASEBAND_CTRL, 0xF0, val << 4); | |
160 | ||
161 | return 0; | |
162 | } | |
163 | ||
164 | int fixpt_div32(u32 dividend, u32 divisor, u32 *quotient, u32 *fraction) | |
165 | { | |
166 | u32 remainder; | |
167 | u32 q, f = 0; | |
168 | int i; | |
169 | ||
170 | if (0 == divisor) | |
32d7e63c | 171 | return -EINVAL; |
95963cbc DW |
172 | |
173 | q = dividend / divisor; | |
174 | remainder = dividend - q * divisor; | |
175 | ||
176 | for (i = 0; i < 31; i++) { | |
177 | remainder <<= 1; | |
178 | if (remainder >= divisor) { | |
179 | f += 1; | |
180 | remainder -= divisor; | |
181 | } | |
182 | f <<= 1; | |
183 | } | |
184 | ||
185 | *quotient = q; | |
186 | *fraction = f; | |
187 | ||
188 | return 0; | |
189 | } | |
190 | ||
191 | static int max2165_set_rf(struct max2165_priv *priv, u32 freq) | |
192 | { | |
193 | u8 tf; | |
194 | u8 tf_ntch; | |
5476ffd2 | 195 | u32 t; |
95963cbc | 196 | u32 quotient, fraction; |
32d7e63c | 197 | int ret; |
95963cbc DW |
198 | |
199 | /* Set PLL divider according to RF frequency */ | |
32d7e63c DK |
200 | ret = fixpt_div32(freq / 1000, priv->config->osc_clk * 1000, |
201 | "ient, &fraction); | |
202 | if (ret != 0) | |
203 | return ret; | |
95963cbc DW |
204 | |
205 | /* 20-bit fraction */ | |
206 | fraction >>= 12; | |
207 | ||
208 | max2165_write_reg(priv, REG_NDIV_INT, quotient); | |
209 | max2165_mask_write_reg(priv, REG_NDIV_FRAC2, 0x0F, fraction >> 16); | |
210 | max2165_write_reg(priv, REG_NDIV_FRAC1, fraction >> 8); | |
211 | max2165_write_reg(priv, REG_NDIV_FRAC0, fraction); | |
212 | ||
213 | /* Norch Filter */ | |
214 | tf_ntch = (freq < 725000000) ? | |
215 | priv->tf_ntch_low_cfg : priv->tf_ntch_hi_cfg; | |
216 | ||
217 | /* Tracking filter balun */ | |
218 | t = priv->tf_balun_low_ref; | |
219 | t += (priv->tf_balun_hi_ref - priv->tf_balun_low_ref) | |
220 | * (freq / 1000 - 470000) / (780000 - 470000); | |
221 | ||
222 | tf = t; | |
223 | dprintk("tf = %X\n", tf); | |
224 | tf |= tf_ntch << 4; | |
225 | ||
226 | max2165_write_reg(priv, REG_TRACK_FILTER, tf); | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
231 | static void max2165_debug_status(struct max2165_priv *priv) | |
232 | { | |
233 | u8 status, autotune; | |
234 | u8 auto_vco_success, auto_vco_active; | |
235 | u8 pll_locked; | |
236 | u8 dc_offset_low, dc_offset_hi; | |
237 | u8 signal_lv_over_threshold; | |
238 | u8 vco, vco_sub_band, adc; | |
239 | ||
240 | max2165_read_reg(priv, REG_STATUS, &status); | |
241 | max2165_read_reg(priv, REG_AUTOTUNE, &autotune); | |
242 | ||
243 | auto_vco_success = (status >> 6) & 0x01; | |
244 | auto_vco_active = (status >> 5) & 0x01; | |
245 | pll_locked = (status >> 4) & 0x01; | |
246 | dc_offset_low = (status >> 3) & 0x01; | |
247 | dc_offset_hi = (status >> 2) & 0x01; | |
248 | signal_lv_over_threshold = status & 0x01; | |
249 | ||
250 | vco = autotune >> 6; | |
251 | vco_sub_band = (autotune >> 3) & 0x7; | |
252 | adc = autotune & 0x7; | |
253 | ||
254 | dprintk("auto VCO active: %d, auto VCO success: %d\n", | |
255 | auto_vco_active, auto_vco_success); | |
256 | dprintk("PLL locked: %d\n", pll_locked); | |
257 | dprintk("DC offset low: %d, DC offset high: %d\n", | |
258 | dc_offset_low, dc_offset_hi); | |
259 | dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold); | |
260 | dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc); | |
261 | } | |
262 | ||
14d24d14 | 263 | static int max2165_set_params(struct dvb_frontend *fe) |
95963cbc DW |
264 | { |
265 | struct max2165_priv *priv = fe->tuner_priv; | |
9f179161 | 266 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
95963cbc DW |
267 | int ret; |
268 | ||
9f179161 MCC |
269 | switch (c->bandwidth_hz) { |
270 | case 7000000: | |
271 | case 8000000: | |
272 | priv->frequency = c->frequency; | |
273 | break; | |
274 | default: | |
275 | printk(KERN_INFO "MAX2165: bandwidth %d Hz not supported.\n", | |
276 | c->bandwidth_hz); | |
95963cbc DW |
277 | return -EINVAL; |
278 | } | |
279 | ||
9f179161 | 280 | dprintk("%s() frequency=%d\n", __func__, c->frequency); |
95963cbc DW |
281 | |
282 | if (fe->ops.i2c_gate_ctrl) | |
283 | fe->ops.i2c_gate_ctrl(fe, 1); | |
9f179161 | 284 | max2165_set_bandwidth(priv, c->bandwidth_hz); |
95963cbc DW |
285 | ret = max2165_set_rf(priv, priv->frequency); |
286 | mdelay(50); | |
287 | max2165_debug_status(priv); | |
288 | if (fe->ops.i2c_gate_ctrl) | |
289 | fe->ops.i2c_gate_ctrl(fe, 0); | |
290 | ||
291 | if (ret != 0) | |
292 | return -EREMOTEIO; | |
293 | ||
294 | return 0; | |
295 | } | |
296 | ||
297 | static int max2165_get_frequency(struct dvb_frontend *fe, u32 *freq) | |
298 | { | |
299 | struct max2165_priv *priv = fe->tuner_priv; | |
300 | dprintk("%s()\n", __func__); | |
301 | *freq = priv->frequency; | |
302 | return 0; | |
303 | } | |
304 | ||
305 | static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw) | |
306 | { | |
307 | struct max2165_priv *priv = fe->tuner_priv; | |
308 | dprintk("%s()\n", __func__); | |
309 | ||
310 | *bw = priv->bandwidth; | |
311 | return 0; | |
312 | } | |
313 | ||
314 | static int max2165_get_status(struct dvb_frontend *fe, u32 *status) | |
315 | { | |
316 | struct max2165_priv *priv = fe->tuner_priv; | |
317 | u16 lock_status = 0; | |
318 | ||
319 | dprintk("%s()\n", __func__); | |
320 | ||
321 | if (fe->ops.i2c_gate_ctrl) | |
322 | fe->ops.i2c_gate_ctrl(fe, 1); | |
323 | ||
324 | max2165_debug_status(priv); | |
325 | *status = lock_status; | |
326 | ||
327 | if (fe->ops.i2c_gate_ctrl) | |
328 | fe->ops.i2c_gate_ctrl(fe, 0); | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
333 | static int max2165_sleep(struct dvb_frontend *fe) | |
334 | { | |
335 | dprintk("%s()\n", __func__); | |
336 | return 0; | |
337 | } | |
338 | ||
339 | static int max2165_init(struct dvb_frontend *fe) | |
340 | { | |
341 | struct max2165_priv *priv = fe->tuner_priv; | |
342 | dprintk("%s()\n", __func__); | |
343 | ||
344 | if (fe->ops.i2c_gate_ctrl) | |
345 | fe->ops.i2c_gate_ctrl(fe, 1); | |
346 | ||
347 | /* Setup initial values */ | |
348 | /* Fractional Mode on */ | |
349 | max2165_write_reg(priv, REG_NDIV_FRAC2, 0x18); | |
350 | /* LNA on */ | |
351 | max2165_write_reg(priv, REG_LNA, 0x01); | |
352 | max2165_write_reg(priv, REG_PLL_CFG, 0x7A); | |
353 | max2165_write_reg(priv, REG_TEST, 0x08); | |
354 | max2165_write_reg(priv, REG_SHUTDOWN, 0x40); | |
355 | max2165_write_reg(priv, REG_VCO_CTRL, 0x84); | |
356 | max2165_write_reg(priv, REG_BASEBAND_CTRL, 0xC3); | |
357 | max2165_write_reg(priv, REG_DC_OFFSET_CTRL, 0x75); | |
358 | max2165_write_reg(priv, REG_DC_OFFSET_DAC, 0x00); | |
359 | max2165_write_reg(priv, REG_ROM_TABLE_ADDR, 0x00); | |
360 | ||
361 | max2165_set_osc(priv, priv->config->osc_clk); | |
362 | ||
363 | max2165_read_rom_table(priv); | |
364 | ||
9f179161 | 365 | max2165_set_bandwidth(priv, 8000000); |
95963cbc DW |
366 | |
367 | if (fe->ops.i2c_gate_ctrl) | |
368 | fe->ops.i2c_gate_ctrl(fe, 0); | |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
373 | static int max2165_release(struct dvb_frontend *fe) | |
374 | { | |
375 | struct max2165_priv *priv = fe->tuner_priv; | |
376 | dprintk("%s()\n", __func__); | |
377 | ||
378 | kfree(priv); | |
379 | fe->tuner_priv = NULL; | |
380 | ||
381 | return 0; | |
382 | } | |
383 | ||
384 | static const struct dvb_tuner_ops max2165_tuner_ops = { | |
385 | .info = { | |
386 | .name = "Maxim MAX2165", | |
387 | .frequency_min = 470000000, | |
388 | .frequency_max = 780000000, | |
389 | .frequency_step = 50000, | |
390 | }, | |
391 | ||
392 | .release = max2165_release, | |
393 | .init = max2165_init, | |
394 | .sleep = max2165_sleep, | |
395 | ||
396 | .set_params = max2165_set_params, | |
397 | .set_analog_params = NULL, | |
398 | .get_frequency = max2165_get_frequency, | |
399 | .get_bandwidth = max2165_get_bandwidth, | |
400 | .get_status = max2165_get_status | |
401 | }; | |
402 | ||
403 | struct dvb_frontend *max2165_attach(struct dvb_frontend *fe, | |
404 | struct i2c_adapter *i2c, | |
405 | struct max2165_config *cfg) | |
406 | { | |
407 | struct max2165_priv *priv = NULL; | |
408 | ||
409 | dprintk("%s(%d-%04x)\n", __func__, | |
410 | i2c ? i2c_adapter_id(i2c) : -1, | |
411 | cfg ? cfg->i2c_address : -1); | |
412 | ||
413 | priv = kzalloc(sizeof(struct max2165_priv), GFP_KERNEL); | |
414 | if (priv == NULL) | |
415 | return NULL; | |
416 | ||
417 | memcpy(&fe->ops.tuner_ops, &max2165_tuner_ops, | |
418 | sizeof(struct dvb_tuner_ops)); | |
419 | ||
420 | priv->config = cfg; | |
421 | priv->i2c = i2c; | |
422 | fe->tuner_priv = priv; | |
423 | ||
424 | max2165_init(fe); | |
425 | max2165_debug_status(priv); | |
426 | ||
427 | return fe; | |
428 | } | |
429 | EXPORT_SYMBOL(max2165_attach); | |
430 | ||
431 | MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>"); | |
432 | MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver"); | |
433 | MODULE_LICENSE("GPL"); |