Commit | Line | Data |
---|---|---|
c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
86c22f8c AC |
2 | /* |
3 | * Copyright (C) 2014 Linaro Ltd. | |
4 | * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> | |
5 | * | |
86c22f8c AC |
6 | * PCC (Platform Communication Channel) is defined in the ACPI 5.0+ |
7 | * specification. It is a mailbox like mechanism to allow clients | |
8 | * such as CPPC (Collaborative Processor Performance Control), RAS | |
9 | * (Reliability, Availability and Serviceability) and MPST (Memory | |
10 | * Node Power State Table) to talk to the platform (e.g. BMC) through | |
11 | * shared memory regions as defined in the PCC table entries. The PCC | |
12 | * specification supports a Doorbell mechanism for the PCC clients | |
13 | * to notify the platform about new data. This Doorbell information | |
33350e6b | 14 | * is also specified in each PCC table entry. |
86c22f8c | 15 | * |
33350e6b AC |
16 | * Typical high level flow of operation is: |
17 | * | |
18 | * PCC Reads: | |
19 | * * Client tries to acquire a channel lock. | |
20 | * * After it is acquired it writes READ cmd in communication region cmd | |
21 | * address. | |
22 | * * Client issues mbox_send_message() which rings the PCC doorbell | |
23 | * for its PCC channel. | |
24 | * * If command completes, then client has control over channel and | |
25 | * it can proceed with its reads. | |
26 | * * Client releases lock. | |
27 | * | |
28 | * PCC Writes: | |
29 | * * Client tries to acquire channel lock. | |
30 | * * Client writes to its communication region after it acquires a | |
31 | * channel lock. | |
32 | * * Client writes WRITE cmd in communication region cmd address. | |
33 | * * Client issues mbox_send_message() which rings the PCC doorbell | |
34 | * for its PCC channel. | |
9d2e8b93 | 35 | * * If command completes, then writes have succeeded and it can release |
33350e6b AC |
36 | * the channel lock. |
37 | * | |
38 | * There is a Nominal latency defined for each channel which indicates | |
39 | * how long to wait until a command completes. If command is not complete | |
40 | * the client needs to retry or assume failure. | |
41 | * | |
42 | * For more details about PCC, please see the ACPI specification from | |
86c22f8c AC |
43 | * http://www.uefi.org/ACPIv5.1 Section 14. |
44 | * | |
45 | * This file implements PCC as a Mailbox controller and allows for PCC | |
46 | * clients to be implemented as its Mailbox Client Channels. | |
47 | */ | |
48 | ||
49 | #include <linux/acpi.h> | |
50 | #include <linux/delay.h> | |
51 | #include <linux/io.h> | |
52 | #include <linux/init.h> | |
aca314ef | 53 | #include <linux/interrupt.h> |
86c22f8c | 54 | #include <linux/list.h> |
800cda7b | 55 | #include <linux/log2.h> |
86c22f8c AC |
56 | #include <linux/platform_device.h> |
57 | #include <linux/mailbox_controller.h> | |
58 | #include <linux/mailbox_client.h> | |
8b0f5788 | 59 | #include <linux/io-64-nonatomic-lo-hi.h> |
6ca595a7 | 60 | #include <acpi/pcc.h> |
86c22f8c AC |
61 | |
62 | #include "mailbox.h" | |
63 | ||
aca314ef | 64 | #define MBOX_IRQ_NAME "pcc-mbox" |
86c22f8c | 65 | |
800cda7b SH |
66 | /** |
67 | * struct pcc_chan_reg - PCC register bundle | |
68 | * | |
69 | * @vaddr: cached virtual address for this register | |
70 | * @gas: pointer to the generic address structure for this register | |
71 | * @preserve_mask: bitmask to preserve when writing to this register | |
72 | * @set_mask: bitmask to set when writing to this register | |
73 | * @status_mask: bitmask to determine and/or update the status for this register | |
74 | */ | |
75 | struct pcc_chan_reg { | |
76 | void __iomem *vaddr; | |
77 | struct acpi_generic_address *gas; | |
78 | u64 preserve_mask; | |
79 | u64 set_mask; | |
80 | u64 status_mask; | |
81 | }; | |
82 | ||
80b2bdde SH |
83 | /** |
84 | * struct pcc_chan_info - PCC channel specific information | |
85 | * | |
0f2591e2 | 86 | * @chan: PCC channel information with Shared Memory Region info |
bf18123e SH |
87 | * @db: PCC register bundle for the doorbell register |
88 | * @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge | |
89 | * register | |
c45ded7e SH |
90 | * @cmd_complete: PCC register bundle for the command complete check register |
91 | * @cmd_update: PCC register bundle for the command complete update register | |
92 | * @error: PCC register bundle for the error status register | |
f92ae90e | 93 | * @plat_irq: platform interrupt |
80b2bdde SH |
94 | */ |
95 | struct pcc_chan_info { | |
0f2591e2 | 96 | struct pcc_mbox_chan chan; |
bf18123e SH |
97 | struct pcc_chan_reg db; |
98 | struct pcc_chan_reg plat_irq_ack; | |
c45ded7e SH |
99 | struct pcc_chan_reg cmd_complete; |
100 | struct pcc_chan_reg cmd_update; | |
101 | struct pcc_chan_reg error; | |
f92ae90e | 102 | int plat_irq; |
80b2bdde SH |
103 | }; |
104 | ||
7b6da7fe | 105 | #define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan) |
80b2bdde | 106 | static struct pcc_chan_info *chan_info; |
ce028702 | 107 | static int pcc_chan_count; |
86c22f8c | 108 | |
aca314ef | 109 | /* |
110 | * PCC can be used with perf critical drivers such as CPPC | |
111 | * So it makes sense to locally cache the virtual address and | |
112 | * use it to read/write to PCC registers such as doorbell register | |
113 | * | |
114 | * The below read_register and write_registers are used to read and | |
115 | * write from perf critical registers such as PCC doorbell register | |
116 | */ | |
45ec2daf | 117 | static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width) |
aca314ef | 118 | { |
aca314ef | 119 | switch (bit_width) { |
120 | case 8: | |
121 | *val = readb(vaddr); | |
122 | break; | |
123 | case 16: | |
124 | *val = readw(vaddr); | |
125 | break; | |
126 | case 32: | |
127 | *val = readl(vaddr); | |
128 | break; | |
129 | case 64: | |
130 | *val = readq(vaddr); | |
131 | break; | |
aca314ef | 132 | } |
aca314ef | 133 | } |
134 | ||
45ec2daf | 135 | static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width) |
aca314ef | 136 | { |
aca314ef | 137 | switch (bit_width) { |
138 | case 8: | |
139 | writeb(val, vaddr); | |
140 | break; | |
141 | case 16: | |
142 | writew(val, vaddr); | |
143 | break; | |
144 | case 32: | |
145 | writel(val, vaddr); | |
146 | break; | |
147 | case 64: | |
148 | writeq(val, vaddr); | |
149 | break; | |
aca314ef | 150 | } |
aca314ef | 151 | } |
152 | ||
800cda7b SH |
153 | static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val) |
154 | { | |
155 | int ret = 0; | |
156 | ||
157 | if (!reg->gas) { | |
158 | *val = 0; | |
159 | return 0; | |
160 | } | |
161 | ||
162 | if (reg->vaddr) | |
45ec2daf | 163 | read_register(reg->vaddr, val, reg->gas->bit_width); |
800cda7b SH |
164 | else |
165 | ret = acpi_read(val, reg->gas); | |
166 | ||
167 | return ret; | |
168 | } | |
169 | ||
170 | static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val) | |
171 | { | |
172 | int ret = 0; | |
173 | ||
174 | if (!reg->gas) | |
175 | return 0; | |
176 | ||
177 | if (reg->vaddr) | |
45ec2daf | 178 | write_register(reg->vaddr, val, reg->gas->bit_width); |
800cda7b SH |
179 | else |
180 | ret = acpi_write(val, reg->gas); | |
181 | ||
182 | return ret; | |
183 | } | |
184 | ||
185 | static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg) | |
186 | { | |
187 | int ret = 0; | |
188 | u64 val; | |
189 | ||
190 | ret = pcc_chan_reg_read(reg, &val); | |
191 | if (ret) | |
192 | return ret; | |
193 | ||
194 | val &= reg->preserve_mask; | |
195 | val |= reg->set_mask; | |
196 | ||
197 | return pcc_chan_reg_write(reg, val); | |
198 | } | |
199 | ||
aca314ef | 200 | /** |
201 | * pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number | |
202 | * @interrupt: GSI number. | |
203 | * @flags: interrupt flags | |
204 | * | |
205 | * Returns: a valid linux IRQ number on success | |
206 | * 0 or -EINVAL on failure | |
207 | */ | |
208 | static int pcc_map_interrupt(u32 interrupt, u32 flags) | |
209 | { | |
210 | int trigger, polarity; | |
211 | ||
212 | if (!interrupt) | |
213 | return 0; | |
214 | ||
215 | trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE | |
216 | : ACPI_LEVEL_SENSITIVE; | |
217 | ||
218 | polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW | |
219 | : ACPI_ACTIVE_HIGH; | |
220 | ||
221 | return acpi_register_gsi(NULL, interrupt, trigger, polarity); | |
222 | } | |
223 | ||
224 | /** | |
225 | * pcc_mbox_irq - PCC mailbox interrupt handler | |
10dcc2d6 SH |
226 | * @irq: interrupt number |
227 | * @p: data/cookie passed from the caller to identify the channel | |
228 | * | |
229 | * Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not | |
aca314ef | 230 | */ |
231 | static irqreturn_t pcc_mbox_irq(int irq, void *p) | |
232 | { | |
80b2bdde | 233 | struct pcc_chan_info *pchan; |
aca314ef | 234 | struct mbox_chan *chan = p; |
c45ded7e SH |
235 | u64 val; |
236 | int ret; | |
aca314ef | 237 | |
bf18123e | 238 | pchan = chan->con_priv; |
aca314ef | 239 | |
c45ded7e SH |
240 | ret = pcc_chan_reg_read(&pchan->cmd_complete, &val); |
241 | if (ret) | |
242 | return IRQ_NONE; | |
243 | ||
7215a785 SH |
244 | if (val) { /* Ensure GAS exists and value is non-zero */ |
245 | val &= pchan->cmd_complete.status_mask; | |
246 | if (!val) | |
247 | return IRQ_NONE; | |
248 | } | |
c45ded7e SH |
249 | |
250 | ret = pcc_chan_reg_read(&pchan->error, &val); | |
251 | if (ret) | |
252 | return IRQ_NONE; | |
253 | val &= pchan->error.status_mask; | |
254 | if (val) { | |
255 | val &= ~pchan->error.status_mask; | |
256 | pcc_chan_reg_write(&pchan->error, val); | |
257 | return IRQ_NONE; | |
258 | } | |
259 | ||
bf18123e SH |
260 | if (pcc_chan_reg_read_modify_write(&pchan->plat_irq_ack)) |
261 | return IRQ_NONE; | |
aca314ef | 262 | |
bf18123e | 263 | mbox_chan_received_data(chan, NULL); |
aca314ef | 264 | |
265 | return IRQ_HANDLED; | |
266 | } | |
267 | ||
86c22f8c AC |
268 | /** |
269 | * pcc_mbox_request_channel - PCC clients call this function to | |
270 | * request a pointer to their PCC subspace, from which they | |
271 | * can get the details of communicating with the remote. | |
272 | * @cl: Pointer to Mailbox client, so we know where to bind the | |
273 | * Channel. | |
274 | * @subspace_id: The PCC Subspace index as parsed in the PCC client | |
275 | * ACPI package. This is used to lookup the array of PCC | |
276 | * subspaces as parsed by the PCC Mailbox controller. | |
277 | * | |
7b6da7fe | 278 | * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR. |
86c22f8c | 279 | */ |
7b6da7fe SH |
280 | struct pcc_mbox_chan * |
281 | pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) | |
86c22f8c | 282 | { |
80b2bdde | 283 | struct pcc_chan_info *pchan; |
86c22f8c | 284 | struct mbox_chan *chan; |
ce028702 | 285 | struct device *dev; |
86c22f8c AC |
286 | unsigned long flags; |
287 | ||
ce028702 | 288 | if (subspace_id < 0 || subspace_id >= pcc_chan_count) |
7b6da7fe | 289 | return ERR_PTR(-ENOENT); |
86c22f8c | 290 | |
7b6da7fe SH |
291 | pchan = chan_info + subspace_id; |
292 | chan = pchan->chan.mchan; | |
d311a28a | 293 | if (IS_ERR(chan) || chan->cl) { |
960c4056 | 294 | pr_err("Channel not found for idx: %d\n", subspace_id); |
86c22f8c AC |
295 | return ERR_PTR(-EBUSY); |
296 | } | |
ce028702 | 297 | dev = chan->mbox->dev; |
86c22f8c AC |
298 | |
299 | spin_lock_irqsave(&chan->lock, flags); | |
300 | chan->msg_free = 0; | |
301 | chan->msg_count = 0; | |
302 | chan->active_req = NULL; | |
303 | chan->cl = cl; | |
304 | init_completion(&chan->tx_complete); | |
305 | ||
306 | if (chan->txdone_method == TXDONE_BY_POLL && cl->knows_txdone) | |
33cd7123 | 307 | chan->txdone_method = TXDONE_BY_ACK; |
86c22f8c | 308 | |
6ca595a7 HT |
309 | spin_unlock_irqrestore(&chan->lock, flags); |
310 | ||
f92ae90e | 311 | if (pchan->plat_irq > 0) { |
aca314ef | 312 | int rc; |
313 | ||
f92ae90e | 314 | rc = devm_request_irq(dev, pchan->plat_irq, pcc_mbox_irq, 0, |
80b2bdde | 315 | MBOX_IRQ_NAME, chan); |
aca314ef | 316 | if (unlikely(rc)) { |
317 | dev_err(dev, "failed to register PCC interrupt %d\n", | |
f92ae90e | 318 | pchan->plat_irq); |
7b6da7fe SH |
319 | pcc_mbox_free_channel(&pchan->chan); |
320 | return ERR_PTR(rc); | |
aca314ef | 321 | } |
322 | } | |
323 | ||
7b6da7fe | 324 | return &pchan->chan; |
86c22f8c AC |
325 | } |
326 | EXPORT_SYMBOL_GPL(pcc_mbox_request_channel); | |
327 | ||
328 | /** | |
329 | * pcc_mbox_free_channel - Clients call this to free their Channel. | |
330 | * | |
7b6da7fe SH |
331 | * @pchan: Pointer to the PCC mailbox channel as returned by |
332 | * pcc_mbox_request_channel() | |
86c22f8c | 333 | */ |
7b6da7fe | 334 | void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan) |
86c22f8c | 335 | { |
7b6da7fe SH |
336 | struct pcc_chan_info *pchan_info = to_pcc_chan_info(pchan); |
337 | struct mbox_chan *chan = pchan->mchan; | |
86c22f8c AC |
338 | unsigned long flags; |
339 | ||
340 | if (!chan || !chan->cl) | |
341 | return; | |
342 | ||
f92ae90e SH |
343 | if (pchan_info->plat_irq > 0) |
344 | devm_free_irq(chan->mbox->dev, pchan_info->plat_irq, chan); | |
6ca595a7 | 345 | |
86c22f8c AC |
346 | spin_lock_irqsave(&chan->lock, flags); |
347 | chan->cl = NULL; | |
348 | chan->active_req = NULL; | |
33cd7123 | 349 | if (chan->txdone_method == TXDONE_BY_ACK) |
86c22f8c AC |
350 | chan->txdone_method = TXDONE_BY_POLL; |
351 | ||
352 | spin_unlock_irqrestore(&chan->lock, flags); | |
353 | } | |
354 | EXPORT_SYMBOL_GPL(pcc_mbox_free_channel); | |
355 | ||
356 | /** | |
33350e6b AC |
357 | * pcc_send_data - Called from Mailbox Controller code. Used |
358 | * here only to ring the channel doorbell. The PCC client | |
359 | * specific read/write is done in the client driver in | |
360 | * order to maintain atomicity over PCC channel once | |
361 | * OS has control over it. See above for flow of operations. | |
86c22f8c | 362 | * @chan: Pointer to Mailbox channel over which to send data. |
33350e6b AC |
363 | * @data: Client specific data written over channel. Used here |
364 | * only for debug after PCC transaction completes. | |
86c22f8c AC |
365 | * |
366 | * Return: Err if something failed else 0 for success. | |
367 | */ | |
368 | static int pcc_send_data(struct mbox_chan *chan, void *data) | |
369 | { | |
c45ded7e | 370 | int ret; |
bf18123e | 371 | struct pcc_chan_info *pchan = chan->con_priv; |
86c22f8c | 372 | |
c45ded7e SH |
373 | ret = pcc_chan_reg_read_modify_write(&pchan->cmd_update); |
374 | if (ret) | |
375 | return ret; | |
376 | ||
bf18123e | 377 | return pcc_chan_reg_read_modify_write(&pchan->db); |
86c22f8c AC |
378 | } |
379 | ||
05ae7975 | 380 | static const struct mbox_chan_ops pcc_chan_ops = { |
86c22f8c | 381 | .send_data = pcc_send_data, |
86c22f8c AC |
382 | }; |
383 | ||
384 | /** | |
10dcc2d6 | 385 | * parse_pcc_subspace - Count PCC subspaces defined |
86c22f8c AC |
386 | * @header: Pointer to the ACPI subtable header under the PCCT. |
387 | * @end: End of subtable entry. | |
388 | * | |
8f8027c5 AS |
389 | * Return: If we find a PCC subspace entry of a valid type, return 0. |
390 | * Otherwise, return -EINVAL. | |
86c22f8c AC |
391 | * |
392 | * This gets called for each entry in the PCC table. | |
393 | */ | |
60574d1e | 394 | static int parse_pcc_subspace(union acpi_subtable_headers *header, |
86c22f8c AC |
395 | const unsigned long end) |
396 | { | |
8f8027c5 | 397 | struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header; |
86c22f8c | 398 | |
8f8027c5 AS |
399 | if (ss->header.type < ACPI_PCCT_TYPE_RESERVED) |
400 | return 0; | |
86c22f8c | 401 | |
8f8027c5 | 402 | return -EINVAL; |
86c22f8c AC |
403 | } |
404 | ||
800cda7b SH |
405 | static int |
406 | pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas, | |
407 | u64 preserve_mask, u64 set_mask, u64 status_mask, char *name) | |
408 | { | |
409 | if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { | |
410 | if (!(gas->bit_width >= 8 && gas->bit_width <= 64 && | |
411 | is_power_of_2(gas->bit_width))) { | |
412 | pr_err("Error: Cannot access register of %u bit width", | |
413 | gas->bit_width); | |
414 | return -EFAULT; | |
415 | } | |
416 | ||
417 | reg->vaddr = acpi_os_ioremap(gas->address, gas->bit_width / 8); | |
418 | if (!reg->vaddr) { | |
419 | pr_err("Failed to ioremap PCC %s register\n", name); | |
420 | return -ENOMEM; | |
421 | } | |
422 | } | |
423 | reg->gas = gas; | |
424 | reg->preserve_mask = preserve_mask; | |
425 | reg->set_mask = set_mask; | |
426 | reg->status_mask = status_mask; | |
427 | return 0; | |
428 | } | |
429 | ||
aca314ef | 430 | /** |
431 | * pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register | |
319bfb35 SH |
432 | * |
433 | * @pchan: Pointer to the PCC channel info structure. | |
434 | * @pcct_entry: Pointer to the ACPI subtable header. | |
aca314ef | 435 | * |
436 | * Return: 0 for Success, else errno. | |
437 | * | |
319bfb35 SH |
438 | * There should be one entry per PCC channel. This gets called for each |
439 | * entry in the PCC table. This uses PCCY Type1 structure for all applicable | |
440 | * types(Type 1-4) to fetch irq | |
aca314ef | 441 | */ |
319bfb35 SH |
442 | static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan, |
443 | struct acpi_subtable_header *pcct_entry) | |
aca314ef | 444 | { |
bf18123e | 445 | int ret = 0; |
319bfb35 | 446 | struct acpi_pcct_hw_reduced *pcct_ss; |
80b2bdde | 447 | |
319bfb35 SH |
448 | if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE || |
449 | pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) | |
450 | return 0; | |
451 | ||
452 | pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry; | |
f92ae90e SH |
453 | pchan->plat_irq = pcc_map_interrupt(pcct_ss->platform_interrupt, |
454 | (u32)pcct_ss->flags); | |
455 | if (pchan->plat_irq <= 0) { | |
aca314ef | 456 | pr_err("PCC GSI %d not registered\n", |
c7a1dfb9 | 457 | pcct_ss->platform_interrupt); |
aca314ef | 458 | return -EINVAL; |
459 | } | |
460 | ||
319bfb35 | 461 | if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { |
aca314ef | 462 | struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss; |
463 | ||
bf18123e SH |
464 | ret = pcc_chan_reg_init(&pchan->plat_irq_ack, |
465 | &pcct2_ss->platform_ack_register, | |
466 | pcct2_ss->ack_preserve_mask, | |
467 | pcct2_ss->ack_write_mask, 0, | |
468 | "PLAT IRQ ACK"); | |
c45ded7e SH |
469 | |
470 | } else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE || | |
471 | pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) { | |
472 | struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss; | |
473 | ||
474 | ret = pcc_chan_reg_init(&pchan->plat_irq_ack, | |
475 | &pcct_ext->platform_ack_register, | |
476 | pcct_ext->ack_preserve_mask, | |
477 | pcct_ext->ack_set_mask, 0, | |
478 | "PLAT IRQ ACK"); | |
aca314ef | 479 | } |
480 | ||
bf18123e | 481 | return ret; |
aca314ef | 482 | } |
483 | ||
4e3c96ff SH |
484 | /** |
485 | * pcc_parse_subspace_db_reg - Parse the PCC doorbell register | |
486 | * | |
487 | * @pchan: Pointer to the PCC channel info structure. | |
488 | * @pcct_entry: Pointer to the ACPI subtable header. | |
489 | * | |
bf18123e | 490 | * Return: 0 for Success, else errno. |
4e3c96ff | 491 | */ |
bf18123e SH |
492 | static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan, |
493 | struct acpi_subtable_header *pcct_entry) | |
4e3c96ff | 494 | { |
bf18123e SH |
495 | int ret = 0; |
496 | ||
c45ded7e SH |
497 | if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { |
498 | struct acpi_pcct_subspace *pcct_ss; | |
499 | ||
500 | pcct_ss = (struct acpi_pcct_subspace *)pcct_entry; | |
501 | ||
502 | ret = pcc_chan_reg_init(&pchan->db, | |
503 | &pcct_ss->doorbell_register, | |
504 | pcct_ss->preserve_mask, | |
505 | pcct_ss->write_mask, 0, "Doorbell"); | |
506 | ||
507 | } else { | |
508 | struct acpi_pcct_ext_pcc_master *pcct_ext; | |
509 | ||
510 | pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry; | |
511 | ||
512 | ret = pcc_chan_reg_init(&pchan->db, | |
513 | &pcct_ext->doorbell_register, | |
514 | pcct_ext->preserve_mask, | |
515 | pcct_ext->write_mask, 0, "Doorbell"); | |
516 | if (ret) | |
517 | return ret; | |
518 | ||
519 | ret = pcc_chan_reg_init(&pchan->cmd_complete, | |
520 | &pcct_ext->cmd_complete_register, | |
521 | 0, 0, pcct_ext->cmd_complete_mask, | |
522 | "Command Complete Check"); | |
523 | if (ret) | |
524 | return ret; | |
525 | ||
526 | ret = pcc_chan_reg_init(&pchan->cmd_update, | |
527 | &pcct_ext->cmd_update_register, | |
528 | pcct_ext->cmd_update_preserve_mask, | |
529 | pcct_ext->cmd_update_set_mask, 0, | |
530 | "Command Complete Update"); | |
531 | if (ret) | |
532 | return ret; | |
533 | ||
534 | ret = pcc_chan_reg_init(&pchan->error, | |
535 | &pcct_ext->error_status_register, | |
536 | 0, 0, pcct_ext->error_status_mask, | |
537 | "Error Status"); | |
538 | } | |
bf18123e | 539 | return ret; |
4e3c96ff SH |
540 | } |
541 | ||
0f2591e2 SH |
542 | /** |
543 | * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information | |
544 | * | |
545 | * @pchan: Pointer to the PCC channel info structure. | |
546 | * @pcct_entry: Pointer to the ACPI subtable header. | |
547 | * | |
548 | */ | |
549 | static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan, | |
550 | struct acpi_subtable_header *pcct_entry) | |
551 | { | |
c45ded7e SH |
552 | if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { |
553 | struct acpi_pcct_subspace *pcct_ss = | |
554 | (struct acpi_pcct_subspace *)pcct_entry; | |
555 | ||
556 | pchan->chan.shmem_base_addr = pcct_ss->base_address; | |
557 | pchan->chan.shmem_size = pcct_ss->length; | |
558 | pchan->chan.latency = pcct_ss->latency; | |
559 | pchan->chan.max_access_rate = pcct_ss->max_access_rate; | |
560 | pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time; | |
561 | } else { | |
562 | struct acpi_pcct_ext_pcc_master *pcct_ext = | |
563 | (struct acpi_pcct_ext_pcc_master *)pcct_entry; | |
564 | ||
565 | pchan->chan.shmem_base_addr = pcct_ext->base_address; | |
566 | pchan->chan.shmem_size = pcct_ext->length; | |
567 | pchan->chan.latency = pcct_ext->latency; | |
568 | pchan->chan.max_access_rate = pcct_ext->max_access_rate; | |
569 | pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time; | |
570 | } | |
0f2591e2 SH |
571 | } |
572 | ||
86c22f8c AC |
573 | /** |
574 | * acpi_pcc_probe - Parse the ACPI tree for the PCCT. | |
575 | * | |
576 | * Return: 0 for Success, else errno. | |
577 | */ | |
578 | static int __init acpi_pcc_probe(void) | |
579 | { | |
ce028702 SH |
580 | int count, i, rc = 0; |
581 | acpi_status status; | |
86c22f8c | 582 | struct acpi_table_header *pcct_tbl; |
8f8027c5 | 583 | struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED]; |
86c22f8c | 584 | |
6b11d1d6 | 585 | status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl); |
66ed4cac | 586 | if (ACPI_FAILURE(status) || !pcct_tbl) |
86c22f8c | 587 | return -ENODEV; |
86c22f8c | 588 | |
8f8027c5 AS |
589 | /* Set up the subtable handlers */ |
590 | for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE; | |
591 | i < ACPI_PCCT_TYPE_RESERVED; i++) { | |
592 | proc[i].id = i; | |
593 | proc[i].count = 0; | |
594 | proc[i].handler = parse_pcc_subspace; | |
595 | } | |
86c22f8c | 596 | |
8f8027c5 AS |
597 | count = acpi_table_parse_entries_array(ACPI_SIG_PCCT, |
598 | sizeof(struct acpi_table_pcct), proc, | |
599 | ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES); | |
afd0b1fb DA |
600 | if (count <= 0 || count > MAX_PCC_SUBSPACES) { |
601 | if (count < 0) | |
602 | pr_warn("Error parsing PCC subspaces from PCCT\n"); | |
603 | else | |
604 | pr_warn("Invalid PCCT: %d PCC subspaces\n", count); | |
425ab036 HG |
605 | |
606 | rc = -EINVAL; | |
ce028702 SH |
607 | } else { |
608 | pcc_chan_count = count; | |
86c22f8c AC |
609 | } |
610 | ||
ce028702 SH |
611 | acpi_put_table(pcct_tbl); |
612 | ||
613 | return rc; | |
614 | } | |
615 | ||
616 | /** | |
617 | * pcc_mbox_probe - Called when we find a match for the | |
618 | * PCCT platform device. This is purely used to represent | |
619 | * the PCCT as a virtual device for registering with the | |
620 | * generic Mailbox framework. | |
621 | * | |
622 | * @pdev: Pointer to platform device returned when a match | |
623 | * is found. | |
624 | * | |
625 | * Return: 0 for Success, else errno. | |
626 | */ | |
627 | static int pcc_mbox_probe(struct platform_device *pdev) | |
628 | { | |
629 | struct device *dev = &pdev->dev; | |
630 | struct mbox_controller *pcc_mbox_ctrl; | |
631 | struct mbox_chan *pcc_mbox_channels; | |
632 | struct acpi_table_header *pcct_tbl; | |
633 | struct acpi_subtable_header *pcct_entry; | |
634 | struct acpi_table_pcct *acpi_pcct_tbl; | |
635 | acpi_status status = AE_OK; | |
636 | int i, rc, count = pcc_chan_count; | |
637 | ||
638 | /* Search for PCCT */ | |
639 | status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl); | |
640 | ||
641 | if (ACPI_FAILURE(status) || !pcct_tbl) | |
642 | return -ENODEV; | |
643 | ||
644 | pcc_mbox_channels = devm_kcalloc(dev, count, sizeof(*pcc_mbox_channels), | |
645 | GFP_KERNEL); | |
86c22f8c | 646 | if (!pcc_mbox_channels) { |
425ab036 | 647 | rc = -ENOMEM; |
ce028702 | 648 | goto err; |
86c22f8c AC |
649 | } |
650 | ||
ce028702 | 651 | chan_info = devm_kcalloc(dev, count, sizeof(*chan_info), GFP_KERNEL); |
80b2bdde | 652 | if (!chan_info) { |
aca314ef | 653 | rc = -ENOMEM; |
ce028702 SH |
654 | goto err; |
655 | } | |
656 | ||
369e4ef8 | 657 | pcc_mbox_ctrl = devm_kzalloc(dev, sizeof(*pcc_mbox_ctrl), GFP_KERNEL); |
ce028702 SH |
658 | if (!pcc_mbox_ctrl) { |
659 | rc = -ENOMEM; | |
660 | goto err; | |
aca314ef | 661 | } |
662 | ||
86c22f8c AC |
663 | /* Point to the first PCC subspace entry */ |
664 | pcct_entry = (struct acpi_subtable_header *) ( | |
665 | (unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct)); | |
666 | ||
aca314ef | 667 | acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl; |
668 | if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL) | |
ce028702 | 669 | pcc_mbox_ctrl->txdone_irq = true; |
aca314ef | 670 | |
8f8027c5 | 671 | for (i = 0; i < count; i++) { |
80b2bdde | 672 | struct pcc_chan_info *pchan = chan_info + i; |
8b0f5788 | 673 | |
bf18123e | 674 | pcc_mbox_channels[i].con_priv = pchan; |
0f2591e2 SH |
675 | pchan->chan.mchan = &pcc_mbox_channels[i]; |
676 | ||
c45ded7e | 677 | if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE && |
ce028702 | 678 | !pcc_mbox_ctrl->txdone_irq) { |
8ac11110 | 679 | pr_err("Platform Interrupt flag must be set to 1"); |
c45ded7e SH |
680 | rc = -EINVAL; |
681 | goto err; | |
682 | } | |
683 | ||
ce028702 | 684 | if (pcc_mbox_ctrl->txdone_irq) { |
319bfb35 SH |
685 | rc = pcc_parse_subspace_irq(pchan, pcct_entry); |
686 | if (rc < 0) | |
687 | goto err; | |
aca314ef | 688 | } |
bf18123e SH |
689 | rc = pcc_parse_subspace_db_reg(pchan, pcct_entry); |
690 | if (rc < 0) | |
691 | goto err; | |
aca314ef | 692 | |
0f2591e2 SH |
693 | pcc_parse_subspace_shmem(pchan, pcct_entry); |
694 | ||
86c22f8c AC |
695 | pcct_entry = (struct acpi_subtable_header *) |
696 | ((unsigned long) pcct_entry + pcct_entry->length); | |
697 | } | |
698 | ||
ce028702 | 699 | pcc_mbox_ctrl->num_chans = count; |
86c22f8c | 700 | |
ce028702 | 701 | pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl->num_chans); |
86c22f8c | 702 | |
ce028702 SH |
703 | pcc_mbox_ctrl->chans = pcc_mbox_channels; |
704 | pcc_mbox_ctrl->ops = &pcc_chan_ops; | |
705 | pcc_mbox_ctrl->dev = dev; | |
aca314ef | 706 | |
ce028702 SH |
707 | pr_info("Registering PCC driver as Mailbox controller\n"); |
708 | rc = mbox_controller_register(pcc_mbox_ctrl); | |
709 | if (rc) | |
710 | pr_err("Err registering PCC as Mailbox controller: %d\n", rc); | |
711 | else | |
712 | return 0; | |
aca314ef | 713 | err: |
425ab036 | 714 | acpi_put_table(pcct_tbl); |
aca314ef | 715 | return rc; |
86c22f8c AC |
716 | } |
717 | ||
00d9990a | 718 | static struct platform_driver pcc_mbox_driver = { |
86c22f8c AC |
719 | .probe = pcc_mbox_probe, |
720 | .driver = { | |
721 | .name = "PCCT", | |
86c22f8c AC |
722 | }, |
723 | }; | |
724 | ||
725 | static int __init pcc_init(void) | |
726 | { | |
727 | int ret; | |
728 | struct platform_device *pcc_pdev; | |
729 | ||
730 | if (acpi_disabled) | |
731 | return -ENODEV; | |
732 | ||
733 | /* Check if PCC support is available. */ | |
734 | ret = acpi_pcc_probe(); | |
735 | ||
736 | if (ret) { | |
efd756da | 737 | pr_debug("ACPI PCC probe failed.\n"); |
86c22f8c AC |
738 | return -ENODEV; |
739 | } | |
740 | ||
741 | pcc_pdev = platform_create_bundle(&pcc_mbox_driver, | |
742 | pcc_mbox_probe, NULL, 0, NULL, 0); | |
743 | ||
356d5d28 | 744 | if (IS_ERR(pcc_pdev)) { |
efd756da | 745 | pr_debug("Err creating PCC platform bundle\n"); |
356d5d28 | 746 | return PTR_ERR(pcc_pdev); |
86c22f8c AC |
747 | } |
748 | ||
749 | return 0; | |
750 | } | |
d3c68f21 AC |
751 | |
752 | /* | |
753 | * Make PCC init postcore so that users of this mailbox | |
754 | * such as the ACPI Processor driver have it available | |
755 | * at their init. | |
756 | */ | |
757 | postcore_initcall(pcc_init); |