powerpc/44x: Mark mmu_init_secondary() as __init
[linux-block.git] / drivers / macintosh / via-pmu.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * Device driver for the via-pmu on Apple Powermacs.
4 *
5 * The VIA (versatile interface adapter) interfaces to the PMU,
6 * a 6805 microprocessor core whose primary function is to control
7 * battery charging and system power on the PowerBook 3400 and 2400.
8 * The PMU also controls the ADB (Apple Desktop Bus) which connects
9 * to the keyboard and mouse, as well as the non-volatile RAM
10 * and the RTC (real time clock) chip.
11 *
12 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 14 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT
15 *
16 * THIS DRIVER IS BECOMING A TOTAL MESS !
17 * - Cleanup atomically disabling reply to PMU events after
18 * a sleep or a freq. switch
1da177e4
LT
19 *
20 */
21#include <stdarg.h>
d851b6e0 22#include <linux/mutex.h>
1da177e4
LT
23#include <linux/types.h>
24#include <linux/errno.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
174cd4b1 27#include <linux/sched/signal.h>
1da177e4
LT
28#include <linux/miscdevice.h>
29#include <linux/blkdev.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/poll.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/cuda.h>
1da177e4
LT
36#include <linux/module.h>
37#include <linux/spinlock.h>
38#include <linux/pm.h>
39#include <linux/proc_fs.h>
9d2f7342 40#include <linux/seq_file.h>
1da177e4
LT
41#include <linux/init.h>
42#include <linux/interrupt.h>
43#include <linux/device.h>
e83b906c 44#include <linux/syscore_ops.h>
7dfb7103 45#include <linux/freezer.h>
1da177e4 46#include <linux/syscalls.h>
6002f544 47#include <linux/suspend.h>
1da177e4 48#include <linux/cpu.h>
4cc4587f 49#include <linux/compat.h>
5af50730
RH
50#include <linux/of_address.h>
51#include <linux/of_irq.h>
1da177e4
LT
52#include <asm/prom.h>
53#include <asm/machdep.h>
54#include <asm/io.h>
55#include <asm/pgtable.h>
1da177e4
LT
56#include <asm/sections.h>
57#include <asm/irq.h>
58#include <asm/pmac_feature.h>
5b9ca526
BH
59#include <asm/pmac_pfunc.h>
60#include <asm/pmac_low_i2c.h>
7c0f6ba6 61#include <linux/uaccess.h>
1da177e4
LT
62#include <asm/mmu_context.h>
63#include <asm/cputable.h>
64#include <asm/time.h>
1da177e4 65#include <asm/backlight.h>
1da177e4 66
9e8e30a0
JB
67#include "via-pmu-event.h"
68
1da177e4 69/* Some compile options */
f91266ed 70#undef DEBUG_SLEEP
1da177e4
LT
71
72/* Misc minor number allocated for /dev/pmu */
73#define PMU_MINOR 154
74
75/* How many iterations between battery polls */
76#define BATTERY_POLLING_COUNT 2
77
d851b6e0 78static DEFINE_MUTEX(pmu_info_proc_mutex);
1da177e4
LT
79static volatile unsigned char __iomem *via;
80
81/* VIA registers - spaced 0x200 bytes apart */
82#define RS 0x200 /* skip between registers */
83#define B 0 /* B-side data */
84#define A RS /* A-side data */
85#define DIRB (2*RS) /* B-side direction (1=output) */
86#define DIRA (3*RS) /* A-side direction (1=output) */
87#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
88#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
89#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
90#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
91#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
92#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
93#define SR (10*RS) /* Shift register */
94#define ACR (11*RS) /* Auxiliary control register */
95#define PCR (12*RS) /* Peripheral control register */
96#define IFR (13*RS) /* Interrupt flag register */
97#define IER (14*RS) /* Interrupt enable register */
98#define ANH (15*RS) /* A-side data, no handshake */
99
100/* Bits in B data register: both active low */
101#define TACK 0x08 /* Transfer acknowledge (input) */
102#define TREQ 0x10 /* Transfer request (output) */
103
104/* Bits in ACR */
105#define SR_CTRL 0x1c /* Shift register control bits */
106#define SR_EXT 0x0c /* Shift on external clock */
107#define SR_OUT 0x10 /* Shift out if 1 */
108
109/* Bits in IFR and IER */
110#define IER_SET 0x80 /* set bits in IER */
111#define IER_CLR 0 /* clear bits in IER */
112#define SR_INT 0x04 /* Shift register full/empty */
113#define CB2_INT 0x08
114#define CB1_INT 0x10 /* transition on CB1 input */
115
116static volatile enum pmu_state {
117 idle,
118 sending,
119 intack,
120 reading,
121 reading_intr,
122 locked,
123} pmu_state;
124
125static volatile enum int_data_state {
126 int_data_empty,
127 int_data_fill,
128 int_data_ready,
129 int_data_flush
130} int_data_state[2] = { int_data_empty, int_data_empty };
131
132static struct adb_request *current_req;
133static struct adb_request *last_req;
134static struct adb_request *req_awaiting_reply;
135static unsigned char interrupt_data[2][32];
136static int interrupt_data_len[2];
137static int int_data_last;
138static unsigned char *reply_ptr;
139static int data_index;
140static int data_len;
141static volatile int adb_int_pending;
142static volatile int disable_poll;
1da177e4
LT
143static struct device_node *vias;
144static int pmu_kind = PMU_UNKNOWN;
87275856 145static int pmu_fully_inited;
1da177e4 146static int pmu_has_adb;
51d3082f 147static struct device_node *gpio_node;
87275856 148static unsigned char __iomem *gpio_reg;
ef24ba70 149static int gpio_irq = 0;
1da177e4 150static int gpio_irq_enabled = -1;
87275856 151static volatile int pmu_suspended;
1da177e4
LT
152static spinlock_t pmu_lock;
153static u8 pmu_intr_mask;
154static int pmu_version;
155static int drop_interrupts;
f91266ed 156#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 157static int option_lid_wakeup = 1;
f91266ed 158#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
159static unsigned long async_req_locks;
160static unsigned int pmu_irq_stats[11];
161
162static struct proc_dir_entry *proc_pmu_root;
163static struct proc_dir_entry *proc_pmu_info;
164static struct proc_dir_entry *proc_pmu_irqstats;
165static struct proc_dir_entry *proc_pmu_options;
166static int option_server_mode;
167
1da177e4
LT
168int pmu_battery_count;
169int pmu_cur_battery;
a334bdbd 170unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT
171struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
172static int query_batt_timer = BATTERY_POLLING_COUNT;
173static struct adb_request batt_req;
174static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 175
1da177e4
LT
176int __fake_sleep;
177int asleep;
1da177e4
LT
178
179#ifdef CONFIG_ADB
87275856 180static int adb_dev_map;
1da177e4
LT
181static int pmu_adb_flags;
182
183static int pmu_probe(void);
184static int pmu_init(void);
185static int pmu_send_request(struct adb_request *req, int sync);
186static int pmu_adb_autopoll(int devs);
187static int pmu_adb_reset_bus(void);
188#endif /* CONFIG_ADB */
189
190static int init_pmu(void);
1da177e4 191static void pmu_start(void);
7d12e780
DH
192static irqreturn_t via_pmu_interrupt(int irq, void *arg);
193static irqreturn_t gpio1_interrupt(int irq, void *arg);
3f3942ac
CH
194static int pmu_info_proc_show(struct seq_file *m, void *v);
195static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
196static int pmu_battery_proc_show(struct seq_file *m, void *v);
1da177e4 197static void pmu_pass_intr(unsigned char *data, int len);
9d2f7342 198static const struct file_operations pmu_options_proc_fops;
1da177e4
LT
199
200#ifdef CONFIG_ADB
58935176 201const struct adb_driver via_pmu_driver = {
3a52f6f9
FT
202 .name = "PMU",
203 .probe = pmu_probe,
204 .init = pmu_init,
205 .send_request = pmu_send_request,
206 .autopoll = pmu_adb_autopoll,
207 .poll = pmu_poll_adb,
208 .reset_bus = pmu_adb_reset_bus,
1da177e4
LT
209};
210#endif /* CONFIG_ADB */
211
212extern void low_sleep_handler(void);
213extern void enable_kernel_altivec(void);
214extern void enable_kernel_fp(void);
215
216#ifdef DEBUG_SLEEP
217int pmu_polled_request(struct adb_request *req);
f91266ed 218void pmu_blink(int n);
1da177e4
LT
219#endif
220
221/*
222 * This table indicates for each PMU opcode:
223 * - the number of data bytes to be sent with the command, or -1
224 * if a length byte should be sent,
225 * - the number of response bytes which the PMU will return, or
226 * -1 if it will send a length byte.
227 */
aacaf9bd 228static const s8 pmu_data_len[256][2] = {
1da177e4
LT
229/* 0 1 2 3 4 5 6 7 */
230/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
231/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
232/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
233/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
234/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
235/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
236/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
237/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
238/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
239/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
240/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
241/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
242/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
244/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
246/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
247/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
248/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
250/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
251/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
252/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
254/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
255/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
256/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
258/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
259/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
260/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262};
263
264static char *pbook_type[] = {
265 "Unknown PowerBook",
266 "PowerBook 2400/3400/3500(G3)",
267 "PowerBook G3 Series",
268 "1999 PowerBook G3",
269 "Core99"
270};
271
51d3082f 272int __init find_via_pmu(void)
1da177e4 273{
cc5d0189 274 u64 taddr;
018a3d1d 275 const u32 *reg;
51d3082f 276
d8731527 277 if (via)
1da177e4 278 return 1;
51d3082f
BH
279 vias = of_find_node_by_name(NULL, "via-pmu");
280 if (vias == NULL)
1da177e4 281 return 0;
1da177e4 282
01b2726d 283 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH
284 if (reg == NULL) {
285 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
286 goto fail;
287 }
288 taddr = of_translate_address(vias, reg);
bb6b9b28 289 if (taddr == OF_BAD_ADDR) {
51d3082f
BH
290 printk(KERN_ERR "via-pmu: Can't translate address !\n");
291 goto fail;
1da177e4
LT
292 }
293
294 spin_lock_init(&pmu_lock);
295
296 pmu_has_adb = 1;
297
298 pmu_intr_mask = PMU_INT_PCEJECT |
299 PMU_INT_SNDBRT |
300 PMU_INT_ADB |
301 PMU_INT_TICK;
302
303 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 304 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 305 pmu_kind = PMU_OHARE_BASED;
55b61fec 306 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 307 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 308 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 309 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR
310 else if (of_device_is_compatible(vias->parent, "Keylargo")
311 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 312 struct device_node *gpiop;
1658ab66 313 struct device_node *adbp;
cc5d0189 314 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT
315
316 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR
317 adbp = of_find_node_by_type(NULL, "adb");
318 pmu_has_adb = (adbp != NULL);
319 of_node_put(adbp);
1da177e4
LT
320 pmu_intr_mask = PMU_INT_PCEJECT |
321 PMU_INT_SNDBRT |
322 PMU_INT_ADB |
323 PMU_INT_TICK |
324 PMU_INT_ENVIRONMENT;
325
51d3082f
BH
326 gpiop = of_find_node_by_name(NULL, "gpio");
327 if (gpiop) {
01b2726d 328 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH
329 if (reg)
330 gaddr = of_translate_address(gpiop, reg);
cc5d0189 331 if (gaddr != OF_BAD_ADDR)
51d3082f 332 gpio_reg = ioremap(gaddr, 0x10);
e702240e 333 of_node_put(gpiop);
1da177e4 334 }
61e37ca2 335 if (gpio_reg == NULL) {
51d3082f 336 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
ffa3eb01 337 goto fail;
61e37ca2 338 }
1da177e4
LT
339 } else
340 pmu_kind = PMU_UNKNOWN;
341
51d3082f
BH
342 via = ioremap(taddr, 0x2000);
343 if (via == NULL) {
344 printk(KERN_ERR "via-pmu: Can't map address !\n");
ffa3eb01 345 goto fail_via_remap;
51d3082f 346 }
1da177e4
LT
347
348 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
349 out_8(&via[IFR], 0x7f); /* clear IFR */
350
351 pmu_state = idle;
352
ffa3eb01
PC
353 if (!init_pmu())
354 goto fail_init;
1da177e4 355
bb6b9b28 356 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT
357 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
358
359 sys_ctrler = SYS_CTRLER_PMU;
360
361 return 1;
ffa3eb01
PC
362
363 fail_init:
364 iounmap(via);
365 via = NULL;
366 fail_via_remap:
61e37ca2
OH
367 iounmap(gpio_reg);
368 gpio_reg = NULL;
ffa3eb01
PC
369 fail:
370 of_node_put(vias);
51d3082f
BH
371 vias = NULL;
372 return 0;
1da177e4
LT
373}
374
375#ifdef CONFIG_ADB
51d3082f 376static int pmu_probe(void)
1da177e4
LT
377{
378 return vias == NULL? -ENODEV: 0;
379}
380
51d3082f 381static int __init pmu_init(void)
1da177e4
LT
382{
383 if (vias == NULL)
384 return -ENODEV;
385 return 0;
386}
387#endif /* CONFIG_ADB */
388
389/*
390 * We can't wait until pmu_init gets called, that happens too late.
391 * It happens after IDE and SCSI initialization, which can take a few
392 * seconds, and by that time the PMU could have given up on us and
393 * turned us off.
394 * Thus this is called with arch_initcall rather than device_initcall.
395 */
396static int __init via_pmu_start(void)
397{
0ebfff14
BH
398 unsigned int irq;
399
1da177e4
LT
400 if (vias == NULL)
401 return -ENODEV;
402
1da177e4 403 batt_req.complete = 1;
1da177e4 404
0ebfff14 405 irq = irq_of_parse_and_map(vias, 0);
ef24ba70 406 if (!irq) {
7b52b440 407 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH
408 return -ENODEV;
409 }
ba461f09
IC
410 /* We set IRQF_NO_SUSPEND because we don't want the interrupt
411 * to be disabled between the 2 passes of driver suspend, we
412 * control our own disabling for that one
11a50873 413 */
ba461f09
IC
414 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
415 "VIA-PMU", (void *)0)) {
0ebfff14
BH
416 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
417 return -ENODEV;
1da177e4
LT
418 }
419
51d3082f
BH
420 if (pmu_kind == PMU_KEYLARGO_BASED) {
421 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
422 if (gpio_node == NULL)
423 gpio_node = of_find_node_by_name(NULL,
424 "pmu-interrupt");
0ebfff14
BH
425 if (gpio_node)
426 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 427
ef24ba70 428 if (gpio_irq) {
6c308215
JO
429 if (request_irq(gpio_irq, gpio1_interrupt,
430 IRQF_NO_SUSPEND, "GPIO1 ADB",
431 (void *)0))
51d3082f
BH
432 printk(KERN_ERR "pmu: can't get irq %d"
433 " (GPIO1)\n", gpio_irq);
434 else
435 gpio_irq_enabled = 1;
436 }
1da177e4
LT
437 }
438
439 /* Enable interrupts */
440 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
441
442 pmu_fully_inited = 1;
443
444 /* Make sure PMU settle down before continuing. This is _very_ important
445 * since the IDE probe may shut interrupts down for quite a bit of time. If
446 * a PMU communication is pending while this happens, the PMU may timeout
447 * Not that on Core99 machines, the PMU keeps sending us environement
448 * messages, we should find a way to either fix IDE or make it call
449 * pmu_suspend() before masking interrupts. This can also happens while
450 * scolling with some fbdevs.
451 */
452 do {
453 pmu_poll();
454 } while (pmu_state != idle);
455
456 return 0;
457}
458
459arch_initcall(via_pmu_start);
460
461/*
462 * This has to be done after pci_init, which is a subsys_initcall.
463 */
464static int __init via_pmu_dev_init(void)
465{
466 if (vias == NULL)
467 return -ENODEV;
468
1da177e4 469#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 470 /* Initialize backlight */
4b755999 471 pmu_backlight_init();
5474c120 472#endif
1da177e4 473
8c870933 474#ifdef CONFIG_PPC32
71a157e8
GL
475 if (of_machine_is_compatible("AAPL,3400/2400") ||
476 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT
477 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
478 NULL, PMAC_MB_INFO_MODEL, 0);
479 pmu_battery_count = 1;
480 if (mb == PMAC_TYPE_COMET)
481 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
482 else
483 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL
484 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
485 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT
486 pmu_battery_count = 2;
487 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
488 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
489 } else {
30686ba6
SR
490 struct device_node* prim =
491 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 492 const u32 *prim_info = NULL;
1da177e4 493 if (prim)
01b2726d 494 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT
495 if (prim_info) {
496 /* Other stuffs here yet unknown */
497 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
498 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
499 if (pmu_battery_count > 1)
500 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
501 }
30686ba6 502 of_node_put(prim);
1da177e4 503 }
8c870933
BH
504#endif /* CONFIG_PPC32 */
505
1da177e4
LT
506 /* Create /proc/pmu */
507 proc_pmu_root = proc_mkdir("pmu", NULL);
508 if (proc_pmu_root) {
8c870933 509 long i;
1da177e4
LT
510
511 for (i=0; i<pmu_battery_count; i++) {
512 char title[16];
8c870933 513 sprintf(title, "battery_%ld", i);
3f3942ac
CH
514 proc_pmu_batt[i] = proc_create_single_data(title, 0,
515 proc_pmu_root, pmu_battery_proc_show,
516 (void *)i);
1da177e4 517 }
1da177e4 518
3f3942ac
CH
519 proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
520 pmu_info_proc_show);
521 proc_pmu_irqstats = proc_create_single("interrupts", 0,
522 proc_pmu_root, pmu_irqstats_proc_show);
9d2f7342
AD
523 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
524 &pmu_options_proc_fops);
1da177e4
LT
525 }
526 return 0;
527}
528
529device_initcall(via_pmu_dev_init);
530
aacaf9bd 531static int
1da177e4
LT
532init_pmu(void)
533{
534 int timeout;
535 struct adb_request req;
536
537 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
538 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
539
540 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
541 timeout = 100000;
542 while (!req.complete) {
543 if (--timeout < 0) {
544 printk(KERN_ERR "init_pmu: no response from PMU\n");
545 return 0;
546 }
547 udelay(10);
548 pmu_poll();
549 }
550
551 /* ack all pending interrupts */
552 timeout = 100000;
553 interrupt_data[0][0] = 1;
554 while (interrupt_data[0][0] || pmu_state != idle) {
555 if (--timeout < 0) {
556 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
557 return 0;
558 }
559 if (pmu_state == idle)
560 adb_int_pending = 1;
7d12e780 561 via_pmu_interrupt(0, NULL);
1da177e4
LT
562 udelay(10);
563 }
564
565 /* Tell PMU we are ready. */
566 if (pmu_kind == PMU_KEYLARGO_BASED) {
567 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
568 while (!req.complete)
569 pmu_poll();
570 }
571
572 /* Read PMU version */
573 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
574 pmu_wait_complete(&req);
575 if (req.reply_len > 0)
576 pmu_version = req.reply[0];
577
578 /* Read server mode setting */
579 if (pmu_kind == PMU_KEYLARGO_BASED) {
580 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
581 PMU_PWR_GET_POWERUP_EVENTS);
582 pmu_wait_complete(&req);
583 if (req.reply_len == 2) {
584 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
585 option_server_mode = 1;
586 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
587 option_server_mode ? "enabled" : "disabled");
588 }
589 }
590 return 1;
591}
592
593int
594pmu_get_model(void)
595{
596 return pmu_kind;
597}
598
1da177e4
LT
599static void pmu_set_server_mode(int server_mode)
600{
601 struct adb_request req;
602
603 if (pmu_kind != PMU_KEYLARGO_BASED)
604 return;
605
606 option_server_mode = server_mode;
607 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
608 pmu_wait_complete(&req);
609 if (req.reply_len < 2)
610 return;
611 if (server_mode)
612 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
613 PMU_PWR_SET_POWERUP_EVENTS,
614 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
615 else
616 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
617 PMU_PWR_CLR_POWERUP_EVENTS,
618 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
619 pmu_wait_complete(&req);
620}
621
1da177e4
LT
622/* This new version of the code for 2400/3400/3500 powerbooks
623 * is inspired from the implementation in gkrellm-pmu
624 */
aacaf9bd 625static void
1da177e4
LT
626done_battery_state_ohare(struct adb_request* req)
627{
628 /* format:
629 * [0] : flags
630 * 0x01 : AC indicator
631 * 0x02 : charging
632 * 0x04 : battery exist
633 * 0x08 :
634 * 0x10 :
635 * 0x20 : full charged
636 * 0x40 : pcharge reset
637 * 0x80 : battery exist
638 *
639 * [1][2] : battery voltage
640 * [3] : CPU temperature
641 * [4] : battery temperature
642 * [5] : current
643 * [6][7] : pcharge
644 * --tkoba
645 */
646 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
647 long pcharge, charge, vb, vmax, lmax;
648 long vmax_charging, vmax_charged;
649 long amperage, voltage, time, max;
650 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
651 NULL, PMAC_MB_INFO_MODEL, 0);
652
653 if (req->reply[0] & 0x01)
654 pmu_power_flags |= PMU_PWR_AC_PRESENT;
655 else
656 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
657
658 if (mb == PMAC_TYPE_COMET) {
659 vmax_charged = 189;
660 vmax_charging = 213;
661 lmax = 6500;
662 } else {
663 vmax_charged = 330;
664 vmax_charging = 330;
665 lmax = 6500;
666 }
667 vmax = vmax_charged;
668
669 /* If battery installed */
670 if (req->reply[0] & 0x04) {
671 bat_flags |= PMU_BATT_PRESENT;
672 if (req->reply[0] & 0x02)
673 bat_flags |= PMU_BATT_CHARGING;
674 vb = (req->reply[1] << 8) | req->reply[2];
675 voltage = (vb * 265 + 72665) / 10;
676 amperage = req->reply[5];
677 if ((req->reply[0] & 0x01) == 0) {
678 if (amperage > 200)
679 vb += ((amperage - 200) * 15)/100;
680 } else if (req->reply[0] & 0x02) {
681 vb = (vb * 97) / 100;
682 vmax = vmax_charging;
683 }
684 charge = (100 * vb) / vmax;
685 if (req->reply[0] & 0x40) {
686 pcharge = (req->reply[6] << 8) + req->reply[7];
687 if (pcharge > lmax)
688 pcharge = lmax;
689 pcharge *= 100;
690 pcharge = 100 - pcharge / lmax;
691 if (pcharge < charge)
692 charge = pcharge;
693 }
694 if (amperage > 0)
695 time = (charge * 16440) / amperage;
696 else
697 time = 0;
698 max = 100;
699 amperage = -amperage;
700 } else
701 charge = max = amperage = voltage = time = 0;
702
703 pmu_batteries[pmu_cur_battery].flags = bat_flags;
704 pmu_batteries[pmu_cur_battery].charge = charge;
705 pmu_batteries[pmu_cur_battery].max_charge = max;
706 pmu_batteries[pmu_cur_battery].amperage = amperage;
707 pmu_batteries[pmu_cur_battery].voltage = voltage;
708 pmu_batteries[pmu_cur_battery].time_remaining = time;
709
710 clear_bit(0, &async_req_locks);
711}
712
aacaf9bd 713static void
1da177e4
LT
714done_battery_state_smart(struct adb_request* req)
715{
716 /* format:
717 * [0] : format of this structure (known: 3,4,5)
718 * [1] : flags
719 *
720 * format 3 & 4:
721 *
722 * [2] : charge
723 * [3] : max charge
724 * [4] : current
725 * [5] : voltage
726 *
727 * format 5:
728 *
729 * [2][3] : charge
730 * [4][5] : max charge
731 * [6][7] : current
732 * [8][9] : voltage
733 */
734
735 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
736 int amperage;
737 unsigned int capa, max, voltage;
738
739 if (req->reply[1] & 0x01)
740 pmu_power_flags |= PMU_PWR_AC_PRESENT;
741 else
742 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
743
744
745 capa = max = amperage = voltage = 0;
746
747 if (req->reply[1] & 0x04) {
748 bat_flags |= PMU_BATT_PRESENT;
749 switch(req->reply[0]) {
750 case 3:
751 case 4: capa = req->reply[2];
752 max = req->reply[3];
753 amperage = *((signed char *)&req->reply[4]);
754 voltage = req->reply[5];
755 break;
756 case 5: capa = (req->reply[2] << 8) | req->reply[3];
757 max = (req->reply[4] << 8) | req->reply[5];
758 amperage = *((signed short *)&req->reply[6]);
759 voltage = (req->reply[8] << 8) | req->reply[9];
760 break;
761 default:
ebd004e4
AS
762 pr_warn("pmu.c: unrecognized battery info, "
763 "len: %d, %4ph\n", req->reply_len,
764 req->reply);
1da177e4
LT
765 break;
766 }
767 }
768
769 if ((req->reply[1] & 0x01) && (amperage > 0))
770 bat_flags |= PMU_BATT_CHARGING;
771
772 pmu_batteries[pmu_cur_battery].flags = bat_flags;
773 pmu_batteries[pmu_cur_battery].charge = capa;
774 pmu_batteries[pmu_cur_battery].max_charge = max;
775 pmu_batteries[pmu_cur_battery].amperage = amperage;
776 pmu_batteries[pmu_cur_battery].voltage = voltage;
777 if (amperage) {
778 if ((req->reply[1] & 0x01) && (amperage > 0))
779 pmu_batteries[pmu_cur_battery].time_remaining
780 = ((max-capa) * 3600) / amperage;
781 else
782 pmu_batteries[pmu_cur_battery].time_remaining
783 = (capa * 3600) / (-amperage);
784 } else
785 pmu_batteries[pmu_cur_battery].time_remaining = 0;
786
787 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
788
789 clear_bit(0, &async_req_locks);
790}
791
aacaf9bd 792static void
1da177e4
LT
793query_battery_state(void)
794{
795 if (test_and_set_bit(0, &async_req_locks))
796 return;
797 if (pmu_kind == PMU_OHARE_BASED)
798 pmu_request(&batt_req, done_battery_state_ohare,
799 1, PMU_BATTERY_STATE);
800 else
801 pmu_request(&batt_req, done_battery_state_smart,
802 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
803}
804
9d2f7342 805static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 806{
9d2f7342
AD
807 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
808 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
809 seq_printf(m, "AC Power : %d\n",
63e1fd41 810 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD
811 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
812
813 return 0;
814}
1da177e4 815
9d2f7342 816static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT
817{
818 int i;
1da177e4
LT
819 static const char *irq_names[] = {
820 "Total CB1 triggered events",
821 "Total GPIO1 triggered events",
822 "PC-Card eject button",
823 "Sound/Brightness button",
824 "ADB message",
825 "Battery state change",
826 "Environment interrupt",
827 "Tick timer",
828 "Ghost interrupt (zero len)",
829 "Empty interrupt (empty mask)",
830 "Max irqs in a row"
831 };
832
833 for (i=0; i<11; i++) {
9d2f7342 834 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT
835 i, pmu_irq_stats[i], irq_names[i]);
836 }
9d2f7342 837 return 0;
1da177e4
LT
838}
839
9d2f7342
AD
840static int pmu_battery_proc_show(struct seq_file *m, void *v)
841{
842 long batnum = (long)m->private;
1da177e4 843
9d2f7342
AD
844 seq_putc(m, '\n');
845 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
846 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
847 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
848 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
849 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
850 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
851 return 0;
1da177e4 852}
1da177e4 853
9d2f7342
AD
854static int pmu_options_proc_show(struct seq_file *m, void *v)
855{
f91266ed 856#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
857 if (pmu_kind == PMU_KEYLARGO_BASED &&
858 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 859 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 860#endif
1da177e4 861 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 862 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 863
9d2f7342 864 return 0;
1da177e4 865}
9d2f7342
AD
866
867static int pmu_options_proc_open(struct inode *inode, struct file *file)
868{
869 return single_open(file, pmu_options_proc_show, NULL);
870}
871
872static ssize_t pmu_options_proc_write(struct file *file,
873 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT
874{
875 char tmp[33];
876 char *label, *val;
9d2f7342 877 size_t fcount = count;
1da177e4
LT
878
879 if (!count)
880 return -EINVAL;
881 if (count > 32)
882 count = 32;
883 if (copy_from_user(tmp, buffer, count))
884 return -EFAULT;
885 tmp[count] = 0;
886
887 label = tmp;
888 while(*label == ' ')
889 label++;
890 val = label;
891 while(*val && (*val != '=')) {
892 if (*val == ' ')
893 *val = 0;
894 val++;
895 }
896 if ((*val) == 0)
897 return -EINVAL;
898 *(val++) = 0;
899 while(*val == ' ')
900 val++;
f91266ed 901#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
902 if (pmu_kind == PMU_KEYLARGO_BASED &&
903 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
904 if (!strcmp(label, "lid_wakeup"))
905 option_lid_wakeup = ((*val) == '1');
8c870933 906#endif
1da177e4
LT
907 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
908 int new_value;
909 new_value = ((*val) == '1');
910 if (new_value != option_server_mode)
911 pmu_set_server_mode(new_value);
912 }
913 return fcount;
914}
915
9d2f7342
AD
916static const struct file_operations pmu_options_proc_fops = {
917 .owner = THIS_MODULE,
918 .open = pmu_options_proc_open,
919 .read = seq_read,
920 .llseek = seq_lseek,
921 .release = single_release,
922 .write = pmu_options_proc_write,
923};
924
1da177e4
LT
925#ifdef CONFIG_ADB
926/* Send an ADB command */
11a50873 927static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT
928{
929 int i, ret;
930
931 if ((vias == NULL) || (!pmu_fully_inited)) {
932 req->complete = 1;
933 return -ENXIO;
934 }
935
936 ret = -EINVAL;
937
938 switch (req->data[0]) {
939 case PMU_PACKET:
940 for (i = 0; i < req->nbytes - 1; ++i)
941 req->data[i] = req->data[i+1];
942 --req->nbytes;
943 if (pmu_data_len[req->data[0]][1] != 0) {
944 req->reply[0] = ADB_RET_OK;
945 req->reply_len = 1;
946 } else
947 req->reply_len = 0;
948 ret = pmu_queue_request(req);
949 break;
950 case CUDA_PACKET:
951 switch (req->data[1]) {
952 case CUDA_GET_TIME:
953 if (req->nbytes != 2)
954 break;
955 req->data[0] = PMU_READ_RTC;
956 req->nbytes = 1;
957 req->reply_len = 3;
958 req->reply[0] = CUDA_PACKET;
959 req->reply[1] = 0;
960 req->reply[2] = CUDA_GET_TIME;
961 ret = pmu_queue_request(req);
962 break;
963 case CUDA_SET_TIME:
964 if (req->nbytes != 6)
965 break;
966 req->data[0] = PMU_SET_RTC;
967 req->nbytes = 5;
968 for (i = 1; i <= 4; ++i)
969 req->data[i] = req->data[i+1];
970 req->reply_len = 3;
971 req->reply[0] = CUDA_PACKET;
972 req->reply[1] = 0;
973 req->reply[2] = CUDA_SET_TIME;
974 ret = pmu_queue_request(req);
975 break;
976 }
977 break;
978 case ADB_PACKET:
979 if (!pmu_has_adb)
980 return -ENXIO;
981 for (i = req->nbytes - 1; i > 1; --i)
982 req->data[i+2] = req->data[i];
983 req->data[3] = req->nbytes - 2;
984 req->data[2] = pmu_adb_flags;
985 /*req->data[1] = req->data[1];*/
986 req->data[0] = PMU_ADB_CMD;
987 req->nbytes += 2;
988 req->reply_expected = 1;
989 req->reply_len = 0;
990 ret = pmu_queue_request(req);
991 break;
992 }
993 if (ret) {
994 req->complete = 1;
995 return ret;
996 }
997
998 if (sync)
999 while (!req->complete)
1000 pmu_poll();
1001
1002 return 0;
1003}
1004
1005/* Enable/disable autopolling */
11a50873 1006static int __pmu_adb_autopoll(int devs)
1da177e4
LT
1007{
1008 struct adb_request req;
1009
1da177e4 1010 if (devs) {
1da177e4
LT
1011 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1012 adb_dev_map >> 8, adb_dev_map);
1013 pmu_adb_flags = 2;
1014 } else {
1015 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1016 pmu_adb_flags = 0;
1017 }
1018 while (!req.complete)
1019 pmu_poll();
1020 return 0;
1021}
1022
11a50873
BH
1023static int pmu_adb_autopoll(int devs)
1024{
1025 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1026 return -ENXIO;
1027
1028 adb_dev_map = devs;
1029 return __pmu_adb_autopoll(devs);
1030}
1031
1da177e4 1032/* Reset the ADB bus */
11a50873 1033static int pmu_adb_reset_bus(void)
1da177e4
LT
1034{
1035 struct adb_request req;
1036 int save_autopoll = adb_dev_map;
1037
1038 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1039 return -ENXIO;
1040
1041 /* anyone got a better idea?? */
11a50873 1042 __pmu_adb_autopoll(0);
1da177e4 1043
11a50873 1044 req.nbytes = 4;
1da177e4
LT
1045 req.done = NULL;
1046 req.data[0] = PMU_ADB_CMD;
11a50873
BH
1047 req.data[1] = ADB_BUSRESET;
1048 req.data[2] = 0;
1da177e4
LT
1049 req.data[3] = 0;
1050 req.data[4] = 0;
1051 req.reply_len = 0;
1052 req.reply_expected = 1;
1053 if (pmu_queue_request(&req) != 0) {
1054 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1055 return -EIO;
1056 }
1057 pmu_wait_complete(&req);
1058
1059 if (save_autopoll != 0)
11a50873 1060 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT
1061
1062 return 0;
1063}
1064#endif /* CONFIG_ADB */
1065
1066/* Construct and send a pmu request */
aacaf9bd 1067int
1da177e4
LT
1068pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1069 int nbytes, ...)
1070{
1071 va_list list;
1072 int i;
1073
1074 if (vias == NULL)
1075 return -ENXIO;
1076
1077 if (nbytes < 0 || nbytes > 32) {
1078 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1079 req->complete = 1;
1080 return -EINVAL;
1081 }
1082 req->nbytes = nbytes;
1083 req->done = done;
1084 va_start(list, nbytes);
1085 for (i = 0; i < nbytes; ++i)
1086 req->data[i] = va_arg(list, int);
1087 va_end(list);
1088 req->reply_len = 0;
1089 req->reply_expected = 0;
1090 return pmu_queue_request(req);
1091}
1092
aacaf9bd 1093int
1da177e4
LT
1094pmu_queue_request(struct adb_request *req)
1095{
1096 unsigned long flags;
1097 int nsend;
1098
1099 if (via == NULL) {
1100 req->complete = 1;
1101 return -ENXIO;
1102 }
1103 if (req->nbytes <= 0) {
1104 req->complete = 1;
1105 return 0;
1106 }
1107 nsend = pmu_data_len[req->data[0]][0];
1108 if (nsend >= 0 && req->nbytes != nsend + 1) {
1109 req->complete = 1;
1110 return -EINVAL;
1111 }
1112
1113 req->next = NULL;
1114 req->sent = 0;
1115 req->complete = 0;
1116
1117 spin_lock_irqsave(&pmu_lock, flags);
d8731527 1118 if (current_req) {
1da177e4
LT
1119 last_req->next = req;
1120 last_req = req;
1121 } else {
1122 current_req = req;
1123 last_req = req;
1124 if (pmu_state == idle)
1125 pmu_start();
1126 }
1127 spin_unlock_irqrestore(&pmu_lock, flags);
1128
1129 return 0;
1130}
1131
1132static inline void
1133wait_for_ack(void)
1134{
1135 /* Sightly increased the delay, I had one occurrence of the message
1136 * reported
1137 */
1138 int timeout = 4000;
1139 while ((in_8(&via[B]) & TACK) == 0) {
1140 if (--timeout < 0) {
1141 printk(KERN_ERR "PMU not responding (!ack)\n");
1142 return;
1143 }
1144 udelay(10);
1145 }
1146}
1147
1148/* New PMU seems to be very sensitive to those timings, so we make sure
1149 * PCI is flushed immediately */
1150static inline void
1151send_byte(int x)
1152{
1153 volatile unsigned char __iomem *v = via;
1154
1155 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1156 out_8(&v[SR], x);
1157 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1158 (void)in_8(&v[B]);
1159}
1160
1161static inline void
1162recv_byte(void)
1163{
1164 volatile unsigned char __iomem *v = via;
1165
1166 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1167 in_8(&v[SR]); /* resets SR */
1168 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1169 (void)in_8(&v[B]);
1170}
1171
1172static inline void
1173pmu_done(struct adb_request *req)
1174{
1175 void (*done)(struct adb_request *) = req->done;
1176 mb();
1177 req->complete = 1;
1178 /* Here, we assume that if the request has a done member, the
1179 * struct request will survive to setting req->complete to 1
1180 */
1181 if (done)
1182 (*done)(req);
1183}
1184
aacaf9bd 1185static void
1da177e4
LT
1186pmu_start(void)
1187{
1188 struct adb_request *req;
1189
1190 /* assert pmu_state == idle */
1191 /* get the packet to send */
1192 req = current_req;
d8731527 1193 if (!req || pmu_state != idle
1da177e4
LT
1194 || (/*req->reply_expected && */req_awaiting_reply))
1195 return;
1196
1197 pmu_state = sending;
1198 data_index = 1;
1199 data_len = pmu_data_len[req->data[0]][0];
1200
1201 /* Sounds safer to make sure ACK is high before writing. This helped
1202 * kill a problem with ADB and some iBooks
1203 */
1204 wait_for_ack();
1205 /* set the shift register to shift out and send a byte */
1206 send_byte(req->data[0]);
1207}
1208
aacaf9bd 1209void
1da177e4
LT
1210pmu_poll(void)
1211{
1212 if (!via)
1213 return;
1214 if (disable_poll)
1215 return;
7d12e780 1216 via_pmu_interrupt(0, NULL);
1da177e4
LT
1217}
1218
aacaf9bd 1219void
1da177e4
LT
1220pmu_poll_adb(void)
1221{
1222 if (!via)
1223 return;
1224 if (disable_poll)
1225 return;
1226 /* Kicks ADB read when PMU is suspended */
1227 adb_int_pending = 1;
1228 do {
7d12e780 1229 via_pmu_interrupt(0, NULL);
1da177e4
LT
1230 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1231 || req_awaiting_reply));
1232}
1233
aacaf9bd 1234void
1da177e4
LT
1235pmu_wait_complete(struct adb_request *req)
1236{
1237 if (!via)
1238 return;
1239 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1240 via_pmu_interrupt(0, NULL);
1da177e4
LT
1241}
1242
1243/* This function loops until the PMU is idle and prevents it from
1244 * anwsering to ADB interrupts. pmu_request can still be called.
1245 * This is done to avoid spurrious shutdowns when we know we'll have
1246 * interrupts switched off for a long time
1247 */
aacaf9bd 1248void
1da177e4
LT
1249pmu_suspend(void)
1250{
1251 unsigned long flags;
1b0e9d44 1252
1da177e4
LT
1253 if (!via)
1254 return;
1255
1256 spin_lock_irqsave(&pmu_lock, flags);
1257 pmu_suspended++;
1258 if (pmu_suspended > 1) {
1259 spin_unlock_irqrestore(&pmu_lock, flags);
1260 return;
1261 }
1262
1263 do {
1264 spin_unlock_irqrestore(&pmu_lock, flags);
1265 if (req_awaiting_reply)
1266 adb_int_pending = 1;
7d12e780 1267 via_pmu_interrupt(0, NULL);
1da177e4
LT
1268 spin_lock_irqsave(&pmu_lock, flags);
1269 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT
1270 if (gpio_irq >= 0)
1271 disable_irq_nosync(gpio_irq);
1272 out_8(&via[IER], CB1_INT | IER_CLR);
1273 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT
1274 break;
1275 }
1276 } while (1);
1277}
1278
aacaf9bd 1279void
1da177e4
LT
1280pmu_resume(void)
1281{
1282 unsigned long flags;
1283
1284 if (!via || (pmu_suspended < 1))
1285 return;
1286
1287 spin_lock_irqsave(&pmu_lock, flags);
1288 pmu_suspended--;
1289 if (pmu_suspended > 0) {
1290 spin_unlock_irqrestore(&pmu_lock, flags);
1291 return;
1292 }
1293 adb_int_pending = 1;
1da177e4
LT
1294 if (gpio_irq >= 0)
1295 enable_irq(gpio_irq);
1296 out_8(&via[IER], CB1_INT | IER_SET);
1297 spin_unlock_irqrestore(&pmu_lock, flags);
1298 pmu_poll();
1da177e4
LT
1299}
1300
1301/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1302static void
7d12e780 1303pmu_handle_data(unsigned char *data, int len)
1da177e4
LT
1304{
1305 unsigned char ints, pirq;
1306 int i = 0;
1307
1308 asleep = 0;
1309 if (drop_interrupts || len < 1) {
1310 adb_int_pending = 0;
1311 pmu_irq_stats[8]++;
1312 return;
1313 }
1314
1315 /* Get PMU interrupt mask */
1316 ints = data[0];
1317
1318 /* Record zero interrupts for stats */
1319 if (ints == 0)
1320 pmu_irq_stats[9]++;
1321
1322 /* Hack to deal with ADB autopoll flag */
1323 if (ints & PMU_INT_ADB)
1324 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1325
1326next:
1327
1328 if (ints == 0) {
1329 if (i > pmu_irq_stats[10])
1330 pmu_irq_stats[10] = i;
1331 return;
1332 }
1333
1334 for (pirq = 0; pirq < 8; pirq++)
1335 if (ints & (1 << pirq))
1336 break;
1337 pmu_irq_stats[pirq]++;
1338 i++;
1339 ints &= ~(1 << pirq);
1340
1341 /* Note: for some reason, we get an interrupt with len=1,
1342 * data[0]==0 after each normal ADB interrupt, at least
1343 * on the Pismo. Still investigating... --BenH
1344 */
1345 if ((1 << pirq) & PMU_INT_ADB) {
1346 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1347 struct adb_request *req = req_awaiting_reply;
d8731527 1348 if (!req) {
1da177e4
LT
1349 printk(KERN_ERR "PMU: extra ADB reply\n");
1350 return;
1351 }
1352 req_awaiting_reply = NULL;
1353 if (len <= 2)
1354 req->reply_len = 0;
1355 else {
1356 memcpy(req->reply, data + 1, len - 1);
1357 req->reply_len = len - 1;
1358 }
1359 pmu_done(req);
1360 } else {
1da177e4
LT
1361 if (len == 4 && data[1] == 0x2c) {
1362 extern int xmon_wants_key, xmon_adb_keycode;
1363 if (xmon_wants_key) {
1364 xmon_adb_keycode = data[2];
1365 return;
1366 }
1367 }
1da177e4
LT
1368#ifdef CONFIG_ADB
1369 /*
1370 * XXX On the [23]400 the PMU gives us an up
1371 * event for keycodes 0x74 or 0x75 when the PC
1372 * card eject buttons are released, so we
1373 * ignore those events.
1374 */
1375 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1376 && data[1] == 0x2c && data[3] == 0xff
1377 && (data[2] & ~1) == 0xf4))
7d12e780 1378 adb_input(data+1, len-1, 1);
1da177e4
LT
1379#endif /* CONFIG_ADB */
1380 }
1381 }
1382 /* Sound/brightness button pressed */
1383 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1384#ifdef CONFIG_PMAC_BACKLIGHT
1385 if (len == 3)
4b755999
MH
1386 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1387#endif
1da177e4
LT
1388 }
1389 /* Tick interrupt */
1390 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT
1391 /* Environement or tick interrupt, query batteries */
1392 if (pmu_battery_count) {
1393 if ((--query_batt_timer) == 0) {
1394 query_battery_state();
1395 query_batt_timer = BATTERY_POLLING_COUNT;
1396 }
1397 }
1398 }
1399 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1400 if (pmu_battery_count)
1401 query_battery_state();
1402 pmu_pass_intr(data, len);
9e8e30a0
JB
1403 /* len == 6 is probably a bad check. But how do I
1404 * know what PMU versions send what events here? */
1405 if (len == 6) {
1406 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1407 via_pmu_event(PMU_EVT_LID, data[1]&1);
1408 }
1da177e4
LT
1409 } else {
1410 pmu_pass_intr(data, len);
1da177e4
LT
1411 }
1412 goto next;
1413}
1414
aacaf9bd 1415static struct adb_request*
7d12e780 1416pmu_sr_intr(void)
1da177e4
LT
1417{
1418 struct adb_request *req;
1419 int bite = 0;
1420
1421 if (via[B] & TREQ) {
1422 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1423 out_8(&via[IFR], SR_INT);
1424 return NULL;
1425 }
1426 /* The ack may not yet be low when we get the interrupt */
1427 while ((in_8(&via[B]) & TACK) != 0)
1428 ;
1429
1430 /* if reading grab the byte, and reset the interrupt */
1431 if (pmu_state == reading || pmu_state == reading_intr)
1432 bite = in_8(&via[SR]);
1433
1434 /* reset TREQ and wait for TACK to go high */
1435 out_8(&via[B], in_8(&via[B]) | TREQ);
1436 wait_for_ack();
1437
1438 switch (pmu_state) {
1439 case sending:
1440 req = current_req;
1441 if (data_len < 0) {
1442 data_len = req->nbytes - 1;
1443 send_byte(data_len);
1444 break;
1445 }
1446 if (data_index <= data_len) {
1447 send_byte(req->data[data_index++]);
1448 break;
1449 }
1450 req->sent = 1;
1451 data_len = pmu_data_len[req->data[0]][1];
1452 if (data_len == 0) {
1453 pmu_state = idle;
1454 current_req = req->next;
1455 if (req->reply_expected)
1456 req_awaiting_reply = req;
1457 else
1458 return req;
1459 } else {
1460 pmu_state = reading;
1461 data_index = 0;
1462 reply_ptr = req->reply + req->reply_len;
1463 recv_byte();
1464 }
1465 break;
1466
1467 case intack:
1468 data_index = 0;
1469 data_len = -1;
1470 pmu_state = reading_intr;
1471 reply_ptr = interrupt_data[int_data_last];
1472 recv_byte();
1473 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1474 enable_irq(gpio_irq);
1475 gpio_irq_enabled = 1;
1476 }
1477 break;
1478
1479 case reading:
1480 case reading_intr:
1481 if (data_len == -1) {
1482 data_len = bite;
1483 if (bite > 32)
1484 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1485 } else if (data_index < 32) {
1486 reply_ptr[data_index++] = bite;
1487 }
1488 if (data_index < data_len) {
1489 recv_byte();
1490 break;
1491 }
1492
1493 if (pmu_state == reading_intr) {
1494 pmu_state = idle;
1495 int_data_state[int_data_last] = int_data_ready;
1496 interrupt_data_len[int_data_last] = data_len;
1497 } else {
1498 req = current_req;
1499 /*
1500 * For PMU sleep and freq change requests, we lock the
c03983ac 1501 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT
1502 * spurrious event polling getting in
1503 */
1504 current_req = req->next;
1505 req->reply_len += data_index;
1506 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1507 pmu_state = locked;
1508 else
1509 pmu_state = idle;
1510 return req;
1511 }
1512 break;
1513
1514 default:
1515 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1516 pmu_state);
1517 }
1518 return NULL;
1519}
1520
aacaf9bd 1521static irqreturn_t
7d12e780 1522via_pmu_interrupt(int irq, void *arg)
1da177e4
LT
1523{
1524 unsigned long flags;
1525 int intr;
1526 int nloop = 0;
1527 int int_data = -1;
1528 struct adb_request *req = NULL;
1529 int handled = 0;
1530
1531 /* This is a bit brutal, we can probably do better */
1532 spin_lock_irqsave(&pmu_lock, flags);
1533 ++disable_poll;
1534
1535 for (;;) {
1536 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1537 if (intr == 0)
1538 break;
1539 handled = 1;
1540 if (++nloop > 1000) {
1541 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1542 "intr=%x, ier=%x pmu_state=%d\n",
1543 intr, in_8(&via[IER]), pmu_state);
1544 break;
1545 }
1546 out_8(&via[IFR], intr);
1547 if (intr & CB1_INT) {
1548 adb_int_pending = 1;
1549 pmu_irq_stats[0]++;
1550 }
1551 if (intr & SR_INT) {
7d12e780 1552 req = pmu_sr_intr();
1da177e4
LT
1553 if (req)
1554 break;
1555 }
1556 }
1557
1558recheck:
1559 if (pmu_state == idle) {
1560 if (adb_int_pending) {
1561 if (int_data_state[0] == int_data_empty)
1562 int_data_last = 0;
1563 else if (int_data_state[1] == int_data_empty)
1564 int_data_last = 1;
1565 else
1566 goto no_free_slot;
1567 pmu_state = intack;
1568 int_data_state[int_data_last] = int_data_fill;
1569 /* Sounds safer to make sure ACK is high before writing.
1570 * This helped kill a problem with ADB and some iBooks
1571 */
1572 wait_for_ack();
1573 send_byte(PMU_INT_ACK);
1574 adb_int_pending = 0;
1575 } else if (current_req)
1576 pmu_start();
1577 }
1578no_free_slot:
1579 /* Mark the oldest buffer for flushing */
1580 if (int_data_state[!int_data_last] == int_data_ready) {
1581 int_data_state[!int_data_last] = int_data_flush;
1582 int_data = !int_data_last;
1583 } else if (int_data_state[int_data_last] == int_data_ready) {
1584 int_data_state[int_data_last] = int_data_flush;
1585 int_data = int_data_last;
1586 }
1587 --disable_poll;
1588 spin_unlock_irqrestore(&pmu_lock, flags);
1589
1590 /* Deal with completed PMU requests outside of the lock */
1591 if (req) {
1592 pmu_done(req);
1593 req = NULL;
1594 }
1595
1596 /* Deal with interrupt datas outside of the lock */
1597 if (int_data >= 0) {
7d12e780 1598 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT
1599 spin_lock_irqsave(&pmu_lock, flags);
1600 ++disable_poll;
1601 int_data_state[int_data] = int_data_empty;
1602 int_data = -1;
1603 goto recheck;
1604 }
1605
1606 return IRQ_RETVAL(handled);
1607}
1608
aacaf9bd 1609void
1da177e4
LT
1610pmu_unlock(void)
1611{
1612 unsigned long flags;
1613
1614 spin_lock_irqsave(&pmu_lock, flags);
1615 if (pmu_state == locked)
1616 pmu_state = idle;
1617 adb_int_pending = 1;
1618 spin_unlock_irqrestore(&pmu_lock, flags);
1619}
1620
1621
aacaf9bd 1622static irqreturn_t
7d12e780 1623gpio1_interrupt(int irq, void *arg)
1da177e4
LT
1624{
1625 unsigned long flags;
1626
1627 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1628 spin_lock_irqsave(&pmu_lock, flags);
1629 if (gpio_irq_enabled > 0) {
1630 disable_irq_nosync(gpio_irq);
1631 gpio_irq_enabled = 0;
1632 }
1633 pmu_irq_stats[1]++;
1634 adb_int_pending = 1;
1635 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1636 via_pmu_interrupt(0, NULL);
1da177e4
LT
1637 return IRQ_HANDLED;
1638 }
1639 return IRQ_NONE;
1640}
1641
aacaf9bd 1642void
1da177e4
LT
1643pmu_enable_irled(int on)
1644{
1645 struct adb_request req;
1646
1647 if (vias == NULL)
1648 return ;
1649 if (pmu_kind == PMU_KEYLARGO_BASED)
1650 return ;
1651
1652 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1653 (on ? PMU_POW_ON : PMU_POW_OFF));
1654 pmu_wait_complete(&req);
1655}
1656
aacaf9bd 1657void
1da177e4
LT
1658pmu_restart(void)
1659{
1660 struct adb_request req;
1661
1662 if (via == NULL)
1663 return;
1664
1665 local_irq_disable();
1666
1667 drop_interrupts = 1;
1668
1669 if (pmu_kind != PMU_KEYLARGO_BASED) {
1670 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1671 PMU_INT_TICK );
1672 while(!req.complete)
1673 pmu_poll();
1674 }
1675
1676 pmu_request(&req, NULL, 1, PMU_RESET);
1677 pmu_wait_complete(&req);
1678 for (;;)
1679 ;
1680}
1681
aacaf9bd 1682void
1da177e4
LT
1683pmu_shutdown(void)
1684{
1685 struct adb_request req;
1686
1687 if (via == NULL)
1688 return;
1689
1690 local_irq_disable();
1691
1692 drop_interrupts = 1;
1693
1694 if (pmu_kind != PMU_KEYLARGO_BASED) {
1695 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1696 PMU_INT_TICK );
1697 pmu_wait_complete(&req);
1698 } else {
1699 /* Disable server mode on shutdown or we'll just
1700 * wake up again
1701 */
1702 pmu_set_server_mode(0);
1703 }
1704
1705 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1706 'M', 'A', 'T', 'T');
1707 pmu_wait_complete(&req);
1708 for (;;)
1709 ;
1710}
1711
1712int
1713pmu_present(void)
1714{
d8731527 1715 return via != NULL;
1da177e4
LT
1716}
1717
f91266ed 1718#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
1719/*
1720 * Put the powerbook to sleep.
1721 */
1722
aacaf9bd 1723static u32 save_via[8];
1da177e4 1724
aacaf9bd 1725static void
1da177e4
LT
1726save_via_state(void)
1727{
1728 save_via[0] = in_8(&via[ANH]);
1729 save_via[1] = in_8(&via[DIRA]);
1730 save_via[2] = in_8(&via[B]);
1731 save_via[3] = in_8(&via[DIRB]);
1732 save_via[4] = in_8(&via[PCR]);
1733 save_via[5] = in_8(&via[ACR]);
1734 save_via[6] = in_8(&via[T1CL]);
1735 save_via[7] = in_8(&via[T1CH]);
1736}
aacaf9bd 1737static void
1da177e4
LT
1738restore_via_state(void)
1739{
1740 out_8(&via[ANH], save_via[0]);
1741 out_8(&via[DIRA], save_via[1]);
1742 out_8(&via[B], save_via[2]);
1743 out_8(&via[DIRB], save_via[3]);
1744 out_8(&via[PCR], save_via[4]);
1745 out_8(&via[ACR], save_via[5]);
1746 out_8(&via[T1CL], save_via[6]);
1747 out_8(&via[T1CH], save_via[7]);
1748 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1749 out_8(&via[IFR], 0x7f); /* clear IFR */
1750 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1751}
1752
1da177e4
LT
1753#define GRACKLE_PM (1<<7)
1754#define GRACKLE_DOZE (1<<5)
1755#define GRACKLE_NAP (1<<4)
1756#define GRACKLE_SLEEP (1<<3)
1757
3bea6313 1758static int powerbook_sleep_grackle(void)
1da177e4
LT
1759{
1760 unsigned long save_l2cr;
1761 unsigned short pmcr1;
1762 struct adb_request req;
1da177e4
LT
1763 struct pci_dev *grackle;
1764
67c8d326 1765 grackle = pci_get_domain_bus_and_slot(0, 0, 0);
1da177e4
LT
1766 if (!grackle)
1767 return -ENODEV;
1768
1da177e4
LT
1769 /* Turn off various things. Darwin does some retry tests here... */
1770 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1771 pmu_wait_complete(&req);
1772 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1773 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1774 pmu_wait_complete(&req);
1775
1776 /* For 750, save backside cache setting and disable it */
1777 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1778
1779 if (!__fake_sleep) {
1780 /* Ask the PMU to put us to sleep */
1781 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1782 pmu_wait_complete(&req);
1783 }
1784
1785 /* The VIA is supposed not to be restored correctly*/
1786 save_via_state();
1787 /* We shut down some HW */
1788 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1789
1790 pci_read_config_word(grackle, 0x70, &pmcr1);
1791 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1792 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1793 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1794 pci_write_config_word(grackle, 0x70, pmcr1);
1795
1796 /* Call low-level ASM sleep handler */
1797 if (__fake_sleep)
1798 mdelay(5000);
1799 else
1800 low_sleep_handler();
1801
1802 /* We're awake again, stop grackle PM */
1803 pci_read_config_word(grackle, 0x70, &pmcr1);
1804 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1805 pci_write_config_word(grackle, 0x70, pmcr1);
1806
c78f8305
AC
1807 pci_dev_put(grackle);
1808
1da177e4
LT
1809 /* Make sure the PMU is idle */
1810 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1811 restore_via_state();
1812
1813 /* Restore L2 cache */
1814 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1815 _set_L2CR(save_l2cr);
1816
1817 /* Restore userland MMU context */
d2adba3f 1818 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT
1819
1820 /* Power things up */
1821 pmu_unlock();
1822 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1823 pmu_wait_complete(&req);
1824 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1825 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1826 pmu_wait_complete(&req);
1827 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1828 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1829 pmu_wait_complete(&req);
1830
1da177e4
LT
1831 return 0;
1832}
1833
aacaf9bd 1834static int
1da177e4
LT
1835powerbook_sleep_Core99(void)
1836{
1837 unsigned long save_l2cr;
1838 unsigned long save_l3cr;
1839 struct adb_request req;
1da177e4
LT
1840
1841 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1842 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1843 return -ENOSYS;
1844 }
1845
1846 if (num_online_cpus() > 1 || cpu_is_offline(0))
1847 return -EAGAIN;
1848
b16eeb47
BH
1849 /* Stop environment and ADB interrupts */
1850 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1851 pmu_wait_complete(&req);
1da177e4
LT
1852
1853 /* Tell PMU what events will wake us up */
1854 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1855 0xff, 0xff);
1856 pmu_wait_complete(&req);
1857 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1858 0, PMU_PWR_WAKEUP_KEY |
1859 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1860 pmu_wait_complete(&req);
1861
1862 /* Save the state of the L2 and L3 caches */
1863 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1864 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1865
1866 if (!__fake_sleep) {
1867 /* Ask the PMU to put us to sleep */
1868 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1869 pmu_wait_complete(&req);
1870 }
1871
1872 /* The VIA is supposed not to be restored correctly*/
1873 save_via_state();
1874
1875 /* Shut down various ASICs. There's a chance that we can no longer
1876 * talk to the PMU after this, so I moved it to _after_ sending the
1877 * sleep command to it. Still need to be checked.
1878 */
1879 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1880
1881 /* Call low-level ASM sleep handler */
1882 if (__fake_sleep)
1883 mdelay(5000);
1884 else
1885 low_sleep_handler();
1886
1887 /* Restore Apple core ASICs state */
1888 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1889
1890 /* Restore VIA */
1891 restore_via_state();
1892
0086b5ec
BH
1893 /* tweak LPJ before cpufreq is there */
1894 loops_per_jiffy *= 2;
1895
1da177e4
LT
1896 /* Restore video */
1897 pmac_call_early_video_resume();
1898
1899 /* Restore L2 cache */
1900 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1901 _set_L2CR(save_l2cr);
1902 /* Restore L3 cache */
1903 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1904 _set_L3CR(save_l3cr);
1905
1906 /* Restore userland MMU context */
d2adba3f 1907 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT
1908
1909 /* Tell PMU we are ready */
1910 pmu_unlock();
1911 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1912 pmu_wait_complete(&req);
1913 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1914 pmu_wait_complete(&req);
1915
0086b5ec
BH
1916 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1917 loops_per_jiffy /= 2;
1918
1da177e4
LT
1919 return 0;
1920}
1921
1922#define PB3400_MEM_CTRL 0xf8000000
1923#define PB3400_MEM_CTRL_SLEEP 0x70
1924
887ef35a
PM
1925static void __iomem *pb3400_mem_ctrl;
1926
1927static void powerbook_sleep_init_3400(void)
1928{
1929 /* map in the memory controller registers */
1930 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1931 if (pb3400_mem_ctrl == NULL)
1932 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1933}
1934
1935static int powerbook_sleep_3400(void)
1da177e4 1936{
f91266ed 1937 int i, x;
1da177e4 1938 unsigned int hid0;
887ef35a 1939 unsigned long msr;
1da177e4 1940 struct adb_request sleep_req;
1da177e4
LT
1941 unsigned int __iomem *mem_ctrl_sleep;
1942
887ef35a 1943 if (pb3400_mem_ctrl == NULL)
1da177e4 1944 return -ENOMEM;
887ef35a 1945 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1946
1da177e4
LT
1947 /* Set the memory controller to keep the memory refreshed
1948 while we're asleep */
1949 for (i = 0x403f; i >= 0x4000; --i) {
1950 out_be32(mem_ctrl_sleep, i);
1951 do {
1952 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1953 } while (x == 0);
1954 if (x >= 0x100)
1955 break;
1956 }
1957
1958 /* Ask the PMU to put us to sleep */
1959 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM
1960 pmu_wait_complete(&sleep_req);
1961 pmu_unlock();
1da177e4 1962
887ef35a 1963 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 1964
1da177e4
LT
1965 asleep = 1;
1966
1967 /* Put the CPU into sleep mode */
21fe3301 1968 hid0 = mfspr(SPRN_HID0);
1da177e4 1969 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 1970 mtspr(SPRN_HID0, hid0);
887ef35a
PM
1971 local_irq_enable();
1972 msr = mfmsr() | MSR_POW;
1973 while (asleep) {
1974 mb();
1975 mtmsr(msr);
1976 isync();
1977 }
1978 local_irq_disable();
1da177e4
LT
1979
1980 /* OK, we're awake again, start restoring things */
1981 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 1982 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 1983
1da177e4
LT
1984 return 0;
1985}
1986
f91266ed 1987#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 1988
1da177e4
LT
1989/*
1990 * Support for /dev/pmu device
1991 */
1992#define RB_SIZE 0x10
1993struct pmu_private {
1994 struct list_head list;
1995 int rb_get;
1996 int rb_put;
1997 struct rb_entry {
1998 unsigned short len;
1999 unsigned char data[16];
2000 } rb_buf[RB_SIZE];
2001 wait_queue_head_t wait;
2002 spinlock_t lock;
2003#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2004 int backlight_locker;
4b755999 2005#endif
1da177e4
LT
2006};
2007
2008static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2009static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2010
aacaf9bd 2011static void
1da177e4
LT
2012pmu_pass_intr(unsigned char *data, int len)
2013{
2014 struct pmu_private *pp;
2015 struct list_head *list;
2016 int i;
2017 unsigned long flags;
2018
2019 if (len > sizeof(pp->rb_buf[0].data))
2020 len = sizeof(pp->rb_buf[0].data);
2021 spin_lock_irqsave(&all_pvt_lock, flags);
2022 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2023 pp = list_entry(list, struct pmu_private, list);
2024 spin_lock(&pp->lock);
2025 i = pp->rb_put + 1;
2026 if (i >= RB_SIZE)
2027 i = 0;
2028 if (i != pp->rb_get) {
2029 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2030 rp->len = len;
2031 memcpy(rp->data, data, len);
2032 pp->rb_put = i;
2033 wake_up_interruptible(&pp->wait);
2034 }
2035 spin_unlock(&pp->lock);
2036 }
2037 spin_unlock_irqrestore(&all_pvt_lock, flags);
2038}
2039
aacaf9bd 2040static int
1da177e4
LT
2041pmu_open(struct inode *inode, struct file *file)
2042{
2043 struct pmu_private *pp;
2044 unsigned long flags;
2045
2046 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
d8731527 2047 if (!pp)
1da177e4
LT
2048 return -ENOMEM;
2049 pp->rb_get = pp->rb_put = 0;
2050 spin_lock_init(&pp->lock);
2051 init_waitqueue_head(&pp->wait);
d851b6e0 2052 mutex_lock(&pmu_info_proc_mutex);
1da177e4
LT
2053 spin_lock_irqsave(&all_pvt_lock, flags);
2054#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2055 pp->backlight_locker = 0;
4b755999 2056#endif
1da177e4
LT
2057 list_add(&pp->list, &all_pmu_pvt);
2058 spin_unlock_irqrestore(&all_pvt_lock, flags);
2059 file->private_data = pp;
d851b6e0 2060 mutex_unlock(&pmu_info_proc_mutex);
1da177e4
LT
2061 return 0;
2062}
2063
aacaf9bd 2064static ssize_t
1da177e4
LT
2065pmu_read(struct file *file, char __user *buf,
2066 size_t count, loff_t *ppos)
2067{
2068 struct pmu_private *pp = file->private_data;
2069 DECLARE_WAITQUEUE(wait, current);
2070 unsigned long flags;
2071 int ret = 0;
2072
d8731527 2073 if (count < 1 || !pp)
1da177e4
LT
2074 return -EINVAL;
2075 if (!access_ok(VERIFY_WRITE, buf, count))
2076 return -EFAULT;
2077
2078 spin_lock_irqsave(&pp->lock, flags);
2079 add_wait_queue(&pp->wait, &wait);
111fbc68 2080 set_current_state(TASK_INTERRUPTIBLE);
1da177e4
LT
2081
2082 for (;;) {
2083 ret = -EAGAIN;
2084 if (pp->rb_get != pp->rb_put) {
2085 int i = pp->rb_get;
2086 struct rb_entry *rp = &pp->rb_buf[i];
2087 ret = rp->len;
2088 spin_unlock_irqrestore(&pp->lock, flags);
2089 if (ret > count)
2090 ret = count;
2091 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2092 ret = -EFAULT;
2093 if (++i >= RB_SIZE)
2094 i = 0;
2095 spin_lock_irqsave(&pp->lock, flags);
2096 pp->rb_get = i;
2097 }
2098 if (ret >= 0)
2099 break;
2100 if (file->f_flags & O_NONBLOCK)
2101 break;
2102 ret = -ERESTARTSYS;
2103 if (signal_pending(current))
2104 break;
2105 spin_unlock_irqrestore(&pp->lock, flags);
2106 schedule();
2107 spin_lock_irqsave(&pp->lock, flags);
2108 }
111fbc68 2109 __set_current_state(TASK_RUNNING);
1da177e4
LT
2110 remove_wait_queue(&pp->wait, &wait);
2111 spin_unlock_irqrestore(&pp->lock, flags);
2112
2113 return ret;
2114}
2115
aacaf9bd 2116static ssize_t
1da177e4
LT
2117pmu_write(struct file *file, const char __user *buf,
2118 size_t count, loff_t *ppos)
2119{
2120 return 0;
2121}
2122
afc9a42b 2123static __poll_t
1da177e4
LT
2124pmu_fpoll(struct file *filp, poll_table *wait)
2125{
2126 struct pmu_private *pp = filp->private_data;
afc9a42b 2127 __poll_t mask = 0;
1da177e4
LT
2128 unsigned long flags;
2129
d8731527 2130 if (!pp)
1da177e4
LT
2131 return 0;
2132 poll_wait(filp, &pp->wait, wait);
2133 spin_lock_irqsave(&pp->lock, flags);
2134 if (pp->rb_get != pp->rb_put)
a9a08845 2135 mask |= EPOLLIN;
1da177e4
LT
2136 spin_unlock_irqrestore(&pp->lock, flags);
2137 return mask;
2138}
2139
aacaf9bd 2140static int
1da177e4
LT
2141pmu_release(struct inode *inode, struct file *file)
2142{
2143 struct pmu_private *pp = file->private_data;
2144 unsigned long flags;
2145
d8731527 2146 if (pp) {
1da177e4
LT
2147 file->private_data = NULL;
2148 spin_lock_irqsave(&all_pvt_lock, flags);
2149 list_del(&pp->list);
2150 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2151
1da177e4 2152#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH
2153 if (pp->backlight_locker)
2154 pmac_backlight_enable();
2155#endif
2156
1da177e4
LT
2157 kfree(pp);
2158 }
1da177e4
LT
2159 return 0;
2160}
2161
f91266ed 2162#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2163static void pmac_suspend_disable_irqs(void)
f91266ed 2164{
f91266ed
JB
2165 /* Call platform functions marked "on sleep" */
2166 pmac_pfunc_i2c_suspend();
2167 pmac_pfunc_base_suspend();
f91266ed
JB
2168}
2169
2170static int powerbook_sleep(suspend_state_t state)
2171{
2172 int error = 0;
2173
2174 /* Wait for completion of async requests */
2175 while (!batt_req.complete)
2176 pmu_poll();
2177
2178 /* Giveup the lazy FPU & vec so we don't have to back them
2179 * up from the low level code
2180 */
2181 enable_kernel_fp();
2182
2183#ifdef CONFIG_ALTIVEC
2184 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2185 enable_kernel_altivec();
2186#endif /* CONFIG_ALTIVEC */
2187
2188 switch (pmu_kind) {
2189 case PMU_OHARE_BASED:
2190 error = powerbook_sleep_3400();
2191 break;
2192 case PMU_HEATHROW_BASED:
2193 case PMU_PADDINGTON_BASED:
2194 error = powerbook_sleep_grackle();
2195 break;
2196 case PMU_KEYLARGO_BASED:
2197 error = powerbook_sleep_Core99();
2198 break;
2199 default:
2200 return -ENOSYS;
2201 }
2202
2203 if (error)
2204 return error;
2205
2206 mdelay(100);
2207
f91266ed
JB
2208 return 0;
2209}
2210
7ac5dde9 2211static void pmac_suspend_enable_irqs(void)
f91266ed
JB
2212{
2213 /* Force a poll of ADB interrupts */
2214 adb_int_pending = 1;
2215 via_pmu_interrupt(0, NULL);
2216
f91266ed 2217 mdelay(10);
f91266ed
JB
2218
2219 /* Call platform functions marked "on wake" */
2220 pmac_pfunc_base_resume();
2221 pmac_pfunc_i2c_resume();
2222}
2223
2224static int pmu_sleep_valid(suspend_state_t state)
2225{
2226 return state == PM_SUSPEND_MEM
2227 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2228}
2229
2f55ac07 2230static const struct platform_suspend_ops pmu_pm_ops = {
f91266ed
JB
2231 .enter = powerbook_sleep,
2232 .valid = pmu_sleep_valid,
2233};
2234
2235static int register_pmu_pm_ops(void)
2236{
7ac5dde9
SW
2237 if (pmu_kind == PMU_OHARE_BASED)
2238 powerbook_sleep_init_3400();
2239 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2240 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB
2241 suspend_set_ops(&pmu_pm_ops);
2242
2243 return 0;
2244}
2245
2246device_initcall(register_pmu_pm_ops);
2247#endif
2248
55929332 2249static int pmu_ioctl(struct file *filp,
1da177e4
LT
2250 u_int cmd, u_long arg)
2251{
1da177e4 2252 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2253 int error = -EINVAL;
1da177e4
LT
2254
2255 switch (cmd) {
2256 case PMU_IOC_SLEEP:
2257 if (!capable(CAP_SYS_ADMIN))
2258 return -EACCES;
f91266ed 2259 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2260 case PMU_IOC_CAN_SLEEP:
f91266ed 2261 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT
2262 return put_user(0, argp);
2263 else
2264 return put_user(1, argp);
2265
5474c120
MH
2266#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2267 /* Compatibility ioctl's for backlight */
1da177e4 2268 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH
2269 {
2270 int brightness;
2271
5474c120
MH
2272 brightness = pmac_backlight_get_legacy_brightness();
2273 if (brightness < 0)
2274 return brightness;
2275 else
2276 return put_user(brightness, argp);
2277
2278 }
1da177e4
LT
2279 case PMU_IOC_SET_BACKLIGHT:
2280 {
5474c120
MH
2281 int brightness;
2282
5474c120
MH
2283 error = get_user(brightness, argp);
2284 if (error)
2285 return error;
2286
2287 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT
2288 }
2289#ifdef CONFIG_INPUT_ADBHID
2290 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2291 struct pmu_private *pp = filp->private_data;
8c870933 2292
1da177e4
LT
2293 if (pp->backlight_locker)
2294 return 0;
4b755999 2295
1da177e4 2296 pp->backlight_locker = 1;
4b755999
MH
2297 pmac_backlight_disable();
2298
1da177e4
LT
2299 return 0;
2300 }
2301#endif /* CONFIG_INPUT_ADBHID */
5474c120 2302#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2303
1da177e4
LT
2304 case PMU_IOC_GET_MODEL:
2305 return put_user(pmu_kind, argp);
2306 case PMU_IOC_HAS_ADB:
2307 return put_user(pmu_has_adb, argp);
2308 }
8c870933 2309 return error;
1da177e4
LT
2310}
2311
55929332
AB
2312static long pmu_unlocked_ioctl(struct file *filp,
2313 u_int cmd, u_long arg)
2314{
2315 int ret;
2316
d851b6e0 2317 mutex_lock(&pmu_info_proc_mutex);
55929332 2318 ret = pmu_ioctl(filp, cmd, arg);
d851b6e0 2319 mutex_unlock(&pmu_info_proc_mutex);
55929332
AB
2320
2321 return ret;
2322}
2323
4cc4587f
AS
2324#ifdef CONFIG_COMPAT
2325#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2326#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2327#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2328#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2329#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2330#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2331
2332static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2333{
2334 switch (cmd) {
2335 case PMU_IOC_SLEEP:
2336 break;
2337 case PMU_IOC_GET_BACKLIGHT32:
2338 cmd = PMU_IOC_GET_BACKLIGHT;
2339 break;
2340 case PMU_IOC_SET_BACKLIGHT32:
2341 cmd = PMU_IOC_SET_BACKLIGHT;
2342 break;
2343 case PMU_IOC_GET_MODEL32:
2344 cmd = PMU_IOC_GET_MODEL;
2345 break;
2346 case PMU_IOC_HAS_ADB32:
2347 cmd = PMU_IOC_HAS_ADB;
2348 break;
2349 case PMU_IOC_CAN_SLEEP32:
2350 cmd = PMU_IOC_CAN_SLEEP;
2351 break;
2352 case PMU_IOC_GRAB_BACKLIGHT32:
2353 cmd = PMU_IOC_GRAB_BACKLIGHT;
2354 break;
2355 default:
2356 return -ENOIOCTLCMD;
2357 }
2358 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2359}
2360#endif
2361
fa027c2a 2362static const struct file_operations pmu_device_fops = {
1da177e4
LT
2363 .read = pmu_read,
2364 .write = pmu_write,
2365 .poll = pmu_fpoll,
55929332 2366 .unlocked_ioctl = pmu_unlocked_ioctl,
4cc4587f
AS
2367#ifdef CONFIG_COMPAT
2368 .compat_ioctl = compat_pmu_ioctl,
2369#endif
1da177e4
LT
2370 .open = pmu_open,
2371 .release = pmu_release,
6038f373 2372 .llseek = noop_llseek,
1da177e4
LT
2373};
2374
aacaf9bd 2375static struct miscdevice pmu_device = {
1da177e4
LT
2376 PMU_MINOR, "pmu", &pmu_device_fops
2377};
2378
8c870933 2379static int pmu_device_init(void)
1da177e4
LT
2380{
2381 if (!via)
8c870933 2382 return 0;
1da177e4
LT
2383 if (misc_register(&pmu_device) < 0)
2384 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2385 return 0;
1da177e4 2386}
8c870933
BH
2387device_initcall(pmu_device_init);
2388
1da177e4
LT
2389
2390#ifdef DEBUG_SLEEP
aacaf9bd 2391static inline void
1da177e4
LT
2392polled_handshake(volatile unsigned char __iomem *via)
2393{
2394 via[B] &= ~TREQ; eieio();
2395 while ((via[B] & TACK) != 0)
2396 ;
2397 via[B] |= TREQ; eieio();
2398 while ((via[B] & TACK) == 0)
2399 ;
2400}
2401
aacaf9bd 2402static inline void
1da177e4
LT
2403polled_send_byte(volatile unsigned char __iomem *via, int x)
2404{
2405 via[ACR] |= SR_OUT | SR_EXT; eieio();
2406 via[SR] = x; eieio();
2407 polled_handshake(via);
2408}
2409
aacaf9bd 2410static inline int
1da177e4
LT
2411polled_recv_byte(volatile unsigned char __iomem *via)
2412{
2413 int x;
2414
2415 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2416 x = via[SR]; eieio();
2417 polled_handshake(via);
2418 x = via[SR]; eieio();
2419 return x;
2420}
2421
aacaf9bd 2422int
1da177e4
LT
2423pmu_polled_request(struct adb_request *req)
2424{
2425 unsigned long flags;
2426 int i, l, c;
2427 volatile unsigned char __iomem *v = via;
2428
2429 req->complete = 1;
2430 c = req->data[0];
2431 l = pmu_data_len[c][0];
2432 if (l >= 0 && req->nbytes != l + 1)
2433 return -EINVAL;
2434
2435 local_irq_save(flags);
2436 while (pmu_state != idle)
2437 pmu_poll();
2438
2439 while ((via[B] & TACK) == 0)
2440 ;
2441 polled_send_byte(v, c);
2442 if (l < 0) {
2443 l = req->nbytes - 1;
2444 polled_send_byte(v, l);
2445 }
2446 for (i = 1; i <= l; ++i)
2447 polled_send_byte(v, req->data[i]);
2448
2449 l = pmu_data_len[c][1];
2450 if (l < 0)
2451 l = polled_recv_byte(v);
2452 for (i = 0; i < l; ++i)
2453 req->reply[i + req->reply_len] = polled_recv_byte(v);
2454
2455 if (req->done)
2456 (*req->done)(req);
2457
2458 local_irq_restore(flags);
2459 return 0;
2460}
1da177e4 2461
f91266ed
JB
2462/* N.B. This doesn't work on the 3400 */
2463void pmu_blink(int n)
2464{
2465 struct adb_request req;
1da177e4 2466
f91266ed 2467 memset(&req, 0, sizeof(req));
1da177e4 2468
f91266ed
JB
2469 for (; n > 0; --n) {
2470 req.nbytes = 4;
2471 req.done = NULL;
2472 req.data[0] = 0xee;
2473 req.data[1] = 4;
2474 req.data[2] = 0;
2475 req.data[3] = 1;
2476 req.reply[0] = ADB_RET_OK;
2477 req.reply_len = 1;
2478 req.reply_expected = 0;
2479 pmu_polled_request(&req);
2480 mdelay(50);
2481 req.nbytes = 4;
2482 req.done = NULL;
2483 req.data[0] = 0xee;
2484 req.data[1] = 4;
2485 req.data[2] = 0;
2486 req.data[3] = 0;
2487 req.reply[0] = ADB_RET_OK;
2488 req.reply_len = 1;
2489 req.reply_expected = 0;
2490 pmu_polled_request(&req);
2491 mdelay(50);
2492 }
2493 mdelay(50);
2494}
2495#endif /* DEBUG_SLEEP */
1da177e4 2496
f91266ed 2497#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2498int pmu_sys_suspended;
1da177e4 2499
e83b906c 2500static int pmu_syscore_suspend(void)
1da177e4 2501{
e83b906c 2502 /* Suspend PMU event interrupts */
1da177e4 2503 pmu_suspend();
1da177e4 2504 pmu_sys_suspended = 1;
0094f2cd
BH
2505
2506#ifdef CONFIG_PMAC_BACKLIGHT
2507 /* Tell backlight code not to muck around with the chip anymore */
2508 pmu_backlight_set_sleep(1);
2509#endif
2510
1da177e4
LT
2511 return 0;
2512}
2513
e83b906c 2514static void pmu_syscore_resume(void)
1da177e4
LT
2515{
2516 struct adb_request req;
2517
2518 if (!pmu_sys_suspended)
e83b906c 2519 return;
1da177e4
LT
2520
2521 /* Tell PMU we are ready */
2522 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2523 pmu_wait_complete(&req);
2524
0094f2cd
BH
2525#ifdef CONFIG_PMAC_BACKLIGHT
2526 /* Tell backlight code it can use the chip again */
2527 pmu_backlight_set_sleep(0);
2528#endif
1da177e4
LT
2529 /* Resume PMU event interrupts */
2530 pmu_resume();
1da177e4 2531 pmu_sys_suspended = 0;
1da177e4
LT
2532}
2533
e83b906c
BH
2534static struct syscore_ops pmu_syscore_ops = {
2535 .suspend = pmu_syscore_suspend,
2536 .resume = pmu_syscore_resume,
1da177e4
LT
2537};
2538
e83b906c 2539static int pmu_syscore_register(void)
1da177e4 2540{
e83b906c 2541 register_syscore_ops(&pmu_syscore_ops);
1da177e4 2542
1da177e4
LT
2543 return 0;
2544}
e83b906c
BH
2545subsys_initcall(pmu_syscore_register);
2546#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2547
2548EXPORT_SYMBOL(pmu_request);
730745a5 2549EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT
2550EXPORT_SYMBOL(pmu_poll);
2551EXPORT_SYMBOL(pmu_poll_adb);
2552EXPORT_SYMBOL(pmu_wait_complete);
2553EXPORT_SYMBOL(pmu_suspend);
2554EXPORT_SYMBOL(pmu_resume);
2555EXPORT_SYMBOL(pmu_unlock);
620a2459 2556#if defined(CONFIG_PPC32)
1da177e4
LT
2557EXPORT_SYMBOL(pmu_enable_irled);
2558EXPORT_SYMBOL(pmu_battery_count);
2559EXPORT_SYMBOL(pmu_batteries);
2560EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2561#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2562