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Merge tag 'mm-nonmm-stable-2022-08-06-2' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-block.git] / drivers / macintosh / via-pmu.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
c16a85a5 3 * Device driver for the PMU in Apple PowerBooks and PowerMacs.
1da177e4
LT		 4 *
5 * The VIA (versatile interface adapter) interfaces to the PMU,
6 * a 6805 microprocessor core whose primary function is to control
7 * battery charging and system power on the PowerBook 3400 and 2400.
8 * The PMU also controls the ADB (Apple Desktop Bus) which connects
9 * to the keyboard and mouse, as well as the non-volatile RAM
10 * and the RTC (real time clock) chip.
11 *
12 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 14 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT		 15 *
16 * THIS DRIVER IS BECOMING A TOTAL MESS !
17 * - Cleanup atomically disabling reply to PMU events after
18 * a sleep or a freq. switch
1da177e4
LT		 19 *
20 */
c0891ac1 21#include <linux/stdarg.h>
d851b6e0 22#include <linux/mutex.h>
1da177e4
LT		 23#include <linux/types.h>
24#include <linux/errno.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
174cd4b1 27#include <linux/sched/signal.h>
1da177e4
LT		 28#include <linux/miscdevice.h>
29#include <linux/blkdev.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/poll.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/cuda.h>
1da177e4
LT		 36#include <linux/module.h>
37#include <linux/spinlock.h>
38#include <linux/pm.h>
39#include <linux/proc_fs.h>
9d2f7342 40#include <linux/seq_file.h>
1da177e4
LT		 41#include <linux/init.h>
42#include <linux/interrupt.h>
43#include <linux/device.h>
e83b906c 44#include <linux/syscore_ops.h>
7dfb7103 45#include <linux/freezer.h>
1da177e4 46#include <linux/syscalls.h>
6002f544 47#include <linux/suspend.h>
1da177e4 48#include <linux/cpu.h>
4cc4587f 49#include <linux/compat.h>
5af50730
RH		 50#include <linux/of_address.h>
51#include <linux/of_irq.h>
c16a85a5 52#include <linux/uaccess.h>
65fddcfc 53#include <linux/pgtable.h>
1da177e4
LT		 54#include <asm/machdep.h>
55#include <asm/io.h>
1da177e4
LT		 56#include <asm/sections.h>
57#include <asm/irq.h>
c16a85a5 58#ifdef CONFIG_PPC_PMAC
1da177e4 59#include <asm/pmac_feature.h>
5b9ca526
BH		 60#include <asm/pmac_pfunc.h>
61#include <asm/pmac_low_i2c.h>
1da177e4
LT		 62#include <asm/mmu_context.h>
63#include <asm/cputable.h>
64#include <asm/time.h>
1da177e4 65#include <asm/backlight.h>
c16a85a5
FT		 66#else
67#include <asm/macintosh.h>
68#include <asm/macints.h>
69#include <asm/mac_via.h>
70#endif
1da177e4 71
9e8e30a0
JB		 72#include "via-pmu-event.h"
73
1da177e4 74/* Some compile options */
f91266ed 75#undef DEBUG_SLEEP
1da177e4 76
1da177e4
LT		 77/* How many iterations between battery polls */
78#define BATTERY_POLLING_COUNT 2
79
d851b6e0 80static DEFINE_MUTEX(pmu_info_proc_mutex);
1da177e4
LT		 81
82/* VIA registers - spaced 0x200 bytes apart */
83#define RS 0x200 /* skip between registers */
84#define B 0 /* B-side data */
85#define A RS /* A-side data */
86#define DIRB (2*RS) /* B-side direction (1=output) */
87#define DIRA (3*RS) /* A-side direction (1=output) */
88#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
89#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
90#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
91#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
92#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
93#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
94#define SR (10*RS) /* Shift register */
95#define ACR (11*RS) /* Auxiliary control register */
96#define PCR (12*RS) /* Peripheral control register */
97#define IFR (13*RS) /* Interrupt flag register */
98#define IER (14*RS) /* Interrupt enable register */
99#define ANH (15*RS) /* A-side data, no handshake */
100
101/* Bits in B data register: both active low */
c16a85a5 102#ifdef CONFIG_PPC_PMAC
1da177e4
LT		 103#define TACK 0x08 /* Transfer acknowledge (input) */
104#define TREQ 0x10 /* Transfer request (output) */
c16a85a5
FT		 105#else
106#define TACK 0x02
107#define TREQ 0x04
108#endif
1da177e4
LT		 109
110/* Bits in ACR */
111#define SR_CTRL 0x1c /* Shift register control bits */
112#define SR_EXT 0x0c /* Shift on external clock */
113#define SR_OUT 0x10 /* Shift out if 1 */
114
115/* Bits in IFR and IER */
116#define IER_SET 0x80 /* set bits in IER */
117#define IER_CLR 0 /* clear bits in IER */
118#define SR_INT 0x04 /* Shift register full/empty */
119#define CB2_INT 0x08
120#define CB1_INT 0x10 /* transition on CB1 input */
121
122static volatile enum pmu_state {
c57902d5 123 uninitialized = 0,
1da177e4
LT		 124 idle,
125 sending,
126 intack,
127 reading,
128 reading_intr,
129 locked,
130} pmu_state;
131
132static volatile enum int_data_state {
133 int_data_empty,
134 int_data_fill,
135 int_data_ready,
136 int_data_flush
137} int_data_state[2] = { int_data_empty, int_data_empty };
138
139static struct adb_request *current_req;
140static struct adb_request *last_req;
141static struct adb_request *req_awaiting_reply;
142static unsigned char interrupt_data[2][32];
143static int interrupt_data_len[2];
144static int int_data_last;
145static unsigned char *reply_ptr;
146static int data_index;
147static int data_len;
148static volatile int adb_int_pending;
149static volatile int disable_poll;
1da177e4 150static int pmu_kind = PMU_UNKNOWN;
87275856 151static int pmu_fully_inited;
1da177e4 152static int pmu_has_adb;
c16a85a5 153#ifdef CONFIG_PPC_PMAC
c70c35da
FT		 154static volatile unsigned char __iomem *via1;
155static volatile unsigned char __iomem *via2;
c16a85a5 156static struct device_node *vias;
51d3082f 157static struct device_node *gpio_node;
c16a85a5 158#endif
87275856 159static unsigned char __iomem *gpio_reg;
ef24ba70 160static int gpio_irq = 0;
1da177e4 161static int gpio_irq_enabled = -1;
87275856 162static volatile int pmu_suspended;
d5f14dcf 163static DEFINE_SPINLOCK(pmu_lock);
1da177e4
LT		 164static u8 pmu_intr_mask;
165static int pmu_version;
166static int drop_interrupts;
f91266ed 167#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 168static int option_lid_wakeup = 1;
f91266ed 169#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 170static unsigned long async_req_locks;
6edc22fc
FT		 171
172#define NUM_IRQ_STATS 13
173static unsigned int pmu_irq_stats[NUM_IRQ_STATS];
1da177e4
LT		 174
175static struct proc_dir_entry *proc_pmu_root;
176static struct proc_dir_entry *proc_pmu_info;
177static struct proc_dir_entry *proc_pmu_irqstats;
178static struct proc_dir_entry *proc_pmu_options;
179static int option_server_mode;
180
1da177e4 181int pmu_battery_count;
95d14392 182static int pmu_cur_battery;
a334bdbd 183unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT		 184struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
185static int query_batt_timer = BATTERY_POLLING_COUNT;
186static struct adb_request batt_req;
187static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 188
1da177e4 189int asleep;
1da177e4
LT		 190
191#ifdef CONFIG_ADB
87275856 192static int adb_dev_map;
1da177e4
LT		 193static int pmu_adb_flags;
194
195static int pmu_probe(void);
196static int pmu_init(void);
197static int pmu_send_request(struct adb_request *req, int sync);
198static int pmu_adb_autopoll(int devs);
199static int pmu_adb_reset_bus(void);
200#endif /* CONFIG_ADB */
201
202static int init_pmu(void);
1da177e4 203static void pmu_start(void);
7d12e780
DH		 204static irqreturn_t via_pmu_interrupt(int irq, void *arg);
205static irqreturn_t gpio1_interrupt(int irq, void *arg);
3f3942ac
CH		 206static int pmu_info_proc_show(struct seq_file *m, void *v);
207static int pmu_irqstats_proc_show(struct seq_file *m, void *v);
208static int pmu_battery_proc_show(struct seq_file *m, void *v);
1da177e4 209static void pmu_pass_intr(unsigned char *data, int len);
97a32539 210static const struct proc_ops pmu_options_proc_ops;
1da177e4
LT		 211
212#ifdef CONFIG_ADB
58935176 213const struct adb_driver via_pmu_driver = {
3a52f6f9
FT		 214 .name = "PMU",
215 .probe = pmu_probe,
216 .init = pmu_init,
217 .send_request = pmu_send_request,
218 .autopoll = pmu_adb_autopoll,
219 .poll = pmu_poll_adb,
220 .reset_bus = pmu_adb_reset_bus,
1da177e4
LT		 221};
222#endif /* CONFIG_ADB */
223
224extern void low_sleep_handler(void);
225extern void enable_kernel_altivec(void);
226extern void enable_kernel_fp(void);
227
228#ifdef DEBUG_SLEEP
229int pmu_polled_request(struct adb_request *req);
f91266ed 230void pmu_blink(int n);
1da177e4
LT		 231#endif
232
233/*
234 * This table indicates for each PMU opcode:
235 * - the number of data bytes to be sent with the command, or -1
236 * if a length byte should be sent,
237 * - the number of response bytes which the PMU will return, or
238 * -1 if it will send a length byte.
239 */
aacaf9bd 240static const s8 pmu_data_len[256][2] = {
1da177e4
LT		 241/* 0 1 2 3 4 5 6 7 */
242/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
244/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
246/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
247/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
248/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
250/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
252/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
253/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
254/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
255/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
256/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
258/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
259/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
260/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
263/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
264/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
265/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
266/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
267/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
268/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
269/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
270/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
271/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
272/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
273/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
274};
275
276static char *pbook_type[] = {
277 "Unknown PowerBook",
278 "PowerBook 2400/3400/3500(G3)",
279 "PowerBook G3 Series",
280 "1999 PowerBook G3",
281 "Core99"
282};
283
51d3082f 284int __init find_via_pmu(void)
1da177e4 285{
c16a85a5 286#ifdef CONFIG_PPC_PMAC
cc5d0189 287 u64 taddr;
018a3d1d 288 const u32 *reg;
51d3082f 289
c57902d5 290 if (pmu_state != uninitialized)
1da177e4 291 return 1;
51d3082f
BH		 292 vias = of_find_node_by_name(NULL, "via-pmu");
293 if (vias == NULL)
1da177e4 294 return 0;
1da177e4 295
01b2726d 296 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH		 297 if (reg == NULL) {
298 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
299 goto fail;
300 }
301 taddr = of_translate_address(vias, reg);
bb6b9b28 302 if (taddr == OF_BAD_ADDR) {
51d3082f
BH		 303 printk(KERN_ERR "via-pmu: Can't translate address !\n");
304 goto fail;
1da177e4
LT		 305 }
306
1da177e4
LT		 307 pmu_has_adb = 1;
308
309 pmu_intr_mask = PMU_INT_PCEJECT |
310 PMU_INT_SNDBRT |
311 PMU_INT_ADB |
312 PMU_INT_TICK;
313
f1e0addc
RH		 314 if (of_node_name_eq(vias->parent, "ohare") ||
315 of_device_is_compatible(vias->parent, "ohare"))
1da177e4 316 pmu_kind = PMU_OHARE_BASED;
55b61fec 317 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 318 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 319 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 320 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR		 321 else if (of_device_is_compatible(vias->parent, "Keylargo")
322 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 323 struct device_node *gpiop;
1658ab66 324 struct device_node *adbp;
cc5d0189 325 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT		 326
327 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR		 328 adbp = of_find_node_by_type(NULL, "adb");
329 pmu_has_adb = (adbp != NULL);
330 of_node_put(adbp);
1da177e4
LT		 331 pmu_intr_mask = PMU_INT_PCEJECT |
332 PMU_INT_SNDBRT |
333 PMU_INT_ADB |
334 PMU_INT_TICK |
335 PMU_INT_ENVIRONMENT;
336
51d3082f
BH		 337 gpiop = of_find_node_by_name(NULL, "gpio");
338 if (gpiop) {
01b2726d 339 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH		 340 if (reg)
341 gaddr = of_translate_address(gpiop, reg);
cc5d0189 342 if (gaddr != OF_BAD_ADDR)
51d3082f 343 gpio_reg = ioremap(gaddr, 0x10);
e702240e 344 of_node_put(gpiop);
1da177e4 345 }
61e37ca2 346 if (gpio_reg == NULL) {
51d3082f 347 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
ffa3eb01 348 goto fail;
61e37ca2 349 }
1da177e4
LT		 350 } else
351 pmu_kind = PMU_UNKNOWN;
352
c70c35da
FT		 353 via1 = via2 = ioremap(taddr, 0x2000);
354 if (via1 == NULL) {
51d3082f 355 printk(KERN_ERR "via-pmu: Can't map address !\n");
ffa3eb01 356 goto fail_via_remap;
51d3082f 357 }
1da177e4 358
c70c35da
FT		 359 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */
360 out_8(&via1[IFR], 0x7f); /* clear IFR */
1da177e4
LT		 361
362 pmu_state = idle;
363
ffa3eb01
PC		 364 if (!init_pmu())
365 goto fail_init;
1da177e4 366
1da177e4
LT		 367 sys_ctrler = SYS_CTRLER_PMU;
368
369 return 1;
ffa3eb01
PC		 370
371 fail_init:
c70c35da
FT		 372 iounmap(via1);
373 via1 = via2 = NULL;
ffa3eb01 374 fail_via_remap:
61e37ca2
OH		 375 iounmap(gpio_reg);
376 gpio_reg = NULL;
ffa3eb01
PC		 377 fail:
378 of_node_put(vias);
51d3082f 379 vias = NULL;
c57902d5 380 pmu_state = uninitialized;
51d3082f 381 return 0;
c16a85a5
FT		 382#else
383 if (macintosh_config->adb_type != MAC_ADB_PB2)
384 return 0;
385
386 pmu_kind = PMU_UNKNOWN;
387
c16a85a5
FT		 388 pmu_has_adb = 1;
389
390 pmu_intr_mask = PMU_INT_PCEJECT |
391 PMU_INT_SNDBRT |
392 PMU_INT_ADB |
393 PMU_INT_TICK;
394
395 pmu_state = idle;
396
397 if (!init_pmu()) {
398 pmu_state = uninitialized;
399 return 0;
400 }
401
402 return 1;
403#endif /* !CONFIG_PPC_PMAC */
1da177e4
LT		 404}
405
406#ifdef CONFIG_ADB
51d3082f 407static int pmu_probe(void)
1da177e4 408{
c57902d5 409 return pmu_state == uninitialized ? -ENODEV : 0;
1da177e4
LT		 410}
411
73f4447d 412static int pmu_init(void)
1da177e4 413{
c57902d5 414 return pmu_state == uninitialized ? -ENODEV : 0;
1da177e4
LT		 415}
416#endif /* CONFIG_ADB */
417
418/*
419 * We can't wait until pmu_init gets called, that happens too late.
420 * It happens after IDE and SCSI initialization, which can take a few
421 * seconds, and by that time the PMU could have given up on us and
422 * turned us off.
423 * Thus this is called with arch_initcall rather than device_initcall.
424 */
425static int __init via_pmu_start(void)
426{
c16a85a5 427 unsigned int __maybe_unused irq;
0ebfff14 428
c57902d5 429 if (pmu_state == uninitialized)
1da177e4
LT		 430 return -ENODEV;
431
1da177e4 432 batt_req.complete = 1;
1da177e4 433
c16a85a5 434#ifdef CONFIG_PPC_PMAC
0ebfff14 435 irq = irq_of_parse_and_map(vias, 0);
ef24ba70 436 if (!irq) {
7b52b440 437 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH		 438 return -ENODEV;
439 }
ba461f09
IC		 440 /* We set IRQF_NO_SUSPEND because we don't want the interrupt
441 * to be disabled between the 2 passes of driver suspend, we
442 * control our own disabling for that one
11a50873 443 */
ba461f09
IC		 444 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
445 "VIA-PMU", (void *)0)) {
0ebfff14
BH		 446 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
447 return -ENODEV;
1da177e4
LT		 448 }
449
51d3082f
BH		 450 if (pmu_kind == PMU_KEYLARGO_BASED) {
451 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
452 if (gpio_node == NULL)
453 gpio_node = of_find_node_by_name(NULL,
454 "pmu-interrupt");
0ebfff14
BH		 455 if (gpio_node)
456 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 457
ef24ba70 458 if (gpio_irq) {
6c308215
JO		 459 if (request_irq(gpio_irq, gpio1_interrupt,
460 IRQF_NO_SUSPEND, "GPIO1 ADB",
461 (void *)0))
51d3082f
BH		 462 printk(KERN_ERR "pmu: can't get irq %d"
463 " (GPIO1)\n", gpio_irq);
464 else
465 gpio_irq_enabled = 1;
466 }
1da177e4
LT		 467 }
468
469 /* Enable interrupts */
c70c35da 470 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
c16a85a5
FT		 471#else
472 if (request_irq(IRQ_MAC_ADB_SR, via_pmu_interrupt, IRQF_NO_SUSPEND,
473 "VIA-PMU-SR", NULL)) {
474 pr_err("%s: couldn't get SR irq\n", __func__);
475 return -ENODEV;
476 }
477 if (request_irq(IRQ_MAC_ADB_CL, via_pmu_interrupt, IRQF_NO_SUSPEND,
478 "VIA-PMU-CL", NULL)) {
479 pr_err("%s: couldn't get CL irq\n", __func__);
480 free_irq(IRQ_MAC_ADB_SR, NULL);
481 return -ENODEV;
482 }
483#endif /* !CONFIG_PPC_PMAC */
1da177e4
LT		 484
485 pmu_fully_inited = 1;
486
487 /* Make sure PMU settle down before continuing. This is _very_ important
488 * since the IDE probe may shut interrupts down for quite a bit of time. If
489 * a PMU communication is pending while this happens, the PMU may timeout
490 * Not that on Core99 machines, the PMU keeps sending us environement
491 * messages, we should find a way to either fix IDE or make it call
492 * pmu_suspend() before masking interrupts. This can also happens while
493 * scolling with some fbdevs.
494 */
495 do {
496 pmu_poll();
497 } while (pmu_state != idle);
498
499 return 0;
500}
501
502arch_initcall(via_pmu_start);
503
504/*
505 * This has to be done after pci_init, which is a subsys_initcall.
506 */
507static int __init via_pmu_dev_init(void)
508{
c57902d5 509 if (pmu_state == uninitialized)
1da177e4
LT		 510 return -ENODEV;
511
1da177e4 512#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 513 /* Initialize backlight */
4b755999 514 pmu_backlight_init();
5474c120 515#endif
1da177e4 516
8c870933 517#ifdef CONFIG_PPC32
71a157e8
GL		 518 if (of_machine_is_compatible("AAPL,3400/2400") ||
519 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT		 520 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
521 NULL, PMAC_MB_INFO_MODEL, 0);
522 pmu_battery_count = 1;
523 if (mb == PMAC_TYPE_COMET)
524 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
525 else
526 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL		 527 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
528 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT		 529 pmu_battery_count = 2;
530 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
531 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
532 } else {
30686ba6
SR		 533 struct device_node* prim =
534 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 535 const u32 *prim_info = NULL;
1da177e4 536 if (prim)
01b2726d 537 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT		 538 if (prim_info) {
539 /* Other stuffs here yet unknown */
540 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
541 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
542 if (pmu_battery_count > 1)
543 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
544 }
30686ba6 545 of_node_put(prim);
1da177e4 546 }
8c870933
BH		 547#endif /* CONFIG_PPC32 */
548
1da177e4
LT		 549 /* Create /proc/pmu */
550 proc_pmu_root = proc_mkdir("pmu", NULL);
551 if (proc_pmu_root) {
8c870933 552 long i;
1da177e4
LT		 553
554 for (i=0; i<pmu_battery_count; i++) {
555 char title[16];
8c870933 556 sprintf(title, "battery_%ld", i);
3f3942ac
CH		 557 proc_pmu_batt[i] = proc_create_single_data(title, 0,
558 proc_pmu_root, pmu_battery_proc_show,
559 (void *)i);
1da177e4 560 }
1da177e4 561
3f3942ac
CH		 562 proc_pmu_info = proc_create_single("info", 0, proc_pmu_root,
563 pmu_info_proc_show);
564 proc_pmu_irqstats = proc_create_single("interrupts", 0,
565 proc_pmu_root, pmu_irqstats_proc_show);
9d2f7342 566 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
97a32539 567 &pmu_options_proc_ops);
1da177e4
LT		 568 }
569 return 0;
570}
571
572device_initcall(via_pmu_dev_init);
573
aacaf9bd 574static int
1da177e4
LT		 575init_pmu(void)
576{
577 int timeout;
578 struct adb_request req;
579
576d5290 580 /* Negate TREQ. Set TACK to input and TREQ to output. */
c70c35da
FT		 581 out_8(&via2[B], in_8(&via2[B]) | TREQ);
582 out_8(&via2[DIRB], (in_8(&via2[DIRB]) | TREQ) & ~TACK);
1da177e4
LT		 583
584 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
585 timeout = 100000;
586 while (!req.complete) {
587 if (--timeout < 0) {
588 printk(KERN_ERR "init_pmu: no response from PMU\n");
589 return 0;
590 }
591 udelay(10);
592 pmu_poll();
593 }
594
595 /* ack all pending interrupts */
596 timeout = 100000;
597 interrupt_data[0][0] = 1;
598 while (interrupt_data[0][0] || pmu_state != idle) {
599 if (--timeout < 0) {
600 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
601 return 0;
602 }
603 if (pmu_state == idle)
604 adb_int_pending = 1;
7d12e780 605 via_pmu_interrupt(0, NULL);
1da177e4
LT		 606 udelay(10);
607 }
608
609 /* Tell PMU we are ready. */
610 if (pmu_kind == PMU_KEYLARGO_BASED) {
611 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
612 while (!req.complete)
613 pmu_poll();
614 }
615
616 /* Read PMU version */
617 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
618 pmu_wait_complete(&req);
619 if (req.reply_len > 0)
620 pmu_version = req.reply[0];
621
622 /* Read server mode setting */
623 if (pmu_kind == PMU_KEYLARGO_BASED) {
624 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
625 PMU_PWR_GET_POWERUP_EVENTS);
626 pmu_wait_complete(&req);
627 if (req.reply_len == 2) {
628 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
629 option_server_mode = 1;
630 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
631 option_server_mode ? "enabled" : "disabled");
632 }
633 }
c16a85a5
FT		 634
635 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
636 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
637
1da177e4
LT		 638 return 1;
639}
640
641int
642pmu_get_model(void)
643{
644 return pmu_kind;
645}
646
1da177e4
LT		 647static void pmu_set_server_mode(int server_mode)
648{
649 struct adb_request req;
650
651 if (pmu_kind != PMU_KEYLARGO_BASED)
652 return;
653
654 option_server_mode = server_mode;
655 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
656 pmu_wait_complete(&req);
657 if (req.reply_len < 2)
658 return;
659 if (server_mode)
660 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
661 PMU_PWR_SET_POWERUP_EVENTS,
662 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
663 else
664 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
665 PMU_PWR_CLR_POWERUP_EVENTS,
666 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
667 pmu_wait_complete(&req);
668}
669
1da177e4
LT		 670/* This new version of the code for 2400/3400/3500 powerbooks
671 * is inspired from the implementation in gkrellm-pmu
672 */
aacaf9bd 673static void
1da177e4
LT		 674done_battery_state_ohare(struct adb_request* req)
675{
c16a85a5 676#ifdef CONFIG_PPC_PMAC
1da177e4
LT		 677 /* format:
678 * [0] : flags
679 * 0x01 : AC indicator
680 * 0x02 : charging
681 * 0x04 : battery exist
682 * 0x08 :
683 * 0x10 :
684 * 0x20 : full charged
685 * 0x40 : pcharge reset
686 * 0x80 : battery exist
687 *
688 * [1][2] : battery voltage
689 * [3] : CPU temperature
690 * [4] : battery temperature
691 * [5] : current
692 * [6][7] : pcharge
693 * --tkoba
694 */
695 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
696 long pcharge, charge, vb, vmax, lmax;
697 long vmax_charging, vmax_charged;
698 long amperage, voltage, time, max;
699 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
700 NULL, PMAC_MB_INFO_MODEL, 0);
701
702 if (req->reply[0] & 0x01)
703 pmu_power_flags |= PMU_PWR_AC_PRESENT;
704 else
705 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
706
707 if (mb == PMAC_TYPE_COMET) {
708 vmax_charged = 189;
709 vmax_charging = 213;
710 lmax = 6500;
711 } else {
712 vmax_charged = 330;
713 vmax_charging = 330;
714 lmax = 6500;
715 }
716 vmax = vmax_charged;
717
718 /* If battery installed */
719 if (req->reply[0] & 0x04) {
720 bat_flags |= PMU_BATT_PRESENT;
721 if (req->reply[0] & 0x02)
722 bat_flags |= PMU_BATT_CHARGING;
723 vb = (req->reply[1] << 8) | req->reply[2];
724 voltage = (vb * 265 + 72665) / 10;
725 amperage = req->reply[5];
726 if ((req->reply[0] & 0x01) == 0) {
727 if (amperage > 200)
728 vb += ((amperage - 200) * 15)/100;
729 } else if (req->reply[0] & 0x02) {
730 vb = (vb * 97) / 100;
731 vmax = vmax_charging;
732 }
733 charge = (100 * vb) / vmax;
734 if (req->reply[0] & 0x40) {
735 pcharge = (req->reply[6] << 8) + req->reply[7];
736 if (pcharge > lmax)
737 pcharge = lmax;
738 pcharge *= 100;
739 pcharge = 100 - pcharge / lmax;
740 if (pcharge < charge)
741 charge = pcharge;
742 }
743 if (amperage > 0)
744 time = (charge * 16440) / amperage;
745 else
746 time = 0;
747 max = 100;
748 amperage = -amperage;
749 } else
750 charge = max = amperage = voltage = time = 0;
751
752 pmu_batteries[pmu_cur_battery].flags = bat_flags;
753 pmu_batteries[pmu_cur_battery].charge = charge;
754 pmu_batteries[pmu_cur_battery].max_charge = max;
755 pmu_batteries[pmu_cur_battery].amperage = amperage;
756 pmu_batteries[pmu_cur_battery].voltage = voltage;
757 pmu_batteries[pmu_cur_battery].time_remaining = time;
c16a85a5 758#endif /* CONFIG_PPC_PMAC */
1da177e4
LT		 759
760 clear_bit(0, &async_req_locks);
761}
762
aacaf9bd 763static void
1da177e4
LT		 764done_battery_state_smart(struct adb_request* req)
765{
766 /* format:
767 * [0] : format of this structure (known: 3,4,5)
768 * [1] : flags
769 *
770 * format 3 & 4:
771 *
772 * [2] : charge
773 * [3] : max charge
774 * [4] : current
775 * [5] : voltage
776 *
777 * format 5:
778 *
779 * [2][3] : charge
780 * [4][5] : max charge
781 * [6][7] : current
782 * [8][9] : voltage
783 */
784
785 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
786 int amperage;
787 unsigned int capa, max, voltage;
788
789 if (req->reply[1] & 0x01)
790 pmu_power_flags |= PMU_PWR_AC_PRESENT;
791 else
792 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
793
794
795 capa = max = amperage = voltage = 0;
796
797 if (req->reply[1] & 0x04) {
798 bat_flags |= PMU_BATT_PRESENT;
799 switch(req->reply[0]) {
800 case 3:
801 case 4: capa = req->reply[2];
802 max = req->reply[3];
803 amperage = *((signed char *)&req->reply[4]);
804 voltage = req->reply[5];
805 break;
806 case 5: capa = (req->reply[2] << 8) | req->reply[3];
807 max = (req->reply[4] << 8) | req->reply[5];
808 amperage = *((signed short *)&req->reply[6]);
809 voltage = (req->reply[8] << 8) | req->reply[9];
810 break;
811 default:
ebd004e4
AS		 812 pr_warn("pmu.c: unrecognized battery info, "
813 "len: %d, %4ph\n", req->reply_len,
814 req->reply);
1da177e4
LT		 815 break;
816 }
817 }
818
819 if ((req->reply[1] & 0x01) && (amperage > 0))
820 bat_flags |= PMU_BATT_CHARGING;
821
822 pmu_batteries[pmu_cur_battery].flags = bat_flags;
823 pmu_batteries[pmu_cur_battery].charge = capa;
824 pmu_batteries[pmu_cur_battery].max_charge = max;
825 pmu_batteries[pmu_cur_battery].amperage = amperage;
826 pmu_batteries[pmu_cur_battery].voltage = voltage;
827 if (amperage) {
828 if ((req->reply[1] & 0x01) && (amperage > 0))
829 pmu_batteries[pmu_cur_battery].time_remaining
830 = ((max-capa) * 3600) / amperage;
831 else
832 pmu_batteries[pmu_cur_battery].time_remaining
833 = (capa * 3600) / (-amperage);
834 } else
835 pmu_batteries[pmu_cur_battery].time_remaining = 0;
836
837 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
838
839 clear_bit(0, &async_req_locks);
840}
841
aacaf9bd 842static void
1da177e4
LT		 843query_battery_state(void)
844{
845 if (test_and_set_bit(0, &async_req_locks))
846 return;
847 if (pmu_kind == PMU_OHARE_BASED)
848 pmu_request(&batt_req, done_battery_state_ohare,
849 1, PMU_BATTERY_STATE);
850 else
851 pmu_request(&batt_req, done_battery_state_smart,
852 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
853}
854
9d2f7342 855static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 856{
9d2f7342
AD		 857 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
858 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
859 seq_printf(m, "AC Power : %d\n",
63e1fd41 860 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD		 861 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
862
863 return 0;
864}
1da177e4 865
9d2f7342 866static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 867{
868 int i;
6edc22fc
FT		 869 static const char *irq_names[NUM_IRQ_STATS] = {
870 "Unknown interrupt (type 0)",
871 "Unknown interrupt (type 1)",
1da177e4
LT		 872 "PC-Card eject button",
873 "Sound/Brightness button",
874 "ADB message",
875 "Battery state change",
876 "Environment interrupt",
877 "Tick timer",
878 "Ghost interrupt (zero len)",
879 "Empty interrupt (empty mask)",
6edc22fc
FT		 880 "Max irqs in a row",
881 "Total CB1 triggered events",
882 "Total GPIO1 triggered events",
1da177e4
LT		 883 };
884
6edc22fc 885 for (i = 0; i < NUM_IRQ_STATS; i++) {
9d2f7342 886 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT		 887 i, pmu_irq_stats[i], irq_names[i]);
888 }
9d2f7342 889 return 0;
1da177e4
LT		 890}
891
9d2f7342
AD		 892static int pmu_battery_proc_show(struct seq_file *m, void *v)
893{
894 long batnum = (long)m->private;
1da177e4 895
9d2f7342
AD		 896 seq_putc(m, '\n');
897 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
898 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
899 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
900 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
901 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
902 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
903 return 0;
1da177e4 904}
1da177e4 905
9d2f7342
AD		 906static int pmu_options_proc_show(struct seq_file *m, void *v)
907{
f91266ed 908#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 909 if (pmu_kind == PMU_KEYLARGO_BASED &&
910 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 911 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 912#endif
1da177e4 913 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 914 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 915
9d2f7342 916 return 0;
1da177e4 917}
9d2f7342
AD		 918
919static int pmu_options_proc_open(struct inode *inode, struct file *file)
920{
921 return single_open(file, pmu_options_proc_show, NULL);
922}
923
924static ssize_t pmu_options_proc_write(struct file *file,
925 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT		 926{
927 char tmp[33];
928 char *label, *val;
9d2f7342 929 size_t fcount = count;
1da177e4
LT		 930
931 if (!count)
932 return -EINVAL;
933 if (count > 32)
934 count = 32;
935 if (copy_from_user(tmp, buffer, count))
936 return -EFAULT;
937 tmp[count] = 0;
938
939 label = tmp;
940 while(*label == ' ')
941 label++;
942 val = label;
943 while(*val && (*val != '=')) {
944 if (*val == ' ')
945 *val = 0;
946 val++;
947 }
948 if ((*val) == 0)
949 return -EINVAL;
950 *(val++) = 0;
951 while(*val == ' ')
952 val++;
f91266ed 953#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 954 if (pmu_kind == PMU_KEYLARGO_BASED &&
955 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
956 if (!strcmp(label, "lid_wakeup"))
957 option_lid_wakeup = ((*val) == '1');
8c870933 958#endif
1da177e4
LT		 959 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
960 int new_value;
961 new_value = ((*val) == '1');
962 if (new_value != option_server_mode)
963 pmu_set_server_mode(new_value);
964 }
965 return fcount;
966}
967
97a32539
AD		 968static const struct proc_ops pmu_options_proc_ops = {
969 .proc_open = pmu_options_proc_open,
970 .proc_read = seq_read,
971 .proc_lseek = seq_lseek,
972 .proc_release = single_release,
973 .proc_write = pmu_options_proc_write,
9d2f7342
AD		 974};
975
1da177e4
LT		 976#ifdef CONFIG_ADB
977/* Send an ADB command */
11a50873 978static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT		 979{
980 int i, ret;
981
c57902d5 982 if (pmu_state == uninitialized || !pmu_fully_inited) {
1da177e4
LT		 983 req->complete = 1;
984 return -ENXIO;
985 }
986
987 ret = -EINVAL;
988
989 switch (req->data[0]) {
990 case PMU_PACKET:
991 for (i = 0; i < req->nbytes - 1; ++i)
992 req->data[i] = req->data[i+1];
993 --req->nbytes;
994 if (pmu_data_len[req->data[0]][1] != 0) {
995 req->reply[0] = ADB_RET_OK;
996 req->reply_len = 1;
997 } else
998 req->reply_len = 0;
999 ret = pmu_queue_request(req);
1000 break;
1001 case CUDA_PACKET:
1002 switch (req->data[1]) {
1003 case CUDA_GET_TIME:
1004 if (req->nbytes != 2)
1005 break;
1006 req->data[0] = PMU_READ_RTC;
1007 req->nbytes = 1;
1008 req->reply_len = 3;
1009 req->reply[0] = CUDA_PACKET;
1010 req->reply[1] = 0;
1011 req->reply[2] = CUDA_GET_TIME;
1012 ret = pmu_queue_request(req);
1013 break;
1014 case CUDA_SET_TIME:
1015 if (req->nbytes != 6)
1016 break;
1017 req->data[0] = PMU_SET_RTC;
1018 req->nbytes = 5;
1019 for (i = 1; i <= 4; ++i)
1020 req->data[i] = req->data[i+1];
1021 req->reply_len = 3;
1022 req->reply[0] = CUDA_PACKET;
1023 req->reply[1] = 0;
1024 req->reply[2] = CUDA_SET_TIME;
1025 ret = pmu_queue_request(req);
1026 break;
1027 }
1028 break;
1029 case ADB_PACKET:
1030 if (!pmu_has_adb)
1031 return -ENXIO;
1032 for (i = req->nbytes - 1; i > 1; --i)
1033 req->data[i+2] = req->data[i];
1034 req->data[3] = req->nbytes - 2;
1035 req->data[2] = pmu_adb_flags;
1036 /*req->data[1] = req->data[1];*/
1037 req->data[0] = PMU_ADB_CMD;
1038 req->nbytes += 2;
1039 req->reply_expected = 1;
1040 req->reply_len = 0;
1041 ret = pmu_queue_request(req);
1042 break;
1043 }
1044 if (ret) {
1045 req->complete = 1;
1046 return ret;
1047 }
1048
1049 if (sync)
1050 while (!req->complete)
1051 pmu_poll();
1052
1053 return 0;
1054}
1055
1056/* Enable/disable autopolling */
11a50873 1057static int __pmu_adb_autopoll(int devs)
1da177e4
LT		 1058{
1059 struct adb_request req;
1060
1da177e4 1061 if (devs) {
1da177e4
LT		 1062 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1063 adb_dev_map >> 8, adb_dev_map);
1064 pmu_adb_flags = 2;
1065 } else {
1066 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1067 pmu_adb_flags = 0;
1068 }
1069 while (!req.complete)
1070 pmu_poll();
1071 return 0;
1072}
1073
11a50873
BH		 1074static int pmu_adb_autopoll(int devs)
1075{
c57902d5 1076 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
11a50873
BH		 1077 return -ENXIO;
1078
1079 adb_dev_map = devs;
1080 return __pmu_adb_autopoll(devs);
1081}
1082
1da177e4 1083/* Reset the ADB bus */
11a50873 1084static int pmu_adb_reset_bus(void)
1da177e4
LT		 1085{
1086 struct adb_request req;
1087 int save_autopoll = adb_dev_map;
1088
c57902d5 1089 if (pmu_state == uninitialized || !pmu_fully_inited || !pmu_has_adb)
1da177e4
LT		 1090 return -ENXIO;
1091
1092 /* anyone got a better idea?? */
11a50873 1093 __pmu_adb_autopoll(0);
1da177e4 1094
11a50873 1095 req.nbytes = 4;
1da177e4
LT		 1096 req.done = NULL;
1097 req.data[0] = PMU_ADB_CMD;
11a50873
BH		 1098 req.data[1] = ADB_BUSRESET;
1099 req.data[2] = 0;
1da177e4
LT		 1100 req.data[3] = 0;
1101 req.data[4] = 0;
1102 req.reply_len = 0;
1103 req.reply_expected = 1;
1104 if (pmu_queue_request(&req) != 0) {
1105 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1106 return -EIO;
1107 }
1108 pmu_wait_complete(&req);
1109
1110 if (save_autopoll != 0)
11a50873 1111 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT		 1112
1113 return 0;
1114}
1115#endif /* CONFIG_ADB */
1116
1117/* Construct and send a pmu request */
aacaf9bd 1118int
1da177e4
LT		 1119pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1120 int nbytes, ...)
1121{
1122 va_list list;
1123 int i;
1124
c57902d5 1125 if (pmu_state == uninitialized)
1da177e4
LT		 1126 return -ENXIO;
1127
1128 if (nbytes < 0 || nbytes > 32) {
1129 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1130 req->complete = 1;
1131 return -EINVAL;
1132 }
1133 req->nbytes = nbytes;
1134 req->done = done;
1135 va_start(list, nbytes);
1136 for (i = 0; i < nbytes; ++i)
1137 req->data[i] = va_arg(list, int);
1138 va_end(list);
1139 req->reply_len = 0;
1140 req->reply_expected = 0;
1141 return pmu_queue_request(req);
1142}
1143
aacaf9bd 1144int
1da177e4
LT		 1145pmu_queue_request(struct adb_request *req)
1146{
1147 unsigned long flags;
1148 int nsend;
1149
c57902d5 1150 if (pmu_state == uninitialized) {
1da177e4
LT		 1151 req->complete = 1;
1152 return -ENXIO;
1153 }
1154 if (req->nbytes <= 0) {
1155 req->complete = 1;
1156 return 0;
1157 }
1158 nsend = pmu_data_len[req->data[0]][0];
1159 if (nsend >= 0 && req->nbytes != nsend + 1) {
1160 req->complete = 1;
1161 return -EINVAL;
1162 }
1163
1164 req->next = NULL;
1165 req->sent = 0;
1166 req->complete = 0;
1167
1168 spin_lock_irqsave(&pmu_lock, flags);
d8731527 1169 if (current_req) {
1da177e4
LT		 1170 last_req->next = req;
1171 last_req = req;
1172 } else {
1173 current_req = req;
1174 last_req = req;
1175 if (pmu_state == idle)
1176 pmu_start();
1177 }
1178 spin_unlock_irqrestore(&pmu_lock, flags);
1179
1180 return 0;
1181}
1182
1183static inline void
1184wait_for_ack(void)
1185{
1186 /* Sightly increased the delay, I had one occurrence of the message
1187 * reported
1188 */
1189 int timeout = 4000;
c70c35da 1190 while ((in_8(&via2[B]) & TACK) == 0) {
1da177e4
LT		 1191 if (--timeout < 0) {
1192 printk(KERN_ERR "PMU not responding (!ack)\n");
1193 return;
1194 }
1195 udelay(10);
1196 }
1197}
1198
1199/* New PMU seems to be very sensitive to those timings, so we make sure
1200 * PCI is flushed immediately */
1201static inline void
1202send_byte(int x)
1203{
c70c35da
FT		 1204 out_8(&via1[ACR], in_8(&via1[ACR]) | SR_OUT | SR_EXT);
1205 out_8(&via1[SR], x);
1206 out_8(&via2[B], in_8(&via2[B]) & ~TREQ); /* assert TREQ */
1207 (void)in_8(&via2[B]);
1da177e4
LT		 1208}
1209
1210static inline void
1211recv_byte(void)
1212{
c70c35da
FT		 1213 out_8(&via1[ACR], (in_8(&via1[ACR]) & ~SR_OUT) | SR_EXT);
1214 in_8(&via1[SR]); /* resets SR */
1215 out_8(&via2[B], in_8(&via2[B]) & ~TREQ);
1216 (void)in_8(&via2[B]);
1da177e4
LT		 1217}
1218
1219static inline void
1220pmu_done(struct adb_request *req)
1221{
1222 void (*done)(struct adb_request *) = req->done;
1223 mb();
1224 req->complete = 1;
1225 /* Here, we assume that if the request has a done member, the
1226 * struct request will survive to setting req->complete to 1
1227 */
1228 if (done)
1229 (*done)(req);
1230}
1231
aacaf9bd 1232static void
1da177e4
LT		 1233pmu_start(void)
1234{
1235 struct adb_request *req;
1236
1237 /* assert pmu_state == idle */
1238 /* get the packet to send */
1239 req = current_req;
d8731527 1240 if (!req || pmu_state != idle
1da177e4
LT		 1241 || (/*req->reply_expected && */req_awaiting_reply))
1242 return;
1243
1244 pmu_state = sending;
1245 data_index = 1;
1246 data_len = pmu_data_len[req->data[0]][0];
1247
1248 /* Sounds safer to make sure ACK is high before writing. This helped
1249 * kill a problem with ADB and some iBooks
1250 */
1251 wait_for_ack();
1252 /* set the shift register to shift out and send a byte */
1253 send_byte(req->data[0]);
1254}
1255
aacaf9bd 1256void
1da177e4
LT		 1257pmu_poll(void)
1258{
c57902d5 1259 if (pmu_state == uninitialized)
1da177e4
LT		 1260 return;
1261 if (disable_poll)
1262 return;
7d12e780 1263 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1264}
1265
aacaf9bd 1266void
1da177e4
LT		 1267pmu_poll_adb(void)
1268{
c57902d5 1269 if (pmu_state == uninitialized)
1da177e4
LT		 1270 return;
1271 if (disable_poll)
1272 return;
1273 /* Kicks ADB read when PMU is suspended */
1274 adb_int_pending = 1;
1275 do {
7d12e780 1276 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1277 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1278 || req_awaiting_reply));
1279}
1280
aacaf9bd 1281void
1da177e4
LT		 1282pmu_wait_complete(struct adb_request *req)
1283{
c57902d5 1284 if (pmu_state == uninitialized)
1da177e4
LT		 1285 return;
1286 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1287 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1288}
1289
1290/* This function loops until the PMU is idle and prevents it from
1291 * anwsering to ADB interrupts. pmu_request can still be called.
1292 * This is done to avoid spurrious shutdowns when we know we'll have
1293 * interrupts switched off for a long time
1294 */
aacaf9bd 1295void
1da177e4
LT		 1296pmu_suspend(void)
1297{
1298 unsigned long flags;
1b0e9d44 1299
c57902d5 1300 if (pmu_state == uninitialized)
1da177e4
LT		 1301 return;
1302
1303 spin_lock_irqsave(&pmu_lock, flags);
1304 pmu_suspended++;
1305 if (pmu_suspended > 1) {
1306 spin_unlock_irqrestore(&pmu_lock, flags);
1307 return;
1308 }
1309
1310 do {
1311 spin_unlock_irqrestore(&pmu_lock, flags);
1312 if (req_awaiting_reply)
1313 adb_int_pending = 1;
7d12e780 1314 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1315 spin_lock_irqsave(&pmu_lock, flags);
1316 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT		 1317 if (gpio_irq >= 0)
1318 disable_irq_nosync(gpio_irq);
c70c35da 1319 out_8(&via1[IER], CB1_INT | IER_CLR);
1da177e4 1320 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT		 1321 break;
1322 }
1323 } while (1);
1324}
1325
aacaf9bd 1326void
1da177e4
LT		 1327pmu_resume(void)
1328{
1329 unsigned long flags;
1330
c57902d5 1331 if (pmu_state == uninitialized || pmu_suspended < 1)
1da177e4
LT		 1332 return;
1333
1334 spin_lock_irqsave(&pmu_lock, flags);
1335 pmu_suspended--;
1336 if (pmu_suspended > 0) {
1337 spin_unlock_irqrestore(&pmu_lock, flags);
1338 return;
1339 }
1340 adb_int_pending = 1;
1da177e4
LT		 1341 if (gpio_irq >= 0)
1342 enable_irq(gpio_irq);
c70c35da 1343 out_8(&via1[IER], CB1_INT | IER_SET);
1da177e4
LT		 1344 spin_unlock_irqrestore(&pmu_lock, flags);
1345 pmu_poll();
1da177e4
LT		 1346}
1347
1348/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1349static void
7d12e780 1350pmu_handle_data(unsigned char *data, int len)
1da177e4 1351{
b5c7ccca
FT		 1352 unsigned char ints;
1353 int idx;
1da177e4
LT		 1354 int i = 0;
1355
1356 asleep = 0;
1357 if (drop_interrupts || len < 1) {
1358 adb_int_pending = 0;
1359 pmu_irq_stats[8]++;
1360 return;
1361 }
1362
1363 /* Get PMU interrupt mask */
1364 ints = data[0];
1365
1366 /* Record zero interrupts for stats */
1367 if (ints == 0)
1368 pmu_irq_stats[9]++;
1369
1370 /* Hack to deal with ADB autopoll flag */
1371 if (ints & PMU_INT_ADB)
1372 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1373
1374next:
1da177e4
LT		 1375 if (ints == 0) {
1376 if (i > pmu_irq_stats[10])
1377 pmu_irq_stats[10] = i;
1378 return;
1379 }
1da177e4 1380 i++;
b5c7ccca
FT		 1381
1382 idx = ffs(ints) - 1;
1383 ints &= ~BIT(idx);
1384
1385 pmu_irq_stats[idx]++;
1da177e4
LT		 1386
1387 /* Note: for some reason, we get an interrupt with len=1,
1388 * data[0]==0 after each normal ADB interrupt, at least
1389 * on the Pismo. Still investigating... --BenH
1390 */
b5c7ccca
FT		 1391 switch (BIT(idx)) {
1392 case PMU_INT_ADB:
1da177e4
LT		 1393 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1394 struct adb_request *req = req_awaiting_reply;
d8731527 1395 if (!req) {
1da177e4
LT		 1396 printk(KERN_ERR "PMU: extra ADB reply\n");
1397 return;
1398 }
1399 req_awaiting_reply = NULL;
1400 if (len <= 2)
1401 req->reply_len = 0;
1402 else {
1403 memcpy(req->reply, data + 1, len - 1);
1404 req->reply_len = len - 1;
1405 }
1406 pmu_done(req);
1407 } else {
c16a85a5 1408#ifdef CONFIG_XMON
1da177e4
LT		 1409 if (len == 4 && data[1] == 0x2c) {
1410 extern int xmon_wants_key, xmon_adb_keycode;
1411 if (xmon_wants_key) {
1412 xmon_adb_keycode = data[2];
1413 return;
1414 }
1415 }
c16a85a5 1416#endif /* CONFIG_XMON */
1da177e4
LT		 1417#ifdef CONFIG_ADB
1418 /*
1419 * XXX On the [23]400 the PMU gives us an up
1420 * event for keycodes 0x74 or 0x75 when the PC
1421 * card eject buttons are released, so we
1422 * ignore those events.
1423 */
1424 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1425 && data[1] == 0x2c && data[3] == 0xff
1426 && (data[2] & ~1) == 0xf4))
7d12e780 1427 adb_input(data+1, len-1, 1);
1da177e4
LT		 1428#endif /* CONFIG_ADB */
1429 }
b5c7ccca
FT		 1430 break;
1431
1da177e4 1432 /* Sound/brightness button pressed */
b5c7ccca 1433 case PMU_INT_SNDBRT:
1da177e4
LT		 1434#ifdef CONFIG_PMAC_BACKLIGHT
1435 if (len == 3)
4b755999
MH		 1436 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1437#endif
b5c7ccca
FT		 1438 break;
1439
1da177e4 1440 /* Tick interrupt */
b5c7ccca
FT		 1441 case PMU_INT_TICK:
1442 /* Environment or tick interrupt, query batteries */
1da177e4
LT		 1443 if (pmu_battery_count) {
1444 if ((--query_batt_timer) == 0) {
1445 query_battery_state();
1446 query_batt_timer = BATTERY_POLLING_COUNT;
1447 }
1448 }
b5c7ccca
FT		 1449 break;
1450
1451 case PMU_INT_ENVIRONMENT:
1da177e4
LT		 1452 if (pmu_battery_count)
1453 query_battery_state();
1454 pmu_pass_intr(data, len);
9e8e30a0
JB		 1455 /* len == 6 is probably a bad check. But how do I
1456 * know what PMU versions send what events here? */
86ce436e 1457 if (IS_ENABLED(CONFIG_ADB_PMU_EVENT) && len == 6) {
9e8e30a0
JB		 1458 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1459 via_pmu_event(PMU_EVT_LID, data[1]&1);
1460 }
b5c7ccca
FT		 1461 break;
1462
1463 default:
1da177e4 1464 pmu_pass_intr(data, len);
1da177e4
LT		 1465 }
1466 goto next;
1467}
1468
aacaf9bd 1469static struct adb_request*
7d12e780 1470pmu_sr_intr(void)
1da177e4
LT		 1471{
1472 struct adb_request *req;
1473 int bite = 0;
1474
c70c35da
FT		 1475 if (in_8(&via2[B]) & TREQ) {
1476 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via2[B]));
1da177e4
LT		 1477 return NULL;
1478 }
1479 /* The ack may not yet be low when we get the interrupt */
c70c35da 1480 while ((in_8(&via2[B]) & TACK) != 0)
1da177e4
LT		 1481 ;
1482
1483 /* if reading grab the byte, and reset the interrupt */
1484 if (pmu_state == reading || pmu_state == reading_intr)
c70c35da 1485 bite = in_8(&via1[SR]);
1da177e4
LT		 1486
1487 /* reset TREQ and wait for TACK to go high */
c70c35da 1488 out_8(&via2[B], in_8(&via2[B]) | TREQ);
1da177e4
LT		 1489 wait_for_ack();
1490
1491 switch (pmu_state) {
1492 case sending:
1493 req = current_req;
1494 if (data_len < 0) {
1495 data_len = req->nbytes - 1;
1496 send_byte(data_len);
1497 break;
1498 }
1499 if (data_index <= data_len) {
1500 send_byte(req->data[data_index++]);
1501 break;
1502 }
1503 req->sent = 1;
1504 data_len = pmu_data_len[req->data[0]][1];
1505 if (data_len == 0) {
1506 pmu_state = idle;
1507 current_req = req->next;
1508 if (req->reply_expected)
1509 req_awaiting_reply = req;
1510 else
1511 return req;
1512 } else {
1513 pmu_state = reading;
1514 data_index = 0;
1515 reply_ptr = req->reply + req->reply_len;
1516 recv_byte();
1517 }
1518 break;
1519
1520 case intack:
1521 data_index = 0;
1522 data_len = -1;
1523 pmu_state = reading_intr;
1524 reply_ptr = interrupt_data[int_data_last];
1525 recv_byte();
1526 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1527 enable_irq(gpio_irq);
1528 gpio_irq_enabled = 1;
1529 }
1530 break;
1531
1532 case reading:
1533 case reading_intr:
1534 if (data_len == -1) {
1535 data_len = bite;
1536 if (bite > 32)
1537 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1538 } else if (data_index < 32) {
1539 reply_ptr[data_index++] = bite;
1540 }
1541 if (data_index < data_len) {
1542 recv_byte();
1543 break;
1544 }
1545
1546 if (pmu_state == reading_intr) {
1547 pmu_state = idle;
1548 int_data_state[int_data_last] = int_data_ready;
1549 interrupt_data_len[int_data_last] = data_len;
1550 } else {
1551 req = current_req;
1552 /*
1553 * For PMU sleep and freq change requests, we lock the
c03983ac 1554 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT		 1555 * spurrious event polling getting in
1556 */
1557 current_req = req->next;
1558 req->reply_len += data_index;
1559 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1560 pmu_state = locked;
1561 else
1562 pmu_state = idle;
1563 return req;
1564 }
1565 break;
1566
1567 default:
1568 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1569 pmu_state);
1570 }
1571 return NULL;
1572}
1573
aacaf9bd 1574static irqreturn_t
7d12e780 1575via_pmu_interrupt(int irq, void *arg)
1da177e4
LT		 1576{
1577 unsigned long flags;
1578 int intr;
1579 int nloop = 0;
1580 int int_data = -1;
1581 struct adb_request *req = NULL;
1582 int handled = 0;
1583
1584 /* This is a bit brutal, we can probably do better */
1585 spin_lock_irqsave(&pmu_lock, flags);
1586 ++disable_poll;
1587
1588 for (;;) {
c16a85a5
FT		 1589 /* On 68k Macs, VIA interrupts are dispatched individually.
1590 * Unless we are polling, the relevant IRQ flag has already
1591 * been cleared.
1592 */
1593 intr = 0;
1594 if (IS_ENABLED(CONFIG_PPC_PMAC) || !irq) {
1595 intr = in_8(&via1[IFR]) & (SR_INT | CB1_INT);
1596 out_8(&via1[IFR], intr);
1597 }
1598#ifndef CONFIG_PPC_PMAC
1599 switch (irq) {
1600 case IRQ_MAC_ADB_CL:
1601 intr = CB1_INT;
1602 break;
1603 case IRQ_MAC_ADB_SR:
1604 intr = SR_INT;
1605 break;
1606 }
1607#endif
1da177e4
LT		 1608 if (intr == 0)
1609 break;
1610 handled = 1;
1611 if (++nloop > 1000) {
1612 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1613 "intr=%x, ier=%x pmu_state=%d\n",
c70c35da 1614 intr, in_8(&via1[IER]), pmu_state);
1da177e4
LT		 1615 break;
1616 }
1da177e4
LT		 1617 if (intr & CB1_INT) {
1618 adb_int_pending = 1;
6edc22fc 1619 pmu_irq_stats[11]++;
1da177e4
LT		 1620 }
1621 if (intr & SR_INT) {
7d12e780 1622 req = pmu_sr_intr();
1da177e4
LT		 1623 if (req)
1624 break;
1625 }
c16a85a5
FT		 1626#ifndef CONFIG_PPC_PMAC
1627 break;
1628#endif
1da177e4
LT		 1629 }
1630
1631recheck:
1632 if (pmu_state == idle) {
1633 if (adb_int_pending) {
1634 if (int_data_state[0] == int_data_empty)
1635 int_data_last = 0;
1636 else if (int_data_state[1] == int_data_empty)
1637 int_data_last = 1;
1638 else
1639 goto no_free_slot;
1640 pmu_state = intack;
1641 int_data_state[int_data_last] = int_data_fill;
1642 /* Sounds safer to make sure ACK is high before writing.
1643 * This helped kill a problem with ADB and some iBooks
1644 */
1645 wait_for_ack();
1646 send_byte(PMU_INT_ACK);
1647 adb_int_pending = 0;
1648 } else if (current_req)
1649 pmu_start();
1650 }
1651no_free_slot:
1652 /* Mark the oldest buffer for flushing */
1653 if (int_data_state[!int_data_last] == int_data_ready) {
1654 int_data_state[!int_data_last] = int_data_flush;
1655 int_data = !int_data_last;
1656 } else if (int_data_state[int_data_last] == int_data_ready) {
1657 int_data_state[int_data_last] = int_data_flush;
1658 int_data = int_data_last;
1659 }
1660 --disable_poll;
1661 spin_unlock_irqrestore(&pmu_lock, flags);
1662
1663 /* Deal with completed PMU requests outside of the lock */
1664 if (req) {
1665 pmu_done(req);
1666 req = NULL;
1667 }
1668
1669 /* Deal with interrupt datas outside of the lock */
1670 if (int_data >= 0) {
7d12e780 1671 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT		 1672 spin_lock_irqsave(&pmu_lock, flags);
1673 ++disable_poll;
1674 int_data_state[int_data] = int_data_empty;
1675 int_data = -1;
1676 goto recheck;
1677 }
1678
1679 return IRQ_RETVAL(handled);
1680}
1681
aacaf9bd 1682void
1da177e4
LT		 1683pmu_unlock(void)
1684{
1685 unsigned long flags;
1686
1687 spin_lock_irqsave(&pmu_lock, flags);
1688 if (pmu_state == locked)
1689 pmu_state = idle;
1690 adb_int_pending = 1;
1691 spin_unlock_irqrestore(&pmu_lock, flags);
1692}
1693
1694
c16a85a5 1695static __maybe_unused irqreturn_t
7d12e780 1696gpio1_interrupt(int irq, void *arg)
1da177e4
LT		 1697{
1698 unsigned long flags;
1699
1700 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1701 spin_lock_irqsave(&pmu_lock, flags);
1702 if (gpio_irq_enabled > 0) {
1703 disable_irq_nosync(gpio_irq);
1704 gpio_irq_enabled = 0;
1705 }
6edc22fc 1706 pmu_irq_stats[12]++;
1da177e4
LT		 1707 adb_int_pending = 1;
1708 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1709 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1710 return IRQ_HANDLED;
1711 }
1712 return IRQ_NONE;
1713}
1714
aacaf9bd 1715void
1da177e4
LT		 1716pmu_enable_irled(int on)
1717{
1718 struct adb_request req;
1719
c57902d5 1720 if (pmu_state == uninitialized)
1da177e4
LT		 1721 return ;
1722 if (pmu_kind == PMU_KEYLARGO_BASED)
1723 return ;
1724
1725 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1726 (on ? PMU_POW_ON : PMU_POW_OFF));
1727 pmu_wait_complete(&req);
1728}
1729
0792a2c8
FT		 1730/* Offset between Unix time (1970-based) and Mac time (1904-based) */
1731#define RTC_OFFSET 2082844800
1732
1733time64_t pmu_get_time(void)
1734{
1735 struct adb_request req;
1736 u32 now;
1737
1738 if (pmu_request(&req, NULL, 1, PMU_READ_RTC) < 0)
1739 return 0;
1740 pmu_wait_complete(&req);
1741 if (req.reply_len != 4)
1742 pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1743 now = (req.reply[0] << 24) + (req.reply[1] << 16) +
1744 (req.reply[2] << 8) + req.reply[3];
1745 return (time64_t)now - RTC_OFFSET;
1746}
1747
1748int pmu_set_rtc_time(struct rtc_time *tm)
1749{
1750 u32 now;
1751 struct adb_request req;
1752
1753 now = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
1754 if (pmu_request(&req, NULL, 5, PMU_SET_RTC,
1755 now >> 24, now >> 16, now >> 8, now) < 0)
1756 return -ENXIO;
1757 pmu_wait_complete(&req);
1758 if (req.reply_len != 0)
1759 pr_err("%s: got %d byte reply\n", __func__, req.reply_len);
1760 return 0;
1761}
1762
aacaf9bd 1763void
1da177e4
LT		 1764pmu_restart(void)
1765{
1766 struct adb_request req;
1767
c57902d5 1768 if (pmu_state == uninitialized)
1da177e4
LT		 1769 return;
1770
1771 local_irq_disable();
1772
1773 drop_interrupts = 1;
1774
1775 if (pmu_kind != PMU_KEYLARGO_BASED) {
1776 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1777 PMU_INT_TICK );
1778 while(!req.complete)
1779 pmu_poll();
1780 }
1781
1782 pmu_request(&req, NULL, 1, PMU_RESET);
1783 pmu_wait_complete(&req);
1784 for (;;)
1785 ;
1786}
1787
aacaf9bd 1788void
1da177e4
LT		 1789pmu_shutdown(void)
1790{
1791 struct adb_request req;
1792
c57902d5 1793 if (pmu_state == uninitialized)
1da177e4
LT		 1794 return;
1795
1796 local_irq_disable();
1797
1798 drop_interrupts = 1;
1799
1800 if (pmu_kind != PMU_KEYLARGO_BASED) {
1801 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1802 PMU_INT_TICK );
1803 pmu_wait_complete(&req);
1804 } else {
1805 /* Disable server mode on shutdown or we'll just
1806 * wake up again
1807 */
1808 pmu_set_server_mode(0);
1809 }
1810
1811 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1812 'M', 'A', 'T', 'T');
1813 pmu_wait_complete(&req);
1814 for (;;)
1815 ;
1816}
1817
1818int
1819pmu_present(void)
1820{
c57902d5 1821 return pmu_state != uninitialized;
1da177e4
LT		 1822}
1823
f91266ed 1824#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 1825/*
1826 * Put the powerbook to sleep.
1827 */
1828
aacaf9bd 1829static u32 save_via[8];
0751fdf2 1830static int __fake_sleep;
1da177e4 1831
aacaf9bd 1832static void
1da177e4
LT		 1833save_via_state(void)
1834{
c70c35da
FT		 1835 save_via[0] = in_8(&via1[ANH]);
1836 save_via[1] = in_8(&via1[DIRA]);
1837 save_via[2] = in_8(&via1[B]);
1838 save_via[3] = in_8(&via1[DIRB]);
1839 save_via[4] = in_8(&via1[PCR]);
1840 save_via[5] = in_8(&via1[ACR]);
1841 save_via[6] = in_8(&via1[T1CL]);
1842 save_via[7] = in_8(&via1[T1CH]);
1da177e4 1843}
aacaf9bd 1844static void
1da177e4
LT		 1845restore_via_state(void)
1846{
c70c35da
FT		 1847 out_8(&via1[ANH], save_via[0]);
1848 out_8(&via1[DIRA], save_via[1]);
1849 out_8(&via1[B], save_via[2]);
1850 out_8(&via1[DIRB], save_via[3]);
1851 out_8(&via1[PCR], save_via[4]);
1852 out_8(&via1[ACR], save_via[5]);
1853 out_8(&via1[T1CL], save_via[6]);
1854 out_8(&via1[T1CH], save_via[7]);
1855 out_8(&via1[IER], IER_CLR | 0x7f); /* disable all intrs */
1856 out_8(&via1[IFR], 0x7f); /* clear IFR */
1857 out_8(&via1[IER], IER_SET | SR_INT | CB1_INT);
1da177e4
LT		 1858}
1859
1da177e4
LT		 1860#define GRACKLE_PM (1<<7)
1861#define GRACKLE_DOZE (1<<5)
1862#define GRACKLE_NAP (1<<4)
1863#define GRACKLE_SLEEP (1<<3)
1864
3bea6313 1865static int powerbook_sleep_grackle(void)
1da177e4
LT		 1866{
1867 unsigned long save_l2cr;
1868 unsigned short pmcr1;
1869 struct adb_request req;
1da177e4
LT		 1870 struct pci_dev *grackle;
1871
67c8d326 1872 grackle = pci_get_domain_bus_and_slot(0, 0, 0);
1da177e4
LT		 1873 if (!grackle)
1874 return -ENODEV;
1875
1da177e4
LT		 1876 /* Turn off various things. Darwin does some retry tests here... */
1877 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1878 pmu_wait_complete(&req);
1879 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1880 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1881 pmu_wait_complete(&req);
1882
1883 /* For 750, save backside cache setting and disable it */
1884 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1885
1886 if (!__fake_sleep) {
1887 /* Ask the PMU to put us to sleep */
1888 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1889 pmu_wait_complete(&req);
1890 }
1891
1892 /* The VIA is supposed not to be restored correctly*/
1893 save_via_state();
1894 /* We shut down some HW */
1895 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1896
1897 pci_read_config_word(grackle, 0x70, &pmcr1);
1898 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1899 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1900 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1901 pci_write_config_word(grackle, 0x70, pmcr1);
1902
1903 /* Call low-level ASM sleep handler */
1904 if (__fake_sleep)
1905 mdelay(5000);
1906 else
1907 low_sleep_handler();
1908
1909 /* We're awake again, stop grackle PM */
1910 pci_read_config_word(grackle, 0x70, &pmcr1);
1911 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1912 pci_write_config_word(grackle, 0x70, pmcr1);
1913
c78f8305
AC		 1914 pci_dev_put(grackle);
1915
1da177e4
LT		 1916 /* Make sure the PMU is idle */
1917 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1918 restore_via_state();
1919
1920 /* Restore L2 cache */
1921 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1922 _set_L2CR(save_l2cr);
1923
1924 /* Restore userland MMU context */
d2adba3f 1925 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 1926
1927 /* Power things up */
1928 pmu_unlock();
1929 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1930 pmu_wait_complete(&req);
1931 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1932 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1933 pmu_wait_complete(&req);
1934 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1935 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1936 pmu_wait_complete(&req);
1937
1da177e4
LT		 1938 return 0;
1939}
1940
aacaf9bd 1941static int
1da177e4
LT		 1942powerbook_sleep_Core99(void)
1943{
1944 unsigned long save_l2cr;
1945 unsigned long save_l3cr;
1946 struct adb_request req;
1da177e4
LT		 1947
1948 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1949 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1950 return -ENOSYS;
1951 }
1952
1953 if (num_online_cpus() > 1 || cpu_is_offline(0))
1954 return -EAGAIN;
1955
b16eeb47
BH		 1956 /* Stop environment and ADB interrupts */
1957 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1958 pmu_wait_complete(&req);
1da177e4
LT		 1959
1960 /* Tell PMU what events will wake us up */
1961 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1962 0xff, 0xff);
1963 pmu_wait_complete(&req);
1964 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1965 0, PMU_PWR_WAKEUP_KEY |
1966 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1967 pmu_wait_complete(&req);
1968
1969 /* Save the state of the L2 and L3 caches */
1970 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1971 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1972
1973 if (!__fake_sleep) {
1974 /* Ask the PMU to put us to sleep */
1975 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1976 pmu_wait_complete(&req);
1977 }
1978
1979 /* The VIA is supposed not to be restored correctly*/
1980 save_via_state();
1981
1982 /* Shut down various ASICs. There's a chance that we can no longer
1983 * talk to the PMU after this, so I moved it to _after_ sending the
1984 * sleep command to it. Still need to be checked.
1985 */
1986 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1987
1988 /* Call low-level ASM sleep handler */
1989 if (__fake_sleep)
1990 mdelay(5000);
1991 else
1992 low_sleep_handler();
1993
1994 /* Restore Apple core ASICs state */
1995 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1996
1997 /* Restore VIA */
1998 restore_via_state();
1999
0086b5ec
BH		 2000 /* tweak LPJ before cpufreq is there */
2001 loops_per_jiffy *= 2;
2002
1da177e4
LT		 2003 /* Restore video */
2004 pmac_call_early_video_resume();
2005
2006 /* Restore L2 cache */
2007 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2008 _set_L2CR(save_l2cr);
2009 /* Restore L3 cache */
2010 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2011 _set_L3CR(save_l3cr);
2012
2013 /* Restore userland MMU context */
d2adba3f 2014 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 2015
2016 /* Tell PMU we are ready */
2017 pmu_unlock();
2018 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2019 pmu_wait_complete(&req);
2020 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
2021 pmu_wait_complete(&req);
2022
0086b5ec
BH		 2023 /* Restore LPJ, cpufreq will adjust the cpu frequency */
2024 loops_per_jiffy /= 2;
2025
1da177e4
LT		 2026 return 0;
2027}
2028
2029#define PB3400_MEM_CTRL 0xf8000000
2030#define PB3400_MEM_CTRL_SLEEP 0x70
2031
887ef35a
PM		 2032static void __iomem *pb3400_mem_ctrl;
2033
2034static void powerbook_sleep_init_3400(void)
2035{
2036 /* map in the memory controller registers */
2037 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
2038 if (pb3400_mem_ctrl == NULL)
2039 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
2040}
2041
2042static int powerbook_sleep_3400(void)
1da177e4 2043{
f91266ed 2044 int i, x;
1da177e4 2045 unsigned int hid0;
887ef35a 2046 unsigned long msr;
1da177e4 2047 struct adb_request sleep_req;
1da177e4
LT		 2048 unsigned int __iomem *mem_ctrl_sleep;
2049
887ef35a 2050 if (pb3400_mem_ctrl == NULL)
1da177e4 2051 return -ENOMEM;
887ef35a 2052 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 2053
1da177e4
LT		 2054 /* Set the memory controller to keep the memory refreshed
2055 while we're asleep */
2056 for (i = 0x403f; i >= 0x4000; --i) {
2057 out_be32(mem_ctrl_sleep, i);
2058 do {
2059 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
2060 } while (x == 0);
2061 if (x >= 0x100)
2062 break;
2063 }
2064
2065 /* Ask the PMU to put us to sleep */
2066 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM		 2067 pmu_wait_complete(&sleep_req);
2068 pmu_unlock();
1da177e4 2069
887ef35a 2070 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 2071
1da177e4
LT		 2072 asleep = 1;
2073
2074 /* Put the CPU into sleep mode */
21fe3301 2075 hid0 = mfspr(SPRN_HID0);
1da177e4 2076 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 2077 mtspr(SPRN_HID0, hid0);
887ef35a
PM		 2078 local_irq_enable();
2079 msr = mfmsr() | MSR_POW;
2080 while (asleep) {
2081 mb();
2082 mtmsr(msr);
2083 isync();
2084 }
2085 local_irq_disable();
1da177e4
LT		 2086
2087 /* OK, we're awake again, start restoring things */
2088 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 2089 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 2090
1da177e4
LT		 2091 return 0;
2092}
2093
f91266ed 2094#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 2095
1da177e4
LT		 2096/*
2097 * Support for /dev/pmu device
2098 */
2099#define RB_SIZE 0x10
2100struct pmu_private {
2101 struct list_head list;
2102 int rb_get;
2103 int rb_put;
2104 struct rb_entry {
2105 unsigned short len;
2106 unsigned char data[16];
2107 } rb_buf[RB_SIZE];
2108 wait_queue_head_t wait;
2109 spinlock_t lock;
2110#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2111 int backlight_locker;
4b755999 2112#endif
1da177e4
LT		 2113};
2114
2115static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2116static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2117
aacaf9bd 2118static void
1da177e4
LT		 2119pmu_pass_intr(unsigned char *data, int len)
2120{
2121 struct pmu_private *pp;
2122 struct list_head *list;
2123 int i;
2124 unsigned long flags;
2125
2126 if (len > sizeof(pp->rb_buf[0].data))
2127 len = sizeof(pp->rb_buf[0].data);
2128 spin_lock_irqsave(&all_pvt_lock, flags);
2129 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2130 pp = list_entry(list, struct pmu_private, list);
2131 spin_lock(&pp->lock);
2132 i = pp->rb_put + 1;
2133 if (i >= RB_SIZE)
2134 i = 0;
2135 if (i != pp->rb_get) {
2136 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2137 rp->len = len;
2138 memcpy(rp->data, data, len);
2139 pp->rb_put = i;
2140 wake_up_interruptible(&pp->wait);
2141 }
2142 spin_unlock(&pp->lock);
2143 }
2144 spin_unlock_irqrestore(&all_pvt_lock, flags);
2145}
2146
aacaf9bd 2147static int
1da177e4
LT		 2148pmu_open(struct inode *inode, struct file *file)
2149{
2150 struct pmu_private *pp;
2151 unsigned long flags;
2152
2153 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
d8731527 2154 if (!pp)
1da177e4
LT		 2155 return -ENOMEM;
2156 pp->rb_get = pp->rb_put = 0;
2157 spin_lock_init(&pp->lock);
2158 init_waitqueue_head(&pp->wait);
d851b6e0 2159 mutex_lock(&pmu_info_proc_mutex);
1da177e4
LT		 2160 spin_lock_irqsave(&all_pvt_lock, flags);
2161#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2162 pp->backlight_locker = 0;
4b755999 2163#endif
1da177e4
LT		 2164 list_add(&pp->list, &all_pmu_pvt);
2165 spin_unlock_irqrestore(&all_pvt_lock, flags);
2166 file->private_data = pp;
d851b6e0 2167 mutex_unlock(&pmu_info_proc_mutex);
1da177e4
LT		 2168 return 0;
2169}
2170
aacaf9bd 2171static ssize_t
1da177e4
LT		 2172pmu_read(struct file *file, char __user *buf,
2173 size_t count, loff_t *ppos)
2174{
2175 struct pmu_private *pp = file->private_data;
2176 DECLARE_WAITQUEUE(wait, current);
2177 unsigned long flags;
2178 int ret = 0;
2179
d8731527 2180 if (count < 1 || !pp)
1da177e4 2181 return -EINVAL;
1da177e4
LT		 2182
2183 spin_lock_irqsave(&pp->lock, flags);
2184 add_wait_queue(&pp->wait, &wait);
111fbc68 2185 set_current_state(TASK_INTERRUPTIBLE);
1da177e4
LT		 2186
2187 for (;;) {
2188 ret = -EAGAIN;
2189 if (pp->rb_get != pp->rb_put) {
2190 int i = pp->rb_get;
2191 struct rb_entry *rp = &pp->rb_buf[i];
2192 ret = rp->len;
2193 spin_unlock_irqrestore(&pp->lock, flags);
2194 if (ret > count)
2195 ret = count;
2196 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2197 ret = -EFAULT;
2198 if (++i >= RB_SIZE)
2199 i = 0;
2200 spin_lock_irqsave(&pp->lock, flags);
2201 pp->rb_get = i;
2202 }
2203 if (ret >= 0)
2204 break;
2205 if (file->f_flags & O_NONBLOCK)
2206 break;
2207 ret = -ERESTARTSYS;
2208 if (signal_pending(current))
2209 break;
2210 spin_unlock_irqrestore(&pp->lock, flags);
2211 schedule();
2212 spin_lock_irqsave(&pp->lock, flags);
2213 }
111fbc68 2214 __set_current_state(TASK_RUNNING);
1da177e4
LT		 2215 remove_wait_queue(&pp->wait, &wait);
2216 spin_unlock_irqrestore(&pp->lock, flags);
2217
2218 return ret;
2219}
2220
aacaf9bd 2221static ssize_t
1da177e4
LT		 2222pmu_write(struct file *file, const char __user *buf,
2223 size_t count, loff_t *ppos)
2224{
2225 return 0;
2226}
2227
afc9a42b 2228static __poll_t
1da177e4
LT		 2229pmu_fpoll(struct file *filp, poll_table *wait)
2230{
2231 struct pmu_private *pp = filp->private_data;
afc9a42b 2232 __poll_t mask = 0;
1da177e4
LT		 2233 unsigned long flags;
2234
d8731527 2235 if (!pp)
1da177e4
LT		 2236 return 0;
2237 poll_wait(filp, &pp->wait, wait);
2238 spin_lock_irqsave(&pp->lock, flags);
2239 if (pp->rb_get != pp->rb_put)
a9a08845 2240 mask |= EPOLLIN;
1da177e4
LT		 2241 spin_unlock_irqrestore(&pp->lock, flags);
2242 return mask;
2243}
2244
aacaf9bd 2245static int
1da177e4
LT		 2246pmu_release(struct inode *inode, struct file *file)
2247{
2248 struct pmu_private *pp = file->private_data;
2249 unsigned long flags;
2250
d8731527 2251 if (pp) {
1da177e4
LT		 2252 file->private_data = NULL;
2253 spin_lock_irqsave(&all_pvt_lock, flags);
2254 list_del(&pp->list);
2255 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2256
1da177e4 2257#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH		 2258 if (pp->backlight_locker)
2259 pmac_backlight_enable();
2260#endif
2261
1da177e4
LT		 2262 kfree(pp);
2263 }
1da177e4
LT		 2264 return 0;
2265}
2266
f91266ed 2267#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2268static void pmac_suspend_disable_irqs(void)
f91266ed 2269{
f91266ed
JB		 2270 /* Call platform functions marked "on sleep" */
2271 pmac_pfunc_i2c_suspend();
2272 pmac_pfunc_base_suspend();
f91266ed
JB		 2273}
2274
2275static int powerbook_sleep(suspend_state_t state)
2276{
2277 int error = 0;
2278
2279 /* Wait for completion of async requests */
2280 while (!batt_req.complete)
2281 pmu_poll();
2282
2283 /* Giveup the lazy FPU & vec so we don't have to back them
2284 * up from the low level code
2285 */
2286 enable_kernel_fp();
2287
2288#ifdef CONFIG_ALTIVEC
2289 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2290 enable_kernel_altivec();
2291#endif /* CONFIG_ALTIVEC */
2292
2293 switch (pmu_kind) {
2294 case PMU_OHARE_BASED:
2295 error = powerbook_sleep_3400();
2296 break;
2297 case PMU_HEATHROW_BASED:
2298 case PMU_PADDINGTON_BASED:
2299 error = powerbook_sleep_grackle();
2300 break;
2301 case PMU_KEYLARGO_BASED:
2302 error = powerbook_sleep_Core99();
2303 break;
2304 default:
2305 return -ENOSYS;
2306 }
2307
2308 if (error)
2309 return error;
2310
2311 mdelay(100);
2312
f91266ed
JB		 2313 return 0;
2314}
2315
7ac5dde9 2316static void pmac_suspend_enable_irqs(void)
f91266ed
JB		 2317{
2318 /* Force a poll of ADB interrupts */
2319 adb_int_pending = 1;
2320 via_pmu_interrupt(0, NULL);
2321
f91266ed 2322 mdelay(10);
f91266ed
JB		 2323
2324 /* Call platform functions marked "on wake" */
2325 pmac_pfunc_base_resume();
2326 pmac_pfunc_i2c_resume();
2327}
2328
2329static int pmu_sleep_valid(suspend_state_t state)
2330{
2331 return state == PM_SUSPEND_MEM
2332 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2333}
2334
2f55ac07 2335static const struct platform_suspend_ops pmu_pm_ops = {
f91266ed
JB		 2336 .enter = powerbook_sleep,
2337 .valid = pmu_sleep_valid,
2338};
2339
2340static int register_pmu_pm_ops(void)
2341{
7ac5dde9
SW		 2342 if (pmu_kind == PMU_OHARE_BASED)
2343 powerbook_sleep_init_3400();
2344 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2345 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB		 2346 suspend_set_ops(&pmu_pm_ops);
2347
2348 return 0;
2349}
2350
2351device_initcall(register_pmu_pm_ops);
2352#endif
2353
55929332 2354static int pmu_ioctl(struct file *filp,
1da177e4
LT		 2355 u_int cmd, u_long arg)
2356{
1da177e4 2357 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2358 int error = -EINVAL;
1da177e4
LT		 2359
2360 switch (cmd) {
c16a85a5 2361#ifdef CONFIG_PPC_PMAC
1da177e4
LT		 2362 case PMU_IOC_SLEEP:
2363 if (!capable(CAP_SYS_ADMIN))
2364 return -EACCES;
f91266ed 2365 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2366 case PMU_IOC_CAN_SLEEP:
f91266ed 2367 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT		 2368 return put_user(0, argp);
2369 else
2370 return put_user(1, argp);
c16a85a5 2371#endif
1da177e4 2372
5474c120
MH		 2373#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2374 /* Compatibility ioctl's for backlight */
1da177e4 2375 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH		 2376 {
2377 int brightness;
2378
5474c120
MH		 2379 brightness = pmac_backlight_get_legacy_brightness();
2380 if (brightness < 0)
2381 return brightness;
2382 else
2383 return put_user(brightness, argp);
2384
2385 }
1da177e4
LT		 2386 case PMU_IOC_SET_BACKLIGHT:
2387 {
5474c120
MH		 2388 int brightness;
2389
5474c120
MH		 2390 error = get_user(brightness, argp);
2391 if (error)
2392 return error;
2393
2394 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT		 2395 }
2396#ifdef CONFIG_INPUT_ADBHID
2397 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2398 struct pmu_private *pp = filp->private_data;
8c870933 2399
1da177e4
LT		 2400 if (pp->backlight_locker)
2401 return 0;
4b755999 2402
1da177e4 2403 pp->backlight_locker = 1;
4b755999
MH		 2404 pmac_backlight_disable();
2405
1da177e4
LT		 2406 return 0;
2407 }
2408#endif /* CONFIG_INPUT_ADBHID */
5474c120 2409#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2410
1da177e4
LT		 2411 case PMU_IOC_GET_MODEL:
2412 return put_user(pmu_kind, argp);
2413 case PMU_IOC_HAS_ADB:
2414 return put_user(pmu_has_adb, argp);
2415 }
8c870933 2416 return error;
1da177e4
LT		 2417}
2418
55929332
AB		 2419static long pmu_unlocked_ioctl(struct file *filp,
2420 u_int cmd, u_long arg)
2421{
2422 int ret;
2423
d851b6e0 2424 mutex_lock(&pmu_info_proc_mutex);
55929332 2425 ret = pmu_ioctl(filp, cmd, arg);
d851b6e0 2426 mutex_unlock(&pmu_info_proc_mutex);
55929332
AB		 2427
2428 return ret;
2429}
2430
4cc4587f
AS		 2431#ifdef CONFIG_COMPAT
2432#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2433#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2434#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2435#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2436#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2437#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2438
2439static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2440{
2441 switch (cmd) {
2442 case PMU_IOC_SLEEP:
2443 break;
2444 case PMU_IOC_GET_BACKLIGHT32:
2445 cmd = PMU_IOC_GET_BACKLIGHT;
2446 break;
2447 case PMU_IOC_SET_BACKLIGHT32:
2448 cmd = PMU_IOC_SET_BACKLIGHT;
2449 break;
2450 case PMU_IOC_GET_MODEL32:
2451 cmd = PMU_IOC_GET_MODEL;
2452 break;
2453 case PMU_IOC_HAS_ADB32:
2454 cmd = PMU_IOC_HAS_ADB;
2455 break;
2456 case PMU_IOC_CAN_SLEEP32:
2457 cmd = PMU_IOC_CAN_SLEEP;
2458 break;
2459 case PMU_IOC_GRAB_BACKLIGHT32:
2460 cmd = PMU_IOC_GRAB_BACKLIGHT;
2461 break;
2462 default:
2463 return -ENOIOCTLCMD;
2464 }
2465 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2466}
2467#endif
2468
fa027c2a 2469static const struct file_operations pmu_device_fops = {
1da177e4
LT		 2470 .read = pmu_read,
2471 .write = pmu_write,
2472 .poll = pmu_fpoll,
55929332 2473 .unlocked_ioctl = pmu_unlocked_ioctl,
4cc4587f
AS		 2474#ifdef CONFIG_COMPAT
2475 .compat_ioctl = compat_pmu_ioctl,
2476#endif
1da177e4
LT		 2477 .open = pmu_open,
2478 .release = pmu_release,
6038f373 2479 .llseek = noop_llseek,
1da177e4
LT		 2480};
2481
aacaf9bd 2482static struct miscdevice pmu_device = {
1da177e4
LT		 2483 PMU_MINOR, "pmu", &pmu_device_fops
2484};
2485
8c870933 2486static int pmu_device_init(void)
1da177e4 2487{
c57902d5 2488 if (pmu_state == uninitialized)
8c870933 2489 return 0;
1da177e4
LT		 2490 if (misc_register(&pmu_device) < 0)
2491 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2492 return 0;
1da177e4 2493}
8c870933
BH		 2494device_initcall(pmu_device_init);
2495
1da177e4
LT		 2496
2497#ifdef DEBUG_SLEEP
aacaf9bd 2498static inline void
c70c35da 2499polled_handshake(void)
1da177e4 2500{
c70c35da
FT		 2501 via2[B] &= ~TREQ; eieio();
2502 while ((via2[B] & TACK) != 0)
1da177e4 2503 ;
c70c35da
FT		 2504 via2[B] |= TREQ; eieio();
2505 while ((via2[B] & TACK) == 0)
1da177e4
LT		 2506 ;
2507}
2508
aacaf9bd 2509static inline void
c70c35da 2510polled_send_byte(int x)
1da177e4 2511{
c70c35da
FT		 2512 via1[ACR] |= SR_OUT | SR_EXT; eieio();
2513 via1[SR] = x; eieio();
2514 polled_handshake();
1da177e4
LT		 2515}
2516
aacaf9bd 2517static inline int
c70c35da 2518polled_recv_byte(void)
1da177e4
LT		 2519{
2520 int x;
2521
c70c35da
FT		 2522 via1[ACR] = (via1[ACR] & ~SR_OUT) | SR_EXT; eieio();
2523 x = via1[SR]; eieio();
2524 polled_handshake();
2525 x = via1[SR]; eieio();
1da177e4
LT		 2526 return x;
2527}
2528
aacaf9bd 2529int
1da177e4
LT		 2530pmu_polled_request(struct adb_request *req)
2531{
2532 unsigned long flags;
2533 int i, l, c;
1da177e4
LT		 2534
2535 req->complete = 1;
2536 c = req->data[0];
2537 l = pmu_data_len[c][0];
2538 if (l >= 0 && req->nbytes != l + 1)
2539 return -EINVAL;
2540
2541 local_irq_save(flags);
2542 while (pmu_state != idle)
2543 pmu_poll();
2544
c70c35da 2545 while ((via2[B] & TACK) == 0)
1da177e4 2546 ;
c70c35da 2547 polled_send_byte(c);
1da177e4
LT		 2548 if (l < 0) {
2549 l = req->nbytes - 1;
c70c35da 2550 polled_send_byte(l);
1da177e4
LT		 2551 }
2552 for (i = 1; i <= l; ++i)
c70c35da 2553 polled_send_byte(req->data[i]);
1da177e4
LT		 2554
2555 l = pmu_data_len[c][1];
2556 if (l < 0)
c70c35da 2557 l = polled_recv_byte();
1da177e4 2558 for (i = 0; i < l; ++i)
c70c35da 2559 req->reply[i + req->reply_len] = polled_recv_byte();
1da177e4
LT		 2560
2561 if (req->done)
2562 (*req->done)(req);
2563
2564 local_irq_restore(flags);
2565 return 0;
2566}
1da177e4 2567
f91266ed
JB		 2568/* N.B. This doesn't work on the 3400 */
2569void pmu_blink(int n)
2570{
2571 struct adb_request req;
1da177e4 2572
f91266ed 2573 memset(&req, 0, sizeof(req));
1da177e4 2574
f91266ed
JB		 2575 for (; n > 0; --n) {
2576 req.nbytes = 4;
2577 req.done = NULL;
2578 req.data[0] = 0xee;
2579 req.data[1] = 4;
2580 req.data[2] = 0;
2581 req.data[3] = 1;
2582 req.reply[0] = ADB_RET_OK;
2583 req.reply_len = 1;
2584 req.reply_expected = 0;
2585 pmu_polled_request(&req);
2586 mdelay(50);
2587 req.nbytes = 4;
2588 req.done = NULL;
2589 req.data[0] = 0xee;
2590 req.data[1] = 4;
2591 req.data[2] = 0;
2592 req.data[3] = 0;
2593 req.reply[0] = ADB_RET_OK;
2594 req.reply_len = 1;
2595 req.reply_expected = 0;
2596 pmu_polled_request(&req);
2597 mdelay(50);
2598 }
2599 mdelay(50);
2600}
2601#endif /* DEBUG_SLEEP */
1da177e4 2602
f91266ed 2603#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2604int pmu_sys_suspended;
1da177e4 2605
e83b906c 2606static int pmu_syscore_suspend(void)
1da177e4 2607{
e83b906c 2608 /* Suspend PMU event interrupts */
1da177e4 2609 pmu_suspend();
1da177e4 2610 pmu_sys_suspended = 1;
0094f2cd
BH		 2611
2612#ifdef CONFIG_PMAC_BACKLIGHT
2613 /* Tell backlight code not to muck around with the chip anymore */
2614 pmu_backlight_set_sleep(1);
2615#endif
2616
1da177e4
LT		 2617 return 0;
2618}
2619
e83b906c 2620static void pmu_syscore_resume(void)
1da177e4
LT		 2621{
2622 struct adb_request req;
2623
2624 if (!pmu_sys_suspended)
e83b906c 2625 return;
1da177e4
LT		 2626
2627 /* Tell PMU we are ready */
2628 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2629 pmu_wait_complete(&req);
2630
0094f2cd
BH		 2631#ifdef CONFIG_PMAC_BACKLIGHT
2632 /* Tell backlight code it can use the chip again */
2633 pmu_backlight_set_sleep(0);
2634#endif
1da177e4
LT		 2635 /* Resume PMU event interrupts */
2636 pmu_resume();
1da177e4 2637 pmu_sys_suspended = 0;
1da177e4
LT		 2638}
2639
e83b906c
BH		 2640static struct syscore_ops pmu_syscore_ops = {
2641 .suspend = pmu_syscore_suspend,
2642 .resume = pmu_syscore_resume,
1da177e4
LT		 2643};
2644
e83b906c 2645static int pmu_syscore_register(void)
1da177e4 2646{
e83b906c 2647 register_syscore_ops(&pmu_syscore_ops);
1da177e4 2648
1da177e4
LT		 2649 return 0;
2650}
e83b906c
BH		 2651subsys_initcall(pmu_syscore_register);
2652#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 2653
2654EXPORT_SYMBOL(pmu_request);
730745a5 2655EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT		 2656EXPORT_SYMBOL(pmu_poll);
2657EXPORT_SYMBOL(pmu_poll_adb);
2658EXPORT_SYMBOL(pmu_wait_complete);
2659EXPORT_SYMBOL(pmu_suspend);
2660EXPORT_SYMBOL(pmu_resume);
2661EXPORT_SYMBOL(pmu_unlock);
620a2459 2662#if defined(CONFIG_PPC32)
1da177e4
LT		 2663EXPORT_SYMBOL(pmu_enable_irled);
2664EXPORT_SYMBOL(pmu_battery_count);
2665EXPORT_SYMBOL(pmu_batteries);
2666EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2667#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2668
Linux 6.x block layer and io_uring tree(s)